MAX20361EVKIT [MAXIM]
On-Board Solar Cell and Current Monitoring;型号: | MAX20361EVKIT |
厂家: | MAXIM INTEGRATED PRODUCTS |
描述: | On-Board Solar Cell and Current Monitoring 监控 |
文件: | 总32页 (文件大小:1495K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
Click here for production status of specific part numbers.
MAX20361
Small, Single-/Multi-Cell Solar Harvester with
MPPT and Harvest Counter
General Description
Benefits and Features
The MAX20361 is a fully integrated solution for
harvesting energy from single-/multi-cell solar sources.
The device includes an ultra-low quiescent current
(360nA) boost converter that is capable of starting from
input voltages as low as 225mV (typ). In order to
maximize the power extracted from the source, the
MAX20361 implements a proprietary maximum power
point tracking (MPPT) technique that allows efficient
harvesting from 15μW to over 300mW of available input
power.
•
Single-/Multi-Cell Solar Energy Harvester
• 225mV to 2.5V (typ) Input-Voltage Range
• Efficient Harvesting from 15μW to Over 300mW
of Available Input Power
- 86% Efficiency at V
= 3.8V, I
= 30mA
SYS
SRC
• Small Solution Size
- Utilizes Small 2016 4.7μH Inductor
•
•
Maximum Power Point Tracking (MPPT) Technique
Using Fractional VOC Method
• Programmable Fractional VOC Regulation Point
The MAX20361 also features an integrated charging
and protection circuit that is optimized for Li-ion
batteries, but can also be used to charge
supercapacitors, thin-film batteries, or traditional
capacitors. The charger features a programmable
charging cut-off voltage with thresholds programmable
2
through I C Interface
Battery/Supercapacitor Charger
• Programmable Battery Termination Voltage
2
through I C Interface
• Programmable Power Good Wake-Up Signal
2
Output Threshold through I C Interface
2
through I C interface as well as temperature shutoff.
The MAX20361 is available in a 12-bump, 0.4mm pitch,
1.63mm x 1.23mm wafer-level package (WLP).
Ordering Information at end of data sheet.
Applications
•
•
•
•
•
Wearable Fitness
Medical Devices
Industrial IoT Sensors
Asset Tracking Devices
Wireless Sensor Networks
19-100866; Rev 1; 9/20
MAX20361
Small, Single-/Multi-Cell Solar Harvester with MPPT
and Harvest Counter
Simplified Block Diagram
SRC
LX
MAX20361
SYS
V
BatReg
or
V
SysReg
BOOST
CONTROLLER
CHARGE
PUMP
V
BatReChg
V
CC
INTERNAL
SUPPLY
MPPT
CONTROLLER
REF
V
WAKE
SDA
SCL
INT
V
TEMP
THM
LOW IQ
OSCILLATOR
DIGITAL LOGIC
AND I/O
WAKE EN
GND
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Maxim Integrated | 2
MAX20361
Small, Single-/Multi-Cell Solar Harvester with
MPPT and Harvest Counter
Absolute Maximum Ratings
SYS, V
to GND ................................................-0.3V to +6V
Continuous Current into any other Pin .......... -0.05A to +0.05A
CC
o
Continuous Power Dissipation (Multilayer Board) (T = +70 C,
A
SRC to GND......................................................-0.3V to +3.5V
, SDA, SCL to GND..................................-0.3V to +6V
WAKE to GND....................................... -0.3V to (SYS + 0.3V)
o
o
derate 13.73mW/ C above +70 C) .........................1098.4mW
,
o
o
Operating Temperature Range ........................-40 C to +85 C
o
o
Junction Temperature Range.........................-40 C to +150 C
REF, THM to GND..................................-0.3V to (V
LX to GND..............................................-0.3V to (V
+ 0.3V)
+ 0.3V)
CC
CC
o
o
Storage Temperature Range .........................-40 C to +150 C
o
Soldering Temperature (reflow)....................................+260 C
Continuous Current into LX, GND or SYS .........-0.5A to +0.5A
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or
any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Package Information
12-WLP
Package Code
W121C1+2
Outline Number
21-100426
Land Pattern Number
Refer to Application Note 1891
THERMAL RESISTANCE, FOUR LAYER BOARD
o
Junction-to-Ambient (θ
)
72.82 C/W
JA
For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note
that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix
character, but the drawing pertains to the package regardless of RoHS status.
Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-
layer board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.
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Maxim Integrated | 3
MAX20361
Small, Single-/Multi-Cell Solar Harvester with
MPPT and Harvest Counter
Electrical Characteristics
(V
= +3.0V to +4.2V, V
= +0.3V to +2.5V, typical value is at V
= +3.8V, V
= +0.6V, T = +25°C.) (Note 1)
SRC A
SYS
SRC
SYS
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
SUPPLY
SYS Shutdown Supply
Current
SYS Sleep Supply
Current
I
DeviceEnb = 1, any V
190
360
1.43
650
nA
nA
μA
SYS_SHDN
SRC
I
DeviceEnb = 0, V
= 0V
SRC
1200
SYS_SLEEP
= 0V, boost not switching, not in sleep
mode
SYS Idle Supply Current
I
SYS_IDLE
SYSTEM CONTROL (SYS)
System Termination
Voltage-Programmable
Range
System Regulation-
Voltage Accuracy
WAKE Voltage-
Programmable Range
WAKE Voltage
2
V
50mV steps, programmable through I C
4 to 4.7
3 to 3.7
V
SYS_REG
V
SysReg[3:0] = 7,
SYS_REG_AC
°
°
T
= 0 C to +60 C
-1
-2
+1
+2
%
V
A
SYS rising
C
V
WAKE_RANG
E
2
100mV steps, programmable through I C
WakeThr[2:0] = 0,
SYS rising
V
%
WAKE_ACC
Accuracy
7 x
Tmeas
8 x
Tmeas
WAKE Debounce Time
t
ms
WAKE_TDEB
BOOST REGULATOR
Input Operating Voltage
at SRC
V
0
2.5
V
SRC_RANGE
Minimum Cold-Start
Voltage
V
T
= 25°C (Note 3)
225
77
350
mV
SC
A
V
= 0.75V, V
= 3.8V,
= 100μA, L = 4.7μH, DFE201612E-
SRC
SYS
I
SRC
4R7M = P2 Series Inductor
= 0.75V, V = 3.8V,
Efficiency
BOOST_EFF
%
V
SRC
SYS
I
= 30mA, L = 4.7μH, DFE201612E-
86
SRC
4R7M = P2 Series Inductor
LX Low-Side On
Resistance
LX SYS High-Side On
Resistance
SRC LX Slow Snubber
Resistance
SRC LX Snubber
Resistance
R
0.1
0.29
20
0.14
0.39
Ω
Ω
ON_LXL
R
ON_LX_SYS
R
kΩ
Ω
LX_SSNUB
R
342
LX_SNUB
I
I
I
I
I
I
I
90
BSTpk0
BSTpk1
BSTpk2
BSTpk3
BSTpk4
BSTpk5
BSTpk6
120
145
180
285
355
470
Peak Current
mA
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Maxim Integrated | 4
MAX20361
Small, Single-/Multi-Cell Solar Harvester with
MPPT and Harvest Counter
(V
SYS
= +3.0V to +4.2V, V
= +0.3V to +2.5V, typical value is at V
= +3.8V, V
= +0.6V, T = +25°C.) (Note 1)
SRC A
SRC
SYS
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
I
715
BSTpk7
SRC METER
SRC DAC Full-Scale
SRC Leakage
V
SRC equivalent voltage
= 1V
2.595
0.75
V
DACFS
I
V
μA
LNKSRC
SRC
MAXIMUM POWER POINT TRACKING
Fractional Open Circuit
Voltage-Programmable
Range
42.5 to
89.0
2
V
1.5% steps, programmable through I C
%
%
FRAC_VOC_P
V
= 0.6V,
SRC
includes
measurement error VOC[7:0] = 75,
Error of Fractional VOC
Regulation Point
V
of VOC and input
voltage regulation
error, excludes
Frac[4:0] = 25,
FRAC_VOC_E
RROR
-4.7
+4.7
BSTpk = 3, I
1mA
=
SRC
SRC ripple (Note 3)
64 *
Tmeas
128 *
Tmeas
256 *
Tmeas
ATper = 0, Tper = 00, see text
ATper = 0, Tper = 01, see text
ATper = 0, Tper = 10, see text
Open Circuit
Measurement Period
t
s
FRAC_VOC
Open Circuit
Measurement-Settling
Time
t
t
FRAC_VOC_S
ETTLE
ATmeas = 0, Tmeas = 00, see text
50
ms
ms
ATmeas = 0, Tmeas = 01, see text
ATmeas = 0, Tmeas = 10, see text
ATmeas = 0, Tmeas = 11, see text
100
250
500
Open Circuit
Measurement Settling
Time
FRAC_VOC_S
ETTLE
V
0.4
1.3
V
ILENB
Input Threshold
V
1.0
0.7
IHENB
Input Resistance
R
1
0
MΩ
ENB
SCL, SDA,
SDA and
Output-
Input
V
,
OLSDA
I = 5mA
0.3
+1
V
Low Voltage
SDA, SCL,
Current
V
OL
I
, I
, I
V_ from 0V to 5.5V
-1
μA
SDA SCL
WAKE
WAKE Output-Low
Voltage
WAKE Output-High
Voltage
V
I = 5mA
I = -5mA
0.3
V
V
OLWAKE
SYS -
0.3
V
OHWAKE
THERMAL MONITORING (REF, THM)
REF Voltage
V
I
from 0μA to 100μA
REF
1.15
1.2
1.25
V
REF
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Maxim Integrated | 5
MAX20361
Small, Single-/Multi-Cell Solar Harvester with
MPPT and Harvest Counter
(V
SYS
= +3.0V to +4.2V, V
= +0.3V to +2.5V, typical value is at V
= +3.8V, V
= +0.6V, T = +25°C.) (Note 1)
SRC A
SRC
SYS
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Cold Temperature Trip-
Point Programmable
Range
Hot Temperature Trip-
Point Programmable
Range
V
53.5
57.5
60
%V
COLD
REF
REF
V
16.2
-1
18.7
22
+1
%V
HOT
THM Input Leakage
I
μA
THM
2
I C INTERFACE
V
0.4
SCL and SDA Input
Threshold
IL
V
V
1
IH
2
I C TIMINGS
Serial Operating
Frequency
f
400
kHz
μs
SCL
Maximum Clock Period
t
2.5
0.6
SCLMAX
START Condition Hold
Time
t
μs
HD:STA
Clock Low Period
Clock High Period
t
1.3
0.6
μs
μs
LOW
t
HIGH
START Condition Setup
Time
Repeat START
Condition Setup Time
t
0.6
0.6
μs
SU:STA
t
μs
ns
ns
SU:STA
Data Hold Time
t
0
HD:DAT
Data Valid to SCL Rise
Time
STOP Condition Setup
Time
Bus Free Time Between
STOP and START
Conditions
t
100
0.6
SU:DAT
t
μs
μs
SU:STO
t
1.3
BUF
Note 1: All devices 100% productions tested at 25°C. Limits over the operating temperature range are guaranteed by design.
Note 2: All capacitance values listed in this document refer to effective capacitance. Be sure to specify capacitors that meets these
requirements under typical system operating conditions, taking into consideration the effects of voltage and temperature.
Note 3: Not production tested. Guaranteed by design.
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Maxim Integrated | 6
MAX20361
Small, Single-/Multi-Cell Solar Harvester with
MPPT and Harvest Counter
Typical Operating Characteristics
(T = 25°C, unless otherwise noted.)
A
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Maxim Integrated | 7
MAX20361
Small, Single-/Multi-Cell Solar Harvester with
MPPT and Harvest Counter
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Maxim Integrated | 8
MAX20361
Small, Single-/Multi-Cell Solar Harvester with
MPPT and Harvest Counter
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Maxim Integrated | 9
MAX20361
Small, Single-/Multi-Cell Solar Harvester with
MPPT and Harvest Counter
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Maxim Integrated | 10
MAX20361
Small, Single-/Multi-Cell Solar Harvester with
MPPT and Harvest Counter
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Maxim Integrated | 11
MAX20361
Small, Single-/Multi-Cell Solar Harvester with
MPPT and Harvest Counter
Bump Configuration
TOP VIEW
(BUMP SIDE DOWN)
MAX20361
1
2
3
4
A
B
C
WAKE
SDA
SCL
EN
SRC
LX
REF
THM
GND
SYS
INT
V
CC
WLP
(1.63mm x 1.23mm, 0.4mm PITCH)
Pin Descriptions
PIN
NAME
FUNCTION
Active Low Enable Input. When
is high the device stops switching and enters a low power state.
A1
2
is internally pulled down to GND by a 1MΩ resistor. In the shutdown state, I C is still operational.
Wake Signal for System MCU. This push-pull output is asserted when SYS is above WakeThr[2:0] and
the device is not in sleep mode.
A2
WAKE
2
A3
A4
SDA
SCL
I C Serial Data
2
I C Serial Clock
Source Input. Connect the harvesting source power output to SRC. Connect a 10μF capacitor between
SRC and GND.
B1
SRC
GND
B2
B3
B4
Ground
Open-Drain Interrupt Output
Internal-Voltage Reference
REF
LX
Boost-Converter Switching Node. Connect a 4.7μH inductor between LX and the harvesting source
power output (e.g., anode of solar cell).
C1
System Output. Connect to system input of power management IC. Connect a 1μF bypass capacitor
between SYS and GND.
C2
C3
C4
SYS
V
Internal Supply. Connect a 1μF bypass capacitor between V and GND.
CC
CC
Thermistor Input. Connect THM to a voltage divider formed by a pullup resistor and a pulldown
thermistor.
THM
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Maxim Integrated | 12
MAX20361
Small, Single-/Multi-Cell Solar Harvester with
MPPT and Harvest Counter
Detailed Description
The MAX20361 is a fully integrated solution for harvesting energy from single-/multi-cell solar sources. The device
includes an ultra-low quiescent-current boost converter that is capable of starting from input voltage as low as 225mV
(typ). In order to maximize the power extracted from the source, the MAX20361 implements a proprietary maximum
power point tracking (MPPT) technique that allows efficient harvesting from 15μW to over 300mW of available input
power.
The MAX20361 also features an integrated charging and protection circuit that is optimized for Li-ion batteries, but can
also be used to charge supercapacitors, thin-film batteries, or traditional capacitors. The charger features a programmable
2
charging cut-off voltage with thresholds programmable through the I C interface as well as temperature shutoff.
Boost Converter
The MAX20361 boost converter is optimized to efficiently harvest energy from a single-/multi-cell solar source. The
MAX20361 implements a boost converter, which collects the current from the low-voltage SRC input and transfers it to
the higher-voltage SYS output.
The switching frequency is not fixed but changes with the SRC voltage, SYS voltage and inductance values. Each time
the SRC voltage drops below its regulation point, the boost is halted. SRC capacitance is needed to reduce the SRC
ripple, but its value is not critical for stability (see the Applications Information section for more details).
The SYS voltage is monitored and when it reaches the regulation point, the boost is halted to avoid overcharging of the
the battery, or an overvoltage on the SYS node.
Harvesting Meter
The MAX20361 reports the count of the switching cycles of the boost converter during the last Tmeas[5:4](0x07) time in
the HarvCntH(0x0A) and HarvCntL(0x0B) registers. This “harvesting count” is proportional to the current harvested during
that period. To avoid a false read, the update of HarvCntH and HarvCntL is inhibited if the boost was halted in the last
Tmeas period due to thermal monitoring, open-circuit voltage measurement, SYS overvoltage detected, sleep mode or
I2C commands.
Every time a new valid value of HarvCntH/L is loaded, the HARrdy[4](0x01) bit is set.
Maximum Power Point Tracking (MPPT)
During normal operation, the MAX20361 automatically measures the open-circuit voltage and computes the optimal SRC
voltage to transfer the maximum power from the solar cell. Every Tper[1:0](0x07) (by default 64 x Tmeas, with Tmeas =
2
50ms, every 3.2s), or when requested by I C, the internal boost is halted for Tmeas[5:4](0x07) and the SRC voltage is
measured with the internal 8-bit ADC.
The SRC regulation point is computed by multiplying the measured voltage at SRC by the Frac[4:0](0x06) field. At power-
up, the MAX20361 keeps 230mV (typ) as the regulation voltage for SRC (VOC[7:0](0x09) register set to 29, equivalent
2
to 290mV, and Frac[4:0] set to 80%) until the first VOC measure or an I C write on VOC[7:0] register is performed. Refer
to Figure 1 for the operation of V
during MPPT.
SRC
To adapt the SRC measurement time, if the ATmeas[3](0x07) bit is set, the MAX20361 modulates the measurement time
based on the last measured “harvesting count” (HarvCntH/L registers), as specified in Table 1 below.
Table 1. Measurement Time Based on Harvesting Count
HARVESTING COUNT VALUE
Less than 13
USED MEASUREMENT TIME
2 x Tmeas
Between 13 and 26
Between 26 and 52
Above 52
Tmeas
Tmeas / 2
Tmeas / 4
The MAX20361 automatically adapts the measurement period when the ATper[2](0x07) bit is set. After power-on reset,
the device ignores the first result of harvesting count and stores the second result in the HarvCntH and HarvCntL registers.
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Maxim Integrated | 13
MAX20361
Small, Single-/Multi-Cell Solar Harvester with
MPPT and Harvest Counter
If any future harvesting count is greater or lower than the existing stored harvesting count by a factor of 2, the Tper timer
is reset and a new VOC measurement is forced immediately.
A VOC measurement can be requested through the FrcMeas[7](0x07) bit. The measurement starts within Tmeas and
results are stored in the VOCMeas(0x09) register, and VOCrdy[3](0x01) bit is set with the corresponding interrupt.
V
SRC
Tmeas OR ATmeas
Tmeas OR ATmeas
Tmeas OR ATmeas
VOC
V
REGULATION
(VOC[7:0] x Frac[4:0])
Tper OR ATper
Tper OR ATper
V
INIT
(230mV)
TIME
SWITCHING
SWITCHING
SWITCHING
SWITCHING
BOOST
ON/OFF
Figure 1. VSRC During Maximum Power Point Tracking
Low-Light Sleep Mode
To save power, the MAX20361 enters sleep mode when the harvesting meter value is below SlpThd[7:0](0x0C) threshold
2
(default 0x00), or when VOC[7:0] is set below 29 (default value of VOC) by either the VOC measurement or a direct I C
write to it. In sleep mode, the internal reference, the boost and the THM monitor are turned off, and SYS and THM are
not monitored, and WAKE output is forced low. The MAX20361 remains in sleep mode until the next VOC or THM
measurement, or a write to VOC[7:0] with a value equal or above 29. Low-power mode is inhibited during cold startup.
WAKE Output
Except in Shutdown or Sleep modes, the MAX20361 monitors the SYS output. When SYS is above the WAKE threshold
for at least 7 to 8 x Tmeas (typ), the WAKE output is asserted (and the WAKEbSt[0](0x01) bit is set to 0). When the device
goes into Sleep or Shutdown mode, WAKE output is forced low. Refer to Figure 2 for the waveform of V
and WAKE
SYS
output.
V
SYS
SysReg[3:0]
SysReChg[2:0]
WAKE THRESHOLD
(WakeThr[2:0])
TIME
SWITCHING
SWITCHING
SWITCHING
SWITCHING
BOOST
ON/OFF
WAKE OUTPUT
SysBatSel
Figure 2. Waveform of VSYS and WAKE Output
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Maxim Integrated | 14
MAX20361
Small, Single-/Multi-Cell Solar Harvester with
MPPT and Harvest Counter
Thermal Monitor
When ThmEn[3](0x08) is 1, the MAX20361 monitors the voltage on THM. The device checks VTHM once if
FrcTHM[6](0x07) is 1 or periodically every Tper[1:0](0x07) time if THMper[6](0x05) is 1. During that process, the
MAX20361 drives REF to 1.2V (typ) for 1ms (typ). The voltage divider, formed by the pullup resistor from THM to REF
and the NTC thermistor from THM to ground, provides a voltage at THM proportional to the temperature as a fraction of
VREF. When VTHM is above 57.5% of VREF or below 18.7% of VREF, THMflag[6](0x01) is set and the boost is halted. These
thresholds are equivalent to 0°C and 45°C if a 10kΩ NTC thermistor with β = 3380 and a 22kΩ pullup resistor are used.
The device also performs a THM check at power-on and on the
first THM check is completed.
falling edge. A fault condition is assumed until this
Shutdown
The device enters Shutdown mode when the
pin is high or DeviceEnb[1](0x08) is 1. In this condition, current
consumption is minimized, SYS, THM and SRC are not monitored, WAKE output is forced low and the internal oscillator
2
is turned off. All internal logic, except those values under I C, is held in reset. In the shutdown state, only the POR on
V
is active, and the V -SYS switch is left open until V
is above the POR threshold. The device exits Shutdown
CC
CC
CC
mode when
is low and DeviceEnb is 0.
Cold-Startup
The cold start feature of the MAX20361 allows the device to start up even if V
is below the wake threshold or absent.
SYS
For a cold startup, the device initially uses a low power charge pump to charge up V
from the power source (such as
CC
is charged above the POR level, the internal references are
a solar cell) on SRC while SYS is not charged. Once V
CC
enabled and the main boost takes over from the charge pump. As the main boost continues to charge, V
and SYS gets
CC
charged above the wake threshold, the V -SYS switch is closed and the device is powered from SYS. This completes
CC
the cold startup, and the normal operation of the device assumes.
Source Clamp
By the DISintb[4](0x05) bit, the
output can be reconfigured as a push-pull DISsrc output to drive an external clamp
circuit used to prevent overvoltage on SRC. The clamp circuit (see Figure 3) can be formed by an external nMOS and a
load resistor. When the clamp circuit is turned on, the SRC is discharged through the external load resistor. When the
boost converter is enabled, the DISsrc is driven to divert excess input current in order to let SRC regulate. In shutdown
mode, the DISsrc output is driven statically high. The DISsrc output is disabled during VOC measurement and sleep
mode. Refer to the nMOS Transistor Selection section.
SRC
POWER
RESISTOR
C
SRC
(DISsrc)
INT
10MΩ
Figure 3. Source Clamp Circuitry
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Maxim Integrated | 15
MAX20361
Small, Single-/Multi-Cell Solar Harvester with
MPPT and Harvest Counter
2
I C Interface
2
The MAX20361 contains an I C-compatible interface for data communication with a host controller (SCL and SDA). The
interface supports a clock frequency of up to 400kHz. SCL and SDA require pullup resistors that are connected to a
positive supply.
2
2
When writing to the MAX20361 using I C, the master sends a START condition (S) followed by the MAX20361 I C
address. After the address, the master sends the register address of the register that is to be programmed. The master
then ends communication by issuing a STOP condition (P) to relinquish control of the bus, or a REPEATED START
2
condition (Sr) to communicate to another I C slave.
t
SU:STA
t
SU:STO
SDA
SCL
t
BUF
t
R
t
SU:DAT
t
HU:DAT
t
HD:STA
t
t
R
LOW
t
HD:STA
t
HIGH
START
REPEATED START
STOP START
2
Figure 4. I C Interface Timing
S
Sr
P
SCL
SDA
2
Figure 5. I C START, STOP, and REPEATED START Conditions
Slave Address
Set the Read/Write bit high to configure the MAX20361 to read mode (see Table 2). Set the Read/Write bit low to configure
the MAX20361 to write mode. The address is the first byte of information sent to the MAX20361 after the START condition.
Table 2. I2C Slave Addresses
ADDRESS FORMAT
7-Bit Slave ID
Write Address
Read Address
HEX
0x15
0x2A
0x2B
BINARY
0010101
00101010
00101011
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Maxim Integrated | 16
MAX20361
Small, Single-/Multi-Cell Solar Harvester with
MPPT and Harvest Counter
Bit Transfer
One data bit is transferred on the rising edge of each SCL clock cycle. The data on SDA must remain stable during the
high period of the SCL clock pulse. Changes in SDA while SCL is high and stable are considered control signals (see the
Start, Stop, And Repeated Start Conditions section). Both SDA and SCL remain high when the bus is not active.
Single-Byte Write
In this operation, the master sends an address and two data bytes to the slave device. The following procedure describes
the single byte write operation:
1. The master sends a START condition.
2. The master sends the 7-bit slave address plus a write bit (low).
3. The addressed slave asserts an ACK on the data line.
4. The master sends the 8-bit register address.
5. The slave asserts an ACK on the data line only if the address is valid (NAK if not).
6. The master sends 8 data bits.
7. The slave asserts an ACK on the data line.
8. The master generates a STOP condition.
WRITE SINGLE BYTE
S
DEVICE SLAVE ADDRESS - W
A
A
REGISTER ADDRESS
A
8 DATA BITS
P
FROM MASTER TO SLAVE
FROM SLAVE TO MASTER
Figure 6. Write Byte Sequence
Burst Write
In this operation, the master sends an address and multiple data bytes to the slave device. The slave device automatically
increments the register address after each data byte is sent. The following procedure describes the burst write operation:
1. The master sends a START condition.
2. The master sends the 7-bit slave address plus a write bit (low).
3. The addressed slave asserts an ACK on the data line.
4. The master sends the 8-bit register address.
5. The slave asserts an ACK on the data line only if the address is valid (NAK if not).
6. The master sends eight data bits.
7. The slave asserts an ACK on the data line.
8. Repeat 6 and 7 N-1 times.
9. The master generates a STOP condition.
BURST WRITE
S
DEVICE SLAVE ADDRESS - W
8 DATA BITS - 1
A
A
REGISTER ADDRESS
8 DATA BITS - 2
A
A
A
8 DATA BITS - N
P
FROM MASTER TO SLAVE
FROM SLAVE TO MASTER
Figure 7. Burst Write Sequence
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Maxim Integrated | 17
MAX20361
Small, Single-/Multi-Cell Solar Harvester with
MPPT and Harvest Counter
Single Byte Read
In this operation, the master sends an address plus two data bytes and receives one data byte from the slave device. The
following procedure describes the single byte read operation:
1. The master sends a START condition.
2. The master sends the 7-bit slave address plus a write bit (low).
3. The addressed slave asserts an ACK on the data line.
4. The master sends the 8-bit register address.
5. The slave asserts an ACK on the data line only if the address is valid (NAK if not).
6. The master sends a REPEATED START condition.
7. The master sends the 7-bit slave address plus a read bit (high).bz
8. The addressed slave asserts an ACK on the data line.
9. The slave sends eight data bits.
10. The master asserts a NACK on the data line.
11. The master generates a STOP condition.
READ SINGLE BYTE
S
DEVICE SLAVE ADDRESS - W
DEVICE SLAVE ADDRESS - R
A
A
REGISTER ADDRESS
8 DATA BITS
A
Sr
NA
P
FROM MASTER TO SLAVE
FROM SLAVE TO MASTER
Figure 8. Read Byte Sequence
Burst Read
In this operation, the master sends an address plus two data bytes and receives multiple data bytes from the slave device.
The following procedure describes the burst byte read operation:
1. The master sends a START condition.
2. The master sends the 7-bit slave address plus a write bit (low).
3. The addressed slave asserts an ACK on the data line.
4. The master sends the 8-bit register address.
5. The slave asserts an ACK on the data line only if the address is valid (NAK if not).
6. The master sends a REPEATED START condition.
7. The master sends the 7-bit slave address plus a read bit (high).
8. The slave asserts an ACK on the data line.
9. The slave sends eight data bits.
10. The master asserts an ACK on the data line.
11. Repeat 9 and 10 N-2 times.
12. The slave sends the last eight data bits.
13. The master asserts a NACK on the data line.
14. The master generates a STOP condition.
BURST READ
S
DEVICE SLAVE ADDRESS - W
DEVICE SLAVE ADDRESS - R
8 DATA BITS - 2
A
A
A
REGISTER ADDRESS
8 DATA BITS - 1
8 DATA BITS - 3
8 DATA BITS - N
A
A
Sr
A
NA
P
FROM MASTER TO SLAVE
FROM SLAVE TO MASTER
Figure 9. Burst Read Sequence
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Maxim Integrated | 18
MAX20361
Small, Single-/Multi-Cell Solar Harvester with
MPPT and Harvest Counter
Acknowledge Bits
Data transfers are acknowledged with an acknowledge bit (ACK) or a not-acknowledge bit (NACK). Both the master and
the MAX20361 generate ACK bits. To generate an ACK, pull SDA low before the rising edge of the ninth clock pulse and
hold it low during the high period of the ninth clock pulse. To generate a NACK, leave SDA high before the rising edge of
the ninth clock pulse and leave it high for the duration of the ninth clock pulse. Monitoring for NACK bits allows for detection
of unsuccessful data transfers.
S
SCL
NOT ACKNOWLEDGE
SDA
ACKNOWLEDGE
Figure 10. Acknowledge Bits
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Maxim Integrated | 19
MAX20361
Small, Single-/Multi-Cell Solar Harvester with
MPPT and Harvest Counter
Register Map
MAX20361
ADDRESS
NAME
MSB
LSB
User Registers
0x00
0x01
DeviceID[7:0]
ChipID[3:0]
ChipRev[3:0]
Status[7:0]
Int[7:0]
VOCValid
THMflag
HSYSFlag
HARrdy
VOCrdy
Sleep
ENbStat
WAKEbSt
VOCValidI
nt
WakebStI
nt
0x02
0x03
–
–
–
–
HARrdyInt VOCrdyInt
EnbStatInt
HARrdyM
sk
VOCrdyM VOCValid EnbStatM
WakebSt
Msk
IntMsk[7:0]
–
–
sk
Msk
sk
0x04
0x05
0x06
0x07
SysRegCfg[7:0]
WakeCfg[7:0]
MpptCfg[7:0]
MeasCfg[7:0]
SysBatSel
VOCper
–
SysReChg[2:0]
SysReg[3:0]
WakeThr[2:0]
THMper
–
–
–
DISintb
–
Frac[4:0]
ATper
FrcMeas
FrcTHM
Tmeas[1:0]
ATmeas
ThmEn
Tper[1:0]
DeviceEn
b
0x08
DevCntl[7:0]
–
BSTpk[2:0]
FrcWAKE
BoostEnb
0x09
0x0A
0x0B
0x0C
VOCMeas[7:0]
HarvCntH[7:0]
HarvCntL[7:0]
SleepThd[7:0]
VOC[7:0]
HARhigh[7:0]
HARlow[7:0]
SlpThd[7:0]
Register Details
DeviceID (0x00)
BIT
7
6
5
4
3
2
1
0
Field
ChipID[3:0]
0x1
ChipRev[3:0]
0x1
Reset
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Maxim Integrated | 20
MAX20361
Small, Single-/Multi-Cell Solar Harvester with
MPPT and Harvest Counter
Access Type
Read Only
Read Only
BITFIELD
ChipID
BITS
DESCRIPTION
7:4
3:0
Chip Identification
Chip Revision
ChipRev
Status (0x01)
BIT
7
6
5
4
3
2
Sleep
1
0
Field
VOCValid
0x0
THMflag
0x0
HSYSFlag
0x0
HARrdy
0x0
VOCrdy
0x0
ENbStat
0x0
WAKEbSt
0x0
Reset
0x0
Access Type
Read Only
Read Only
Read Only
Read Only
Read Only
Read Only
Read Only
Read Only
BITFIELD
BITS
DESCRIPTION
Indicates if at least one SRC open-circuit measurement was performed since the last
VCC POR event. This bit is also reset when a write to the VOCMeas register is
performed.This bit is not set after a VOC measurement.
VOCValid
7
0b0: No SRC open-circuit measurement was performed since the last VCC POR event.
0b1: At least one SRC open-circuit measurement was performed since the last VCC POR
event.
THM Fault Status
THMflag
6
5
0b0: No THM fault detected
0b1: THM fault detected during the last Tmeas period
SysReg Overvoltage Fault Flag
HSYSFlag
0b0: No SysReg flag detected during the last Tmeas period
0b1: SysReg flag detected during the last Tmeas period
Harvest Meter Status
HARrdy
VOCrdy
4
3
0b0: Harvest meter has not been updated since the last read of HarvCnth/L register.
0b1: Harvest meter has been updated since the last read of HarvCnth/L register.
Note: this bit is reset when the HarvCntH register is read.
Open-Circuit Voltage Status
0b0: No new open-circuit voltage measurement since the last read of VOCMeas register.
0b1: New open-circuit voltage available since the last read of VOCMeas register.
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Maxim Integrated | 21
MAX20361
Small, Single-/Multi-Cell Solar Harvester with
MPPT and Harvest Counter
BITFIELD
BITS
DESCRIPTION
Indicates if the Device is in Sleep Mode
Sleep
2
0b0: Device is not in sleep mode and it is harvesting.
0b1: Device is in sleep mode to save SYS power (no harvesting).
Indicates if the Device is in Shutdown (or Between ENb Pin Input and DeviceEnb Bit)
ENbStat
1
0
0b0: ENb pin low and DeviceEnb bit set to 0.
0b1: ENb pin high or DeviceEnb bit set to 1.
Indicates the Status of the WAKE Pin Output
Only the SYS comparator; does not include the FrcWAKE).
This bit is not valid if the Sleep flag is set.
WAKEbSt
0b0: WAKE pin high (SYS above WakeThr[2:0](0x05) threshold)
0b1: WAKE pin low (SYS below WakeThr[2:0](0x05) threshold)
Int (0x02)
BIT
7
–
–
6
5
–
–
4
3
2
1
0
Field
–
–
HARrdyInt
0x0
VOCrdyInt
0x0
VOCValidInt
0x0
EnbStatInt
0x0
WakebStInt
0x0
Reset
Read Clears
All
Read Clears
All
Read Clears
All
Read Clears
All
Read Clears
All
Access Type
BITFIELD
–
–
–
BITS
DESCRIPTION
HARrdy Interrupt
HARrdyInt
4
3
2
0b0: No change in status of HARrdy
0b1: Change in status of HARrdy
VOCrdy Interrupt
VOCrdyInt
0b0: No change in status of VOCrdy
0b1: Change in status of VOCrdy
VOCValid Interrupt
VOCValidInt
0b0: No change in status of VOCValid
0b1: Change in status of VOCValid
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Maxim Integrated | 22
MAX20361
Small, Single-/Multi-Cell Solar Harvester with
MPPT and Harvest Counter
BITFIELD
BITS
DESCRIPTION
EnbStat Interrupt
EnbStatInt
1
0b0: No change in status of EnbStat
0b1: Change in status of EnbStat
WakebSt Interrupt
WakebStInt
0
0b0: No change in status of WakebSt
0b1: Change in status of WakebSt
IntMsk (0x03)
BIT
7
–
–
–
6
5
–
–
–
4
3
2
1
0
Field
–
–
–
HARrdyMsk
0x0
VOCrdyMsk
0x0
VOCValidMsk
0x0
EnbStatMsk
0x0
WakebStMsk
0x0
Reset
Access Type
Write, Read
Write, Read
Write, Read
Write, Read
Write, Read
BITFIELD
BITS
DESCRIPTION
HARrdyInt Interrupt Mask
HARrdyMsk
4
3
2
1
0
0b0: HARrdy interrupt not masked
0b1: HARrdy interrupt masked
VOCrdy Interrupt Mask
VOCrdyMsk
VOCValidMsk
EnbStatMsk
WakebStMsk
0b0: VOCrdy interrupt not masked
0b1: VOCrdy interrupt masked
VOCValid Interrupt Mask
0b0: VOCValid interrupt not masked
0b1: VOCValid interrupt masked
EnbStat Interrupt Mask
0b0: EnbStat interrupt not masked
0b1: EnbStat interrupt masked
WakebSt Interrupt Mask
0b0: WakebSt interrupt not masked
0b1: WakebSt interrupt masked
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Maxim Integrated | 23
MAX20361
Small, Single-/Multi-Cell Solar Harvester with
MPPT and Harvest Counter
SysRegCfg (0x04)
BIT
7
6
5
4
3
2
1
0
Field
SysBatSel
0x0
SysReChg[2:0]
0x0
SysReg[3:0]
0x7
Reset
Access Type
Write, Read
Write, Read
Write, Read
BITFIELD
BITS
DESCRIPTION
Selects Regulation Mode of SYS
SysBatSel
SysReChg
SysReg
7
0b0: The boost attempts to regulate the SYS node at VSysReg
0b1: The boost charges the SYS node until it reaches VSysReg and then switches off until
SYS drops to VSysReg - VSysReChg
.
.
Battery Recharge Threshold Voltage
0b000: 25mV
0b001: 50mV
0b010: 75mV
0b011: 100mV
0b100: 150mV
0b101: 200mV
0b110: 250mV
0b111: 300mV
6:4
System Regulation or Battery Termination Voltage On the SYS Node
3:0
0b0000: 4.0V
… linear step, 50mV
0b1111: 4.75V
WakeCfg (0x05)
BIT
7
6
5
–
–
–
4
3
–
–
–
2
1
0
Field
VOCper
0x1
THMper
0x0
DISintb
0x0
WakeThr[2:0]
0x7
Reset
Access Type
Write, Read
Write, Read
Write, Read
Write, Read
BITFIELD
BITS
DESCRIPTION
VOC Every Tper (Perform Open Circuit Measurement Every Tper Period)
VOCper
7
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Maxim Integrated | 24
MAX20361
Small, Single-/Multi-Cell Solar Harvester with
MPPT and Harvest Counter
BITFIELD
BITS
DESCRIPTION
0b0: VOC measurement performed only on request
0b1: VOC measurement performed every "Tper" time
Note: this bit also disables the first VOC measurement after POR.
Thermal Monitor Every Tper
THMper
DISintb
6
4
0b0: Thermal monitoring is not performed every Tper time.
0b1: Thermal monitoring is performed every Tper time (only if also ThmEn is set).
Disable the INTb Pin and Convert It Into a Push-Pull Output to Discharge SRC (Clamp
SRC Voltage)
0b0: INTb is an open-drain output for interrupt.
0b1: INTb becomes a DISsrc push-pull output (to VCC). When high, discharge SRC
through a resistor.
Wake Threshold. When BAT reaches this voltage, the device asserts the WAKE output.
0b000: 3.0V
0b001: 3.1V
0b010: 3.2V
0b011: 3.3V
0b100: 3.4V
0b101: 3.5V
0b110: 3.6V
0b111: 3.7V
WakeThr
2:0
MpptCfg (0x06)
BIT
7
–
–
–
6
5
–
–
–
4
3
2
1
0
Field
–
–
–
Frac[4:0]
0x19
Reset
Access Type
Write, Read
BITFIELD
BITS
DESCRIPTION
Set the Fraction of the Open-Circuit Voltage to which the Boost Converter Attempts to
Regulate at VSRC
.
Frac
4:0
0b00000: 42.5%
…Linear scale, 1.5% / LSB
0b11111: 89.0%
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Maxim Integrated | 25
MAX20361
Small, Single-/Multi-Cell Solar Harvester with
MPPT and Harvest Counter
MeasCfg (0x07)
BIT
7
6
5
4
3
2
1
0
Field
FrcMeas
0x0
FrcTHM
0x0
Tmeas[1:0]
0x0
ATmeas
0x1
ATper
0x1
Tper[1:0]
0x2
Reset
Write Only
Clears All
Write Only
Clears All
Access Type
Write, Read
Write, Read
Write, Read
Write, Read
BITFIELD
BITS
DESCRIPTION
Writing 1 to this bit forces a measure of an open-circuit voltage measurement (if
NoVOCMeas is 0) at SRC. This bit is automatically forced to 0.
FrcMeas
FrcTHM
7
The measurement algorithm and time for VOC at SRC is set by ATmeas and Tmeas
bits.
Until FrcMeas is set, the VOC register should not be written.
Writing 1 to this bit forces a measure of thermal monitoring (only if ThmEn bit is 1). This
bit is automatically forced to 0.
6
Set the Measurement Time
0b00: 50ms
0b01: 100ms
0b10: 250ms
0b11: 500ms
Tmeas
5:4
Set the Algorithm Used to Adjust the Settling Time for VOC Measure
ATmeas
3
0b0: The settling time is fixed and set by Tmeas bits.
0b1: Adaptative measuring time based on the current HarvCnt value, from Tmeas / 4 to
2 x Tmeas.
Adaptative Period (Valid Only If Tper < 0b11)
0b0: Disabled
ATper
2
0b1: Store HarvCntH/L after 2 x Tmeas (or more, see text). A measure is forced (if not in
sleep) when the future harvesting value is greater or lower than the existing stored
measurement by a factor of 2 (future HarvCnt/current HarvCnt < 0.5 or future
HarvCnt/current HarvCnt > 2).
Set the Period of Automatic Measurement
0b00: 64 x Tmeas
0b01: 128 x Tmeas
0b10: 256 x Tmeas
0b11: Disabled
Tper
1:0
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Maxim Integrated | 26
MAX20361
Small, Single-/Multi-Cell Solar Harvester with
MPPT and Harvest Counter
BITFIELD
BITS
DESCRIPTION
When “Disabled”, VOC and THM are never automatically read. The system should
periodically use the FrcMeas and FrcTHM bit to force measurements.
DevCntl (0x08)
BIT
7
–
–
–
6
5
4
3
2
1
0
Field
BSTpk[2:0]
0x3
ThmEn
0x0
FrcWAKE
0x0
DeviceEnb
0x0
BoostEnb
0x0
Reset
Access Type
Write, Read
Write, Read
Write, Read
Write, Read
Write, Read
BITFIELD
BITS
DESCRIPTION
Select the Peak Current for The Boost Converter
0b000: 90mA
0b001: 120mA
0b010: 145mA
0b011: 180mA
0b100: 285mA
0b101: 355mA
0b110: 470mA
0b111: 715mA
BSTpk
6:4
Thermal Monitoring Enable Bit
0b0: Thermal monitoring is not enabled, and temperature does not affect boost
operation.
ThmEn
3
2
0b1: Thermal monitoring is enabled. The thermal monitoring circuit on every Tper
period (if THMper is set) or when FrcTHM is set, and if necessary, turns off the boost
converter to halt charging of the battery.
I2C Control of The WAKE Output
FrcWAKE
0b0: WAKE output is controlled by the WAKE comparator.
0b1: WAKE output is high regardless of the status of the WAKE comparator.
I2C Control of Device Enable
DeviceEnb
BoostEnb
1
0
0b0: Device enable is controlled by the ENb pin.
0b1: Device disabled regardless of the status of the ENb pin.
I2C Enable of the Boost Converter
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Maxim Integrated | 27
MAX20361
Small, Single-/Multi-Cell Solar Harvester with
MPPT and Harvest Counter
BITFIELD
BITS
DESCRIPTION
0b0: Boost converter is controlled by the internal digital logic.
0b1: Boost converter is disabled regardless of the internal digital logic.
VOCMeas (0x09)
BIT
7
6
5
4
3
2
1
0
Field
VOC[7:0]
0x1D
Reset
Access Type
Write, Read
BITFIELD
BITS
DESCRIPTION
Most Recent Result of Open-Circuit Voltage Measurement at SRC. This value can be
read anytime without triggering the FrcMeas bit.
0: 0V
…
255: 2.55V
VOC
7:0
This register can be written to override the VOC measure.
Every time the VOC register is below 29 (upon VOC measurement or I2C writing), the
boost is halted and sleep mode is entered to save power, until the next VOC
measurement (upon Tper or FrcVOC) or until VOC is written to a higher value.
The VOC register should not be written to when FrcMeas is set.
HarvCntH (0x0A)
BIT
7
6
5
4
3
2
1
0
Field
HARhigh[7:0]
0x0
Reset
Access Type
Read Only
BITFIELD
BITS
DESCRIPTION
Return the Number of “LX Pulses” of the Boost, the only 8 MSBits of Counter.
This number is valid only when SYS is above the WAKE threshold. This number is
proportional to the SYS “charging” current.
HARhigh
7:0
When the counter overflows, it returns to 0xFFFF.
Note: the HarvCnt is not updated when the device is in sleep mode.
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Maxim Integrated | 28
MAX20361
Small, Single-/Multi-Cell Solar Harvester with
MPPT and Harvest Counter
HarvCntL (0x0B)
BIT
7
6
5
4
3
2
1
0
Field
HARlow[7:0]
0x0
Reset
Access Type
Read Only
BITFIELD
BITS
DESCRIPTION
Return the Number of “LX Pulses” of the Boost, the only 8 LSBs of the Counter.
This number is valid only when SYS is above WAKE threshold. This number is
proportional to the SYS “charging” current.
HARlow
7:0
When the counter overflows, it returns to 0xFFFF.
SleepThd (0x0C)
BIT
7
6
5
4
3
2
1
0
Field
SlpThd[7:0]
0x0
Reset
Access Type
Write, Read
BITFIELD
BITS
DESCRIPTION
The “Harvesting Count” Threshold to Enter Sleep Mode Until the Next VOC Measure.
This value is compared with the HarvCnt (the bits returned in registers HarvCntH/L).
This feature is ignored if SlpThd = 0.
SlpThd
7:0
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Maxim Integrated | 29
MAX20361
Small, Single-/Multi-Cell Solar Harvester with
MPPT and Harvest Counter
Applications Information
Inductor Selection
The operation of the boost regulator requires a properly sized inductor with the appropriate value. The inductor must be
connected between SRC (pin B1) and LX (pin C1). The boost regulator performance, such as efficiency, is optimized to
control the switching behavior with a nominal inductance of 4.7µH ± 20%. The inductor must have low series resistance
(DCR) to minimize loss and maintain high efficiency. The recommended inductance range is between 4.7µH and 22µH.
Refer to Table 3 for a list of recommended inductors.
Table 3. Boost Regulator Inductor Recommendation
INDUCTANCE (µH)
DIMENSIONS (mm)
2 x 1.6 x 1.2
PART NUMBER
DFE201612E-4R7M=P2
DFE252010F-4R7M=P2
744043004
MANUFACTURER
Murata
4.7
4.7
4.7
15
2.5 x 2 x 1
Murata
4.8 x 4.8 x 3
Wurth
3.8 x 3.8 x 1.8
7.3 x 7.3 x 4.5
744031150
Wurth
22
7447779122
Wurth
Capacitor Selection
All selected capacitors need to have low leakage. Any leakage from capacitors contributes to the loss of efficiency,
increases the quiescent current, and reduces the effectiveness of the energy harvesting process. The capacitance
specified in the data sheet refers to the effective capacitance after accounting for the voltage derating. Small ceramic
capacitors tend to lose effective capacitance very quickly as DC bias is increased. Ensure that DC degradation would not
affect the effective capacitance of bypass capacitors located at V , SRC, and SYS.
CC
SRC Capacitance
The capacitor connected to pin SRC (C
) is used to initially store energy from the harvesting input source. The output
SRC
capacitance of the input energy source determines the value of the SRC capacitor. A minimum effective capacitance of
10µF is recommended. Larger capacitance (22µF) is recommended for 10µH and 22µH inductances.
SYS and V
Capacitance
CC
Connect a bypass capacitor to the system output (C
) of the MAX20361. This capacitor needs to have low equivalent
SYS
series resistance (ESR). An effective capacitance of 1µF is recommended.
nMOS Transistor Selection
See Table 4 for a list of recommended nMOS transistors used for the source clamp circuitry. The gate to source threshold
voltage and drive voltage must be lower than 2V for this application.
Table 4. nMOS Transistor Recommendation
DRAIN-TO-
SOURCE
VOLTAGE (V)
CONTINUOUS-
DRAIN CURRENT
(A)
GATE-TO-SOURCE
VOLTAGE
THRESHOLD (V)
DRIVE
VOLTAGE (V)
MANUFACTURER
PART NUMBER
Diodes Incorporated
ON Semiconductor
Diodes Incorporated
DMN2230U-7
FDMA410NZ
20
20
12
2
1
1
1
1.8
1.5
1.8
9.5
6.1
DMC1028UVT-7
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Maxim Integrated | 30
MAX20361
Small, Single-/Multi-Cell Solar Harvester with
MPPT and Harvest Counter
Typical Application Circuits
Solar Application Circuit
4.7µH
SRC
LX
*
10µF
MAX20361
SYS
1µF
SOURCE CLAMP
SRC
V
BatReg
or
POWER
RESISTOR
V
SysReg
BOOST
CONTROLLER
CHARGE
PUMP
(DISsrc)
INT
10MΩ
V
BatReChg
V
CC
INTERNAL
SUPPLY
MPPT
CONTROLLER
1µF
REF
V
WAKE
SDA
SCL
INT
V
TEMP
LOW IQ
OSCILLATOR
THM
DIGITAL LOGIC
AND I/O
NTC
WAKE EN
GND
* ONE OR MORE SOLAR CELLS
Ordering Information
PART NUMBER
MAX20361AEWC+
MAX20361AEWC+T
TEMP RANGE
PIN-PACKAGE
12 WLP
-40°C to +85°C
-40°C to +85°C
12 WLP
+Denotes a lead(Pb)-free/RoHS-compliant package.
T = Tape and reel.
www.maximintegrated.com
Maxim Integrated | 31
MAX20361
Small, Single-/Multi-Cell Solar Harvester with
MPPT and Harvest Counter
Revision History
REVISION
NUMBER
0
REVISION
DATE
PAGES
CHANGED
DESCRIPTION
9/20
Release for Market Intro
—
Updated the General Description, Benefits and Features, Electrical Characteristics, and
Detailed Description
1
9/20
1, 4, 13
For pricing, delivery, and ordering information, please visit Maxim Integrated’s online storefront at https://www.maximintegrated.com/en/storefront/storefront.html.
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
© 2020 Maxim Integrated Products, Inc.
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