MAX31329ELB+T [MAXIM]
Low-Current, Real-Time Clock with I2C, Power Management, and Integrated Crystal;
| 型号： | MAX31329ELB+T |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | Low-Current, Real-Time Clock with I2C, Power Management, and Integrated Crystal |
| 文件： | 总33页 (文件大小：769K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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MAX31329
Low-Current, Real-Time Clock with I2C, Power
Management, and Integrated Crystal
General Description
Benefits and Features
The MAX31329 low-current, real-time clock (RTC) is a
timekeeping device that provides timekeeping current in
nanoamperes, thus extending battery life. The
MAX31329 incorporates an integrated 32.768kHz
crystal, which eliminates the need for an external crystal.
•
Increases Battery Life
• 240nA Timekeeping Current
• Trickle Charger for External Supercapacitor or
Rechargeable Battery
•
Provides Flexible Configurability
• A Schmitt Trigger Input for Event Detection
• Programmable Square-Wave Output for Clock
Monitoring
• Two Interrupt Pins for Multiple Wakeup
Configurations
2
This device is accessed through an I C serial interface.
The MAX31329 features one digital Schmitt trigger input
(DIN) and generates an interrupt output on a falling or
rising edge of this digital input. An integrated power-on
reset function ensures deterministic default register
status upon power-up. Other features include two time-
of-day alarms, interrupt outputs, a programmable
• Clock Input Pin for External Clock
Synchronization
square-wave output, and
mechanism.
a
serial bus timeout
•
•
Saves Board Space
• Integrated Crystal and Load Capacitors Tuned to
±5ppm Typical Clock Accuracy
The clock/calendar provides seconds, minutes, hours,
day, date, month, and year information. The date at the
end of the month is automatically adjusted for months
with fewer than 31 days, including corrections for leap
year. The clock operates in either 24-hour or 12-hour
format. The MAX31329 also includes a clock input for
synchronization. When a reference clock (e.g., 32kHz,
50Hz/60Hz power line, GPS 1pps) is present at the
CLKIN pin and the enable external clock input bit
(ENCLKIN) is set to 1, the MAX31329 RTC is frequency-
locked to the external clock and the clock accuracy is
determined by the external source.
• 5mm x 5mm, 10-Pin LGA Package
Value-Added Features for Ease-of-Use
• +1.6V to +5.5V Operating Voltage Range
• Two Time-of-Day Alarms
• Countdown Timer with Repeat and Pause
Functions
• 64-Byte RAM for User Data Storage
•
Integrated Protection
• Power-on Reset for Default Configuration
• Automatic Switchover to Backup Battery or
Supercapacitor on Power-Fail
The device is available in a lead (Pb)-free/RoHS-
compliant, 10-pin, 5mm x 5mm LGA package. The
device supports the -40°C to +85°C extended
temperature range.
• Lockup-Free Operation with Bus Timeout
Ordering Information appears at end of data sheet.
Applications
•
•
•
•
•
•
•
•
•
Industrial Equipment
Test and Measurement Equipment
Energy Meters
Medical Devices
Portable Instruments
Factory Automation
IoT Devices
Surveillance Cameras
Servers
19-100992; Rev 0; 7/21
MAX31329
Low-Current, Real-Time Clock with I2C, Power
Management, and Integrated Crystal
Simplified Block Diagram
X1
X2
DIV BY
1/4/8/32K
INTB/
CLKOUT
POWER
CONTROL
AND TRICKLE
CHARGER
OSCILLATOR
V
CC
V
CC
INTERNAL
GND
V
BAT
POR
INTA/
CLKIN
EXT
SYNC
CLOCK,
CALENDAR,
AND ALARM
REGISTERS
N
DIN
CONTROL
LOGIC AND
REGISTERS
SCL
SDA
SERIAL BUS
INTERFACE
AND ADDRESS
REGISTER
N
MAX31329
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Maxim Integrated | 2
MAX31329
Low-Current, Real-Time Clock with I2C, Power
Management, and Integrated Crystal
Absolute Maximum Ratings
Voltage Range on Any Pin Relative to Ground..... -0.3V to +6V
Junction Temperature....................................................+125°C
Storage Temperature Range............................ -55°C to +85°C
Soldering Temperature (reflow).....................................+260°C
Continuous Power Dissipation (Multilayer Board (T = +70°C,
A
derate 6.88mW/°C above +70°C) ............................550.02mW
Operating Temperature Range.........................-40°C to +85°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or
any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Package Information
Package Code
Outline Number
Land Pattern Number
Thermal Resistance, Multilayer Board:
L1055M+2C
21-100481
90-100169
Junction to Ambient (θ
)
JA
145.45°C/W
66.67°C/W
Junction to Case (θ
)
JC
For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”,
“#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing
pertains to the package regardless of RoHS status.
Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board.
For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.
Electrical Characteristics
(V
= +1.6V to +5.5V = typical values at V
= +3.0V, unless otherwise noted. Limits are 100% tested at T = +25°C. Note 1.)
CC A
CC
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
DC CHARACTERISTICS
Operating Voltage
Range
V
Full operation (Note 2)
1.6
5.5
V
CC
V
= +1.6V
CC
200
420
(Note 3)
CLKIN = GND or
CLKIN = V
Timekeeping Current
I
nA
CCT
V
V
= +3.0V
240
300
5
480
610
CC
CC
= +5.5V
CC
2
Data Retention Current
I
(Oscillator stopped and I C enabled)
nA
BATDR
Maximum Supply
Power-Up Slew Rate
Maximum Supply
T
5
V/ms
VCCR
T
1.4
V/ms
VCCF
Switchover Slew Rate
BATTERY BACKUP AND THRESHOLD
Backup Supply Voltage
V
1.6
5.5
V
V
BAT
V
V
V
1.8
2.0
2.4
TH1
TH2
TH3
Power-Fail Threshold
Voltage
V
PF
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Maxim Integrated | 3
MAX31329
Low-Current, Real-Time Clock with I2C, Power
Management, and Integrated Crystal
(V
= +1.6V to +5.5V = typical values at V
= +3.0V, unless otherwise noted. Limits are 100% tested at T = +25°C. Note 1.)
CC A
CC
PARAMETER
SYMBOL
R1
CONDITIONS
MIN
TYP
3.3
MAX
UNITS
Measured at V
= 0V
= 0V
= 0V
BAT
BAT
BAT
Trickle-Charge Current-
Limiting Resistance
R2
Measured at V
Measured at V
6.4
kΩ
R3
11.3
SCHMITT TRIGGER INPUT (DIN)
V
V
V
V
V
V
= 5.5V
= 3.0V
= 1.6V
= 5.5V
= 3.0V
= 1.6V
2.8
1.65
0.9
3.2
2
CC
CC
CC
CC
CC
CC
Rising Input Threshold
Voltage
V
V
T+
1.25
1.1
0.7
1.6
Falling Input Threshold
Voltage
V
0.9
V
T-
0.35
-0.1
0.6
Input Leakage
I
LI
+0.1
µA
LOGIC INPUTS AND OUTPUTS
V
= 1.6V
0.75 x
V
CC
0.7 x
V
CC
0.7 x
V
CC
V
+
CC
CC
0.3
(Note 1, Note 2)
= 3.01V
V
V
V
+
+
CC
CC
0.3
Logic 1 Input
Logic 0 Input
V
V
IH
(Note 1, Note 2)
= 5.5V
V
CC
CC
0.3
(Note 1, Note 2)
0.3 x
V
(Note 1, Note 2)
-0.3
-0.1
V
IL
V
CC
Input Leakage (SCL,
INTA/CLKIN)
Output Leakage
(INTA/CLKIN,
INTB/CLKOUT)
Output Logic 1
(INTB/CLKOUT)
Output Logic 0 (SDA,
INTA/CLKIN,
I
IL
Input clock enabled
Input clock disabled
+0.1
+1
µA
I
O
-1
-0.8
2
µA
mA
mA
I
V
V
= +1.0V, V
≥ 1.6V
≥ 1.6V
OH
OH
OL
CC
I
= +0.4V, V
OL
CC
INTB/CLKOUT)
AC CHARACTERISTICS
SCL Clock Frequency
f
(Note 4)
(Note 5)
10
400
kHz
µs
SCL
Bus Free Time Between
a STOP and START
Condition
Hold Time (Repeated)
START Condition
Low Period of SCL
Clock
t
1.3
BUF
t
0.6
1.3
0.6
µs
µs
µs
HD:STA
t
LOW
High Period of SCL
Clock
t
HIGH
Data Hold Time
Data Setup Time
t
(Note 6, Note 7)
= 3.0V (Note 8)
0
0.9
µs
ns
HD:DAT
t
V
100
SU:DAT
CC
Setup Time for a
Repeated START
Condition
t
0.6
µs
SU:STA
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Maxim Integrated | 4
MAX31329
Low-Current, Real-Time Clock with I2C, Power
Management, and Integrated Crystal
(V
= +1.6V to +5.5V = typical values at V
= +3.0V, unless otherwise noted. Limits are 100% tested at T = +25°C. Note 1.)
CC A
CC
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Minimum Rise Time of
Both SDA and SCL
Signals
20 +
t
(Note 9)
ns
RMIN
0.1C
B
Maximum Rise Time of
Both SDA and SCL
Signals
Minimum Fall Time for
Both SDA and SCL
Signals
Maximum Fall Time for
Both SDA and SCL
Signals
t
300
ns
ns
ns
RMAX
20 +
t
(Note 9)
FMIN
0.1C
B
t
300
FMAX
Setup Time for STOP
Condition
Maximum Capacitive
Load for Each Bus Line
t
0.6
µs
pF
SU:STO
C
(Note 9)
400
B
I/O Capacitance
C
(Note 10)
(Note 10)
10
37
pF
ns
I/O
SCL Spike Suppression
t
SP
Oscillator Stop Flag
(OSF) Delay
t
(Note 11)
(Note 12)
30
150
35
ms
OSF
Timeout Interval
t
25
ms
kHz
ppm
TIMEOUT
Nominal Frequency
Frequency Accuracy
f
O
32.768
±5
Δf/f
V
= 3.0V, T = +25°C
CC A
O
Note 1:
Note 2:
Note 3:
Note 4:
Limits at -40°C and +85°C are guaranteed by design; not production tested.
Voltage referenced to ground.
2
Specified with I C bus inactive. Oscillator operational. (ENCLKO = 0, ENCLKIN = 0).
The minimum SCL clock frequency is limited by the bus timeout feature, which resets the serial bus interface if SCL is held
low for t
.
TIMEOUT
Note 5:
Note 6:
After this period, the first clock pulse is generated.
A device must internally provide a hold time of at least 300ns for the SDA signal (referred to the V
to bridge the undefined region of the falling edge of SCL.
of the SCL signal)
IHMIN
Note 7:
Note 8:
The maximum t
need only be met if the device does not stretch the low period (t
) of the SCL signal.
HD:DAT
LOW
A fast-mode (400kHz) device can be used in a standard-mode (100kHz) system, but the requirement t
≥ 250ns must
SU:DAT
then be met. This is automatically the case if the device does not stretch the low period of the SCL signal. If such a device
does stretch the low period of the SCL signal, it must output the next data bit to the SDA line t
250 = 1250ns before the SCL line is released.
+ t
SU:DAT
= 1000 +
RMAX
Note 9:
C
is the total capacitance of one bus line, including all connected devices, in pF.
B
Note 10:
Note 11:
Note 12:
Guaranteed by design; not 100% production tested.
The parameter t
is the period of time the oscillator must be stopped for the OSF flag to be set over V
range.
CC
OSF
2
The device I C interface is in reset state and can receive a new START condition when SCL is held low for at least
t
. Once the device detects this condition, the SDA output is released. The oscillator must be running for this
TIMEOUTMAX
function to work.
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Maxim Integrated | 5
MAX31329
Low-Current, Real-Time Clock with I2C, Power
Management, and Integrated Crystal
Typical Operating Characteristics
(T = +25°C, unless otherwise noted.)
A
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Maxim Integrated | 6
MAX31329
Low-Current, Real-Time Clock with I2C, Power
Management, and Integrated Crystal
Pin Configuration
TOP VIEW
10
V
1
2
3
4
5
INTA/CLKIN
CC
9
GND
INTB/CLKOUT
MAX31329
V
8
BAT
DIN
NC
SCL
7
6
SDA
NC
Pin Descriptions
PIN
NAME
FUNCTION
1
V
Supply Voltage
Ground Connection
CC
2
GND
3
V
Backup Battery Input and Trickle Charger Output. Connect to GND when backup battery is not used.
BAT
4
DIN
NC
Digital Schmitt Trigger (Event Detection) Input
5, 6
Not Connected
Serial-Data Input/Output. SDA is the input/output pin for the I2C serial interface. The SDA pin is open-
drain and requires an external pullup resistor.
7
8
SDA
SCL
Serial-Clock Input. SCL is used to synchronize data movement on the serial interface.
Square-Wave Clock or Active-Low Interrupt Output. This pin is used to output a programmable square
wave or an alarm interrupt signal. This is a CMOS push-pull output and does not require an external
pullup resistor. If not used, this pin can be left unconnected. See Table 2.
/CLK
OUT
9
Clock Input/Active-Low Interrupt Output. This I/O pin is used to output an alarm interrupt or accept an
external clock input to drive the RTC counter. In the output mode, this is an open-drain and requires an
external pullup resistor. If not used, connect this pin to ground. See Table 2.
/CLKI
N
10
Detailed Description
The MAX31329 low-current, real-time clock (RTC) is a timekeeping device that provides nanoamperes timekeeping
current, extending battery life. The clock/calendar provides seconds, minutes, hours, day, date, month, and year
information. The date at the end of the month is automatically adjusted for each month, including corrections for leap year
through 2199. The clock operates in either 24-hour or 12-hour format.
2
The MAX31329 is accessed through an I C serial interface. The device features one digital Schmitt trigger input and
generates an interrupt output on a falling or rising edge of this input (DIN). An integrated power-on reset function ensures
deterministic default register status upon power-up. Soft reset is required after a brownout or brief blackout. Other features
include two time-of-day alarms, two interrupts, a programmable square-wave output, a countdown timer, and a bus
2
timeout mechanism that resets the I C bus if it remains inactive for a minimum of t
. The MAX31329 uses an
TIMEOUT
integrated 32.768kHz crystal. The oscillator circuit does not require any external resistors or capacitors to operate. The
MAX31329 also accepts an external clock reference for synchronization. The external clock can be a 32.768kHz, 50Hz,
60Hz, or 1Hz source. When the enable oscillator bit (ENOSC) is set to 1, the MAX31329 uses the oscillator for
timekeeping. If the enable external clock input bit (ENCLKIN) is set to 1, the time base derived from the oscillator is
compared to the 1Hz signal that is derived from the CLKIN signal. The conditioned signal drives the RTC time and date
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Maxim Integrated | 7
MAX31329
Low-Current, Real-Time Clock with I2C, Power
Management, and Integrated Crystal
counters. When the external clock is lost or when the frequency differs more than ±0.8% from the crystal frequency, the
loss-of-sync (LOS) flag is asserted.
2
Address and data are transferred serially through an I C serial interface.
Clock/Calendar
2
The time and calendar information are obtained by reading the appropriate I C registers. The time and calendar data are
set or initialized by writing to the appropriate time/date registers. The contents of the time and calendar registers are in
the binary-coded decimal (BCD) format. The century bit (bit 7 of the Month register) is toggled when the Year register
overflows from 99 to 00. The day-of-week register increments at midnight. Values that correspond to the day of week are
user-defined but must be sequential (i.e., if 1 equals Sunday, then 2 equals Monday, and so on). Illogical time and date
entries result in undefined operation. When reading or writing the time and date registers, secondary buffers are used to
prevent errors when the internal registers update. When reading the time and date registers, the secondary buffers are
2
synchronized to the internal registers on any I C START and when the register pointer rolls over to zero. The time
information is read from these secondary registers, while the clock continues to run. This eliminates the need to reread
the registers in case the main registers update during a read.
2
I C Interface
2
2
The I C interface is guaranteed to operate when V
is between 1.6V and 5.5V. The I C interface is accessible whenever
CC
2
V
CC
is at a valid level. To prevent invalid device operation, the I C interface should not be accessed when V
is below
CC
+1.6V. The slave address is defined as the 7 most significant bits (MSbs) sent by the master after a START condition.
The address is 0xD0 (left justified with LSb set to 0). The 8th bit is used to define a write or read operation. If a
2
microcontroller connected to the MAX31329 resets during I C communication, it is possible that the microcontroller and
2
the MAX31329 could become unsynchronized. When the microcontroller resets, the MAX31329 I C interface can be
2
placed into a known state by holding SCL low for t
. Doing so limits the minimum frequency at which the I C
TIMEOUT
interface can be operated. If data is being written to the device when the interface timeout is exceeded, prior to the
acknowledge, the incomplete byte of data is not written.
SDA
t
BUF
t
SP
t
HD:STA
t
LOW
t
F
t
R
SCL
t
SU:STA
t
HD:STA
t
HIGH
t
SU:STO
t
SU:DAT
STOP
START
REPEATED START
t
HD:DAT
2
Figure 1. Data Transfer on I C Serial Bus
Burst Mode
Burst read/write allows the controller to read/write multiple consecutive bytes from a device. It is initiated in the same
manner as the byte read/write operation, but instead of terminating the read/write cycle after the first data byte is
transferred, the controller can read/write to the whole register array. In burst write operation, after the receipt of each byte,
the device responds with an acknowledge, and the address is internally incremented by one. When the address pointer
reaches the end of the register address list, it goes back to the first register address. In burst read mode, the controller
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Maxim Integrated | 8
MAX31329
Low-Current, Real-Time Clock with I2C, Power
Management, and Integrated Crystal
responds with an acknowledge, indicating it is waiting for additional data. The device continues to output data for each
acknowledge received. The controller terminates the read operation by not responding with an acknowledge and issuing
a STOP condition.
Oscillator Circuit
The MAX31329 uses an integrated 32.768kHz crystal. The oscillator circuit does not require any external resistors or
capacitors to operate. After the oscillator is enabled, the startup time of the oscillator circuit is usually less than 1 second.
Power Management
The MAX31329 has a power-management function which monitors supply voltage on V
on V
BAT
and backup battery voltage
CC
, and then determines which source to use as internal supply. There is a PFAIL interrupt flag status bit in the
register map to indicate the power-fail condition. In power-management mode, the V
backup battery. If there is no backup battery, V
BAT
pin should be connected to the
BAT
should be tied to ground. Power-management control bits
Pwr_mgmt[3:2] (register 0x18h) are used as follows: For the Power-Management Auto and Trickle Charger mode, specify
a “power-fail voltage” with the register Pwr_mgmt[3:2]. Pwr_mgmt[3:2] = 01b sets the power-fail voltage to V
.
TH1
. See
Pwr_mgmt[3:2] = 10b sets the power-fail voltage to V . Pwr_mgmt[3:2] = 11b sets the power-fail voltage to V
TH2 TH3
the values of V , V , and V
TH1 TH2 TH3
in the Electrical Characteristics table. Note that Pwr_mgmt[3:2] = 00b, V
is not a
TH1
valid power-fail voltage. Once the power-fail voltage is set, the MAX31329 switches backup battery to the internal power
supply if and only if main supply V is lower than both the power-fail voltage and the backup battery voltage. Otherwise,
CC
remains as the main supply. There is an PFAIL interrupt flag status bit in the status reg (00h) register that can be
V
CC
used as a power-fail flag. The PFAIL interrupt flag monitors the V
supply and is set when V
falls below the power-
CC
CC
fail threshold voltage set through PFVT in the Pwr_mgmt (18h) register or when power-fail threshold voltage is adjusted
to cross above V
.
CC
Table 1. Power Management
D_TRKCHG_EN
D_VBACK_SEL D_MAN_SEL
MODE OF OPERATION
Power-Management Auto and Trickle Charger On
Supply Condition
Active Supply
V
V
V
< V , V
< V
> V
< V
V
BAT
CC
CC
CC
TH CC
BAT
BAT
BAT
BAT
1
x
0
< V , V
V
TH CC
CC
CC
CC
> V , V
V
TH CC
V
> V , V > V
V
CC
TH CC
Power-Management Manual and Trickle Charger On
Active Supply = V
1
1
0
1
1
1
CC
Power-Management Manual and Trickle Charger On
Active Supply = V for V ≥ V
BAT
BAT
CC
Power-Management Auto and Trickle Charger Off
Supply Condition
Active Supply
V
V
V
V
< V , V
< V
> V
< V
> V
V
BAT
CC
CC
CC
CC
TH CC
BAT
BAT
BAT
BAT
0
x
0
< V , V
V
TH CC
CC
CC
CC
> V , V
V
TH CC
> V , V
V
TH CC
Power-Management Manual and Trickle Charger Off
Active Supply = V
0
0
0
1
1
1
CC
Power-Management Manual and Trickle Charger Off
Active Supply = V for V ≥ V
BAT
BAT
CC
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Maxim Integrated | 9
MAX31329
Low-Current, Real-Time Clock with I2C, Power
Management, and Integrated Crystal
Trickle Charger
The trickle charger is for charging an external supercapacitor or a rechargeable battery. The maximum charging current
can be calculated as follows:
I
= (V
− V − V
)/R
MAX
CC
D
BAT
Where V is the diode voltage drop, V
is the voltage of the battery being charged, and R is the resistance selected in
BAT
D
the charging path. As the battery charges, the battery voltage increases and the voltage across the charging path
decreases. Therefore, the charging current also decreases.
3kΩ
V
CC
V
BAT
6kΩ
11kΩ
D_TRKCHG_EN = 1
ENABLES
TRICKLE CHARGER
D_TRICKLE BIT3
CHARGER SELECT
0 = ON
1 = OFF
D_TRICKLE BIT2
DIODE SELECT
0 = W/O DIODE
1 = W/ DIODE
D_TRICKLE BITS[1:0]
RESISTOR SELECT
00 = 3kΩ
01 = 3kΩ
10 = 6kΩ
11 = 11kΩ
Figure 2. Trickle Charger Register (19h)
Interrupt Status and Outputs
When an interrupt is asserted, a corresponding status bit in Int_status_reg (xxh) becomes “1”, and an interrupt output
transitions from high to low. The interrupt status bit and output can be cleared by reading Int_status_reg. See Table 2 for
interrupt configurations.
Table 2. Interrupt Modes
ENCLKO ENCLKIN
/CLKIN
/CLKOUT
: Alarm1, Timer,
Power-Fail (PFAIL),
Digital Interrupt (DIN)
0
0
: Alarm2
0
1
1
1
0
1
CLKIN
: Alarm1, Alarm2, Timer, PFAIL, DIN
CLKOUT
CLKOUT
: Alarm1, Alarm2,
Timer, PFAIL, DIN
CLKIN
Data Retention Mode
The MAX31329 features a Data Retention mode wherein the device shuts down its internal functional blocks (including
2
the oscillator) except the I C interface. The device consumes 5nA (typ) in this mode. It retains all of the register contents,
including the last valid date and time values. Exit Data Retention mode to resume counting. User data can be preserved
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Maxim Integrated | 10
MAX31329
Low-Current, Real-Time Clock with I2C, Power
Management, and Integrated Crystal
in this mode as long as the active supply is present. To enter the Data Retention mode, write "1" to DATA_RET in the
RTC_config1(03h) register. To exit the Data Retention mode, write "0" to DATA_RET in the RTC_config1(03h) register.
Alarms
The MAX31329 contains two time-of-day/date alarms. Alarm1 can be set by writing to registers 0Dh–12h. Alarm2 can be
set by writing to registers 13h–15h. See Table 3 and Table 4. The alarms can be programmed by the A1IE and A2IE bits
in Int_en register to activate the INT output on an alarm match condition. Bit 7 of each of the time-of-day/date alarm
registers and bit 6 of Alm1_mon register are mask bits (Table 2). When all the mask bits for each alarm are logic 0, an
alarm only occurs when the values in the timekeeping registers match the corresponding values stored in the time-of-day,
date, month, and year alarm registers. The alarms can also be programmed to repeat every second, minute, hour, day,
or date. Table 3 and Table 4 show the possible settings. Configurations not listed in the table result in illogical operation.
The DY_DT bit (bit 6 of the alarm day/date registers) controls whether the alarm value stored in bits 0–5 of that register
represents the day of the week or the date of the month. If DY_DT is written to logic 0, the alarm is the result of a match
with date of the month. If DY_DT is written to logic 1, the alarm is the result of a match with day of the week.
Table 3. Alarm1 Modes
DY/DT
ALARM1 REGISTER MASK BITS (BIT 7)
ALARM RATE
A1M6 A1M5 A1M4 A1M3 A1M2 A1M1
X
X
X
X
0
0
0
1
1
1
1
1
1
1
0
1
1
1
1
1
1
0
0
1
1
1
1
1
0
0
0
0
1
1
1
0
0
0
0
0
1
1
0
0
0
0
0
0
1
0
0
0
0
0
0
0
Alarm once a second
Alarm when seconds match
Alarm when minutes and seconds match
Alarm when hours, minutes, and seconds match
Alarm when dates, hours, minutes, and seconds match
Alarm when months, dates, hours, minutes, and seconds match
Alarm when years, months, dates, hours, minutes, and seconds match
Alarm when days, hours, minutes, and seconds match
Table 4. Alarm2 Modes
DY/DT
ALARM2 REGISTER MASK BITS (BIT 7)
ALARM RATE
A2M4
A2M3
A2M2
Alarm once per minute (00 seconds of every minute)
Alarm when minutes match
X
X
X
0
1
1
1
0
0
1
1
0
0
0
1
0
0
0
0
Alarm when hours and minutes match
Alarm when dates, hours, and minutes match
Alarm when days, hours, and minutes match
Alarm when days, hours, and minutes match
1
Countdown Timer
The MAX31329 features a countdown timer with a pause function. The timer can be configured by writing into registers
Timer_config (05h) and Timer_init (17h). The Timer_init register should be loaded with the initial value from which the
timer would start counting down. The Timer_config register allows these configuration options:
•
•
Select the frequency of the timer using the TFS[1:0] field.
Start/stop the timer using the TE (Timer Enable) bit.
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Maxim Integrated | 11
MAX31329
Low-Current, Real-Time Clock with I2C, Power
Management, and Integrated Crystal
•
•
Enable/disable the timer repeat function using the TRPT bit. This function reloads and restarts the timer with the
same init value once it counts down to 0.
Pause/resume the countdown at any time when the timer is enabled using the TPAUSE bit (explained below).
The timer can be programmed to assert the INT output (see Table 2) whenever it counts down to 0. This can be
enabled/disabled using the TIE bit in register Int_en register (01h).
The TPAUSE bit is only valid when TE = 1. This bit must be reset to 0 whenever TE is reset to 0.
Table 5 highlights the steps to be used for various use cases involving TE and TPAUSE.
Typical use cases:
•
•
Countdown timer without pause: Step 1 -> Step 2 -> Step 1, and so on
Countdown timer with pause: Step 1 -> Step 2 -> Step 3a -> Step 3b -> Step 1, and so on
Table 5. Countdown Timer Sequence
SEQUENCE
TE
TPAUSE
ACTION
Countdown timer is reset, and ready for next countdown operation. Timer_init can be
programmed in this state.
Step 1
0
0
0
Step 2
1
Countdown timer starts counting down from the value programmed in Timer_init.
Step 3a
(Optional)
Countdown timer is paused and is ready to start counting down when TPAUSE is programmed
back to ‘0’. Contents of the countdown timer are preserved in this state.
1
1
Step 3b
If 3a is true
Countdown timer is brought out of pause state and starts counting down from the paused
value.
1
0
0
1
Not allowed
Applications Information
Power Supply Decoupling
To achieve the best results when using the device, decouple the V
and/or V
power supplies with 0.1μF and/or
BAT
CC
1.0μF capacitors. Use a high-quality, ceramic surface-mount capacitor if possible. Surface-mount components minimize
lead inductance, which improves performance and ceramic capacitors tend to have adequate high-frequency response
for decoupling applications. If communications during battery operation are not required, the V
decoupling capacitor
BAT
can be omitted.
Using Open-Drain Outputs
The INTA output is open-drain and, therefore, requires external pullup resistor to realize logic-high output levels. Pullup
resistor values around 10kΩ are typical.
Battery Leakage Current
When the MAX31329 switches from V
to V
BAT
supply, all of the I/O buffers internally operate on a V
supply rail. If
CC
these pins are externally connected to an intermediate voltage level (between 0.7V and V
BAT
- 0.7V), there will be a high
BAT
supply. This scenario can occur when the system V
supply, but the I/O pins are pulled up to the V
leakage current (tens of microamperes) on the V
rail is
BAT
discharging and the MAX31329 has switched to V
CC
rail. Set
BAT
EN_IO = 0 in RTC_Config1 register (03h) to ensure that all of the open-drain I/O pins (SDA, SCL,
disabled before switching the main supply to V to minimize the leakage current. These pins will be automatically
CC
/CLKIN) are
BAT
enabled when the MAX31329 switches back to the V
supply.
CC
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Maxim Integrated | 12
MAX31329
Low-Current, Real-Time Clock with I2C, Power
Management, and Integrated Crystal
SDA and SCL Pullup Resistors
SDA is an open-drain output and requires an external pullup resistor to realize a logic-high level. Because the device
does not use clock cycle stretching, a master using either an open-drain output with a pullup resistor or CMOS output
driver (push-pull) could be used for SCL.
Handling
The MAX31329 package contains an integrated resonator. Pick-and-place equipment can be used, but precautions
should be taken to ensure that excessive shocks are avoided. Ultrasonic cleaning should be avoided to prevent damage
to the resonator.
Typical Application Circuit
V
CC
V
CC
SDA
SCL
DIN
V
BAT
CONTROL
SYSTEM
SUPER CAP/
BACKUP BATTERY
MAX31329
INTA/CLKIN
INTB/CLKOUT
GND
Register Map
REGS
ADDRESS
REGBLK
NAME
MSB
LSB
0x00
0x01
0x02
STATUS[7:0]
INT_EN[7:0]
PSDECT
OSF
DOSF
–
PFAIL
PFAILE
–
LOS
DIF
TIF
TIE
–
A2F
A2IE
–
A1F
A1IE
–
–
–
–
DIE
RTC_RESET[7:0]
–
SWRST
DATA_RE I2C_TIME
OUT
0x03
RTC_CONFIG1[7:0]
–
–
–
–
EN_IO
ENOSC
T
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Maxim Integrated | 13
MAX31329
Low-Current, Real-Time Clock with I2C, Power
Management, and Integrated Crystal
ADDRESS
NAME
MSB
LSB
0x04
0x05
0x06
0x07
RTC_CONFIG2[7:0]
TIMER_CONFIG[7:0]
SECONDS[7:0]
ENCLKO
CLKO_HZ[1:0]
–
DIP
ENCLKIN
TRPT
CLKIN_HZ[1:0]
TFS[1:0]
–
–
–
–
–
TE
TPAUSE
SEC_10[2:0]
MIN_10[2:0]
SECONDS[3:0]
MINUTES[7:0]
MINUTES[3:0]
HOUR[3:0]
HR_20_A
M_PM
0x08
HOURS[7:0]
–
F_24_12
HR_10
0x09
0x0A
DAY[7:0]
–
–
–
–
–
–
–
DAY[2:0]
DATE[7:0]
DATE_10[1:0]
DATE[3:0]
CENTUR
Y
MONTH_1
0
0x0B
MONTH[7:0]
–
–
MONTH[3:0]
0x0C
0x0D
0x0E
YEAR[7:0]
YEAR_10[3:0]
YEAR[3:0]
ALM1_SEC[7:0]
ALM1_MIN[7:0]
A1M1
A1M2
A1_SEC_10[2:0]
A1_MIN_10[2:0]
A1_SECONDS[3:0]
A1_MINUTES[3:0]
A1_HR_2
0_AM_PM
A1_HR_1
0
0x0F
0x10
0x11
ALM1_HRS[7:0]
A1M3
A1M4
A1M5
–
A1_HOUR[3:0]
A1_DAY_DATE[3:0]
A1_MONTH[3:0]
A1_DY_D
T_MATCH
ALM1_DAY_DATE[7:0]
ALM1_MON[7:0]
A1_DATE_10[1:0]
A1_MONT
H_10
A1M6
–
0x12
0x13
ALM1_YEAR[7:0]
ALM2_MIN[7:0]
A1_YEAR_10[3:0]
A1_YEAR[3:0]
A2M2
A2M3
A2_MIN_10[2:0]
A2_MINUTES[3:0]
A2_HR_2
0_AM_PM
A2_HR_1
0
0x14
0x15
ALM2_HRS[7:0]
–
A2_HOUR[3:0]
A2_DY_D
T_MATCH
ALM2_DAY_DATE[7:0]
A2M4
A2_DATE_10[1:0]
A2_DAY_DATE[3:0]
0x16
0x17
TIMER_COUNT[7:0]
TIMER_INIT[7:0]
TIMER_COUNT[7:0]
TIMER_INIT[7:0]
D_VBACK D_MAN_S
_SEL EL
0x18
PWR_MGMT[7:0]
–
–
–
–
PFVT[1:0]
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Maxim Integrated | 14
MAX31329
Low-Current, Real-Time Clock with I2C, Power
Management, and Integrated Crystal
ADDRESS
NAME
MSB
LSB
D_TRKCH
G_EN
0x19
TRICKLE_REG[7:0]
–
–
–
D_TRICKLE[3:0]
RAM_REG
0x22
0x23
0x24
0x25
0x26
0x27
0x28
0x29
0x2A
0x2B
0x2C
0x2D
0x2E
0x2F
0x30
0x31
0x32
0x33
0x34
0x35
0x36
0x37
Ram_reg 0[7:0]
Ram_reg 1[7:0]
Ram_reg 2[7:0]
Ram_reg 3[7:0]
Ram_reg 4[7:0]
Ram_reg 5[7:0]
Ram_reg 6[7:0]
Ram_reg 7[7:0]
Ram_reg 8[7:0]
Ram_reg 9[7:0]
Ram_reg 10[7:0]
Ram_reg 11[7:0]
Ram_reg 12[7:0]
Ram_reg 13[7:0]
Ram_reg 14[7:0]
Ram_reg 15[7:0]
Ram_reg 16[7:0]
Ram_reg 17[7:0]
Ram_reg 18[7:0]
Ram_reg 19[7:0]
Ram_reg 20[7:0]
Ram_reg 21[7:0]
DATA[7:0]
DATA[7:0]
DATA[7:0]
DATA[7:0]
DATA[7:0]
DATA[7:0]
DATA[7:0]
DATA[7:0]
DATA[7:0]
DATA[7:0]
DATA[7:0]
DATA[7:0]
DATA[7:0]
DATA[7:0]
DATA[7:0]
DATA[7:0]
DATA[7:0]
DATA[7:0]
DATA[7:0]
DATA[7:0]
DATA[7:0]
DATA[7:0]
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Maxim Integrated | 15
MAX31329
Low-Current, Real-Time Clock with I2C, Power
Management, and Integrated Crystal
ADDRESS
NAME
MSB
LSB
0x38
0x39
0x3A
0x3B
0x3C
0x3D
0x3E
0x3F
0x40
0x41
0x42
0x43
0x44
0x45
0x46
0x47
0x48
0x49
0x4A
0x4B
0x4C
0x4D
0x4E
0x4F
0x50
Ram_reg 22[7:0]
Ram_reg 23[7:0]
Ram_reg 24[7:0]
Ram_reg 25[7:0]
Ram_reg 26[7:0]
Ram_reg 27[7:0]
Ram_reg 28[7:0]
Ram_reg 29[7:0]
Ram_reg 30[7:0]
Ram_reg 31[7:0]
Ram_reg 32[7:0]
Ram_reg 33[7:0]
Ram_reg 34[7:0]
Ram_reg 35[7:0]
Ram_reg 36[7:0]
Ram_reg 37[7:0]
Ram_reg 38[7:0]
Ram_reg 39[7:0]
Ram_reg 40[7:0]
Ram_reg 41[7:0]
Ram_reg 42[7:0]
Ram_reg 43[7:0]
Ram_reg 44[7:0]
Ram_reg 45[7:0]
Ram_reg 46[7:0]
DATA[7:0]
DATA[7:0]
DATA[7:0]
DATA[7:0]
DATA[7:0]
DATA[7:0]
DATA[7:0]
DATA[7:0]
DATA[7:0]
DATA[7:0]
DATA[7:0]
DATA[7:0]
DATA[7:0]
DATA[7:0]
DATA[7:0]
DATA[7:0]
DATA[7:0]
DATA[7:0]
DATA[7:0]
DATA[7:0]
DATA[7:0]
DATA[7:0]
DATA[7:0]
DATA[7:0]
DATA[7:0]
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Maxim Integrated | 16
MAX31329
Low-Current, Real-Time Clock with I2C, Power
Management, and Integrated Crystal
ADDRESS
NAME
MSB
LSB
0x51
0x52
0x53
0x54
0x55
0x56
0x57
0x58
0x59
0x5A
0x5B
0x5C
0x5D
0x5E
0x5F
0x60
0x61
Ram_reg 47[7:0]
Ram_reg 48[7:0]
Ram_reg 49[7:0]
Ram_reg 50[7:0]
Ram_reg 51[7:0]
Ram_reg 52[7:0]
Ram_reg 53[7:0]
Ram_reg 54[7:0]
Ram_reg 55[7:0]
Ram_reg 56[7:0]
Ram_reg 57[7:0]
Ram_reg 58[7:0]
Ram_reg 59[7:0]
Ram_reg 60[7:0]
Ram_reg 61[7:0]
Ram_reg 62[7:0]
Ram_reg 63[7:0]
DATA[7:0]
DATA[7:0]
DATA[7:0]
DATA[7:0]
DATA[7:0]
DATA[7:0]
DATA[7:0]
DATA[7:0]
DATA[7:0]
DATA[7:0]
DATA[7:0]
DATA[7:0]
DATA[7:0]
DATA[7:0]
DATA[7:0]
DATA[7:0]
DATA[7:0]
Register Details
STATUS (0x0)
Interrupt Status Register
BIT
7
6
OSF
5
4
LOS
3
DIF
2
TIF
1
A2F
0
A1F
Field
PSDECT
0b0
PFAIL
0b0
Reset
0b1
0x0
0b0
0b0
0b0
0b0
Access Type
Read, Ext
Read, Ext
Read, Ext
Read, Ext
Read, Ext
Read, Ext
Read, Ext
Read, Ext
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Maxim Integrated | 17
MAX31329
Low-Current, Real-Time Clock with I2C, Power
Management, and Integrated Crystal
BITFIELD
BITS
DESCRIPTION
DECODE
0x0: Part is running on VCC
PSDECT
7
Main Supply Source Indication
Oscillator Stop Flag
0x1: Part is running on VBAT
0x0: Set to 0 when oscillator is running or when DOSF =
1.
0x1: Set to 1 when oscillator has stopped. An interrupt will
not be generated on interrupt pins.
OSF
6
0x0: Set to zero when there is no power-fail condition on
VCC
.
0x1: Set to 1 when there is a power-fail condition on VCC
.
PFAIL
5
Power-Fail Flag
When this is set to ‘1’, and PFAILE = 1, an interrupt will be
generated on pin INTAb/INTBb. After an initial power-fail
condition occurs, if the condition does not persist, this bit
can only be cleared by reading the Status register.
0x0: Oscillator clock frequency is within 0.8% of the
external clock frequency.
0x1: Oscillator clock frequency differs more than 0.8%
from the external clock frequency.
Loss of Signal. Valid only for external clock modes.
(ENCLKIN = 1)
LOS
DIF
TIF
4
3
2
0x0: Set to zero if DIN interrupt is not triggered.
0x1: Set to 1 when DIN interrupt is triggered.
When this is set to ‘1’, and DIE = 1, an interrupt will be
generated on pin INTAb/INTBb.
Digital (DIN) Interrupt Flag
Timer Interrupt Flag
0x0: Set to zero when countdown timer is not zero.
0x1: Set to 1 when countdown timer reaches to zero.
When this is set to ‘1’, and TIE = 1, an interrupt will be
generated on pin INTAb/INTBb.
0x0: Set to 0 when RTC time does not match the alarm2
register.
0x1: Set to 1 when RTC time matches the alarm2 register.
When this bit is set, and A2IE = 1, an interrupt will be
generated on INTAb/INTBb.
A2F
A1F
1
0
Alarm2 Interrupt Flag
Alarm1 Interrupt Flag
0x0: Set to zero when RTC time doesn't match to alarm1
register.
0x1: Set to 1 when RTC time matches the alarm1 register.
When this is set to 1, and A1IE=1, an interrupt will be
generated on pin INTAb/INTBb.
INT_EN (0x1)
Interrupt Enable Register
BIT
7
–
–
–
6
DOSF
5
4
–
–
–
3
DIE
2
TIE
1
A2IE
0
A1IE
Field
PFAILE
0b0
Reset
0b0
0b0
0b0
0b0
0b0
Access Type
BITFIELD
Write, Read
Write, Read
Write, Read
Write, Read
Write, Read
Write, Read
BITS
DESCRIPTION
DECODE
0x0: Allow the OSF to indicate the oscillator status.
0x1: Disable the oscillator flag, irrespective of the
oscillator status.
DOSF
6
5
Disable Oscillator Flag
0x0: When set to 0, power-fail interrupt function is
disabled.
PFAILE
Power-Fail Interrupt Enable
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Maxim Integrated | 18
MAX31329
Low-Current, Real-Time Clock with I2C, Power
Management, and Integrated Crystal
BITFIELD
BITS
DESCRIPTION
DECODE
0x1: When set to 1, power-fail interrupt function is
enabled.
0x0: Disable DIN interrupt function
0x1: Enable DIN interrupt function
DIE
3
2
1
0
Digital (DIN) Interrupt Enable
Timer Interrupt Enable
0x0: Disable timer interrupt function
0x1: Enable timer interrupt function
TIE
0x0: Disable alarm2 interrupt function
0x1: Enable alarm2 interrupt function
A2IE
A1IE
Alarm2 Interrupt Enable
Alarm1 Interrupt Enable
0x0: Disable alarm1 interrupt function
0x1: Enable alarm1 interrupt function
RTC_RESET (0x2)
RTC Software Reset Register
BIT
7
–
–
6
–
–
5
–
–
4
–
–
3
–
–
2
–
–
1
–
–
0
Field
SWRST
0b0
Reset
Write, Read,
Ext
Access Type
–
–
–
–
–
–
–
BITFIELD
BITS
DESCRIPTION
DECODE
0x0: When set to 0, the device is in normal working mode.
0x1: When set to 1, resets the digital block and the I2C-
programmable registers, except for RAM registers and
RTC_reset.SWRST. Oscillator is disabled.
Active-High Software Reset Bit. To exit the reset
state, this bit must be cleared.
SWRST
0
RTC_CONFIG1 (0x3)
RTC Configuration Register
BIT
7
6
5
4
3
2
1
0
I2C_TIMEOU
T
Field
–
–
–
–
EN_IO
DATA_RET
ENOSC
Reset
–
–
–
–
–
–
–
–
0b1
0b0
0b1
0b1
Access Type
BITFIELD
EN_IO
Write, Read
Write, Read
Write, Read
Write, Read
BITS
DESCRIPTION
DECODE
Disables All Open-Drain I/Os (SDA, SCL,
0x0: Disables all open-drain I/Os when running on VBAT
0x1: Enables all open-drain I/Os when running on VBAT
.
.
3
INTAb/CLKIN) when running on VBAT. No effect
when running on VCC
.
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Maxim Integrated | 19
MAX31329
Low-Current, Real-Time Clock with I2C, Power
Management, and Integrated Crystal
BITFIELD
DATA_RET
I2C_TIMEOUT
ENOSC
BITS
DESCRIPTION
DECODE
0x0: Normal operation mode
0x1: Data Retention mode
0x0: Disables I2C timeout
0x1: Enables I2C timeout
2
1
0
Data Retention Mode Enable/Disable
I2C Timeout Enable
0x0: Disable oscillator
0x1: Enable oscillator
Active-High Enable for Oscillator
RTC_CONFIG2 (0x4)
RTC Configuration Register
BIT
7
6
5
4
–
–
–
3
DIP
2
1
0
Field
ENCLKO
0b0
CLKO_HZ[1:0]
0b00
ENCLKIN
0x0
CLKIN_HZ[1:0]
0b00
Reset
0x0
Access Type
Write, Read
Write, Read
Write, Read
Write, Read
Write, Read
BITFIELD
BITS
DESCRIPTION
DECODE
0x0: Sets INTBb/CLKOUT pin as INTBb (interrupt).
0x1: Sets INTBb/CLKOUT pin as CLKO (clock output).
ENCLKO
7
CLKO Enable
0x0: 1Hz
0x1: 4.096kHz
0x2: 8.192kHz
0x3: 32.768kHz
CLKO_HZ
6:5
Set Output Clock Frequency on INTB/CLKOUT
0x0: Interrupt triggers on falling edge of DIN input.
0x1: Interrupt triggers on rising edge of DIN input.
DIP
3
2
Digital (DIN) Interrupt Polarity
CLKIN Enable
0x0: Sets INTAb/CLKIN pin as INTAb (interrupt).
0x1: Sets INTAb/CLKIN pin as CLKIN (clock input).
ENCLKIN
0x0: 1Hz
0x1: 50Hz
0x2: 60Hz
CLKIN_HZ
1:0
Set Input Clock Frequency on INTA/CLKIN
0x3: 32.768kHz
TIMER_CONFIG (0x5)
Countdown Timer Configuration Register
BIT
7
–
–
–
6
–
–
–
5
–
–
–
4
TE
3
2
TRPT
1
0
Field
TPAUSE
0b0
TFS[1:0]
0b00
Reset
0b0
0b1
Access Type
Write, Read
Write, Read
Write, Read
Write, Read
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Maxim Integrated | 20
MAX31329
Low-Current, Real-Time Clock with I2C, Power
Management, and Integrated Crystal
BITFIELD
BITS
DESCRIPTION
DECODE
0x0: Timer is reset when set to 0. New timer countdown
value (Timer_Init) can be programmed in this state.
Timer Enable
Note: In this state, ensure TPAUSE is also programmed to
0 if TPAUSE was set to 1 earlier.
0x1: Timer starts counting down from the value
programmed in Timer_Init.
TE
4
Also see the TPAUSE field for additional
information.
Timer Pause. This field is valid only when TE = 1.
When TE will be programmed to 0, this field must
also be reset to 0.
0x0: Timer continues to count down from the paused
count value as per programming.
0x1: Timer is paused, however, the count value is
retained. When this bit is reset back to 0, the countdown
continues from the paused value.
TPAUSE
3
Details about Timer Pause are explained in detail in
another section of the data sheet.
0x0: Countdown timer will halt once it reaches 0.
0x1: Countdown timer reloads the value from the timer
initial register upon reaching 0 and continues counting.
Timer Repeat Mode. Controls the timer interrupt
function.
TRPT
TFS
2
0x0: 1024Hz
0x1: 256Hz
0x2: 64Hz
0x3: 16Hz
1:0
Timer Frequency Selection
SECONDS (0x6)
Seconds Configuration Register
BIT
7
–
–
–
6
5
4
3
2
1
0
Field
SEC_10[2:0]
0b000
SECONDS[3:0]
0x0
Reset
Access Type
Write, Read, Dual
Write, Read, Dual
BITFIELD
BITS
DESCRIPTION
SEC_10
6:4
3:0
RTC Seconds in Multiples of 10
RTC Seconds Value
SECONDS
MINUTES (0x7)
Minutes Configuration Register
BIT
7
–
–
–
6
5
4
3
2
1
0
Field
MIN_10[2:0]
0b000
MINUTES[3:0]
0x0
Write, Read, Dual
Reset
Access Type
Write, Read, Dual
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Maxim Integrated | 21
MAX31329
Low-Current, Real-Time Clock with I2C, Power
Management, and Integrated Crystal
BITFIELD
MIN_10
BITS
6:4
DESCRIPTION
RTC Minutes in Multiples of 10
MINUTES
3:0
RTC Minutes Value
HOURS (0x8)
Hours Configuration Register
BIT
7
–
–
–
6
5
4
3
2
1
0
HR_20_AM_
PM
Field
F_24_12
0b0
HR_10
0b0
HOUR[3:0]
0x0
Reset
0b0
Write, Read,
Dual
Write, Read,
Dual
Access Type
Write, Read
Write, Read, Dual
BITFIELD
BITS
DESCRIPTION
DECODE
0x0: 24-hour format
0x1: 12-hour format
F_24_12
6
Sets RTC in 12-Hour or 24-Hour Format
In 12-hour format, this works as the AM/PM
HR_20_AM_P
M
indicator.
0x0: Indicates AM in 12-hour format.
0x1: Indicates PM in 12-hour format.
5
In 24-hour format, it is the RTC hours in multiples of
20 (BCD).
HR_10
HOUR
4
RTC Hours in Multiples of 10 (BCD)
RTC Hours Value (BCD)
3:0
DAY (0x9)
Day Configuration Register
BIT
7
–
–
–
6
–
–
–
5
–
–
–
4
–
–
–
3
–
–
–
2
1
0
Field
DAY[2:0]
Reset
0b001
Access Type
Write, Read, Dual
BITFIELD
BITS
2:0
DESCRIPTION
DAY
RTC Days
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Maxim Integrated | 22
MAX31329
Low-Current, Real-Time Clock with I2C, Power
Management, and Integrated Crystal
DATE (0xA)
Date Configuration Register
BIT
7
–
–
–
6
–
–
–
5
4
3
2
1
0
Field
DATE_10[1:0]
0b00
DATE[3:0]
0x1
Reset
Access Type
Write, Read, Dual
Write, Read, Dual
BITFIELD
BITS
DESCRIPTION
DATE_10
DATE
5:4
3:0
RTC Date in Multiples of 10 (BCD)
RTC Date (BCD)
MONTH (0xB)
Month Configuration Register
BIT
7
6
–
–
5
–
–
4
3
2
1
0
Field
CENTURY
0b0
MONTH_10
0b0
MONTH[3:0]
0x1
Reset
Write, Read,
Dual
Write, Read,
Dual
Access Type
–
–
Write, Read, Dual
BITFIELD
BITS
DESCRIPTION
DECODE
0x0: Year is in 21st century.
0x1: Year is in 22nd century.
CENTURY
MONTH_10
MONTH
7
4
Century Bit
RTC Month in Multiples of 10 (BCD)
RTC Months (BCD)
3:0
YEAR (0xC)
Year Configuration Register
BIT
7
6
5
4
3
2
1
0
Field
YEAR_10[3:0]
0x0
YEAR[3:0]
0x0
Reset
Access Type
Write, Read, Dual
Write, Read, Dual
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Maxim Integrated | 23
MAX31329
Low-Current, Real-Time Clock with I2C, Power
Management, and Integrated Crystal
BITFIELD
YEAR_10
BITS
7:4
DESCRIPTION
RTC Year Multiples of 10 (BCD)
RTC Years (BCD)
YEAR
3:0
ALM1_SEC (0xD)
Alarm1 Seconds Configuration Register
DY_DT
A1M6
A1M5
A1M4
A1M3
A1M2
A1M1
ALARM RATE
Once per sec
Sec match
x
x
1
1
1
1
1
1
1
1
1
1
1
0
Min and sec
match
x
x
0
0
1
1
1
1
1
1
1
0
1
1
0
0
1
0
0
0
0
0
0
0
0
0
0
0
Hour, min, and
sec match
Date and time
match
Month, date,
and time match
Year, month,
date, and time
match
0
1
0
1
0
1
0
0
0
0
0
0
0
0
Day and time
match
Alarm 1 can be set by writing to registers 0Dh–12h. See the Register Map. The alarm can be programmed by the A1IE
bit in Int_en reg (01h) register to activate the INT output on an alarm match condition. Bit 7 of each of the time-of-
day/date alarm registers, and Bit 7 and 6 of the month alarm register are mask bits. When all of the mask bits of each
alarm are logic 0, an alarm only occurs when the values in the timekeeping registers match the corresponding values
stored in the time-of-day/date alarm registers. The alarm can also be programmed to repeat every second, minute,
hour, day, date, month, or year. The table above shows the possible settings. Configurations not listed in the table result
in illogical operation. The DY_DT bit (bit 6 of the alarm day/date registers) controls whether the alarm value stored in
bits 0–5 of that register reflects the day of the week or the date of the month. If DY_DT is written to logic 0, the alarm is
the result of a match with date of the month. If DY_DT is written to logic 1, the alarm is the result of a match with the day
of the week.
BIT
7
6
5
4
3
2
1
0
Field
A1M1
A1_SEC_10[2:0]
A1_SECONDS[3:0]
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Maxim Integrated | 24
MAX31329
Low-Current, Real-Time Clock with I2C, Power
Management, and Integrated Crystal
Reset
0b0
0b000
Write, Read
0x0
Access Type
Write, Read
Write, Read
BITFIELD
A1M1
BITS
7
DESCRIPTION
Alarm1 Mask Bit for Seconds
A1_SEC_10
A1_SECONDS
6:4
3:0
Alarm1 Seconds in Multiples of 10
Alarm1 Seconds
ALM1_MIN (0xE)
Alarm1 Minutes Configuration Register
BIT
7
A1M2
6
5
4
3
2
1
0
Field
A1_MIN_10[2:0]
0b000
A1_MINUTES[3:0]
0x0
Reset
0b0
Access Type
Write, Read
Write, Read
Write, Read
BITFIELD
BITS
DESCRIPTION
A1M2
7
Alarm1 Mask Bit for Minutes
A1_MIN_10
A1_MINUTES
6:4
3:0
Alarm1 Minutes in Multiples of 10
Alarm1 Minutes
ALM1_HRS (0xF)
Alarm1 Hours Configuration Register
BIT
7
6
5
4
3
2
1
0
A1_HR_20_A
M_PM
Field
A1M3
–
A1_HR_10
A1_HOUR[3:0]
Reset
0b0
–
–
0b0
0b0
0x0
Access Type
Write, Read
Write, Read
Write, Read
Write, Read
www.maximintegrated.com
Maxim Integrated | 25
MAX31329
Low-Current, Real-Time Clock with I2C, Power
Management, and Integrated Crystal
BITFIELD
BITS
DESCRIPTION
DECODE
A1M3
7
Alarm1 Mask Bit for Hours
In 12-hour format, this works as the AM/PM
indicator.
A1_HR_20_AM
_PM
0x0: Indicates AM in 12-hour format.
0x1: Indicates PM in 12-hour format.
5
In 24-hour format, it is the Alarm1 hours in multiples
of 20 (BCD).
A1_HR_10
A1_HOUR
4
Alarm1 Hours in Multiples of 10
Alarm1 Hours
3:0
ALM1_DAY_DATE (0x10)
Alarm1 Day/Date Configuration Register
BIT
7
6
5
4
3
2
1
0
A1_DY_DT_
MATCH
Field
A1M4
A1_DATE_10[1:0]
A1_DAY_DATE[3:0]
Reset
0b0
0b0
0b00
0x0
Access Type
Write, Read
Write, Read
Write, Read
Write, Read
BITFIELD
BITS
DESCRIPTION
DECODE
A1M4
7
Alarm1 Mask Bit for Day/Date
A1_DY_DT_M
ATCH
0x0: Alarm when dates match
0x1: Alarm when days match
6
A1_DATE_10
5:4
3:0
Alarm1 Date in Multiples of 10
Alarm1 Day/Date
A1_DAY_DAT
E
ALM1_MON (0x11)
Alarm1 Month Configuration Register
BIT
7
6
5
4
3
2
1
0
A1_MONTH_
10
Field
A1M5
A1M6
–
A1_MONTH[3:0]
Reset
0b0
0b0
–
–
0b0
0x0
Access Type
Write, Read
Write, Read
Write, Read
Write, Read
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Maxim Integrated | 26
MAX31329
Low-Current, Real-Time Clock with I2C, Power
Management, and Integrated Crystal
BITFIELD
A1M5
BITS
7
DESCRIPTION
Alarm1 Mask Bit for Month
A1M6
6
Alarm1 Mask Bit for Year
A1_MONTH_10
A1_MONTH
4
Alarm1 Months in Multiples of 10
Alarm1 Months
3:0
ALM1_YEAR (0x12)
Alarm1 Year Configuration Register
BIT
7
6
5
4
3
2
1
0
Field
A1_YEAR_10[3:0]
0x0
A1_YEAR[3:0]
0x0
Reset
Access Type
Write, Read
Write, Read
BITFIELD
BITS
7:4
DESCRIPTION
A1_YEAR_10
A1_YEAR
Alarm1 Year in Multiples of 10
Alarm1 Years
3:0
ALM2_MIN (0x13)
Alarm 2 can be set by writing to registers 13h–15h. See the Register Map. The alarm can be programmed by the A2IE
bit in Int_en reg (01h) register to activate the INT output on an alarm match condition. Bit 7 of each of the time-of-
day/date alarm registers are mask bits. When all of the mask bits of each alarm are logic 0, an alarm only occurs when
the values in the timekeeping registers match the corresponding values stored in the time-of-day/date alarm registers.
The alarm can also be programmed to repeat every minute, hour, day, or date. The table below shows the possible
settings. Configurations not listed in the table result in illogical operation. The DY_DT bit (bit 6 of the alarm day/date
registers) controls whether the alarm value stored in bits 0–5 of that register reflects the day of the week or the date of
the month. If DY_DT is written to logic 0, the alarm is the result of a match with date of the month. If DY_DT is written to
logic 1, the alarm is the result of a match with day of the week.
DY_DT
A2M4
A2M3
A2M2
ALARM RATE
x
x
x
1
1
1
1
1
0
1
0
0
Once per minute
Minute match
Hour and minute match
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Maxim Integrated | 27
MAX31329
Low-Current, Real-Time Clock with I2C, Power
Management, and Integrated Crystal
Date, hour, and minute
0
1
0
0
0
0
0
match
Day, hour, and minute
0
match
BIT
Field
7
6
5
4
3
2
1
0
A2M2
0b0
A2_MIN_10[2:0]
0b000
A2_MINUTES[3:0]
0x0
Reset
Access Type
Write, Read
Write, Read
Write, Read
BITFIELD
BITS
DESCRIPTION
Alarm2 Mask Bit for Minutes
ALARM2 MASK BITS (BIT 7)
DY/DT
ALARM RATE
A2M4
A2M3
A2M2
X
X
X
0
1
1
1
0
0
1
1
0
0
0
1
0
0
0
0
Once per minute
A2M2
7
Minutes match.
Hour and minute match
Date, hour, and minute match
Day, hour, and minute match
1
A2_MIN_10
6:4
3:0
Alarm2 Minutes in Multiples of 10
Alarm2 Minutes
A2_MINUTES
ALM2_HRS (0x14)
Alarm2 Hours Configuration Register
BIT
7
6
5
4
3
2
1
0
A2_HR_20_A
M_PM
Field
A2M3
–
A2_HR_10
A2_HOUR[3:0]
Reset
0b0
–
–
0b0
0b0
0x0
Access Type
Write, Read
Write, Read
Write, Read
Write, Read
www.maximintegrated.com
Maxim Integrated | 28
MAX31329
Low-Current, Real-Time Clock with I2C, Power
Management, and Integrated Crystal
BITFIELD
BITS
DESCRIPTION
DECODE
A2M3
7
Alarm2 Mask Bit for Hours
In 12-hour format, this works as the AM/PM
indicator.
A2_HR_20_AM
_PM
0x0: Indicates AM in 12-hour format.
0x1: Indicates PM in 12-hour format.
5
In 24-hour format, it is the Alarm2 hours in multiples
of 20 (BCD).
A2_HR_10
A2_HOUR
4
Alarm2 Hours in Multiples of 10
Alarm2 Hours
3:0
ALM2_DAY_DATE (0x15)
Alarm2 Day/Date Configuration Register
BIT
7
6
5
4
3
2
1
0
A2_DY_DT_
MATCH
Field
A2M4
A2_DATE_10[1:0]
A2_DAY_DATE[3:0]
Reset
0b0
0b0
0b00
0x0
Access Type
Write, Read
Write, Read
Write, Read
Write, Read
BITFIELD
BITS
DESCRIPTION
DECODE
A2M4
7
Alarm2 Mask Bit for Day/Date
A2_DY_DT_M
ATCH
0x0: Alarm when dates match
0x1: Alarm when days match
6
Selects Alarm when Days Match or Dates Match
Alarm2 Date in Multiples of 10
Alarm2 Day/Date
A2_DATE_10
5:4
3:0
A2_DAY_DAT
E
TIMER_COUNT (0x16)
Countdown Timer Value Register
BIT
7
6
5
4
3
2
1
0
Field
TIMER_COUNT[7:0]
0x00
Reset
Access Type
Read Only
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Maxim Integrated | 29
MAX31329
Low-Current, Real-Time Clock with I2C, Power
Management, and Integrated Crystal
BITFIELD
BITS
DESCRIPTION
Countdown Timer Current Count Value. The current timer value can be read by reading
this register.
TIMER_COUNT
7:0
TIMER_INIT (0x17)
Countdown Timer Initialization Register
BIT
7
6
5
4
3
2
1
0
Field
TIMER_INIT[7:0]
Reset
0x00
Access Type
Write, Read
BITFIELD
BITS
DESCRIPTION
Countdown Timer Initial Value. The timer is loaded with the contents of this register
when it reaches 0 in repeat mode.
TIMER_INIT
7:0
PWR_MGMT (0x18)
Power-Management Configuration Register
BIT
7
6
5
4
3
2
1
0
D_VBACK_S
EL
Field
–
–
–
–
PFVT[1:0]
D_MAN_SEL
Reset
–
–
–
–
–
–
–
–
0b11
0b0
0b0
Access Type
BITFIELD
PFVT
Write, Read
Write, Read
Write, Read
BITS
DESCRIPTION
DECODE
0x0: Threshold voltage disabled
0x1: 1.85V
0x2: 2.15V
Power-Fail Threshold Voltage. Sets analog
comparator threshold voltage. Requires
D_MAN_SEL = 0 for this setting to have effect.
3:2
0x3: 2.40V
Backup Battery Select. Requires D_MAN_SEL = 1
for this bit to have effect. VBACK can only be selected
D_VBACK_SE
L
0x0: Use VCC as supply.
0x1: Use VBACK as supply.
1
0
as the supply when VCC < VBACK
.
0x0: Circuit decides whether to use VCC or VBACK as the
supply.
0x1: User decides whether to use VCC or VBACKUP as the
supply by setting the D_VBACK_SEL bit.
When this bit is low, power-management
D_MAN_SEL
comparators are enabled and the input control block
decides which supply to use. When this bit is high,
www.maximintegrated.com
Maxim Integrated | 30
MAX31329
Low-Current, Real-Time Clock with I2C, Power
Management, and Integrated Crystal
BITFIELD
BITS
DESCRIPTION
DECODE
comparators are disabled and user can manually
select whether to use VCC or VBACK as the supply.
TRICKLE_REG (0x19)
Trickle Charge Configuration Register
BIT
7
6
5
4
3
2
1
0
D_TRKCHG_
EN
Field
–
–
–
D_TRICKLE[3:0]
Reset
0x0
–
–
–
–
–
–
0x0
Access Type
BITFIELD
Write, Read
Write, Read
BITS
DESCRIPTION
DECODE
D_TRKCHG_E
N
0x0: Trickle charger disabled
0x1: Trickle charger enabled
7
Trickle Charger Enable
0x0: 3kΩ in series with a Schottky diode
0x1: 3kΩ in series with a Schottky diode
0x2: 6kΩ in series with a Schottky diode
0x3: 11kΩ in series with a Schottky diode
0x4: 3kΩ in series with a diode + Schottky diode
0x5: 3kΩ in series with a diode + Schottky diode
0x6: 6kΩ in series with a diode + Schottky diode
0x7: 11kΩ in series with a diode + Schottky diode
0x8: No connection
D_TRICKLE
3:0
Sets the Charging Path for Trickle Charger
0x9: No connection
0xA: No connection
0xB: No connection
0xC: No connection
0xD: No connection
0xE: No connection
0xF: No connection
Ram_reg (0x22, 0x23, 0x24, 0x25, 0x26, 0x27, 0x28, 0x29, 0x2A, 0x2B, 0x2C, 0x2D, 0x2E, 0x2F, 0x30, 0x31,
0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x3A, 0x3B, 0x3C, 0x3D, 0x3E, 0x3F, 0x40, 0x41, 0x42,
0x43, 0x44, 0x45, 0x46, 0x47, 0x48, 0x49, 0x4A, 0x4B, 0x4C, 0x4D, 0x4E, 0x4F, 0x50, 0x51, 0x52, 0x53,
0x54, 0x55, 0x56, 0x57, 0x58, 0x59, 0x5A, 0x5B, 0x5C, 0x5D, 0x5E, 0x5F, 0x60, 0x61)
BIT
7
6
5
4
3
2
1
0
Field
DATA[7:0]
Reset
Access Type
Write, Read
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Maxim Integrated | 31
MAX31329
Low-Current, Real-Time Clock with I2C, Power
Management, and Integrated Crystal
BITFIELD
BITS
DESCRIPTION
DATA
7:0
Ordering Information
PART NUMBER
MAX31329ELB+
TEMPERATURE RANGE
-40°C to +85°C
PIN-PACKAGE
10 LGA
MAX31329ELB+T
-40°C to +85°C
10 LGA
+Denotes a lead(Pb)-free/RoHS-compliant package.
T = Tape and reel.
www.maximintegrated.com
Maxim Integrated | 32
MAX31329
Low-Current, Real-Time Clock with I2C, Power
Management, and Integrated Crystal
Revision History
REVISION
NUMBER
0
REVISION
DATE
PAGES
CHANGED
DESCRIPTION
7/21
Initial release
—
For pricing, delivery, and ordering information, please visit Maxim Integrated’s online storefront at https://www.maximintegrated.com/en/storefront/storefront.html.
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
© 2021 Maxim Integrated Products, Inc
相关型号：
MAX313CPE+
SPST, 4 Func, 1 Channel, CMOS, PDIP16, 0.300 INCH, PLASTIC, MO-058AB, MS-001AA, DIP-16
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