MAX35102 [MAXIM]
Time-to-Digital Converter Without RTC;
| 型号： | MAX35102 |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | Time-to-Digital Converter Without RTC |
| 文件： | 总37页 (文件大小：999K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
EVALUATION KIT AVAILABLE
MAX35102
Time-to-Digital Converter
Without RTC
General Description
Features and Benefits
● High-Accuracy Flow Measurement for Billing and
The MAX35102 is a time-to-digital converter with built-in
amplifier and comparator targeted as a low-cost, analog
front-end solution for the ultrasonic heat meter and flow
meter markets. It is similar to the MAX35101, but with a
reduced feature set and without a real-time clock (RTC).
The package size has been reduced to 4mm x 4mm x
0.75mm with 0.4mm pin pitch.
Leak Detection
• Time-to-Digital Accuracy Down to 20ps
• Measurement Range Up to 8ms
• 2 Channels—Single-Stop Channel
● High-Accuracy Temperature Measurement for
Precise Heat and Flow Calculations
• Up to Four 2-Wire Sensors
With a time measurement accuracy of 20ps and auto-
matic differential time-of-flight (ToF) measurement, this
device makes for simplified computation of liquid flow.
• PT1000 and PT500 RTD Support
• 40mK Accuracy
● Maximizes Battery Life with Low Device and Overall
System Power
Power consumption is the lowest available with ultra-low
5.5μA ToF measurement and < 125nA duty-cycled tem-
perature measurement.
• Ultra-Low 5.5μA ToF measurement and < 125nA
Duty-Cycled Temperature Measurement
• 2.3V to 3.6V Single-Supply Operation
Applications
● Ultrasonic Heat Meters
● Ultrasonic Water Meters
● Ultrasonic Gas Meters
● High-Integration Solution Minimizes Parts Count and
Reduces BOM Cost
• Small, 4mm x 4mm, 32-Pin TQFN Package
• -40°C to +85°C Operation
Ordering Information appears at end of data sheet.
System Block Diagram
CMP_OUT/UP_DN
GND
STP_UP
DATA AND
INTX
ANALOG SWITCHING
AND BIAS CONTROL
TIME-TO-DIGITAL
CONVERTER
PROGRAMMABLE ALU
STATUS
REGISTERS
STP_DN
RSTX
3.6 V
VCC
SCK
INTERNAL
LDO
MICROCONTROLLER
BYPASS
DOUT
STATE MACHINE
CONTROLLER
100 NF LOW ESR
4-WIRE
INTERFACE
LAUNCH_UP
LAUNCH_DN
DIN
CONFIGURATION
REGISTERS
PULSE
LAUNCHER
CEX
PIEZOELECTRIC
TRANSDUCERS
HIGH SPEED AND 32 KHZ OSCILLATORS
TEMPERATURE MEASUREMENT
T1
T2
T3
T4
TC
32KOUT
X1
X2
32KX1
32KXO
1K (50 PPM)
METAL FILM
32.768 KHZ
12 PF
4 MHZ
12 PF
12 PF
100 NF COG (NP0) (30
PPM/C)
12 PF
19-7442; Rev 0; 11/14
MAX35102
Time-to-Digital Converter
Without RTC
Absolute Maximum Ratings
(Voltages relative to ground.)
Operating Temperature Range........................... -40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range............................ -55°C to +125°C
Lead Temperature (soldering, 10s) .................................+300°C
Soldering Temperature (reflow).......................................+260°C
ESD Protection (All Pins, Human Body Model) ..................±2kV
Voltage Range on V
Pins.................................-0.5V to +4.0V
CC
Voltage Range on All Other Pins
(not to exceed 4.0V)............................. -0.5V to (V
+ 0.5V)
CC
Continuous Power Dissipation (T = +70°C)
A
TQFN (derate 29.40mW/ºC above +70°C)...........2352.90mW
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Package Thermal Characteristics
(Note 1)
TQFN
Junction-to-Ambient Thermal Resistance (θ ) ..........34°C/W
Junction-to-Case Thermal Resistance (θ ).....................3°C/W
JC
JA
Note 1: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.
Recommended Operating Conditions
(T = -40°C to +85°C, unless otherwise noted.) (Notes 2, 3)
A
PARAMETER
Supply Voltage
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
V
2.3
3.0
3.6
V
CC
Input Logic 1
(RST, SCK, DIN, CE)
V
V
x 0.7
V
+ 0.3
V
V
CC
CC
IH
Input Logic 0
(RST, SCK, DIN, CE)
V
-0.3
V
x 0.3
+ 0.3
CC
IL
Input Logic 1 (32KX1)
Input Logic 0 (32KX1)
V
V
x 0.85
V
CC
V
V
CC
IH32KX1
V
-0.3
V
CC
x 0.15
IL32KX1
Electrical Characteristics
(V
= 2.3V to 3.6V, T = -40°C to +85°C, unless otherwise noted. Typical values are at V
= 3.0V and T = +25°C.) (Notes 2, 3)
CC
A
CC A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Input Leakage
(RST, SCK, DIN, CE)
I
-0.1
+0.1
µA
L
Output Leakage
(INT, T1,T2,T3,T4)
O
-0.1
+0.1
µA
L
Output Voltage Low (32KOUT)
Output Voltage High (32KOUT)
V
2mA
0.2 x V
V
V
OL32K
CC
V
-1mA
0.8 x V
0.8 x V
2.9
OH32K
CC
Output Voltage High
(DOUT, CMP_OUT/UP_DN)
V
OH
-4mA
V
V
V
CC
Output Voltage High (TC)
V
V
= 3.3V, I
= -4mA
3.1
3.0
OHTC
CC
CC
OUT
OUT
Output Voltage High
(Launch_UP, Launch_DN)
V
V
= 3.3V, I
= -50mA
2.8
OHLAUCH
Output Voltage Low (INT, DOUT,
CMP_OUT/UP_DN)
V
OL
4mA
0.2 x V
V
CC
Maxim Integrated
│ 2
www.maximintegrated.com
MAX35102
Time-to-Digital Converter
Without RTC
Electrical Characteristics (continued)
(V
= 2.3V to 3.6V, T = -40°C to +85°C, unless otherwise noted. Typical values are at V
= 3.0V and T = +25°C.) (Notes 2, 3)
CC
A
CC A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
1000
MAX
UNITS
Pulldown Resistance (TC)
Input Voltage Low (TC)
R
TC
650
1500
Ω
V
ILTC
0.36 x V
V
CC
Output Voltage Low
(Launch_UP, Launch_DN)
V
V
= 3.3V, I
= 50mA
0.2
1
0.4
V
Ω
OLLAUCH
CC
OUT
Resistance (T1, T2, T3, T4)
R
t
ON
Input Capacitance
(CE, SCK, DIN, RST)
C
Not tested
7
pF
ns
IN
RST Low Time
100
RST
CURRENT
Standby Current
I
No oscillators running, T = +25°C
A
0.1
0.5
40
1
µA
µA
µA
µA
mA
mA
DDQ
32kHz OSC Current
4MHz OSC Current
LDO Bias Current
Time Measurement Unit Current
Calculator Current
I
32kHz oscillator only (Note 4)
4MHz oscillator only (Note 4)
0.9
85
50
8
32KHZ
I
4MHZ
I
I
= 0 (Note 4)
CCCPU
15
CCLDO
CCTMU
I
(Note 4)
4.5
0.75
I
1.7
CCCPU
TOF_DIFF = 2 per second (3 hits),
temperature = 1 per 30s
Device Current Drain
I
5.5
µA
CC3
ANALOG RECEIVER
2 x
Analog Input Voltage
(STOP_UP, STOP_DN)
V
10
700
1
V
x
mV
P-P
ANA
CC
(3/8)
Input Offset Step Size
V
mV
STEP
STOP_UP/STOP_DN Bias Voltage
Receiver Sensitivity
V
V
CC
x (3/8)
V
BIAS
V
Stop hit detect level (Note 5)
10
8
mV
P-P
ANA
TIME MEASUREMENT UNIT
Measurement Range
t
Time of flight
8000
µs
ps
ps
MEAS
Time Measurement Accuracy
Time Measurement Resolution
EXECUTION TIMES
t
Differential time measurement
20
ACC
t
3.8
RES
Power-On-Reset Time
t
Reset to POR INT
275
2.5
µs
ms
ms
RESET
INIT Command Time
t
Command received when INIT bit set
Command received when CAL bit set
INIT
CAL Command Time
t
1.25
CAL
Maxim Integrated
│ 3
www.maximintegrated.com
MAX35102
Time-to-Digital Converter
Without RTC
Electrical Characteristics (continued)
(V
= 2.3V to 3.6V, T = -40°C to +85°C, unless otherwise noted. Typical values are at V
= 3.0V and T = +25°C.) (Notes 2, 3)
CC
A
CC A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
SERIAL PERIPHERAL INTERFACE
DIN to SCK Setup
t
20
20
20
ns
ns
ns
DC
SCK to DIN Hold
t
t
2
5
CDH
CDD
SCK to DOUT Delay
V
V
≥ 3.0V
25
50
25
4
CC
SCK Low Time
SCK High Time
SCK Frequency
t
ns
ns
CL
= 2.3V
30
4
CC
t
CH
V
V
≥ 3.0V
20
10
40
20
40
20
CC
t
MHz
CLK
= 2.3V
CC
CE to SCK Setup
t
5
ns
ns
ns
ns
CC
SCK to CE Hold
t
CCH
CE Inactive Time
t
2
5
CWH
CE to DOUT High Impedance
t
CCZ
Recommended External Crystal Characteristics
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
+20
70
UNITS
kHz
ppm
pF
32kHz Nominal Frequency
32kHz Frequency Tolerance
32kHz Load Capacitance
32kHz Series Resistance
4MHz Crystal Nominal Frequency
f
32.768
32K
Δf
/f
T
A
= +25°C
-20
32K 32K
C
12.5
L32K
S32K
R
kΩ
F
4M
4.000
MHz
4MHz Crystal Frequency Tolerance
Δf /f
T
= +25°C
-30
+30
120
+0.5
30
ppm
4M 4M
A
4MHz Crystal Load Capacitance
4MHz Crystal Series Resistance
4MHz Ceramic Nominal Frequency
C
L4M
12.0
pF
Ω
R
S4M
4.000
MHz
4MHz Ceramic Frequency
Tolerance
T
A
= +25°C
-0.5
%
4MHz Ceramic Load Capacitance
4MHz Ceramic Series Resistance
30
pF
Ω
Note 2: All voltages are referenced to ground. Current entering the device are specified as positive and currents exiting the device
are negative.
Note 3: Limits are 100% production tested at T = +25°C. Limits over the operating temperature range and relevant supply voltage
A
range are guaranteed by design and characterization.
Note 4: Currents are specified as individual block currents. Total current for a point in time can be calculated by taking the standby
current and adding any block currents that are active at that time.
Note 5: Receiver sensitivity includes performance degradation contributed by STOP_UP and STOP_DN device pin input offset volt-
age and common mode drift.
Maxim Integrated
│ 4
www.maximintegrated.com
MAX35102
Time-to-Digital Converter
Without RTC
Timing Diagrams
Figure 1
tCC
CE
tCWH
tCDH
SCK
DIN
tDC
MSB
LSB
tCDD
tCCZ
DOUT
HIGH IMPEDANCE
MSB
LSB
Figure 1. SPI Timing Diagram Read
Figure 2
tCC
tCWH
CE
tCLK
tR
tCCH
tF
tCH
tCDH
VIH
tCL
SCK
VIL
tDC
DIN
MSB
LSB
DOUT
HIGH IMPEDANCE
Figure 2. SPI Timing Diagram Write
Maxim Integrated
│ 5
www.maximintegrated.com
MAX35102
Time-to-Digital Converter
Without RTC
Typical Operating Characteristics
(V
= 3.3V and T = +25°C, unless otherwise noted.)
A
CC
ABSOLUTE ToF ERROR
vs. SUPPLY VOLTAGE
ABSOLUTE ToF ERROR
vs. TEMPERATURE
toc01
toc02
34
34
32
30
28
26
24
22
32
30
28
26
24
22
2.20 2.45 2.70 2.95 3.20 3.45 3.70 3.95
VCC (V)
-10
15
40
65
90
TEMPERATURE (ºC)
AVERAGE I vs. ToF RATE
CC
toc03
45
40
35
30
25
20
15
10
5
Average ICC vs. TOF Rate Configuration Settings
3 HIT SETTINGS
CONTOL BIT(S)
Clock Settling Time
Bias Charge Time
Pulse Launch Frequency
Pulse Launcher Size
TOF Duty Cycle
Stop Hits
T2 Wave Selector
Temperature Port Number
Preamble Temperature Cycle Number
Port Cycle Time
VALUE
488µs
61µs
1MHz
15
19.97ms
3
Wave 2
4
BIT SETTINGS
CLK_S[2:0] = 000
CT[1:0] = 00
DPL[3:0] = 0001
PL[7:0] = 00001111
TOF_CYC[2:0] = 111
STOP[1:0] = 010
T2WV[5:0] = 000110
TP[1:0] = 11
3 HITS
1
PRECYC[2:0] = 001
PORTCYC[1:0] = 01
256µs
0
0
5
10
15
20
Notes
1. This data is valid for the ceramic resonator.
2. Crystal oscillator startup adds ~0.5µA per TOFDiff.
ToF MEASUREMENT RATE (TOFDIFF/s)
3. Since the TOF cycle time is long the 4MHz oscillator powers up twice.
Maxim Integrated
│ 6
www.maximintegrated.com
MAX35102
Time-to-Digital Converter
Without RTC
Pin Configuration
TOP VIEW
24 23 22 21 20 19 18 17
25
26
27
28
29
30
31
32
16
15
14
13
12
11
10
9
GND
GND
DNC
RST
STOP_DN
STOP_UP
GND
DOUT
MAX35102
DIN
SCK
CE
V
CC
GND
X2
+
INT
X1
1
2
3
4
5
6
7
8
TQFN
4mm x 4mm
Pin Description
PIN
NAME
FUNCTION
1, 16, 22,
25, 28, 30
GND
Device Ground
Connect this pin to ground with a capacitor (100nF) to provide stability for the on-board low-dropout
regulator. The effective series resistance of this capacitor needs to be in the 1Ω to 2Ω range.
2
BYPASS
3, 6, 29
V
Main Supply. Typically sourced from a single lithium cell.
CC
4
5
7
32KOUT
CMOS Output. Repeats the 32kHz crystal oscillator frequency.
CMOS Pulse Output Transmission in Downstream Direction of Water Flow
CMOS Pulse Output Transmission in Upstream Direction of Water Flow
LAUNCH_DN
LAUNCH _UP
CMOS Output. Indicates the direction (upstream or downstream) of which the pulse launcher is
currently launching pulses OR the comparator output.
8
CMP_OUT/UP_DN
Active-Low Open-Drain Interrupt Output. The pin is driven low when the device requires service
from the host microprocessor.
9
INT
CE
10
Active-Low CMOS Digital Input. Serial peripheral interface chip enable input.
Maxim Integrated
│ 7
www.maximintegrated.com
MAX35102
Time-to-Digital Converter
Without RTC
Pin Description (continued)
PIN
11
NAME
SCK
DIN
DOUT
RST
DNC
T1
FUNCTION
CMOS Digital Input. Serial peripheral interface clock input.
CMOS Digital Input. Serial peripheral interface data input.
CMOS Output. Serial peripheral interface data output.
Active-Low CMOS Digital Reset Input
12
13
14
15
17
18
19
20
21
Do Not Connect. This pin must be left unconnected.
Open-Drain Probe 1 Temperature Measurement
Open-Drain Probe 2 Temperature Measurement
Open-Drain Probe 3 Temperature Measurement
Open-Drain Probe 4 Temperature Measurement
Input/Output Temperature Measurement Capacitor Connection
T2
T3
T4
TC
Connections for 32.768kHz Quartz Crystal. An external CMOS 32.768kHz oscillator can also
drive the MAX35102. In this configuration, the 32KX1 pin is connected to the external oscillator
signal and the 32KX0 pin is left unconnected.
23
24
32KX0
32KX1
Downstream STOP Analog Input. Used for the signal that is received from the downstream
transmission of a time-of-flight measurement.
26
27
STOP_DN
STOP_UP
Upstream STOP Analog Input. Used for the signal that is received from the upstream
transmission of a time-of-flight measurement.
31
32
—
X2
X1
EP
Connections for 4MHz Quartz Crystal. A ceramic resonator can also be used.
Exposed Pad. Connect to GND.
Maxim Integrated
│ 8
www.maximintegrated.com
MAX35102
Time-to-Digital Converter
Without RTC
Block Diagram
GND
GND
GND
GND
GND
GND
CMP_OUT/UP_DN
STOP_UP
STOP_DN
ANALOG
SWITCHING AND
BIAS CONTROL
TIME-TO-
DIGITAL
CONVERTER
DATA AND
STATUS
REGISTERS
PROGRAMMABLE
ALU
INT
V
V
CC
CC
RST
MAX35102
V
CC
SCK
BYPASS
INTERNAL
LDO
STATE
MACHINE
CONTROLLER
DOUT
DIN
4-WIRE
INTERFACE
LAUNCH_UP
LAUNCH_DN
CONFIGURATION
REGISTERS
PULSE
LAUNCHER
CE
4MHz AND 32kHZ OSCILLATORS
TEMPERATURE MEASUREMENT
X1
X2
32KX1
32KX0
32KOUT
T1
T2
T3
T4
TC
For temperature measurement, the MAX35102 supports
up to four 2-wire PT1000/500 platinum resistive tempera-
ture detectors (RTD).
Detailed Description
The MAX35102 is a time-to-digital converter with built-in
amplifier and comparator targeted as a complete analog
front-end solution for the ultrasonic heat meter and flow
meter markets.
A simple opcode based 4-Wire SPI interface allows any
microcontroller to effectively configure the device for its
intended measurement.
With automatic differential time-of-flight (TOF) measure-
ment, this device makes for simplified computation of liq-
uid flow. Early edge detection ensures measurements are
made with consistent wave patterns to greatly improve
accuracy and eliminate erroneous measurements. Built-in
arithmetic logic unit provides TOF difference measure-
ments. A programmable receiver hit accumulator can be
utilized to minimize the host microprocessor access.
Time-of-Flight (ToF) Measurement Operations
TOF is measured by launching pulses from one piezo-
electric transducer and receiving the pulses at a sec-
ond transducer. The time between when the pulses are
launched and received is defined as the time of flight. The
MAX35102 contains the functionality required to create
a string of pulses, sense the receiving pulse string, and
measure the time of flight. The MAX35102 can measure
two separate TOFs, which are defined as TOF up and
TOF down.
Multihit capability with stop-enable windowing allows
the device to be fine-tuned for the application. Internal
analog switches, an autozero amplifier/comparator, and
programmable receiver sensisitivity provide the analog
interface and control for a minimal electrical bill of mate-
rial solutions.
Maxim Integrated
│ 9
www.maximintegrated.com
MAX35102
Time-to-Digital Converter
Without RTC
Figure 3
ToF MEASUREMENT SEQUENCE
ToF
START
TIME OF FLIGHT MEASUREMENTS
T1
T2
AVG = ∑(HIT[1:3]) ÷ 3
LAUNCH PIN
COMPARATOR OFFSET
COMPARATOR OFFSET FORCED TO 0
STOP PIN
INT PIN
WAVE
NUMBER
0
1
2
3
4
5
6
7
(1)
4 MHZ
STARTUP
(2)
(4)
(9)
BIAS APPLIED
TO STOP PIN
ENABLE
RECEIVER
CALCULATIONS
(8)
STOP
HITS
(7)
T2
WAVE
(3)
LAUNCH
PULSES
(6)
(10)
INT
ASSERTED
ToF COMMAND
RECEIVED
(5)
T1 WAVE
COMPARE
RETURN
SELECTED WAVES FOR HITS:
T2 = 4 HIT1 = 5 HIT2 = 6 HIT3 = 7
STOP HITS SELECTED = 3, STOP POLARITY = POSITIVE EDGE
Figure 3. Time-of-Flight Sequence
A TOF up measurement has pulses launched from the
LAUNCH_UP pin, which is connected to the downstream
transducer. The ultrasonic pulse is received at the
upstream transducer, which is connected to the STOP_
UP pin. A TOF down measurement has pulses launched
from the LAUNCH_DN pin, which is connected to the
upstream transducer. The ultrasonic pulse is received at
the downstream transducer, which is connected to the
STOP_DN pin.
erates a start signal for the time-to-digital converter
(TDC) and is considered to be time zero for the TOF
measurement. This is denoted by the start signal in
the start/stop TDC timing (Figure 3).
4)
5)
After a programmable delay time set in TOF
Measurement Delay register, the comparator and hit
detector at the appropriate STOP pin are enabled.
This delay allows the receiver to start recording hits
when the received wave is expected, eliminating
possible false hits from noise in the system.
TOF measurements can be initiated by sending either the
TOF_UP, TOF_DN, or TOF_DIFF commands.
Stop hits are detected according to the programmed
preferred edge of the acoustic signal sequence
received at the STOP pin according to the setting
of the STOP_POL bit in the TOF1 register. The first
stop hit is detected when a wave received at the
STOP pin exceeds the comparator offset voltage,
which is set in the TOF6 and TOF7 registers. This
first detected wave is wave number 0. The width of
the wave’s pulse that exceeds the comparator offset
voltage is measured and stored as the t1 time.
The steps involved in a single TOF measurement are
described here and shown in Figure 3.
1)
2)
3)
The 4MHz oscillator and LDO is enabled with a pro-
grammable settling delay time set by the CLK_S[2:0]
bits in Calibration and Control register.
A common-mode bias is enabled on the STOP pin.
This bias charge time is set by the CT[1:0] bits in the
TOF1 register.
Once the bias charge time has expired, the pulse
launcher drives the appropriate LAUNCH pin with
a programmable sequence of pulses. The number
of pulses launched is set by the PL[7:0] bits in the
TOF1 register. The frequency of these 50% duty-
cycle pulses is set by the DPL[3:0] bits, also in the
TOF1 register. The start of these launch pulses gen-
6)
7)
The offset of the comparator then automatically and
immediately switches to 0.
The t wave is detected and the width of the t pulse
2
2
is measured and stored as the t time. The wave
2
number for the measurement of the t wave width is
2
set by the T2WV[5:0] bits in the TOF2 register.
Maxim Integrated
│ 10
www.maximintegrated.com
MAX35102
Time-to-Digital Converter
Without RTC
8)
9)
Following the t wave, 1 to 3 consecutive stop
hits are then detected. For each hit, the measured
TOF is stored in the appropriate HITxUPINT and
HITxUPFrac or HITxDNINT and HITxDNFRAC reg-
isters. The number of hits to detect is set by the
STOP[1:0] bits in the TOF2 register.
7FFFh or (215-1) x t
of the fraction is:
or ~ 8.19 ms. The maximum size
4MHz
2
16
2
−1
FFFFh or
× t
. or ~ 249.9961 ns.
4MHz
16
2
After receiving all of the programmed hits, the
MAX35102 calculates the average of the recorded
hits and stores this to AVGUPINT and AVGUPFrac
or AVGDNInt and AVGDNFrac. The ratio of t /t and
1 2
Table 1. Two’s Complement TOF_DIFF
Conversion Example
t /t
2 ideal
are calculated and stored in the WVRUP or
WVRDN register.
10) Once all of the hit data, wave ratios, and averages
become available in the Results registers, the TOF
bit in the Interrupt Status register is set and the INT
pin is asserted (if enabled) and remains asserted
until the Interrupt Status register is accessed by the
microprocessor with a Read Register command.
REGISTER VALUE
CONVERTER VALUE
TOF_DIFFInt
TOF_DIFFFrac
(hex)
TOF DIFF VALUE
(ns)
(hex)
7FFF
001C
0001
0000
0000
0000
FFFF
FFFF
FFFE
FF1C
8000
FFFF
0403
00A1
0089
0001
0000
FFFF
FFC0
1432
8001
0000
8,191,999.9962
7,003.9177
250.6142
0.5226
The computation of the total time of flight is performed
by counting the number of full and fractional 4MHz clock
cycles that elapsed between the launch start and a hit
stop as shown in Figure 4.
0.0038
Each TOF measurement result is comprised of an integer
portion and a fractional portion. The integer portion is a
0.0000
-0.0038
binary representation of the number of t
periods that
4MHz
-0.2441
contribute to the time results. The fractional portion is a
binary representation of one t period quantized to
4MHz
-480.2780
-56,874.9962
-8,192,000.0000
a 16-bit resolution. The maximum size of the integer is
Figure 4
FRACTIONAL TOF RESULTS PORTION
1 LSB = T4MHz/(2^16)
INTEGER TOF RESULTS PORTION
1 LSB = T4MHZ
2
3
4
N
1
4 MHz CLOCK
START SIGNAL
STOP SIGNAL
(INTERNALLY GENERATED
WHEN ACOUSTIC SIGNAL
IS TRANSMITTED)
(GENERATED UPON
ACOUSTIC SIGNAL
RECEPTION)
TOTAL TIME OF FLIGHT = INTEGER + FRACTIONAL
Figure 4.Start/Stop for Time-to-Digital Timing
Maxim Integrated
│ 11
www.maximintegrated.com
MAX35102
Time-to-Digital Converter
Without RTC
the early edge detect wave. The selection of the t wave
2
Early Edge Detect
is made with the T2WV[5:0] bits in the TOF2 register.
This early edge detect method of measuring the TOF
of acoustic waves is used for all of the TOF commands
including TOF_UP, TOF_DN, and TOF_DIFF. This meth-
od allows the MAX35102 to automatically control the
input offset voltage of the receiver comparator so that it
can provide advanced measurement accuracy. The input
offset of the receiver comparator can be programmed
with a range +31 LSBs if triggering on a positive edge
and -32 LSBs if triggering on a negative edge, with 1 LSB
With reference to Figure 5, the ratio t /t is calculated and
1 2
registered for the user. This ratio allows determination of
abrupt changes in flow rate, received signal strength, par-
tially filled tube detection, and empty tube. It also provides
noise suppression to prevent erroneous edge detection.
Also, the ratio t /t
is calculated and registered for
2 ideal
the user. For this calculation, t
is1/2 the period of
ideal
launched pulse. This ratio adds confirmation that the t
wave is a strong signal, which provides insight into the
common mode offset of the received acoustic wave.
2
= V /3072. Separate input offset settings are available
CC
for the upstream received signal and the downstream
received signal. The input offset for the upstream received
signal is programmed using the C_OFFSETUP[4:0] bits
in the TOF6 register. The input offset for the down-
stream received signal is programmed using the C_
OFFSETDN[4:0] bits in the TOF7 register. Once the first
hit is detected, the time t1 equal to the width of the earliest
detectable edge is measured. The input offset voltage is
then automatically and immediately returned to 0.
TOF Error Handling
Any of the TOF measurements can result in an error. If an
error occurs during the measurement, all of the associ-
ated registers report FFFFh. If a TOF_DIFF is being per-
formed, the TOF_DIFFInt and TOF_DIF_Frac registers
report 7FFFh and FFFFh, respectively. If the measure-
ment error is caused by the time measurement exceed-
ing the timeout set by the TIMOUT[2:0] bits in the TOF2
register, then the TO bit in the Interrupt Status register is
set and the INT pin asserts (if enabled).
The MAX35102 is now ready to measure the successive
hits. The next selected wave that is measured is the t
2
wave. In the example in Figure 5, this is the 7th wave after
Figure 5
OFFSET RESETS AUTOMATICALLY TO 0
TO DETECT SUBSEQUENT ZERO CROSSINGS
WAVE NUMBER
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
PROGRAMMABLE OFFSET DETECT:
-32mV TO +31mV IN 1mV STEPS
HIT NO.:
t2
1
2
3
t1
EXAMPLE: MEASURE WIDTH OF
7TH WAVE AFTER EARLY EDGE
DETECT
Figure 5. Early Edge Detect Received Wave Example
Maxim Integrated
│ 12
www.maximintegrated.com
MAX35102
Time-to-Digital Converter
Without RTC
to maximize power efficiency by evaluating the tempera-
ture of the RTDs with a coarse measurement prior to a
real measurement. The coarse measurement provides
an approximation to the TDC converter. During the real
measurement, the TDC can then optimize its measurement
parameters to use power efficiently. These evaluate cycles
are automatically inserted according to the order of ports
selected with the of the Temperature Port bits. The time
from the start of one port’s temperature measurement to
the next port’s temperature measurement is set using with
the PORTCYC[1:0] bits in the Temperature register.
Temperature Measurement Operations
Atemperature measurement is a time measurement of the
RC circuit connected to the temperature port device pins
T1 through T4 and TC. The TC device pin has a driver to
charge the timing capacitor. The ports that are measured
and the order in which the measurement is performed is
selected with the TP[1:0] bits in the Temperature register.
Figure 6 depicts a 1000Ω platinum RTD with a 100nF
NPO COG 30ppm/°C capacitor. It shows two dummy
cycles with 4 temperature port evaluation measurements
and 4 real temperature port measurements. This occurs
when setting the TP[1:0] bits in the Temperature register
to 11b.
Once all the temperature measurements are completed,
the times measured for each port are reported in the cor-
responding TxInt and TxFrac Results registers. The TE bit
in the Interrupt Status register is also set and the INT pin
asserts (if enabled).
The dummy 1 and dummy 2 cycles represent preamble
measurements that are intended to eliminate the dielec-
tric absorption of the temperature measurement capaci-
tor. These dummy cycles are executed using a RTD
Emulation resistor of 1000Ω internal to the MAX35102.
This dummy path allows the dielectric absorption effects
of the capacitor to be eliminated without causing any of
the RTDs to be unduly self-heated. The number of dummy
measurements to be taken ranges from 0 to 7. This
parameter is configured by setting the PRECYC[2:0] bits
in the Temperature register.
Actual temperature is determined by a ratiometric calcula-
tion. If T1 and T2 are connected to platinum RTDs and T3
and T4 are connected to the same reference resistor (as
shown in the System Diagram), then the ratio of T1/T3 =
R
R
/R
and R
and T2/T4 = R
/R
. The ratios R
/
RTD1 REF
REF
RTD2 REF
RTD1
/R
can be determined by the host
RTD2 REF
microprocessor and the temperature can be derived from
a look-up table of Temperature vs. Resistance for each of
the RTDs utilizing interpolation of table entries if required.
Following the dummy cycles, an evaluation, TXevaluate,
is performed. This measurement allows the MAX35102
Figure 6
DRIVER TO CHANGE
TC-CONNECTED CAPACITOR
V
TC
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
PORTCYCLE TIME
(PORTCYC1-PORTCYC0)
SET TO “00” 128µs
VOLTS (V)
VTC
DUMMY1
DUMMY2 T1
T3
T2
T4
EVALUATE
T1
T3
T2
T4
EVALUATE
EVALUATE
EVALUATE
128
256
384
512
640
768
TIME (µs)
896
1,024
1,152
1,280
1,408
Figure 6. Temperature Command Execution Cycle Example
Maxim Integrated
│ 13
www.maximintegrated.com
MAX35102
Time-to-Digital Converter
Without RTC
returned in the Calibration Results register. For all TDC
measurements, a gain value of 122.0703125/122.6806641
= 0.995024876 would then be applied.
Temperature Error Handling
The temperature measurement unit can detect open and/
or short-circuit temperature probes. If the resultant tem-
perature reading in less than 8µs, then the MAX35102
writes a value of 0000h to the corresponding Results
registers to indicate a short-circuit temperature probe. If
the measurement process does not discharge the TC pin
below the threshold of the internal temperature compara-
tor within 2µs of the time set by the PORTCYC[1:0] bits
in the Temperature register, then an open circuit tem-
perature probe error is declared. The MAX35102 writes a
value of FFFFh to the corresponding results registers to
indicate an open circuit temperature probe, the TO bit in
the Interrupt Status register is set, and the INT pin asserts
(if enabled). If the temperature measurement error is
caused by any other problems, then the MAX35102 writes
a value of FFFFh to each of the temperature port results
registers indicating that all of the temperature port mea-
surements are invalid.
Calibration is performed when the Calibration command is
sent to the MAX35102. At the completion of this calibra-
tion, the CAL bit in the Interrupt Status register and the
INT pin asserts (if enabled).
Error Handling During Calibration
Any errors that occur during the Calibrate command stop
the CalibrationInt and the CalibrationFrac Results regis-
ters from being updated with new calibration coefficients.
The results for the previous Calibration data remain in
these two registers and are used for scaling measured
results. If the calibration error is caused by the internal
calibration time measurement exceeding the time set by
the TIMOUT[2:0] bits in the TOF2 register, then the TO
bit in the Interrupt Status register is set and the INT pin
asserts (if enabled).
Device Interrupt Operations
Calibration Operation
The MAX35102 is designed to optimize the power effi-
ciency of a flow metering application by allowing the
host microprocessor to remain in a low-power sleep
mode, instead of requiring the microprocessor to keep
track of complex real-time events being performed by
the MAX35102. Upon completion of any command, the
MAX35102 alerts the host microprocessor using the INT
pin. The assertion of the INT pin can be used to awaken
the host microprocessor from its low power mode. Upon
receiving an interrupt on the INT pin, the host micropro-
cessor should read the Interrupt Status Register to deter-
mine which tasks were completed.
For more accurate results, calibration of the TDC can
be performed. Calibration allows the MAX35102 to per-
form a calibration measurement that is based upon the
32.768kHz crystal, which is the most accurate clock in the
system. This calibration is used when a ceramic oscillator
is used in place of an AT-cut crystal for the 4MHz refer-
ence. The MAX35102 automatically generates START
and STOP signals based upon edges of the 32.768kHz
clock. The number of 32.768kHz clock periods that are
used and then averaged are selected with the CAL_
PERIOD[3:0] bits in the Calibration and Control register.
The TDC measures the number of 4MHz clock pulses that
occur during the 32.768kHz pulses. The measured time of
a 32.768kHz clock pulse is reported in the CalibrationInt
and CalibrationFrac Results registers.
Interrupt Status Register
The interrupt status register contains flags for all for all
commands and events that occur within the MAX35102.
These flags are set when the event occurs or at the
completion of the executing command. When the Interrupt
Status Register is read, all asserted bits are cleared. If
another interrupt source has generated an interrupt dur-
ing the read, these new flags assert following the read.
Following is a description of an example calibration. Each
TDC measurement is a 15-bit fixed-point integer value
concatenated with a 16-bit fractional value binary represen-
tation of the number of t
periods that contribute to the
4MHz
time result, the actual period of t
needs to be known.
4MHz
If the CAL_PERIOD[3:0] bits in the Calibration and Control
register are set to 6, then 6 measurements of 32.768kHz
periods are measured by the TDC and then averaged. The
expected measured value would be 30.5176µs/250ns =
INT Pin
The INT pin asserts when any of the bits in the Interrupt
Status register are set. The INT pin remains asserted until
the Interrupt Status register is read by the user and all bits
in this register are clear. In order for the INT pin to oper-
ate, it must first be enabled by setting the INT_EN bit in
the Calibration and Control register.
122.0703125 t
periods. Assume that the 4MHz ceram-
4MHz
ic resonator is actually running at 4.02MHz. The TDC mea-
surement unit would then measure 30.5176µs/248.7562ns
= 122.6806641 t
periods and this result would be
4MHz
Maxim Integrated
│ 14
www.maximintegrated.com
MAX35102
Time-to-Digital Converter
Without RTC
Serial Peripheral Interface Operation
Table 2. Opcode Commands
Four pins are used for SPI-compatible communications:
DOUT (serial-data out), DIN (serial-data in), CE (chip
enable), and SCK (serial clock). DIN and DOUT are
the serial data input and output pins for the devices,
respectively. The CE input initiates and terminates a data
transfer. SCK synchronizes data movement between the
master (microcontroller) and the slave (MAX35102). The
SCK, which is generated by the microcontroller, is active
only when CE is low and during opcode and data transfer
to any device on the SPI bus. The inactive clock polarity
is logic-low. DIN is latched on the falling edge of SCK.
There is one clock for each bit transferred. Opcode bits
are transferred in groups of eight, MSB first. Data bits are
transferred in groups of sixteen, MSB first.
OPCODE FIELD
(HEX)
GROUP
COMMAND
TOF_Up
00h
TOF_Down
TOF_Diff
Temperature
Reset
01h
02h
03h
04h
05h
0Eh
Execution
Opcode
Commands
Initialize
Calibrate
B0h thru FFh.
Each hex value
represents the
location of a single
16-bit register
Read Register
Write Register
The serial peripheral interface is used to access the fea-
tures and memory of the MAX35102 using an opcode/
command structure.
Register Opcode
Commands
Opcode Commands
Table 2 shows the opcode/commands that are supported
by the device.
30h thru 43h.
Each hex value
represents the
location of a single
16-bit register
Execution Opcode Commands
The device supports several single byte opcode com-
mands that cause the MAX35102 to execute various
routines. All commands have the same SPI protocol
sequence as shown in Figure 7. Once all 8 bits of the
opcode are received by the MAX35102 and the CE device
pin is deasserted, the MAX35102 begins execution of
the specified command as described in that Command’s
description.
Figure 7
EXECUTION OPCODE COMMANDS
CE
TOF_UP Command (00h)
The TOF_UP command generates a single TOF measure-
ment in the upstream direction. Pulses launch from the
LAUNCH_UP pin and are received by the STOP_UP pin.
The measured hit results are reported in the HITxUPInt
and HITxUPFrac registers, with the calculated average
of all the measured hits being reported in the AVGUPInt
and AVGUPFrac register. The t /t and t /tideal wave
0
1
2
3
4
5
6
7
SCK
DIN
O
O
LSB
MSB
1 2
2
8 BITS
ratios are reported in the WVRUP register. Once all these
results are stored, then the TOF bit in the Interrupt Status
register is set and the INT pin asserts (if enabled).
OPCODE
HIGH IMPEDANCE
DOUT
Note: The TOF_UP command yields a result that is only
of use when used in conjunction with the TOF_DN com-
mand. Absolute TOF measurements include circuit delays
and cannot be considered accurate.
Figure 7. Execution Opcode Command Protocol
Maxim Integrated
│ 15
www.maximintegrated.com
MAX35102
Time-to-Digital Converter
Without RTC
TOF_Down Command (01h)
Initialize Command (05h)
The TOF_DOWN command generates a single TOF
measurement in the downstream direction. Pulses launch
from the LAUNCH_DN pin and are received by the
STOP_DN pin. The measured hit results are reported in
the HITxDnInt and HITxDnFrac registers, with the calcu-
lated average of all the measured hits being reported in
The initialize command must be executed before any con-
figuration of the device is done. This initializes the time-to-
digital converter so that TOF and temperature commands
can be executed. The MAX35102 sets the INIT bit in the
Interrupt Status register and asserts the INT device pin (if
enabled) to tell the host microprocessor that the initialize
command has completed and the next desired command
can be sent to the MAX35102.
the AVGDNInt and AVGDNFrac register. The t /t and t /
1 2
2
t
wave ratios are reported in the WVRDN register.
ideal
Once all these results are stored, then the TOF bit in the
Interrupt Status register is set and the INT pin asserts (if
enabled).
Calibrate Command (0Eh)
The calibrate command performs the calibration routine
as described in the calibration operation section. When
the calibrate command has completed the measurement,
the Calibration Results register contains the measured
32kHz period measurement value, the MAX35102 sets
the calibration bit in the Interrupt Status register and then
asserts the INT device pin (if enabled). The host micro-
processor reads the Interrupt Status register to determine
the interrupt source and then read the Calibration Results
register to be able to calculate the 4MHz ceramic oscilla-
tor gain factor.
Note: The TOF_Down command yields a result that is
only of use when used in conjunction with the TOF_UP
command. Absolute TOF measurements include circuit
delays and cannot be considered accurate.
TOF_DIFF Command (02h)
The TOF_DIFF command performs back-to-back TOF_
UP and TOF_DN measurements as required for a meter-
ing application. The TOF_UP sequence is followed by the
TOF_DN sequence. The time between the start of the
TOF_UP measurement and the start of the TOF_DN mea-
surement is set by the TOF_CYC[2:0] bits in the TOF2
register. Upon completion of the TOF_DN measurement,
the results of AVGUP minus AVGDN is computed and
stored at the TOF_DIFFInt and TOF_DIFFFrac Results
register locations. Once these results are stored, then the
TOF bit in the Interrupt Status register is set and the INT
pin asserts (if enabled).
Register Opcode Commands
To manipulate the register memory, there are two com-
mands supported by the device: Read Register and Write
register. Each register accessed with these commands is
16 bits in length. These commands are used to access all
sections of the memory map including the Configuration
registers, Conversion Results registers, and Status regis-
ters. The Conversion Results registers and the Interrupt
Status register of the Status registers are all read only.
Temperature Command (03h)
The temperature command initiates a temperature mea-
surement sequence as described in the Temperature
Measurement Operations section. The characteristics the
temperature measurement sequence depends upon the
settings in the Temperature register. Once all the mea-
surements are completed, the times measured for each
port are reported in the corresponding TxInt and TxFrac
Results registers. The TE bit in the Interrupt Status regis-
ter also is set and the INT pin asserts (if enabled).
Read Register Command
The opcode must be clocked into the DIN device pin
before the DOUT device pin produces the register data.
The SPI protocol sequence is shown in Figure 8.
The read register command can also be used to read
consecutive addresses. In this case, the data bits are
continuously delivered in sequence starting with the MSB
of the data register that is addressed in the opcode, and
continues with each SCK rising edge until the CE device
pin is deasserted as shown in Figure 9. The address
counter automatically increments.
Reset Command (04h)
The reset command essentially performs the same func-
tion as a power-on reset (POR), and causes all of the
Configuration registers to be set to their power-on reset
values and all of the Results registers and the Interrupt
Status register to be cleared and set to zero.
Maxim Integrated
│ 16
www.maximintegrated.com
MAX35102
Time-to-Digital Converter
Without RTC
Figure 8
READ REGISTER COMMAND
CE
0
1
2
3
4
5
6
7
8
9
10
19 20 21 22 23
SCK
DIN
O
O
MSB
LSB
8 BITS
DATA 16 BITS
OPCODE
D
D
D
D
D
D
D
D
D
HIGH IMPEDANCE
HIGH IMPEDANCE
MSB
LSB
DOUT
Figure 8. Read Register Opcode Command Protocol
Figure 9
CONTINUOUS READ REGISTER COMMAND
CE
SCK
DIN
0
1
2
3
4
5
6
7
8
9
10
19 20 21 22 23
24 25 26 27
39 40 41 42 43
O
O
MSB
LSB
8 BITS
DATA 16 BITS
DATA 16 BITS
OPCODE
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
HIGH IMPEDANCE
HIGH IMPEDANCE
DOUT
MSB
LSB MSB
LSB
Figure 9. Continuous Read Register Opcode Command Protocol
Maxim Integrated
│ 17
www.maximintegrated.com
MAX35102
Time-to-Digital Converter
Without RTC
after each 16 bits of data if the SCK device pin is continu-
ally clocked and the CE device pin remain asserted as
shown in Figure 11.
Write Register Command
This command applies to all writable registers. See the
Register Memory Map for more detail. The SPI protocol
sequence is shown in Figure 10.
Register Memory Map
The write register command can also be used to write
consecutive addresses. In this case, the data bits are con-
tinuously received on the DIN device pin and bound for
the initial starting address register that is addressed in the
opcode. The address counter automatically increments
These registers are accessed by the read register com-
mand and the Write Register command: X represents a
reserved bit. All addresses omitted are reserved
The Results, Interrupt Status, and Control registers are all
0000h following a reset.
Figure 10
WRITE REGISTER COMMAND
CE
0
1
2
3
4
5
6
7
8
9
10
19 20 21 22 23
SCK
O
O
D
D
D
D
D
D
D
D
D
DIN
LSB MSB
LSB
MSB
8 BITS
DATA 16 BITS
HIGH IMPEDANCE
OPCODE
DOUT
Figure 10. Write Register Opcode Command Protocol
Figure 11
CONTINUOUS WRITE REGISTER COMMAND
CE
0
1
2
3
4
5
6
7
8
9
10
19 20 21 22 23 24 25 26 27
39
SCK
DIN
O
O
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
D
LSB MSB
LSB
LSB
MSB
MSB
8 BITS
DATA 16 BITS
HIGH IMPEDANCE
DATA 16 BITS
OPCODE
DOUT
Figure 11. Continuous Write Register Opcode Command Protocol
Maxim Integrated
│ 18
www.maximintegrated.com
MAX35102
Time-to-Digital Converter
Without RTC
Maxim Integrated
│ 19
www.maximintegrated.com
MAX35102
Time-to-Digital Converter
Without RTC
Maxim Integrated
│ 20
www.maximintegrated.com
MAX35102
Time-to-Digital Converter
Without RTC
Maxim Integrated
│ 21
www.maximintegrated.com
MAX35102
Time-to-Digital Converter
Without RTC
Configuration Register Descriptions
Table 4. TOF1 Register
WRITE OPCODE
38h
READ OPCODE
B8h
POWER-ON RESET VALUE
0010h
Bit
15
14
13
12
11
10
9
8
Name
PL7
PL6
PL5
PL4
PL3
PL2
PL1
PL0
Bit
7
6
5
4
3
2
1
0
Name
DPL3
DPL2
DPL1
DPL0
STOP_POL
X
CT1
CT0
BIT
NAME
DESCRIPTION
Pulse Launcher Size: This is a hex value that defines the number of pulses that will be launched
from the pulse launcher during transmission. The range of this hex value is 00h to FFh. When
PL[7:0] is set to 00h, the Pulse Launcher is disabled. Up to 127 pulses can be launched. When PL7
is set, the pulse count is clamped at 127.
15:8
PL[7:0]
Pulse Launch Divider: This is a hex value that defines the divider ratio of the internal clock signal
used to drive the Pulse Launch signal. The 4MHz external reference oscillator is used as the source
for the internal clock reference. The internal reference clock is first divided by 2 to produce a 2MHz
clock. The range of this hex value is 1h to Fh, resulting in a range of division from ÷2 to ÷16 of the
2MHz clock. A value of 0h is not supported and should not be programmed
Pulse Launch Frequency = 2MHz/(1+DPL[3:0])
DPL[3:0]
0000b
0001b
0002b
….
PULSE LAUNCH FREQUENCY
7:4
DPL[3:0]
RESERVED
1MHz
666kHz
….
1110b
1111b
133.33kHz
125kHz
Stop Polarity: This bit defines the edge sensitivity of the STOP_UP and STOP_DN channel. The
signal received on the STOP_UP and STOP_DN device pins will generate a stop condition for the
internal TDC time count on the rising slope of this signal if this bit is set to 0. The signal received on
the STOP_UP and STOP_DN device pins will generate a stop condition for the internal TDC time
count on the falling slope of this signal if this bit is set to 1.
3
2
STOP_POL
X
Reserved
Maxim Integrated
│ 22
www.maximintegrated.com
MAX35102
Time-to-Digital Converter
Without RTC
Table 4. TOF1 Register (continued)
BIT
NAME
DESCRIPTION
Bias Charge Time: This is the time allotted for charging the external bias network on the STOP
pins to produce common mode biasing for the analog receiver/comparator. It is based upon the
32.768 KHz crystal:
DESCRIPTION
CT1
CT2
32kHz CLOCK CYCLES
(decimal)
TYPICAL TIME (µs)
1:0
CT[1:0]
0
0
1
1
0
1
0
1
2
4
61
122
244
488
8
16
Table 5. TOF2 Register
WRITE OPCODE
39h
READ OPCODE
B9h
POWER-ON RESET VALUE
0000h
Bit
15
X
14
13
12
11
10
9
8
Name
STOP1
STOP0
T2WV5
T2WV4
T2WV3
T2WV2
T2WV1
Bit
7
6
5
4
3
2
1
0
Name
T2WV0
TOF_CYC2
TOF_CYC1
TOF_CYC0
X
TIMOUT2
TIMOUT1
TIMOUT0
BIT
NAME
DESCRIPTION
15
X
Reserved
Stop Hits: These bits set the number of stop hits to be expected and measured.
STOP1
STOP0
DESCRIPTION
0
0
1
1
0
1
0
1
1 Hit
2 Hits
3 Hits
3 Hits
14:13
STOP[1:0]
Wave Selector for t : These bits determine the wave number for which t is measured. To
2
2
ensure measurement accuracy, the first wave measurable after the early edge detect is wave
2. Waves are numbered as depicted in Figure 5.
T2WV[5:0] (decimal)
DESCRIPTION
Wave 2
12:7
T2WV[5:0]
0 through 2
3
4
Wave 3
Wave 4
Maxim Integrated
│ 23
www.maximintegrated.com
MAX35102
Time-to-Digital Converter
Without RTC
Table 5. TOF2 Register (continued)
BIT
NAME
DESCRIPTION
TOF Duty Cycle: These bits determine the time delay between successive executions of
TOF measurements. It is the start-to-start time of automatic execution of the TOF_UP and the
TOF_DN and is applicable only for the TOF_DIFF command. It is based upon the 32.768kHz
crystal. If the actual TOF of the acoustic path exceeds the programmed start-to-start time in
this setting, then the TOF duty cycle performs as if the bit setting is 000b.
DESCRIPTION
32kHz CLOCK
TOF_CYC[2:0]
4MHz ON BETWEEN TOF_
UP and TOF_DOWN
CYCLES
(decimal)
TYPICAL TIME
6:4
TOF_CYC[2:0]
000b
001b
010b
011b
100b
101b
110b
111b
0
4
0µs
Yes
Yes
Yes
Yes
Yes
Yes
No
122µs
244µs
488µs
732µs
976µs
16.65ms
19.97ms
8
16
24
32
546
655
No
3
X
Reserved
Timeout: These bits force a timeout in the time-to-digital measurement block. If the hit
required to measure t or Hit1 through Hit3of the received signal does not occur in this
t
1, 2,
time, the TO bit in the Interrupt Status register is set and the INT pin is asserted (if enabled).
Additionally, any of the Conversion Results registers read FFFFh if the data for that register is
invalid.
TIMOUT2
TIMOUT1
TIMOUT0
DESCRIPTION (µs)
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
128
256
2:0
TIMOUT[2:0]
512
1024
2048
4096
8192
16384
Maxim Integrated
│ 24
www.maximintegrated.com
MAX35102
Time-to-Digital Converter
Without RTC
Table 6. TOF6 Register
WRITE OPCODE
3Dh
READ OPCODE
BDh
POWER-ON RESET VALUE
0000h
Bit
15
X
14
X
13
X
12
X
11
X
10
X
9
8
Name
X
X
Bit
7
6
5
4
3
2
1
0
C_OFFSET
UP4
C_OFFSET
UP3
C_OFFSET
UP2
C_OFFSET
UP1
C_OFFSET
UP0
Name
X
X
X
BIT
NAME
DESCRIPTION
15:5
X
Reserved
Comparator Offset Upstream: These bits define an initial selected receive comparator offset
voltage for the analog receiver comparator front-end. This comparator offset is used to detect
the early edge wave, t . The actual common-mode voltage is dependent upon and scales with
1
the voltage present at the V
pins.
CC
When the STOP_POL bit in the TOF1 register is set to zero indicating a rising edge detection of
the zero crossing of the received acoustic wave, then the comparator offset is a positive value.
When the STOP_POL bit in the TOF1 register is set to one indicating a falling edge detection of
the zero crossing of the received acoustic wave, then the comparator offset is a negative value.
The following formulas define the comparator offset voltage setting
C_OFFSETUP
[4:0]
(1152 + C
)
4:0
OFFSETUP
STOP_POL
=
0
Comparator Offset Voltage
= V
×
CC
3072
(1151- C
)
OFFSETUP
STOP_POL = 1 Comparator Offset Voltage = V
×
CC
3072
V
CC
where 1 LSB =
3072
C_OFFSETUP[4:0]
OFFSET (LSBs)
00h through 1Fh
0 through 31
Maxim Integrated
│ 25
www.maximintegrated.com
MAX35102
Time-to-Digital Converter
Without RTC
Table 7. TOF7 Register
WRITE OPCODE
3Eh
READ OPCODE
BEh
POWER-ON RESET VALUE
0000h
Bit
15
X
14
X
13
X
12
X
11
X
10
X
9
8
Name
X
X
Bit
7
6
5
4
3
2
1
0
C_OFFSET C_OFFSET
C_OFFSET C_OFFSET C_OFFSET
DN2 DN1 DN0
Name
X
X
X
DN4
DN3
BIT
NAME
DESCRIPTION
15:5
X
Reserved
Comparator Offset Downstream: These bits define an initial selected receive comparator
offset voltage for the analog receiver comparator front-end. This comparator offset is used to
detect the early edge wave, t . The actual common-mode voltage is dependent upon and scales
1
with the voltage present at the V
pins.
CC
When the STOP_POL bit in the TOF1 register is set to zero indicating a rising edge detection of
the zero crossing of the received acoustic wave, then the comparator offset is a positive value.
When the STOP_POL bit in the TOF1 register is set to one indicating a falling edge detection of
the zero crossing of the received acoustic wave, then the comparator offset is a negative value.
The following formulas define the comparator offset voltage setting:
(1152 + C
)
C_OFFSETDN
[4:0]
OFFSETDN
4:0
STOP_POL
0
Comparator Offset Voltage
=
= V
×
CC
3072
(1151- C
)
OFFSETDN
STOP_POL = 1 Comparator Offset Voltage = V
×
CC
3072
V
CC
where 1 LSB =
3072
C_OFFSETDN[4:0]
OFFSET (LSBs)
00h through 1Fh
0 through 31
Maxim Integrated
│ 26
www.maximintegrated.com
MAX35102
Time-to-Digital Converter
Without RTC
Table 8. Temperature Register
WRITE OPCODE
40h
READ OPCODE
C0h
POWER-ON RESET VALUE
0000h
Bit
15
X
14
X
13
X
12
X
11
X
10
X
9
8
Name
X
X
Bit
7
6
5
4
3
2
1
0
Name
X
TP1
TP0
PRECYC2
PRECYC1
DESCRIPTION
PRECYC0
PORTCYC1 PORTCYC0
BIT
15:7
NAME
X
Reserved
Temperature Port: These bits set the number of temperature ports to stimulate during a
temperature measurement sequence and the sequence in which the temperature ports are
stimulated.
TP1
0
TP0
0
DESCRIPTION
6:5
TP[1:0]
Measure ports T1 and T3
Measure ports T2 and T4
0
1
1
0
Measure ports T1, T3, and T2
1
1
Measure ports T1, T3, T2, and T4
Preamble Temperature Cycle: These 3 bits are used to set the number of cycles to use as
preamble for reducing dielectric absorption of the temperature measurement capacitor. Each cycle
comprises one temperature measurement sequence as defined by the TP[1:0] bits.
PRECYC2
PRECYC1
PRECYC0
DESCRIPTION
0 dummy cycle
1 dummy cycles
2 dummy cycles
3 dummy cycles
4 dummy cycles
5 dummy cycles
6 dummy cycles
7 dummy cycles
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
4:2
PRECYC[2:0]
Port Cycle Time: These two bits define the time interval between successive individual
temperature port measurements. It is a start-to-start time. These bits also define the timeout
function of the temperature measurement ports. See the Temperature Operation section for
timeout details.
PORTCYC1
PORTCYC0
DESCRIPTION (µs)
1:0
PORTCYC[1:0]
0
0
1
1
0
1
0
1
128
256
384
512
Maxim Integrated
│ 27
www.maximintegrated.com
MAX35102
Time-to-Digital Converter
Without RTC
Table 9. ToF Measurement Delay Register
WRITE OPCODE
41h
READ OPCODE
C1h
POWER-ON RESET VALUE
0000h
Bit
15
14
13
12
11
10
9
8
Name
DLY15
DLY14
DLY13
DLY12
DLY11
DLY10
DLY9
DLY8
Bit
7
6
5
4
3
2
1
0
Name
DLY7
DLY6
DLY5
DLY4
DLY3
DLY2
DLY1
DLY0
BIT
NAME
DESCRIPTION
This is hexadecimal value ranging from 0000h to FFFFh (decimal 0 to 65535). It is a multiple of the
4MHz crystal period (250ns). Settings less than 0012h are reserved and should not be used. The
analog comparator driven by the STOP_UP and STOP_DN device pins does not generate a stop
condition until this delay, counted from the internally generated start pulse for the acoustic wave,
has expired. This delay applies to early edge detect wave. Care must be taken to set the TIMOUT
bits in the TOF2 register so that a timeout interrupt does not occur before this delay expires.
15:0
DLY[15:0]
Table 10. Calibration and Control Register
WRITE OPCODE
42h
READ OPCODE
C2h
POWER-ON RESET VALUE
0000h
Bit
15
X
14
X
13
X
12
X
11
10
9
8
Name
CMP_EN
CMP_SEL
INT_EN
X
Bit
7
6
5
4
3
2
1
0
CAL_
PERIOD3
CAL_
PERIOD2
CAL_
PERIOD1
CAL_
PERIOD0
Name
X
CLK_S2
CLK_S1
CLK_S0
BIT
NAME
DESCRIPTION
15:12
X
Reserved
Comparator/UP_DN Output Enable:
11
CMP_EN
1 = CMP_OUT/UP_DN output device pin is enabled.
0 = CMP_OUT/UP_DN output device pin is driven low.
Maxim Integrated
│ 28
www.maximintegrated.com
MAX35102
Time-to-Digital Converter
Without RTC
Table 10. Calibration and Control Register (continued)
BIT
NAME
DESCRIPTION
Comparator/UP_DN Output Select: This bit selects the output function of the CMP_OUT/UP_DN
pin and is only used when CMP_EN = 1.
1 = CMP_EN: The output monitors the receiver front end comparator output.
0 = UP_DN: The output monitors the launch direction of the pulse launcher.
High Output: Upstream measurement (Launch_UP to STOP_UP)
Low Output: Downstream measurement (Launch_DN to STOP_DN)
10
CMP_SEL
Interrupt Enable: This bit, when set, enables the INT pin. All interrupt sources are wire-ORed to
the INT pin.
9
INT_EN
8
7
X
X
Reserved
Reserved
Clock Settling Time: These bits define the time interval that the MAX35102 waits after enabling
the 4MHz clock for it to stabilize before making any measurements of time or temperature.
DESCRIPTION
CLK_S2
CLK_S1
CLK_S0
32kHz CLOCK CYCLES
TYPICAL TIME
488µs
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
16
48
1.46ms
6:4
CLK_S[2:0]
96
2.93ms
128
168
3.9ms
5.13ms
4MHz oscillator on continuously
4MHz oscillator on continuously
4MHz oscillator on continuously
4MHz Ceramic Oscillator Calibration Period: These bits define the number of 32.768kHz
oscillator periods to measure for determination of the 4MHz ceramic oscillator period.
32kHz clock cycles = 1+ CAL_PERIOD[3:0]
DESCRIPTION
CAL_PERIOD[3:0] (decimal)
32kHz CLOCK CYCLES
(decimal)
32kHz CLOCK CYCLES
(µs)
3:0
CAL_PERIOD[3:0]
0
1
1
2
30.5
61
….
14
15
….
15
16
….
457.7
488.0
Maxim Integrated
│ 29
www.maximintegrated.com
MAX35102
Time-to-Digital Converter
Without RTC
Table 11. Oscillator Register
WRITE OPCODE
43h
READ OPCODE
C3h
POWER-ON RESET VALUE
0000h
Bit
15
X
14
X
13
12
X
11
X
10
X
9
8
Name
X
X
X
Bit
7
6
5
4
3
2
1
0
Name
X
32K_BP
32K_EN
EOSC
X
X
X
X
BIT
NAME
DESCRIPTION
15:7
X
Reserved
32kHz Bypass: This bit, when set, allows an external CMOS-level 32.768kHz signal to be applied
to the 32KX1 device pin. The internal 32.768kHz oscillator is bypassed and the external signal is
driven into the MAX35102 core.
6
5
32K_BP
32K_EN
32kHz Clock Output Enable: This bit enables the 32KOUT device pin to drive a CMOS-level
square wave representation of the 32kHz crystal.
Enable Oscillator: This active-low bit when set to logic 0 starts the 32kHz oscillator. When this bit
is set to logic 1, the oscillator is stopped.
4
EOSC
X
3:0
Reserved
Status Register Descriptions
Table 12. Interrupt Status Register
WRITE OPCODE
Read Only
READ OPCODE
FEh
POWER-ON RESET VALUE
0000h
Bit
15
14
X
13
12
11
10
X
9
8
Name
TO
X
TOF
TE
X
X
Bit
7
6
5
4
3
2
1
0
Name
X
CAL
X
X
INIT
POR
X
X
Note: This register is read only and bits are self-clearing upon a read to this register. See the Device Interrupt Operations section
for more information.
BIT
15
NAME
TO
DESCRIPTION
Timeout: The TO bit is set if any one of the t , t , Hit1 through Hit3, or temperature measure-
1
2
ments do not occur within the associated timeout window.
14:13
X
Reserved
Maxim Integrated
│ 30
www.maximintegrated.com
MAX35102
Time-to-Digital Converter
Without RTC
Table 12. Interrupt Status Register (continued)
BIT
12
NAME
TOF
TE
DESCRIPTION
Time of Flight: Set when the TOF_UP, TOF_DN, or TOF_DIFF command has completed.
Temperature: Set when the temperature command has completed.
Reserved
11
10:7
X
Calibrate: Set after completion of the Calibrate command when the command is manually sent by
the host microprocessor.
6
CAL
5
4
3
X
X
Reserved
Reserved
INIT
Initialize: Set when the Initialize command has completed.
Power-On-Reset: Set when the MAX35102 has been successfully powered by application of
2
POR
X
V
. Upon application of power, the SPI port becomes inactive until this bit has been set.
CC
1:0
Reserved
Conversion Results Register Descriptions
The devices conversion results registers are all read-only volatile SRAM. The POR value for all registers is 0000h.
Table 13. Conversion Results Registers Description
READ ONLY
ADDRESS
NAME
DESCRIPTION
Bit 15 through Bit 8 holds the 8-bit value of the pulse width ratio (t ÷ t ).for the upstream
1
2
measurement. Each bit is weighted as follows:
BIT 15
BIT 14
BIT 13
BIT 12
BIT 11
BIT 10
BIT 9
BIT 8
1
0.5
0.25
0.125
0.0625
0.03125
0.015625 0.0078125
Bit 7 thru bit 0 holds the 8-bit value of the pulse width ratio (t ÷ t
to half the period of the Pulse Launch Frequency for the upstream measurement. Each bit is
) where t al is equal
ide
2
ideal
C4h
WVRUP
weighted as follows:
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
1
0.5
0.25
0.125
0.0625
0.03125
0.015625 0.0078125
The maximum value of each of these ratios is 1.9921875.
15-bit fixed-point integer value of the first hit in the upstream direction. This integer portion is
a binary representation of the number of t periods that contribute to the time results. The
C5h
C6h
Hit1UPInt
4MHz
maximum size of the integer is 7FFFh or (215 - 1) x t
.
4MHz
16-bit fractional value of the first hit in the upstream direction. This fractional portion is a binary
representation of one t period quantized to a 16-bit resolution. The maximum size of the
Hit1UPFrac
4MHz
fraction is FFFFh or (216 - 1)/216 x t
.
4MHz
Maxim Integrated
│ 31
www.maximintegrated.com
MAX35102
Time-to-Digital Converter
Without RTC
Table 13. Conversion Results Registers Description (continued)
READ ONLY
ADDRESS
NAME
DESCRIPTION
15-bit fixed-point integer value of the second hit in the upstream direction. This integer portion
C7h
Hit2UPInt
is a binary representation of the number of t
maximum size of the integer is 7FFFh or (215 - 1) x t
periods that contribute to the time results. The
4MHz
.
4MHz
16-bit fractional value of the second hit in the upstream direction. This fractional portion is a
binary representation of one t period quantized to a 16-bit resolution. The maximum size of
C8h
C9h
CAh
D1h
D2h
Hit2UPFrac
Hit3UPInt
4MHz
the fraction is FFFFh or (216 - 1)/216 x t
.
4MHz
15-bit fixed-point integer value of the third hit in the upstream direction. This integer portion is
a binary representation of the number of t periods that contribute to the time results. The
4MHz
maximum size of the integer is 7FFFh or (215 - 1) x t
.
4MHz
16-bit fractional value of the third hit in the upstream direction. This fractional portion is a binary
representation of one t period quantized to a 16-bit resolution. The maximum size of the
Hit3UPFrac
AVGUPInt
AVGUPFrac
4MHz
fraction is FFFFh or (216 - 1)/216 x t
.
4MHz
15-bit fixed-point integer value of the average of the hits recorded in the upstream direction This
integer portion is a binary representation of the number of t periods that contribute to the
4MHz
time results. The maximum size of the integer is 7FFFh or (215 - 1) x t
.
4MHz
16-bit fractional value of the average of the hits recorded in the upstream direction. This
fractional portion is a binary representation of one t period quantized to a 16-bit resolution.
4MHz
The maximum size of the fraction is FFFFh or (216 - 1)/216 x t
.
4MHz
Bit 15 through Bit 8 holds the 8 bit value of the pulse width ratio (t /t ).for the downstream
1 2
measurement. Each bit is weighted as follows:
BIT 15
BIT 14
BIT 13
BIT 12
BIT 11
BIT 10
BIT 9
0.015625 0.0078125
) where t is equal to half
ideal
BIT 8
1
0.5
0.25
0.125
0.0625
0.03125
Bit 7 thru bit 0 holds the 8 bit value of the pulse width ratio (t t
2/ ideal
D3h
WVRDN
the period of the pulse launch frequency for the downstream measurement. Each bit is weighted
as follows:
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
1
0.5
0.25
0.125
0.0625
0.03125
0.015625 0.0078125
The maximum value of each of these ratios is 1.9921875.
15-bit fixed-point integer value of the first hit in the downstream direction. This integer portion is
a binary representation of the number of t periods that contribute to the time results. The
D4h
D5h
D6h
Hit1DNInt
Hit1DNFrac
Hit2DNInt
4MHz
maximum size of the integer is 7FFFh or (215 - 1) x t
.
4MHz
16-bit fractional value of the first hit in the downstream direction. This fractional portion is a
binary representation of one t period quantized to a 16-bit resolution. The maximum size of
4MHz
the fraction is FFFFh or (216 - 1)/216 x t
.
4MHz
15-bit fixed-point integer value of the second hit in the downstream direction. This integer portion
is a binary representation of the number of t periods that contribute to the time results. The
4MHz
maximum size of the integer is 7FFFh or (215 - 1) x t
.
4MHz
Maxim Integrated
│ 32
www.maximintegrated.com
MAX35102
Time-to-Digital Converter
Without RTC
Table 13. Conversion Results Registers Description (continued)
READ ONLY
ADDRESS
NAME
DESCRIPTION
16-bit fractional value of the second hit in the downstream direction. This fractional portion is a
D7h
Hit2DNFrac
binary representation of one t
period quantized to a 16-bit resolution. The maximum size of
4MHz
the fraction is FFFFh or (216 - 1)/216 x t
.
4MHz
15-bit fixed-point integer value of the third hit in the downstream direction. This integer portion
is a binary representation of the number of t periods that contribute to the time results. The
D8h
D9h
E0h
E1h
Hit3DNInt
Hit3DNFrac
AVGDNInt
AVGDNFrac
4MHz
maximum size of the integer is 7FFFh or (215 - 1) x t
.
4MHz
16-bit fractional value of the third hit in the downstream direction. This fractional portion is a
binary representation of one t period quantized to a 16-bit resolution. The maximum size of
4MHz
the fraction is FFFFh or (216 - 1)/216 x t
.
4MHz
15-bit fixed-point integer value of the average of the hit times recorded in the downstream
direction. This integer portion is a binary representation of the number of t periods that
4MHz
contribute to the time results. The maximum size of the integer is 7FFFh or (215 – 1) x t
.
4MHz
16-bit fractional value of the average of the hit times recorded in the downstream direction. This
fractional portion is a binary representation of one period quantized to a 16-bit resolution. The
maximum size of the fraction is FFFFh or (216 – 1)/216 x t
.
4MHz
16-bit fixed-point two’s-complement integer portion of the difference of the averages for the hits
recorded in both the upstream and downstream directions. It is computed as:
AVGUP – AVGDN
E2h
TOF_DIFFInt
This integer represents the number of t
periods that contribute to computation. The
4MHz
maximum size of the integer is 7FFFh or (215 – 1) x t
. The minimum size of this integer is
4MHz
8000h or -215 x t
.
4MHz
16-bit fractional portion of the two’s complement difference of the averages for the hits
recorded in both the upstream and downstream directions. This fractional portion is a binary
TOF_
DIFFFrac
E3h
E7h
E8h
representation of one t
period quantized to a 16-bit resolution. The maximum size of the
4MHz
fraction is FFFFh or (216 - 1)/216 x t
.
4MHz
15-bit fixed-point integer value of the time taken to discharge the timing capacitor through
the RTD connected to the T1 device pin. This integer portion is a binary representation of the
T1Int
number of t
periods that contribute to the time results. The maximum size of the integer is
4MHz
7FFFh or (215 - 1) x t
.
4MHz
16-bit fractional value of the time taken to charge the timing capacitor through the RTD
connected to the T1 device pin. This fractional portion is a binary representation of one t
4MHz
T1Frac
period quantized to a 16-bit resolution. The maximum size of the fraction is FFFFh or (216
1)/216 x t
-
.
4MHz
15-bit fixed-point integer value of the time taken to charge the timing capacitor through the RTD
connected to the T2 device pin. This integer portion is a binary representation of the number of
periods that contribute to the time results. The maximum size of the integer is 7FFFh or
E9h
EAh
T2Int
(215 - 1) x t
.
4MHz
16-bit fractional value of the time taken to charge the timing capacitor through the RTD
connected to the T2 device pin. This fractional portion is a binary representation of one t
4MHz
T2Frac
period quantized to a 16-bit resolution. The maximum size of the fraction is FFFFh or (216
1)/216 x t
-
.
4MHz
Maxim Integrated
│ 33
www.maximintegrated.com
MAX35102
Time-to-Digital Converter
Without RTC
Table 19. Conversion Results Registers Description (continued)
READ ONLY
ADDRESS
NAME
DESCRIPTION
15-bit fixed-point integer value of the time taken to charge the timing capacitor through the RTD
connected to the T3 device pin. This integer portion is a binary representation of the number of
EBh
T3Int
t
periods that contribute to the time results. The maximum size of the integer is 7FFFh or
4MHz
(215 - 1) x t
.
4MHz
16-bit fractional value of the time taken to charge the timing capacitor through the RTD
connected to the T3 device pin. This fractional portion is a binary representation of one t
4MHz
-
ECh
EDh
EEh
F8h
T3Frac
T4Int
period quantized to a 16-bit resolution. The maximum size of the fraction is FFFFh or (216
1)/216 x t
.
4MHz
15-bit fixed-point integer value of the time taken to charge the timing capacitor through the RTD
connected to the T4 device pin. This integer portion is a binary representation of the number of
t
periods that contribute to the time results. The maximum size of the integer is 7FFFh or
4MHz
(215 - 1) x t
.
4MHz
16-bit fractional value of the time taken to charge the timing capacitor through the RTD
connected to the T4 device pin. This fractional portion is a binary representation of one t
4MHz
-
T4Frac
period quantized to a 16-bit resolution. The maximum size of the fraction is FFFFh or (216
1)/216 x t
.
4MHz
15-bit fixed-point integer value of the time taken to measure the period of the 32.768kHz
crystal oscillator during execution of the calibrate command. This integer portion is a binary
representation of the number of t periods that contribute to the time results. The maximum
Calibration
Int
4MHz
size of the integer is 7FFFh or (215 - 1) x t
.
4MHz
16-bit fractional value of the time taken to measure the period of the 32.768kHz crystal oscillator
during execution of the calibrate command. This fractional portion is a binary representation of
Calibration
Frac
F9h
one t
period quantized to a 16-bit resolution. The maximum size of the fraction is FFFFh or
4MHz
(216 - 1)/216 x t
.
4MHz
FAh
FBh
FCh
FDh
Reserved
Reserved
Reserved
Reserved
Maxim Integrated
│ 34
www.maximintegrated.com
MAX35102
Time-to-Digital Converter
Without RTC
Typical Application Circuit
GND GND GND GND GND GND
CMP_OUT/UP_DN
STOP_UP
3.6V
ANALOG
SWITCHING
AND BIAS
DATA AND
STATUS
REGISTERS
TIME-TO-DIGITAL
CONVERTER
PROGRAMMABLE
ALU
CONTROL
STOP_DN
INT
3.6V
V
CC
RST
V
V
CC
CC
MAX35102
SCK
INTERNAL
LDO
BYPASS
DOUT
DIN
100nF
LOW ESR
STATE MACHINE
CONTROLLER
4-WIRE
INTERFACE
LAUNCH_UP
CE
CONFIGURATION
REGISTERS
PULSE
LAUNCHER
LAUNCH_DN
PIEZOELECTRIC
TRANSDUCERS
HIGH-SPEED AND 32kHz OSCILLATORS
TEMPERATURE MEASUREMENT
X1
X2
32KX1
32KX0
12pF
32KOUT
T1
T2
T3
T4
TC
4MHz
32.768kHz
12pF
1k (50ppm)
METAL FILM
12pF
12pF
100 nF COG
(NP0) (30ppm/C)
MICROCONTROLLER
Maxim Integrated
│ 35
www.maximintegrated.com
MAX35102
Time-to-Digital Converter
Without RTC
Ordering Information
Package Information
For the latest package outline information and land patterns
(footprints), go to www.maximintegrated.com/packages. Note
that a “+”, “#”, or “-” in the package code indicates RoHS status
only. Package drawings may show a different suffix character, but
the drawing pertains to the package regardless of RoHS status.
PART
TEMP RANGE
PIN-PACKAGE
32 TQFN
MAX35102ETJ+
MAX35102ETJ+T
-40°C to +85°C
-40°C to +85°C
32 TQFN
+Denotes a lead(Pb)-free/RoHS-compliant package.
T = Tape and reel.
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE
NO.
LAND
PATTERN NO.
Chip Information
PROCESS: CMOS
32 TQFN
T3244+1C
21-0681
90-0428
Maxim Integrated
│ 36
www.maximintegrated.com
MAX35102
Time-to-Digital Converter
Without RTC
Revision History
REVISION
NUMBER
REVISION
DATE
PAGES
CHANGED
DESCRIPTION
0
11/14
Initial release
—
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
©
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
2014 Maxim Integrated Products, Inc.
│ 37
相关型号：
SI9130DB
5- and 3.3-V Step-Down Synchronous ConvertersWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9135LG-T1
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9135LG-T1-E3
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9135_11
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9136_11
Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9130CG-T1-E3
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9130LG-T1-E3
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9130_11
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9137
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9137DB
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9137LG
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9122E
500-kHz Half-Bridge DC/DC Controller with Integrated Secondary Synchronous Rectification DriversWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
©2020 ICPDF网 联系我们和版权申明