MAX3841ETG+T [MAXIM]
暂无描述;型号: | MAX3841ETG+T |
厂家: | MAXIM INTEGRATED PRODUCTS |
描述: | 暂无描述 开关 |
文件: | 总8页 (文件大小:290K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
19-2905; Rev 0; 8/03
12.5Gbps CML 2 × 2 Crosspoint Switch
General Description
Features
The MAX3841 is a low-power, 12.5Gbps 2 × 2 cross-
point switch IC for high-speed serial data loopback,
redundancy, and switching applications. The MAX3841
current-mode logic (CML) inputs and outputs have iso-
ꢀ Up to 12.5Gbps Operation
ꢀ Less Than 10ps Deterministic Jitter
P-P
ꢀ Less Than 0.7ps
Random Jitter
RMS
lated V
connections to enable DC-coupled interfaces
CC
ꢀ 1.8V, 2.5V, and 3.3V DC-Coupled CML I/O
ꢀ Independent Output Power-Down
ꢀ 4mm × 4mm Thin QFN Package
ꢀ -40°C to +85°C Operation
to 1.8V, 2.5V, or 3.3V CML ICs. Fully differential signal
paths and Maxim’s second-generation SiGe technology
provide optimum signal integrity, minimizing jitter,
crosstalk, and signal skew. The MAX3841 is ideal for
serial OC-192 and 10GbE optical module, line card,
switch fabric, and similar applications.
ꢀ +3.3V Core Supply
The MAX3841 has 150mV
sensitivity, and 500mV
minimum differential input
P-P
nominal differential output
ꢀ 215mW Power Consumption (Excluding
P-P
swing. Unused outputs can be powered down individu-
ally to conserve power. In addition to functioning as a 2
× 2 switch, the MAX3841 can be configured as a 2:1
multiplexer, 1:2 buffer, or dual 1:1 buffer. The MAX3841
is available in a 4mm × 4mm 24-pin thin QFN package,
and consumes only 215mW with both outputs enabled.
Termination Currents)
Applications
Ordering Information
OC-192, 10GbE Switch/Line Cards
OC-192, 10GbE Optical Modules
System Redundancy/Self Test
Clock Fanout
PIN-
PACKAGE
PKG.
CODE
PART
TEMP RANGE
MAX3841ETG -40°C to +85°C
24 Thin QFN
T2444-1
Pin Configuration appears at end of data sheet.
Typical Application Circuit
1.8V
2.5V
3.3V
1.8V
10Gbps
CDR/SERDES
ASIC
3.3V
2.5V
V
CC
VCC1OUT
VCC2IN
SDI+
SDI-
OUT1+
IN2+
IN2-
SDO+
SDO-
SDI+
SDI-
10Gbps
SERIAL
OPTICAL
MODULE
OUT1-
IN1+
MAX3841
OUT2+
OUT2-
SDO+
SDO-
IN1-
2.5V
1.8V
VCC1IN
VCC2OUT
SEL1 SEL2 ENO1 ENO2 GND
LOOPBACK
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
12.5Gbps CML 2 × 2 Crosspoint Switch
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, V ..............................................-0.5V to +4.0V
Continuous Power Dissipation (T = +85°C)
CC
A
CML Supply Voltage (VCC_IN, VCC_OUT)...........-0.5V to +4.0V
Continuous Output Current (OUT1 , OUT2 )................... 25mA
CML Input Voltage (IN1 , IN2 )...........-0.5V to (VCC_IN + 0.5V)
LVCMOS Input Voltage (SEL1, SEL2,
24-Pin Thin QFN (derate 20.8mW/°C
above +85°C).............................................................1352mW
Operating Temperature Range ...........................-40°C to +85°C
Storage Temperature Range.............................-55°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
ENO1, ENO2) .........................................-0.5V to (V
+ 0.5V)
CC
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V
= +3.0V to +3.6V, VCC_IN = +1.71V to V , VCC_OUT = +1.71V to V , T = -40°C to +85°C. Typical values are at V
=
CC
CC
CC
A
CC
+3.3V, VCC_IN = VCC_OUT = 1.8V, T = +25°C, unless otherwise noted.)
A
PARAMETER
Core Supply Current
SYMBOL
CONDITIONS
MIN
TYP
MAX
90
UNITS
mA
I
Excluding CML termination currents
(Note 1)
65
CC
Data Rate
0
12.5
Gbps
CML Input Differential
CML Input Common Mode
CML Input Termination
CML Input Return Loss
CML Output Differential
CML Output Termination
CML Output Transition Time
Deterministic Jitter
V
AC-coupled or DC-coupled (Note 2)
DC-coupled
150
1200
VCC_IN
57.5
mV
P-P
IN
VCC_IN - 0.3
V
Single ended
42.5
50
Ω
Up to 10GHz
12
500
50
dB
V
(Note 2)
400
600
57.5
30
mV
P-P
OUT
Single ended
42.5
Ω
t , t
R
20% to 80% (Notes 1, 3)
(Notes 1, 4)
ps
F
10
ps
P-P
Random Jitter
V
= 150mV
(Notes 1, 5)
0.3
0.7
140
12
ps
RMS
IN
P-P
Propagation Delay
Any input to output (Note 1)
(Note 1)
100
ps
ps
ps
µA
V
Channel-to-Channel Skew
Output Duty-Cycle Skew
LVCMOS Input Current
LVCMOS Input High Voltage
50% input duty cycle (Notes 1, 3)
8
I
, I
-10
1.7
+10
IH IL
V
IH
Note 1: Guaranteed by design and characterization.
Note 2: Differential swing is defined as V = (IN_+) - (IN_-) and V
= (OUT_+) - (OUT_-). See Figure 1.
OUT
IN
Note 3: Measured using a 0000011111 pattern at 12.5Gbps, and V = 400mV
differential.
IN
P-P
7
7
Note 4: Measured at 9.953Gbps using a pattern of 100 ones, 2 - 1 PRBS, 100 zeros, 2 - 1 PRBS, and at 12.5Gbps using a ±±28.5
pattern. VCC_IN = VCC_OUT = 1.8V, and V = 400mV
differential.
IN
P-P
Note 5: Refer to Maxim application note HFAN-04.5.1: Measuring Random Jitter on a Digital Sampling Oscilloscope.
2
_______________________________________________________________________________________
12.5Gbps CML 2 × 2 Crosspoint Switch
Typical Operating Characteristics
(V
= 3.3V, VCC_IN, VCC_OUT = 1.8V, V = 500mV , T = +25°C, unless otherwise noted.)
IN P-P A
CC
OUTPUT EYE DIAGRAM
(12.5Gbps, 223 - 1 PRBS)
SUPPLY CURRENT vs. TEMPERATURE
(CORE PLUS CML I/O CURRENTS)
CORE SUPPLY CURRENT vs. TEMPERATURE
(EXCLUDES CML I/O CURRENTS)
MAX3841 toc03
140
130
120
110
100
90
140
130
120
110
100
90
2 OUTPUTS ENABLE
1 OUTPUT ENABLE
0 OUTPUTS ENABLE
1 OUTPUT ENABLE
0 OUTPUTS ENABLE
60mV/div
2 OUTPUTS ENABLE
80
80
70
70
60
60
50
50
CML INPUTS AND OUTPUTS AC-COUPLED
40
40
14ps/div
-40
-15
10
35
60
85
-40
-15
10
35
60
85
TEMPERATURE (°C)
TEMPERATURE (°C)
OUTPUT EYE DIAGRAM
(622Mbps, 223 - 1 PRBS)
OUTPUT EYE DIAGRAM
(10.7Gbps, 223 - 1 PRBS)
OUTPUT EYE DIAGRAM
(6.25Gbps, 223 - 1 PRBS)
MAX3841 toc06
MAX3841 toc04
MAX3841 toc05
60mV/div
60mV/div
60mV/div
270ps/div
16ps/div
28ps/div
DETERMINISTIC JITTER
vs. TEMPERATURE
DIFFERENTIAL OUTPUT SWING
vs. TEMPERATURE
PROPAGATION DELAY
MAX3841 toc09
550
540
530
520
510
500
490
480
470
460
450
16
14
12
10
8
27 - 1 PRBS + 100CIDs
AT 10.7Gbps
IN1
6
OUT1
4
2
K28.5 AT 12.5Gbps
0
100ps/div
-40
-15
10
35
60
85
-40
-15
10
35
60
85
TEMPERATURE (°C)
TEMPERATURE (°C)
_______________________________________________________________________________________
3
12.5Gbps CML 2 × 2 Crosspoint Switch
Pin Description
PIN
1, 12
2, 5
3
NAME
FUNCTION
V
+3.3V Core Supply Voltage
CC
VCC1IN
IN1+
Supply Voltage for CML Input IN1. Connect to 1.8V, 2.5V, or 3.3V.
Positive Serial Data Input 1, CML
4
IN1-
Negative Serial Data Input 1, CML
6
SEL1
Output 1 Select, LVCMOS Input. See Table 1.
Output 2 Select, LVCMOS Input. See Table 1.
Supply Voltage for CML Input IN2. Connect to 1.8V, 2.5V, or 3.3V.
Positive Serial Data Input 2, CML
7
SEL2
8, 11
9
VCC2IN
IN2+
10
IN2-
Negative Serial Data Input 2, CML
13, 24
14, 17
15
GND
Supply Ground
VCC1OUT
OUT1-
OUT1+
ENO1
Supply Voltage for CML Output OUT1. Connect to 1.8V, 2.5V, or 3.3V.
Negative Serial Data Output 1, CML
16
Positive Serial Data Output 1, CML
18
Output 1 Enable, LVCMOS Input. See Table 1.
Output 2 Enable, LVCMOS Input. See Table 1.
Supply Voltage for CML Output OUT2. Connect to 1.8V, 2.5V, or 3.3V.
Negative Serial Data Output 2, CML
19
ENO2
20, 23
21
VCC2OUT
OUT2-
OUT2+
22
Positive Serial Data Output 2, CML
Ground. The exposed pad must be soldered to the circuit board ground for proper thermal and
electrical performance.
EP
Exposed Pad
The CML inputs accept serial NRZ data with differential
Detailed Description
amplitude from 150mV
to 1200mV
(see Figure 2).
P-P
P-P
The MAX3841 contains a pair of CML inputs that drive
two 2:1 multiplexers, with separate select inputs SEL1
and SEL2, providing a 2 × 2 crosspoint data path. The
outputs of the multiplexers each drive a high-perfor-
mance CML output that can be disabled (powered
down) using the ENO1/ENO2 inputs. All of the data
paths are fully differential to minimize jitter, crosstalk,
and signal skew. See Figure 1 for the functional diagram.
The CML outputs provide 500mV
swing, resulting in low power consumption.
nominal differential
P-P
2
IN1
IN2
CML
1
0
2
2
OUT1
CML
CML
ENO1
SEL1
CML Input and Output Buffers
The MAX3841 input and output buffers are terminated
with 50Ω to independent supply lines, and are also com-
patible with 100Ω differential terminations. (See Figures 3
and 4.) Separate power-supply connections are provided
for the core, input buffers, and output buffers to allow DC-
coupling to 1.8V, 2.5V, or 3.3V CML ICs. If desired, the
CML inputs and outputs can be AC-coupled.
2
CML
1
0
OUT2
ENO2
SEL2
MAX3841
Figure 1. Functional Diagram
4
_______________________________________________________________________________________
12.5Gbps CML 2 × 2 Crosspoint Switch
Table 1. Output Controls
V-
75mV
MIN
ENO1
ENO2
SEL1
SEL2
OUT1
IN2
OUT2
IN1
600mV
MAX
0
0
0
0
1
0
0
0
0
1
0
0
1
1
X
0
1
0
1
X
IN2
IN2
V+
IN1
IN1
IN1
IN2
Disabled
Disabled
150mV
MIN
(V+) - (V-)
1200mV
MAX
Applications Information
Select and Enable Controls
The MAX3841 provides two LVCMOS-compatible
select inputs, SEL1 and SEL2. Either data input can be
connected to either or both data outputs. The MAX3841
provides two LVCMOS-compatible enable inputs,
ENO1 and ENO2, so each output can be disabled
independently. The MAX3841 can also be used as a
1:2 driver, 2:1 multiplexer, or a dual 1:1 buffer by using
the LVCMOS control inputs accordingly (see Table 1).
Figure 2. Definition of Differential Voltage Swing
VCC_IN
50Ω
50Ω
Power-Supply Connections
Each of the input and output power-supply connections
(VCC1IN, VCC2IN, VCC1OUT, VCC2OUT) is indepen-
dent and need not be connected to the same voltage.
The input and output supplies can be connected to
IN_+
IN_-
1.8V, 2.5V, or 3.3V, but the core supply (V ) must be
CC
MAX3841
connected to 3.3V for proper operation.
Input and Output Interfaces
The MAX3841 inputs and outputs can be AC-coupled
or DC-coupled according to the application. If an input
or output is not used it should be terminated with 50Ω
to the correct input or output supply voltage. For more
information about interfacing with logic families, refer to
Maxim application note HFAN-01.0: Introduction to
LVDS, PECL, and CML.
Figure 3. Equivalent CML Input Circuit
VCC_OUT
50Ω
50Ω
Package and Layout Considerations
The MAX3841 is packaged in a 4mm × 4mm 24-pin thin
QFN with exposed pad. The exposed pad provides
thermal and electrical connectivity to the IC and must
be soldered to a high-frequency ground plane. Use
multiple vias to connect the exposed pad underneath
the package to the PC board ground plane.
OUT_+
OUT_-
Use good layout techniques for the 10Gbps PC board
transmission lines, and configure the layout near the IC to
minimize impedance discontinuities. Power-supply
decoupling capacitors should be located as close as
possible to the IC.
MAX3841
Figure 4. Equivalent CML Output Circuit
_______________________________________________________________________________________
5
12.5Gbps CML 2 × 2 Crosspoint Switch
Pin Configuration
Chip Information
TRANSISTOR COUNT: 950
PROCESS: SiGe BiCMOS
TOP VIEW
24 23 22 21 20 19
V
1
2
3
4
5
6
CC
18
17
16
15
14
13
ENO1
VCC1IN
IN1+
VCC1OUT
OUT1+
OUT1-
MAX3841
IN1-
VCC1IN
SEL1
VCC1OUT
GND
7
8
9
10 11 12
THIN QFN*
*THE EXPOSED PAD OF THE QFN PACKAGE MUST BE
SOLDERED TO GROUND FOR PROPER THERMAL AND
ELECTRICAL OPERATION.
6
_______________________________________________________________________________________
12.5Gbps CML 2 × 2 Crosspoint Switch
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
PACKAGE OUTLINE
12,16,20,24L QFN THIN, 4x4x0.8 mm
21-0139
A
_______________________________________________________________________________________
7
12.5Gbps CML 2 × 2 Crosspoint Switch
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
PACKAGE OUTLINE
12,16,20,24L QFN THIN, 4x4x0.8 mm
21-0139
A
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
8 _____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2003 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products.
相关型号:
SI9130DB
5- and 3.3-V Step-Down Synchronous ConvertersWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9135LG-T1
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9135LG-T1-E3
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9135_11
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9136_11
Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9130CG-T1-E3
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9130LG-T1-E3
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9130_11
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9137
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9137DB
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9137LG
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
SI9122E
500-kHz Half-Bridge DC/DC Controller with Integrated Secondary Synchronous Rectification DriversWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
VISHAY
©2020 ICPDF网 联系我们和版权申明