MAX38904DANL18+ [MAXIM]
Fixed Positive LDO Regulator,;
| 型号： | MAX38904DANL18+ |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | Fixed Positive LDO Regulator, 输出元件 调节器 |
| 文件： | 总17页 (文件大小：460K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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MAX38904A/B/C/D
1.7V–5.5V , 2A Low Noise LDO Linear
IN
Regulators in TDFN and WLP
General Description
Benefits and Features
The MAX38904 is a 1.7V–5.5V V , low-noise linear reg-
IN
ulator that delivers up to 2A of output current with only
● Delivers Flexible Operating Range
• 1.7V to 5.5V Input Voltage Range
• 0.6V to 5.0V Programmable Output Voltage
• 2A Maximum Output Current
5.1μV
of output noise from 10Hz to 100kHz. The reg-
RMS
ulator maintains ±1% output accuracy over a wide in-
put voltage range, requiring only 100mV of input-to-output
headroom at full load. The 1.3mA no-load supply current
is independent of dropout voltage.
• 100mV Maximum Dropout at 2A Load
• < 1.5μA Shutdown Supply Current
● Reduces Noise and Improves Accuracy
• ±1% DC Accuracy Over Load, Line, and
Temperature
The output voltage on MAX38904B can be adjusted to a
value in the range of 0.6V to 5.0V by using two external
resistors. The MAX38904B also includes an active-high
POK signal for trouble-free load startup.
• 5.1µV
Output Noise, 10Hz to 100kHz
RMS
• 1.3mA Quiescent Supply Current
• > 70dB PSRR at 10kHz
The MAX38904A has nine pin-selectable output voltages
1.2V, 1.5V, 1.8V, 2.5V, 3.0V, 3.1V, 3.3V, 4.0V, and 5V.
● Enables Ease-of-Use and Robust Protection
• Stable with 8μF (Min) Output Capacitance
• Programmable Soft-Start Rate
The wafer-level package (WLP) versions of the
MAX38904 are available as C and D variants. The
MAX38904C uses external feedback resistors for adjust-
ing the output voltage, while the MAX38904D has factory
preset output voltages over the range of 0.7V to 5.0V in
50mV steps.
• Overcurrent and Overtemperature Protection
• Output-to-Input Reverse Current Protection
• Power-OK Status Pin
● Reduces Size, Improves Reliability
• 3mm x 3mm 14-pin TDFN Package and 2.2mm x
1.37mm, 5 x 3 Bump, 0.4mm Pitch WLP
• -40ºC to 125ºC Operating Temperature
All versions include a programmable output soft-start rate,
output overcurrent, and thermal overload protection.
The MAX38904A/B are offered in a 3mm x 3mm, 14-pin
TDFN package, while the MAX38904C/D are available in
5 x 3 bump, 2.2mm x 1.37mm WLP, 0.4mm pitch.
Ordering Information appears at end of data sheet.
Applications
● Communication Systems, Test Equipment, Medical
Equipment
● High-End Audio Systems
● High-Resolution Data Acquisition Systems
19-100443; Rev 2; 3/19
MAX38904A/B/C/D
1.7V–5.5V , 2A Low Noise LDO Linear
IN
Regulators in TDFN and WLP
Simplified Block Diagram
IN
OUT
(1.5V/2A)
IN
OUT
(1.7V TO 5.5V)
C1
C3
C2
22µF
22µF
47nF
R3
GND
EN
GS
BYP
POK
FB
100k
MAX38904B
ENABLE
RESETB
R2
90k
EP
R1
60k
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Maxim Integrated | 2
MAX38904A/B/C/D
1.7V–5.5V , 2A Low Noise LDO Linear
IN
Regulators in TDFN and WLP
Absolute Maximum Ratings
IN, OUT, SELA, SELB, EN, POK, OUTS, FB, GS to GND ..-0.3V
Continuous Power Dissipation WLP (T
=
+70°C, derate
A
to +6V
16.4mW/°C above +70°C.) .............................................1312mW
Operating Temperature Range...........................-40°C to +125°C
Maximum Junction Temperature ......................................+150°C
Storage Temperature Range ..............................-65°C to +150°C
Soldering Temperature (reflow) ........................................+260°C
BYP .......................................................................... -0.3V to +2V
Output Short-Circuit Duration ..................................... Continuous
Continuous Power Dissipation TDFN (T
=
+70°C, derate
A
24.4mW/°C above +70°C.)............................................. 1951mW
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may
affect device reliability.
Package Information
TDFN
Package Code
T1433+2C
21-0137
90-0063
Outline Number
Land Pattern Number
Thermal Resistance, Single-Layer Board:
Junction-to-Ambient (θ
)
54°C/W
8°C/W
JA
Junction-to-Case Thermal Resistance (θ
)
JC
Thermal Resistance, Four-Layer Board:
Junction-to-Ambient (θ
)
JA
41°C/W
8°C/W
Junction-to-Case Thermal Resistance (θ
)
JC
WLP
Package Code
N151B2+1
21-100315
Outline Number
Land Pattern Number
Refer to Application Note 1891
Thermal Resistance, Four-Layer Board:
Junction-to-Ambient (θ
)
JA
61.55°C/W
N/A
Junction-to-Case Thermal Resistance (θ
)
JC
For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages.
Note that a “+”, “#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different
suffix character, but the drawing pertains to the package regardless of RoHS status.
Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a
four-layer board. For detailed information on package thermal considerations, refer to www.maximintegrated.com/
thermal-tutorial.
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Maxim Integrated | 3
MAX38904A/B/C/D
1.7V–5.5V , 2A Low Noise LDO Linear
IN
Regulators in TDFN and WLP
Electrical Characteristics
(V = 3.6V, T = -40°C to +125°C, C
= 47nF, C = 22µF, C
= 22µF, Typical Operating Circuit, unless otherwise specified.
OUT
IN
J
BYP
IN
(Note 1))
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Input Voltage Range
V
IN
Guaranteed by Output Accuracy
1.7
5.5
V
Input Undervoltage
Lockout
V
V
rising, 100mV hysteresis
1.5
1.6
1.7
5.0
V
UVLO
IN
IN
Output Voltage Range
Output Capacitance
V
V
> V
+ 0.1V
OUT
0.6
8
V
OUT
C
For stability and proper operation
22
1300
0.04
1.5
μF
OUT
V
EN
= V = 3.6V, I
= 0mA
OUT
IN
Supply Current
I
μA
T
= +25°C
1.5
IN
A
V
EN
= 0V
T
A
= 125°C
FB Regulation Accuracy
(MAX38904B/C Only)
I
from 0.1mA to 2A, V from V
+
+
OUT
IN
OUT
OUT
ACC
ACC
0.594
-1
0.6
0.606
+1
V
%
%
0.3V to 5.5V, V > 1.7V
IN
OUT Regulation
Accuracy (MAX38904A/
D Only)
I
from 0.1mA to 2A, V from V
IN
OUT
0.3V to 5.5V, V > 1.7V
IN
V
= 2.8V, V
= 2.5V, I
from
OUT
IN
OUT
Load Regulation
Load Transient
0.032
50
0.1mA to 2A
Output Voltage deviation with a load
change of I = 50mA to 2.0A to 50mA,
mV
OUT
P-P
with t
= t
= 1μs
RISE
FALL
V
from 2.8V to 5.5V, V
= 800mA
= 2.5V,
OUT
IN
Line Regulation
Line Transient
0.054
3
%/V
I
OUT
V
IN
= 4V to 5V to 4V, I
= 2A, t
=
RISE
OUT
mV
P-P
t
= 5µs
FALL
V
IN
V
IN
V
IN
= 3.6V
47
65
100
200
300
Dropout Voltage (Note
2)
I
= 2A
= 2.5V (Note 3)
= 1.7V
mV
OUT
100
V
= 95% of regulation, V - V
=
OUT
OUT
IN
Current Limit
Output Noise
2.2
2.8
5.1
3.4
A
0.5V, V = 3.6V
IN
I
= 100mA,
= 100nF
OUT
f = 10Hz to 100kHz
μV
RMS
C
BYP
f = 1kHz
70
70
60
40
V
= V
+
OUT
IN
f = 10kHz
f = 100kHz
f = 1MHz
Power Supply Rejection
Ratio
PSRR
400mV, I
1.6A
=
dB
OUT
BYP Capacitor Range
BYP Soft-Start Current
C
BYP
Regulator Remain Stable
0.001
0.4
0.1
1.2
μF
μA
From BYP to GND during startup
50
V
5.5V
from 1.7V to
IN
EN Input Threshold
EN Input Threshold
EN rising
EN falling
0.8
V
V
V
IN
from 1.7V to
0.7
5.5V
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Maxim Integrated | 4
MAX38904A/B/C/D
1.7V–5.5V , 2A Low Noise LDO Linear
IN
Regulators in TDFN and WLP
Electrical Characteristics (continued)
(V = 3.6V, T = -40°C to +125°C, C
= 47nF, C = 22µF, C
= 22µF, Typical Operating Circuit, unless otherwise specified.
OUT
IN
J
BYP
IN
(Note 1))
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
V
5.5V
from 1.7V to
EN
T
= +25ºC
-1
+0.001
+1
A
A
EN Input Leakage
Current
μA
V
EN
from 1.7V to
T
= +125°C
0.01
5.5V
V
V
rising
falling
88
91
88
94
POK Threshold
(MAX38904B Only)
V
when POK
OUT
OUT
%
mV
μA
switches
OUT
POK Voltage, Low
(MAX38904B Only)
V
I
= 1mA
10
100
OL
POK
T
T
= +25°C
-0.1
1
+0.001
0.01
+0.1
POK Leakage Current
(MAX38904B Only)
A
V
POK
= 5.5V
= +125°C
A
SELA/B Input
Resistance
(MAX38904A Only)
When shorted to GND or IN
When Hi-Z
500
10
Ω
R
C
INSELA/B
INSELA/B
MΩ
SELA/B Input
Capacitance
When Hi-Z
pF
(MAX38904A Only)
IN Reverse-Current
Threshold
I
V
= 3.6V, when V falls to 0V
800
mA
ºC
IN_REV
OUT
IN
T rising
J
165
150
Thermal Shutdown
Threshold
T when output
J
turns on/off
T falling
J
Note 1: Limits over the specified operating temperature and supply voltage range are guaranteed by design and characterization, and
production tested at room temperature only.
Note 2: Dropout voltage is defined as (V - V
) when V
is 95% of its nominal value.
OUT
IN
OUT
Note 3: Guaranteed by design and characterization.
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Maxim Integrated | 5
MAX38904A/B/C/D
1.7V–5.5V , 2A Low Noise LDO Linear
IN
Regulators in TDFN and WLP
Typical Operating Characteristics
(MAX38904BATD+, V = 3.6V, V
= 2.5V, C
= 47nF, C = 22μF, C
= 22μF, T = 25ºC, unless otherwise noted)
OUT A
IN
OUT
BYP
IN
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Maxim Integrated | 6
MAX38904A/B/C/D
1.7V–5.5V , 2A Low Noise LDO Linear
IN
Regulators in TDFN and WLP
Pin Configurations
MAX38904A
IN
IN
1
2
3
4
5
6
7
14
13
12
11
10
9
OUT
OUT
OUT
OUT
BYP
IN
IN
EXPOSED PAD
GND
EN
OUTS
SELB
SELA
8
3mm x 3mm 14-TDFN
TOP VIEW
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Maxim Integrated | 7
MAX38904A/B/C/D
1.7V–5.5V , 2A Low Noise LDO Linear
IN
Regulators in TDFN and WLP
MAX38904B
IN
IN
1
2
3
4
5
6
7
14
13
12
11
10
9
OUT
OUT
OUT
OUT
BYP
FB
IN
IN
EXPOSED PAD
GND
EN
GS
8
POK
3mm x 3mm 14-TDFN
TOP VIEW
MAX38904C
1
2
3
4
5
A
B
C
IN
IN
IN
EN
IN
GND
OUT
GND
OUT
FB
GND
OUT
GND
OUT
BYP
3 x 5 BUMP 0.4mm PITCH WLP
TOP VIEW
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Maxim Integrated | 8
MAX38904A/B/C/D
1.7V–5.5V , 2A Low Noise LDO Linear
IN
Regulators in TDFN and WLP
MAX38904D
1
2
3
4
5
A
B
C
IN
IN
IN
EN
IN
GND
OUT
GND
OUT
OUTS
BYP
GND
OUT
GND
OUT
3 x 5 BUMP 0.4mm PITCH WLP
TOP VIEW
Pin Description
PIN
NAME
FUNCTION
MAX3890 MAX3890 MAX3890 MAX3890
4A
4B
4C
4D
A1, A2,
A3, A4
A1, A2,
A3, A4
Regulator Supply Input. Connect to a voltage between 1.7V and
5.5V and bypass with a 22µF capacitor from IN to GND.
1, 2, 3, 4
1, 2, 3, 4
IN
B1, B2,
B3, B4
B1, B2,
B3, B4
Regulator Ground. Bring IN and OUT bypass capacitor GND
connections to this pin for best performance.
5
6
5
6
GND
Enable Input. Connect this pin to a logic signal to enable (V
EN
high) or disable (V
low) the regulator output. Connect to IN to
EN
A5
A5
EN
keep the output enable whenever a valid supply voltage is
present.
Output Select Input. Connect to GND, IN, or Hi-Z to select one
of three states. The state of the SELA and SELB pins are read
when the device is enabled and used to select one of nine
output voltages.
7
—
8
—
7
—
—
—
—
—
—
SELA
GS
Ground Sense. Connect GS to GND.
Output Select Input. Connect to GND, IN, or Hi-Z to select one
of three states. The state of the SELA and SELB pins are read
when the device is enabled and used to select one of nine
output voltages.
—
SELB
Active-High Power-OK Output. Connect a pullup resistor from
this pin to a supply to create a reset signal that goes high after
the regulator output has reached its regulation voltage.
—
9
8
—
—
—
POK
Output Voltage Sense Input. Connect to the load at a point
where accurate regulation is required to eliminate resistive metal
drops.
—
B5
OUTS
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Maxim Integrated | 9
MAX38904A/B/C/D
1.7V–5.5V , 2A Low Noise LDO Linear
IN
Regulators in TDFN and WLP
Pin Description (continued)
PIN
NAME
FUNCTION
MAX3890 MAX3890 MAX3890 MAX3890
4A
4B
4C
4D
Feedback Divider Input. Connect a resistor divider string from
OUT to GND with the midpoint tied to this pin to set the output
—
9
B5
—
FB
voltage. In the Typical Application Circuits, V
= 0.6V x (1 +
OUT
R2/R1).
Bypass Capacitor Input. Connect a 0.001μF to 0.1µF capacitor
between OUT and BYP to reduce output noise and set the
regulator soft-start rate.
10
10
C5
C5
BYP
OUT
EP
Regulator Output. Sources up to 2A at the output regulation
voltage. Bypass with a 22µF (8µF minimum, including voltage
derating) low ESR (< 0.03Ω) capacitor to GND.
11, 12, 13, 11, 12, 13,
C1, C2,
C3, C4
C1, C2,
C3, C4
14
14
Exposed Pad (TDFN Only). Connect the exposed pad to a
ground plane with low thermal resistance to ambient to provide
best heat sinking.
EP
EP
—
—
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Maxim Integrated | 10
MAX38904A/B/C/D
1.7V–5.5V , 2A Low Noise LDO Linear
IN
Regulators in TDFN and WLP
Simplified Functional Diagram
IN
CURRENT
LIMIT
THERMAL
PROTECTION
REVERSE-
CURRENT
PROTECTION
EN
CONTROL
OUT
BYP
EA
BYP
REF
0.6V
MAX38904B ONLY
POK
MAX38904A
MAX38904B
MAX38904C
MAX38904D
0.54V
MAX38904B/C ONLY
FB
OUTS
MAX38904A ONLY
MAX38904A/D
ONLY
SELA
SELB
VOLTAGE
SELECT
GND
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Maxim Integrated | 11
MAX38904A/B/C/D
1.7V–5.5V , 2A Low Noise LDO Linear
IN
Regulators in TDFN and WLP
Detailed Description
The MAX38904 is a high-performance PMOS linear regulator that is optimized for low noise, high input supply rejection,
low dropout voltage, and small solution size. It can deliver up to a maximum load current of 2A while maintaining a low
dropout voltage of 47mV. An enable input allows the regulator to be powered up and down, while an internal soft-start
circuit controls the in-rush current at the input. SELA and SELB inputs are provided on A version for selecting one of nine
output voltages and a power-OK output is provided on the B version for system power-up sequencing.
Enable (EN)
The MAX38904 includes an enable pin (EN). Pull EN low to shut down the output, or drive EN high to enable the output.
If a separate shutdown signal is not available, connect EN to IN.
Bypass (BYP)
The capacitor connected from BYP to OUT filters noise at the reference, feedback resistors and regulator input stage. It
provides a high speed feedback path for improved transient response. A 10nF capacitor rolls off noise at around 32Hz.
The slew rate of the output voltage during startup is also determined by the BYP capacitor. A 10nF capacitor sets the
slew rate to 5V/ms. This startup rate results in a 110mA slew current drawn from the input at startup to charge 22μF
output capacitance.
The BYP capacitor value can be adjusted from 1nF to 100nF to change the startup slew rate according to the following
formula:
5V
ms
10nF
Startup Slew Rate
where C is in nF.
=
x
C
BYP
BYP
Note that this slew rate applies only at startup. Recovery from a short-circuit will occur at a slew rate approximately 500
times slower.
Also, note that being a low-frequency filter node, BYP is sensitive to leakage. BYP leakage currents above 10nA cause
measurable inaccuracy at the output and should be avoided.
Protection Features
The MAX38904 is fully protected from an output short-circuit by a current limiting and thermal overload circuit. If the
output is shorted to GND, the output current is limited to 2.8A (typ). Under these conditions, the device quickly heats up.
When the junction temperature reaches 165°C, a thermal limit circuit shuts the output device off. Once the device cools
to 150°C, the output turns back on in an attempt to reestablish regulation. If the fault persists, the output current cycles
on and off as the junction temperature slews between 150°C and 165°C.
The MAX38904 is also protected against reverse current when the output voltage is higher than the input. In the event
that extra output capacitance is used at the output, a power down transient at the input would normally cause a large
reverse-current through a conventional regulator. The MAX38904 includes a reverse-voltage detector that trips when IN
drops 10mV below OUT shutting off the regulator and opening the PMOS body diode connection preventing any reverse
current.
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Maxim Integrated | 12
MAX38904A/B/C/D
1.7V–5.5V , 2A Low Noise LDO Linear
IN
Regulators in TDFN and WLP
Output Voltage Configuration (MAX38904A)
The MAX38904A has two configuration pins, SELA and SELB, that are read during power-up to determine the output
regulation voltage.
Table 1. MAX38904A Output Configuration Table
V
(V)
SELA
Hi-Z
IN
SELB
IN
OUT
1.2
1.5
1.8
2.5
3.0
3.1
3.3
4.0
5.0
Hi-Z
GND
Hi-Z
GND
IN
Hi-Z
Hi-Z
GND
GND
GND
IN
Hi-Z
GND
IN
IN
Output Voltage Configuration (MAX38904B/C)
The MAX38904B and MAX38904C use external feedback resistors to set the output regulation voltage as shown in the
Typical Operating Circuit. The output voltage can be set form 0.6V to 5.0V. Set the lower feedback resistor R1 to 300kΩ
or less to minimize FB input bias current error. Then, calculate the value of the upper feedback resistor R2 as follows:
V
OUT
R2
=
R1 x (
−
1)
V
FB
where V is the feedback regulation voltage of 0.6V.
FB
To set the output to 2.4V, for example, R2 should be:
2.4V
0.6V
R2
=
300kΩ x (
−
1)
=
900kΩ
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Maxim Integrated | 13
MAX38904A/B/C/D
1.7V–5.5V , 2A Low Noise LDO Linear
IN
Regulators in TDFN and WLP
Output Voltage Configuration (MAX38904D)
The MAX38904D output voltage comes preprogrammed to values listed below. Additionally, any output voltage between
0.7V and 5.0V in 50mV steps can be factory programmed and special ordered. Contact a Maxim Integrated
representative to order preprogrammed parts.
Table 2. MAX38904D Output Configuration Table
PART NUMBER
MAX38904DANL12
MAX38904DANL15
MAX38904DANL18
MAX38904DANL20
MAX38904DANL25
MAX38904DANL27
MAX38904DANL30
MAX38904DANL33
MAX38904DANL36
MAX38904DANL50
MAX38904DANL__
V
(V)
OUT
1.2
1.5
1.8
2.0
2.5
2.7
3.0
3.3
3.6
5.0
*
* For other preprogrammed voltage selections, contact a Maxim Integrated representative.
Power-OK (MAX38904B)
The MAX38904B includes an additional open-drain output, POK, that goes high to indicate the output voltage is in
regulation. Connect a pullup resistor from this pin to an external supply. During startup, POK stays low until the output
voltage rises to 91% (typ) of its regulation level. If an overload event occurs at the output, or the output is shutdown, POK
goes low.
Input Capacitor
A 22μF ceramic capacitor is recommended for the input. Select a capacitor that does not degrade significantly over
temperature and DC bias. Capacitors with X5R or X7R temperature characteristics generally perform well.
Output Capacitor
A minimum of 8μF capacitance is required at OUT to ensure stable operation. Select a ceramic capacitor that maintains
its capacitance (8μF minimum) over temperature and DC bias. Capacitors with X5R or X7R temperature characteristics
generally perform well.
Thermal Considerations
The MAX38904 is packaged in a 14-pin 3mm x 3mm TDFN package with an exposed paddle. The exposed paddle is the
main thermal path for heat to escape the IC, and therefore, must be connected to a ground plane with thermal vias to
allow heat to dissipate from the device. Thermal properties of the package are given in the Package Information section.
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Maxim Integrated | 14
MAX38904A/B/C/D
1.7V–5.5V , 2A Low Noise LDO Linear
IN
Regulators in TDFN and WLP
Typical Application Circuits
IN
OUT
1.2V–5.0V
IN
OUT
BYP
(1.7V TO 5.5V)
C1
22µF
C2
47nF
C3
22µF
GND
MAX38904A
TDFN
ENABLE
EN
OUTS
SELB
SELA
V
SELECT:
TO GND,
OUT
IN OR FLOAT
EP
IN
(1.7V TO 5.5V)
OUT
ADJUSTABLE
(0.6V–5.0V)
IN
OUT
BYP
C1
22µF
C2
47nF
C3
22µF
GND
EN
GS
MAX38904B
R3
TDFN
100k
ENABLE
POK
FB
RESETB
R2
R1
EP
OUT
ADJUSTABLE
(0.6V–5.0V)
IN
IN
OUT
BYP
FB
(1.7V TO 5.5V)
C1
22µF
C2
47nF
C3
22µF
MAX38904C
WLP
GND
EN
R2
R1
ENABLE
IN
OUT
FACTORY
PROGRAMMED
IN
OUT
BYP
(1.7V TO 5.5V)
MAX38904D
C1
22µF
C2
47nF
C3
22µF
WLP
GND
EN
ENABLE
OUTS
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Maxim Integrated | 15
MAX38904A/B/C/D
1.7V–5.5V , 2A Low Noise LDO Linear
IN
Regulators in TDFN and WLP
Ordering Information
PART NUMBER
TEMP RANGE
PIN-PACKAGE
FEATURES
-40°C to
+125°C
MAX38904AATD+
14-pin, 3mm x 3mm, TDFN
14-pin, 3mm x 3mm, TDFN
Pin-Selectable Output Voltage, Enable
-40°C to
+125°C
External Resistor Feedback, POK Output with Delay,
Enable
MAX38904BATD+
-40°C to
+125°C
15-pin, 5 x 3, 0.4mm pitch,
WLP
MAX38904CANL+*
MAX38904DANL__+*
MAX38904DANL15+*
External Resistor Feedback, Enable
Preprogrammed Output Voltage, Enable
Factory Programmed to 1.5V, Enable
-40°C to
+125°C
15-pin, 5 x 3, 0.4mm pitch,
WLP
-40°C to
+125°C
15-pin, 5 x 3, 0.4mm pitch,
WLP
#Denotes a RoHS-compliant device that may include lead(Pb) that is exempt under the RoHS requirements.
T = Tape-and-reel.
*Future product—contact factory for availability.
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Maxim Integrated | 16
MAX38904A/B/C/D
1.7V–5.5V , 2A Low Noise LDO Linear
IN
Regulators in TDFN and WLP
Revision History
REVISION REVISION
PAGES
CHANGED
DESCRIPTION
NUMBER
DATE
11/18
12/18
3/19
0
1
2
Initial release
—
Updated title of data sheet and Ordering Information
Updated Table 2 and Ordering Information
1–16
14, 16
For pricing, delivery, and ordering information, please visit Maxim Integrated’s online storefront at https://www.maximintegrated.com/en/storefront/storefront.html.
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent
licenses are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max
limits) shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
© 2018 Maxim Integrated Products, Inc.
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