MAX40077AUA+T [MAXIM]
Operational Amplifier,;
| 型号： | MAX40077AUA+T |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | Operational Amplifier, 放大器 光电二极管 |
| 文件： | 总17页 (文件大小：897K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
EVALUATION KIT AVAILABLE
MAX40079/MAX40087/
MAX40077/MAX40089/
MAX40078
Single/Dual/Quad Ultra-Low
Input Bias Current, Low Noise Amplifiers
General Description
Benefits and Features
The
MAX40079/MAX40087/MAX40077/MAX40089/
● Low Input Voltage Noise Density: 4.2nV/√Hz at 30KHz
● Low Input Current Noise Density: 0.5fA/√Hz
● Low Input Bias Current: 0.3pA (typ)
MAX40078 are wide band, low-noise, low-input bias
current operational amplifiers that offer rail-to-rail outputs
and single-supply operation from 2.7V to 5.5V. These low-
noise amps draw 2.2mA of quiescent supply current per
amplifier. This family of amplifiers offers ultra-low distortion
(0.0002% THD+N), as well as low input voltage-noise
density (4.2nV/√Hz) and low input current-noise density
(0.5fA/√Hz). The low input bias current of 50fA(typ) and
low noise(4.5nV/√Hz), together with the wide bandwidth,
provides excellent performance for trans-impedance (TIA)
and imaging applications.
● Low Distortion: 0.00035% or -109dB THD+N (1kΩ
Load)
● Single-Supply Operation from +2.7V to +5.5V
● Input Common-Mode Voltage Range Includes
Ground
● Rail-to-Rail Output Swings with a 1kΩ Load
● Wide Bandwidth: MAX40079/MAX40077/MAX40078
(10MHz); MAX40087/MAX40089 (42MHz)
● Excellent DC Characteristics: V
● Single-Channel 6-bump WLP in 1.11mm x 0.76mm
with 0.35mm Bump Pitch
● Dual-Channel 8-bump WLP in 0.96mm x 1.66mm
with 0.35mm Bump Pitch
● Available in Space-Saving 6-WLP, 6-SOT, 8-WLP
≤ 70μV
OS
These amplifiers have outputs which swing rail-to-rail and
their input common-mode voltage range includes ground.
The MAX40079/MAX40077/MAX40078 are single/dual/
quad respectively in unity-gain stable with a bandwidth
of 10MHz. The MAX40087/MAX40089 are single/dual
respectively with gain ≥ 5 stable and bandwidth of 42MHz.
They operate over the full -40°C to +125°C temperature
range.
and μMAX Packages
Single channel op amps are available in 6-bump wafer-level
package (WLP) and SOT23 6-pin packages. The dual channel
op amps are available in 8-bump WLP and μMAX-8 packages.
The quad channel option is available in 14-TSSOP package.
THD+N Performance
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. FREQUENCY
Applications
toc20
-80
● Transimpedance Amplifiers
● pH Probes and Reference Electrodes
● ADC Buffers
VOUT = 4 VP-P
-90
● DAC Output Amplifiers
● Low-Noise Microphone/Preamplifiers
● Digital Scales
-100
RL = 1KΩ
● Strain Gauges/Sensor Amplifiers
● Medical Instrumentation
-110
RL = 10KΩ
Ordering Information appears at end of data sheet.
-120
20
200
2000
20000
FREQUENCY(Hz)
19-100237; Rev 1; 3/18
MAX40079/MAX40087/
MAX40077/MAX40089/
MAX40078
Single/Dual/Quad Ultra-Low
Input Bias Current, Low Noise Amplifiers
Absolute Maximum Ratings
Input Differential Voltage(IN+ - IN-)
Operating Temperature Range......................... -40°C to +125°C
MAX40079/MAX40087/MAX40077/MAX40089/MAX40078
(continuous)............................................................-3V to +3V
MAX40079/MAX40087/MAX40077/MAX40089/MAX40078
(transient, 10s)........................................................-6V to +6V
Continuous Power Dissipation (T = +70°C)
A
SOT23-6 (derate 8.7mW/°C above +70°C).................696mW
6-Bump WLP (derate 10.19mW/°C above +70°C)......815mW
8-μMAX (derate 4.8mW/°C above +70°C) .............387.80mW
8-Bump WLP (derate 10.90mW/°C above +70°C)......872mW
14-TSSOP (derate 10mW/°C above +70°C)..........796.80mW
Storage Temperature Range............................ -65°C to +150°C
Lead Temperature ((soldering, 10s))...............................+300°C
Soldering Temperature (reflow).......................................+260°C
Power-Supply Voltage (V
Analog Input Voltage
to V ).......................-0.3V to +6V
DD
SS
((IN+,IN-) to V )............................V - 0.3V to V + 0.3V
SS
SS
DD
SHDN Input Voltage (to V ).........................V - 0.3V to +6V
SS
SS
Continuous Input Current (IN+,IN-)..................................±20mA
Output Short-Circuit Duration to Either Supply .........Continuous
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Package Information
6-SOT23
PACKAGE CODE
U6+1
N60F1+1
U8+1
Outline Number
21-0058
90-0175
Land Pattern Number
Thermal Resistance, Four-Layer Board:
Junction to Ambient (θ
)
115°C/W
80°C/W
JA
Junction to Case (θ
)
JC
6-WLP
PACKAGE CODE
Outline Number
21-100174
Land Pattern Number
Refer to Application Note 1891
Thermal Resistance, Four-Layer Board:
Junction to Ambient (θ
)
98.06°C/W
N/A
JA
Junction to Case (θ
)
JC
8-μMAX
PACKAGE CODE
Outline Number
21-0036
90-0092
Land Pattern Number
Thermal Resistance, Single-Layer Board:
Junction to Ambient (θ
)
221°C/W
42°C/W
JA
Junction to Case (θ
)
JC
Thermal Resistance, Four-Layer Board:
Junction to Ambient (θ
)
206.30°C/W
42°C/W
JA
Junction to Case (θ
)
JC
Maxim Integrated
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MAX40079/MAX40087/
MAX40077/MAX40089/
MAX40078
Single/Dual/Quad Ultra-Low
Input Bias Current, Low Noise Amplifiers
Package Information (continued)
8-WLP
PACKAGE CODE
N80C1+1
Outline Number
21-100236
Land Pattern Number
Thermal Resistance, Four-Layer Board:
Refer to Application Note 1891
Junction to Ambient (θ
)
91.72°C/W
N/A
JA
Junction to Case (θ
)
JC
14-TSSOP
PACKAGE CODE
U14M+1
Outline Number
21-0066
90-0113
Land Pattern Number
Thermal Resistance, Single-Layer Board:
Junction to Ambient (θ
)
110°C/W
30°C/W
JA
Junction to Case (θ
)
JC
Thermal Resistance, Four-Layer Board:
Junction to Ambient (θ
)
100.4°C/W
30°C/W
JA
Junction to Case (θ
)
JC
For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”,
“#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing
pertains to the package regardless of RoHS status.
Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board.
For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.
Electrical Characteristics
(V
= +5V, V = 0V, V
= 2.5V, SHDN = V , V
= V /2, R = 10kΩ = tied to V /2, T = -40°C to +125°C, unless otherwise
DD
SS
CM
DD OUT DD L DD A
noted. Typical values are at T = +25°C. (Note 1))
A
PARAMETER
SYMBOL
CONDITIONS
Guaranteed by PSRR test
MIN
2.7
TYP
MAX
5.5
UNITS
Supply Voltage Range
V
V
DD
V
V
V
= 3.3V (T = 25°C only)
A
2.2
2.5
13
2.9
Quiescent Supply Current,
per Amplifier
DD
DD
DD
I
mA
µs
DD
= 5V, over temperature to 125°C
3.8
Power-Up Time
= 0 to 5V step, V
= 2.5V ±1%
OUT
at 25°C
30
350
750
6
Input Offset Voltage
V
µV
OS
Over the full temperature range
Over temperature, to 125°C
Input Offset Drift
V
-TC
0.3
0.3
µV/°C
pA
OS
Input Bias Current (Note 2)
I
260
B
Input Offset Current
(Note 2)
I
0.1
150
pA
OS
Input Resistance
R
1000
GΩ
IN
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MAX40079/MAX40087/
MAX40077/MAX40089/
MAX40078
Single/Dual/Quad Ultra-Low
Input Bias Current, Low Noise Amplifiers
Electrical Characteristics (continued)
(V
= +5V, V = 0V, V
= 2.5V, SHDN = V , V
= V /2, R = 10kΩ = tied to V /2, T = -40°C to +125°C, unless otherwise
DD
SS
CM
DD OUT
DD
L
DD
A
noted. Typical values are at T = +25°C. (Note 1))
A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Input Capacitance
C
Either input, over entire CMIR
7
pF
IN
V
1.5
-
DD
Guaranteed by CMRR test at 25°C
-0.2
Input Common Mode
Range
V
, V
V
IN+ IN-
V
- 1.5
DD
Guaranteed by CMRR test, -40°C to+125°C
-0.1
90
DC, -0.2V <V ,V < V
- 1.5V, at 25°C
- 1.5V, -40°C to
120
IN+ IN-
DD
DC, -0.1V <V ,V < V
IN+ IN-
DD
Common Mode Rejection
Ratio
87
CMRR
+125°C
dB
AC, 100mV at 10kHz, DC in 0V to V
- 2V
PP
DD
60
120
40
range
Power Supply Rejection
Ratio, DC
PSRR
PSRR
DC, 2.7V < V
< 5.5V
90
dB
dB
DD
Power Supply Rejection
Ratio, AC
AC,100mV at 1MHz with V
= 5V DC offset
DD
PP
R = 10KΩ to V /2, V
= 200mV to
L
DD
OUT
90
85
85
120
110
110
V
- 250mV
DD
R = 1kΩ to V /2, V
= 200mV to
= 200mV to
L
DD
OUT
Open-Loop Gain
A
dB
OL
V
- 250mV
DD
R = 50Ω to V /2, V
L
DD
OUT
V
-250mV
DD
R = 10KΩ to V /2 , V
- V
10
80
45
200
300
40
L
DD
DD
DD
OH
Output Voltage Swing High
V
-V
R = 1KΩ to V /2 , V
- V
mV
DD OH
L
DD
DD
OH
(V
)
OH
R = 500Ω to V /2 , V
- V
100
10
L
DD
OH
SS
R = 10KΩ to V /2 , V - V
L
DD
OL
Output Voltage Swing Low
(V
V
R = 1KΩ to V /2 , V - V
SS
50
150
250
mV
mA
OL
L
DD
OL
)
OL
R = 500Ω to V /2 , V - V
80
L
DD
OL
SS
Short-Circuit Current
I
To either V
or V
50
SC
DD
SS
Unity Gain, A = +1 (MAX40079/MAX40077/
V
MAX40078)
10
42
Gain Bandwidth Product
GBWP
MHz
Min Gain version, A = +5 (MAX40087/
V
MAX40089)
Unity Gain version, A = +1
70
80
12
3
V
Phase Margin
Gain Margin
Slew Rate
Φ
°
m
Minimum Gain, A = +5 version
V
GM
SR
dB
Unity Gain version, A = +1
V
V/µs
Minimum Gain, A = +5 version
10
V
Maxim Integrated
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MAX40079/MAX40087/
MAX40077/MAX40089/
MAX40078
Single/Dual/Quad Ultra-Low
Input Bias Current, Low Noise Amplifiers
Electrical Characteristics (continued)
(V
= +5V, V = 0V, V
= 2.5V, SHDN = V , V
= V /2, R = 10kΩ = tied to V /2, T = -40°C to +125°C, unless otherwise
DD
SS
CM
DD OUT
DD
L
DD
A
noted. Typical values are at T = +25°C. (Note 1))
A
PARAMETER
SYMBOL
CONDITIONS
Unity gain version, A = +1, to 0.01%,
MIN
TYP
MAX
UNITS
µs
V
2
V
= 2V step
OUT
Settling Time
Minimum gain, A = +5, to 0.01%,
V
2
V
= 2V step
OUT
Stable Capacitive Load
C
No sustained oscillation
50
1.7
pF
LOAD
Integrated 1/f Input
Voltage Noise
Vn
0.1Hz to 10Hz
µV
PP
f = 10Hz
f = 1kHz
f = 30kHz
260
5.5
4.2
Input Voltage Noise
Density
e
nV/√Hz
fA/√Hz
N
Input Current Noise
density
i
f = 1kHz
0.5
114
103
114
100
108
110
106
110
N
Unity gain, A = +1, V
= 4V
1kHz,
V
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
PP at
R = 10kΩ to GND
L
Unity gain, A = +1, V
V
= 4V at 20kHz,
PP
R = 10kΩ to GND
Total Harmonic Distortion
+ Noise (A = +1 stable)
V
L
THD+N
dB
Unity gain, A = +1, V
V
= 4V at 1kHz,
PP
R = 1kΩ to GND
L
Unity gain, A = +1, V
= 4V at 20kHz,
PP
V
R = 1kΩ to GND
L
Unity gain, A = +5, V
= 4V at 1kHz,
PP
V
R = 10kΩ to GND
L
Unity gain, A = +5, V
V
= 4V at 20kHz,
PP
R = 10kΩ to GND
Total Harmonic Distortion +
Noise (Min A = +5 stable)
V
L
THD+N
EMIRR
dB
dB
Unity gain, A = +5, V
V
= 4V at 1kHz,
PP
R = 1kΩ to GND
L
Unity gain, A = +5, V
= 4V at 20kHz,
PP
V
R = 1kΩ to GND
L
ElectroMagnetic
Interference Rejection
Ratio
V
= 100mV, f = 2400MHz
55
RF_PP
IN
Note 1: Limits are 100% tested at T = +25°C. Limits over the operating temperature range and relevant supply voltage range are
A
guaranteed by design and characterization.
Note 2: Guaranteed by design and bench characterization.
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MAX40079/MAX40087/
MAX40077/MAX40089/
MAX40078
Single/Dual/Quad Ultra-Low
Input Bias Current, Low Noise Amplifiers
Typical Operating Characteristics
V
= +5V, V = 0V, V
= V /2, R = 10kΩ to V /2, C = 10pF to GND, T = +25°C, unless otherwise noted. (T = +25°C, unless
DD
SS
CM
DD
L
DD
L
A
A
otherwise noted.)
SUPPLY CURRENT vs. TEMPERATURE
SUPPLY CURRENT vs. SUPPLY VOLTAGE
OFFSET VOLTAGE HISTOGRAM
toc02
toc01
toc03
10
8
3
2.5
2
2.6
2.55
2.5
TA = 125°C
TA = 85°C
VDD = 3.3V
6
1.5
1
4
2.45
2.4
TA = 25°C
TA = -40°C
2
0.5
0
0
2.35
0
10
20
30
40
50
60
70
80
90 100
1.5
2
2.5
3
3.5
4
4.5
5
5.5
-40 -25 -10
5
20 35 50 65 80 95 110 125
OFFSET VOLTAGE (µV)
SUPPLY VOLTAGE (V)
TEMPERATURE(°C)
INPUT OFFSET VOLTAGE
vs. INPUT COMMON MODE VOTLAGE
INPUT OFFSET VOLTAGE
vs. TEMPERATURE
INPUT BIAS CURRENT
vs. TEMPERATURE
toc04
toc05
toc06
30
20
5
0
50
VDD = 5V
TA = -40°C
40
30
20
10
0
-5
10
-10
-15
-20
-25
-30
-35
-40
TA = 25°C
TA = 85°C
0
-10
-20
-30
-40
-10
-20
TA = 125°C
1.7 2.3
-0.1
0.5
1.1
2.9
3.5
-40 -25 -10
5
20 35 50 65 80 95 110 125
TEMPERATURE (°C)
-40 -25 -10
5
20 35 50 65 80 95 110 125
TEMPERATURE (°C)
INPUT COMMON MODE VOLTAGE (V)
OUTPUT VOLTAGE LOW
vs. OUTPUT SINK CURRENT
VDD = 5V, VSS = 0V
OUTPUT VOLTAGE HIGH
vs. OUTPUT SOURCE CURRENT
INPUT BIAS CURRENT vs.
INPUT COMMON MODE VOLTAGE
VDD = 5V
toc08
toc09
toc07
160
140
120
100
80
140
120
100
80
0.5
0.3
VDD = 5.0V
0.1
60
-0.1
-0.3
-0.5
60
40
40
20
20
0
0
0
2
4
6
8
10
0
2
4
6
8
10
0
0.5
1
1.5
2
2.5
3
3.5
ISINK (mA)
ISOURCE (mA)
INPUT COMMON MODE VOLTAGE (V)
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MAX40079/MAX40087/
MAX40077/MAX40089/
MAX40078
Single/Dual/Quad Ultra-Low
Input Bias Current, Low Noise Amplifiers
Typical Operating Characteristics (continued)
V
= +5V, V = 0V, V
= V /2, R = 10kΩ to V /2, C = 10pF to GND, T = +25°C, unless otherwise noted. (T = +25°C, unless
DD
SS
CM
DD
L
DD
L
A
A
otherwise noted.)
OUTPUT VOLTAGE LOW vs. TEMPERATURE
OUTPUT VOLTAGE HIGH vs. TEMPERATURE
OPEN-LOOP GAIN vs. TEMPERATURE
toc10
toc11
toc12
100
10
1
100
10
1
125
120
115
110
105
100
95
RLOAD = 500Ω
RLOAD = 500Ω
VDD = 5V
RLOAD = 1kΩ
RLOAD = 1kΩ
RLOAD = 10kΩ
VDD = 5.5V
RLOAD = 10kΩ
VDD = 2.7V
VSUPPLY = 5V
VSUPPLY = 5V
-50
0
50
100
150
-50
0
50
100
150
-50
0
50
100
150
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
POWER-SUPPLY REJECTION RATIO
vs. FREQUENCY
INPUT VOLTAGE NOISE 0.1Hz TO 10Hz NOISE
VOLTAGENOISE DENSITY vs. FREQUENCY
toc14
toc15
toc13
2.E-6
2.E-6
1.E-6
5.E-7
0.E+0
-5.E-7
-1.E-6
-2.E-6
-2.E-6
120
110
100
90
80
70
60
50
40
30
20
10
0
0
-20
eN = 1.73µVP-P
-40
-60
-80
-100
-120
1
10
100
1000
10000 100000
0
10
20
30
40
50
60
0.01 0.1
1
10
100 1000 10000 100000
FREQUENCY(Hz)
10s/div
FREQUENCY(kHz)
GAIN AND PHASE vs. FREQUENCY
COMMON MODE REJECTION RATIO
vs. TEMPERATURE
COMMON MODE REJECTION RATIO
vs. FREQUENCY
(RL = 10kΩ, CL = 10pF)
toc17
toc138
toc16
250
200
150
100
50
100
90
80
70
60
50
40
30
20
10
0
140
120
100
80
-20
-30
-40
-50
-60
-70
-80
-90
AV = 1000V/V
VDD = 2.7V
PHASE CURVE IS
REFERRED TO DEGREE
UNITS ON AXIS FAR RIGHT
GAIN
VDD = 5.5V
PHASE
0
60
-50
40
-100
-150
-200
20
-10
0
0.01 0.1
1
10
100 1000 10000 100000
0.01 0.1
1
10
100 1000 10000 100000
-40 -25 -10
5
20 35 50 65 80 95 110 125
TEMPERATURE (°C)
FREQUENCY (kHz)
FREQUENCY(kHz)
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MAX40079/MAX40087/
MAX40077/MAX40089/
MAX40078
Single/Dual/Quad Ultra-Low
Input Bias Current, Low Noise Amplifiers
Typical Operating Characteristics (continued)
V
= +5V, V = 0V, V
= V /2, R = 10kΩ to V /2, C = 10pF to GND, T = +25°C, unless otherwise noted. (T = +25°C, unless
DD
SS
CM
DD
L
DD
L
A
A
otherwise noted.)
GAIN AND PHASE vs. FREQUENCY
TOTAL HARMONIC DISTORTION PLUS NOISE
TOTAL HARMONIC DISTORTION PLUS NOISE
(RL = 10kΩ, CL = 10pF)
vs. FREQUENCY
vs. OUTPUT VOLTAGE SWING
toc20
toc21
toc193
-80
-80
250
200
150
100
50
80
70
60
50
40
30
20
10
0
VOUT = 4 VP-P
fIN = 20kHz
PHASE CURVE IS
REFERRED TO DEGREE
UNITS ON AXIS FAR RIGHT
-90
-100
-110
-120
-90
-100
-110
-120
PHASE
GAIN
0
RL = 1kΩ
RL = 1KΩ
-50
-100
-150
-200
-250
AV = 5V/V or 14dB
RL = 10KΩ
-10
-20
RL = 10kΩ
0.01 0.1
1
10
100 1000 10000 100000
20
200
2000
20000
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
Thousands
FREQUENCY (kHz)
FREQUENCY(Hz)
OUTPUT VOLTAGE SWING (VP-P
)
STABILITY vs. CAPACITIVE AND RESISTIVE
ISOLATION RESISTANCE
vs. CAPACITIVE STABILITY
SMALL-SIGNAL PULSE RESPONSE
(CLOAD= 10pF)
LOAD IN PARALLEL WITH CL
toc23
toc22
100
60
50
40
30
20
10
0
toc24
UNDER THECURVE AS
SHOWN IS UNSTABLEREGION
AV = 5V/V
10
1
IN+
10mV/div
UNSTABLE
STABLE
STABLE
UNSTABLE
OUTPUT
50mV/div
0.1
10
100
1000
10000
100
1000
1µs/div
CAPACITIVE LOAD (pF)
CAPACITIVE LOAD (pF)
LARGE-SIGNAL PULSE RESPONSE
CROSSTALK
vs. FREQUENCY
(CL = 10pF)
toc25
toc26
0
-20
A =5V/V
V
IN+
100mV/div
-40
-60
-80
OUTPUT
500mV/div
-100
-120
10
100
1K
10K 100K 1M
FREQUENCY (Hz)
10M 100M
1µs/div
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MAX40079/MAX40087/
MAX40077/MAX40089/
MAX40078
Single/Dual/Quad Ultra-Low
Input Bias Current, Low Noise Amplifiers
Pin Configurations
TOP VIEW
TOP VIEW
MAX40079/
MAX40087
+
1
2
3
6
5
4
OUTA
VDD
2
1
3
MAX40079
MAX40087
INA+ INA-
A
B
OUTA
VSS
SHDN
INA-
V
SS
VDD
SHDN
INA+
6-WLP
SOT23-6
TOP VIEW
3
1
2
4
+
1
2
3
8
7
6
5
OUTA
INA-
INA+
VSS
VDD
OUTA
INA-
VDD
OUTB
INB-
A
B
OUTB
INB-
INB+
MAX40077/
MAX40089
MAX40077/MAX40089
INA+
VSS
INB+
4
WLP
µMAX
TOP VIEW
+
14 OUTD
1
2
3
4
5
6
7
OUTA
INA-
13
IND-
12
11
10
9
INA+
IND+
VSS
MAX40078
VDD
INB+
INB-
INC+
INC-
OUTC
8
OUTB
TSSOP
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MAX40079/MAX40087/
MAX40077/MAX40089/
MAX40078
Single/Dual/Quad Ultra-Low
Input Bias Current, Low Noise Amplifiers
Pin Description
PIN
NAME
FUNCTION
SOT23-6
6-WLP
8-WLP
8-ΜMAX 14-TSSOP
1
A3
A1
1
1
OUTA
Output, Channel A
Negative Power Supply Input. Connect V to 0V
SS
2
B3
B3
4
11
V
SS
in single-supply application.
Non-Inverting Input, Channel A
Inverting Input, Channel A
3
4
A1
A2
B2
B1
3
2
3
2
INA+
INA-
Shutdown. Pull high for normal operation and low
for shutdown
5
B1
—
—
—
SHDN
6
B2
—
—
—
—
—
—
—
—
—
A2
B4
A4
A3
—
—
—
—
—
—
8
5
4
5
V
Positive Power Supply Voltage Input
Noninverting Input, Channel B
Inverting Input, Channel B
Output, Channel B
DD
—
—
—
—
—
—
—
—
—
INB+
INB-
6
6
7
7
OUTB
INC+
INC-
—
—
—
—
—
—
10
9
Noninverting Input, Channel C
Inverting Input, Channel C
Output, Channel C
8
OUTC
IND+
IND-
12
13
14
Noninverting Input, Channel D
Inverting Input, Channel D
Output, Channel D
OUTD
Functional Diagram
Internal ESD Protection
V
DD
60Ω
IN-
MAX40079
MAX40087
OUT
½ MAX40077
½ MAX40089
IN+
60Ω
SHDN
V
SS
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MAX40079/MAX40087/
MAX40077/MAX40089/
MAX40078
Single/Dual/Quad Ultra-Low
Input Bias Current, Low Noise Amplifiers
Low Distortion
Detailed Description
Many factors can affect the noise and distortion
performance of the amplifier based on the design choices
made. The following guidelines offer valuable information
on the impact of design choices on total harmonic distortion
(THD). Choosing correct feedback and gain resistor
values for a particular application can be a very important
factor in reducing THD. In general, the smaller the closed-
loop gain, the smaller the THD generated, especially
when driving heavy resistive loads (in other words, smaller
resistive load with higher output current). Operating the
device near or above the full-power bandwidth significantly
degrades distortion.
The
MAX40079/MAX40087/MAX40077/MAX40089/
MAX40078 single/dual/quad channel operational amplifiers
feature ultra-low noise and distortion. Their low distortion
and low noise make them ideal for use as pre-amplifiers
in wide dynamic range applications, such as 16-bit analog-
to-digital converters. Their high input impedance and low
noise are also useful for signal conditioning of high-impedance
sources, such as piezoelectric transducers.
These devices have true rail-to-rail output operation, drive
output resistive loads as low as 1kΩ while maintaining DC
accuracy and can drive capacitive loads up to 200pF without
any oscillation. The input common-mode voltage range
Referencing the load to either supply also improves the
amplifier distortion performance, because only one of the
MOSFETs of the push-pull output stage drives the output.
Referencing the load to mid-supply increases the amplifier
distortion for a given load and feedback setting (See the
Total Harmonic Distortion vs. Frequency graph in the
Typical Operating Characteristics).
extends from 0.2V below V
pull output stage maintains excellent DC characteristics,
while delivering up to ±20 mA of source/sink output current.
to (V
- 1.5V). The push-
SS
DD
The MAX40079/MAX40079/MAX40078 are single/dual/
quad respectively that are unity-gain stable, while the
MAX40087/MAX40089, single/dual respectively are
decompensated version having higher slew rate and are
stable for Gain ≥ 5V/V. The MAX40079/MAX40087 single
channel op amps feature a low-power shutdown mode,
which reduces the supply current to 0.1μA and places
amplifiers outputs into a high impedance state.
For gains ≥ 5V/V, the de-compensated MAX40087/
MAX40089 deliver the best distortion performance as they
have a higher slew rate and provide a higher amount of
loop gain for a given closed-loop gain setting. Capacitive
loads below 100pF do not significantly affect distortion
results. Distortion performance is relatively constant over
supply voltages.
Low Noise
The amplifiers input-referred voltage noise density is
dominated by flicker noise(also known as 1/f noise)
at lower frequencies and by thermal noise at higher
frequencies. Overall thermal noise contribution is affected
by the parallel combination of resistive feedback network
Input Protection
As per Functional Diagram, when voltage on either of the
inputpinsgoesuporbelowV orV bymorethanadiode
DD
SS
voltage drop, ESD diodes begin to turn-on/forward bias
and large amount of current flow through these diodes. If
op amp inputs in certain applications are subject to these
over-voltage conditions, insert a series current limiting 50
ohm resistors on either inputs. However, note that DC
precision of the system be affected due to these series resistors
and also thermal noise of these resistors need to be considered
while making noise analysis of the entire circuit.
(R ||R ) depicted in Figure 1. These resistors should be
F
G
reduced in cases where system bandwidth is large and
thermal noise is dominant. Noise contribution factor can
be reduced with increased gain settings.
For example, the input noise voltage density (e ) of the
N
circuit with R = 100kΩ, R = 10kΩ with Gain = 11V/V
F
G
non-inverting configuration is e = 12nV/√Hz.
N
e
can be reduced to 6nV/√Hz by choosing R = 10kΩ,
F
N
An input differential protection scheme is used (refer to
FunctionalDiagram)thatprotectthedeviceifthereisalarge
differential voltage applied across input pins. A series of
60Ω resistors are used in conjunction with a pair of back
to back diodes that turn on in an event of differential
voltage beyond a diode drop. A pair of 60Ω resistors limit
current flowing through these diodes so that the current is
limited below abs max rating of ±20mA.
smaller R = 1kΩ compared to 10kΩ with still same Gain
G
= 11V/V but at the expense of higher current consumption
and higher distortion. Noise of this circuit is effectively
reduced due to smaller value of R that dominates
G
system noise.
Having a Gain of 101V/V with R = 100kΩ, R = 1kΩ,
F
G
input referred voltage noise density is still a low 6nV/√Hz
as the noise dominating resistor R remained the same.
G
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MAX40079/MAX40087/
MAX40077/MAX40089/
MAX40078
Single/Dual/Quad Ultra-Low
Input Bias Current, Low Noise Amplifiers
Using a slightly smaller C than suggested by the formula
Z
above achieves a higher bandwidth at the expense of
reduced phase and gain margin. As a general guideline,
V
= 5V
DD
consider using C for cases where R ||R is greater than
Z
G
F
20kΩ (for MAX40079/MAX40077/MAX40078) and greater
than 5kΩ (for MAX40087/MAX40089).
IN+
IN-
V
OUT
MAX40079/
½MAX40077
Applications Information
V
IN
The
MAX40079/MAX40087/MAX40077/MAX40089/
MAX40078 family of op amps combine good driving
capability that can also support ground/low-side sensing
input and rail-to-rail output operation. With their low distor-
tion and low noise, they are ideal for use in ADC buffers,
DAC output buffers, medical instrumentation systems and
other noise-sensitive applications.
SHDN =5V
V
= 0V
SS
R
C
R
F
G
Z
However, there are two main application areas where
these ultra-low input bias current op amps find place and
they are to measure high impedance measurements.
High Impedance measurements can be interfacing either
Current output sensors or voltage output sensors that
would need very high output resistance to be interfaced
with. These op amps offer just that as the input imped-
ance of these amplifiers is in the range of 1000GΩ.
Figure 1. Adding Feed-Forward Compensation
Since there is a differential protection scheme used in
these family of op amps, these amplifiers cannot be used
as comparators in open loop, which is often a possibility
on an unused channel of op amp.
Using a Feed-Forward Compensation
Capacitor, C
Voltage output sensors readout can be accomplished with
unity gain buffer configuration and current output sensors
like photo-diodes current read out can be accomplished
in transimpedance amplifier configuration discussed later
in this data sheet.
Z
The amplifier’s input capacitance is 7pF and if the
resistance seen by the inverting input is large (Figure
1) as a result of feedback network, this resistance and
capacitance combination can introduce a pole within the
amplifier’s bandwidth resulting in reduced phase margin.
Compensate the reduced phase margin by introducing
Ground-Sensing and Rail-to-Rail Outputs
The common-mode input range of these devices extends
below ground over temperature that offers excellent com-
mon mode rejection and can be used in low side current
sensing applications. These devices are guaranteed not
to undergo phase reversal when the input is overdriven
over input common mode voltage range as shown in
Figure 2.
a feed-forward capacitor (C ) between the inverting
input and the output (shown in Figure 1). This effectively
cancels the pole from the inverting input of the amplifier.
Z
Choose the value of C as follows:
Z
C = 10 x (R /R ) [pF]
Z
F
G
Intheunity-gainstable:MAX40079/MAX40077/MAX40078,
the use of correct value C is most important for closed
Z
Figure 3 showcases the true rail-to-rail output operation of
loop non-inverting gain A = +2V/V, and inverting gain A
V
V
the amplifier, configured with A = 5V/V. The output swings
V
= -1V/V.
to within 8mV of the supplies with a 10kΩ load, making the
In the de-compensated MAX40087/MAX40089, C is
devices ideal in low-supply voltage applications.
Z
most important for closed loop gain A = +10V/V.
V
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MAX40079/MAX40087/
MAX40077/MAX40089/
MAX40078
Single/Dual/Quad Ultra-Low
Input Bias Current, Low Noise Amplifiers
Figure 2. Scope Plot Showing Overdriven Input with No Phase
Reversal
Figure 3. Rail-to-Rail Output Operation with 10kΩ
RSERIES
IP
IP
CJ
RSHUNT
CJ
SIMPLIFIED EQUIVALENT
CIRCUIT
PHOTODIODE
EQUIVALENT CIRCUIT
Figure 4. Photodiode Equivalent Circuit Showing Parasitics
photo-voltaic mode with buffered reference. This enables
negligible reverse-voltage across the photodiode which
ensures little to no dark current. A typical bias point of
100mV–200mV may be used to ensure the output of
amplifier to be in linear range. Because of the nature of
photo-diode in photo-voltaic modes, the input capaci-
tance is more as compared to photo-conductive mode.
Therefore, this mode is chosen for slower to moderate
photo-diode current applications but this methodology
provides high linearity, better accuracy and low noise
performance.
Typical Application Circuit
Extremely Low-Leakage Op Amp (~50fA) Used as
Transimpedance Amplifier
The ultra-low input bias current and low noise profile
makes it an excellent choice for high impedance applica-
tions. It should be noted that unity gain stable is not a
requirement for TIA applications. MAX40087/MAX40089
with increased GBW of 42MHz (min A ≥ 5V/V) may also
be an option.
V
Figure 6 shows a transimpedance amplifier using
MAX40077 suited for low to moderate TIA applications in
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MAX40079/MAX40087/
MAX40077/MAX40089/
MAX40078
Single/Dual/Quad Ultra-Low
Input Bias Current, Low Noise Amplifiers
Photodiode Equivalent Circuit (Figure 4):
is required to add a zero to compensate for the phase
shift. To learn more about Trans-impedance amplifier
stabilization, please refer to the app note: AN5129:
Stabilize your Transimpedance Amplifier.
I
P
is current flowing through photodiode proportional to
intensity of light on photodiode sensor
C is the junction input capacitance of the photodiode
J
For a critically damped system the f
=
-3dB
R
R
is the internal shunt resistance of the photodiode
is the internal series resistance of the photodiode
SHUNT
SERIES
and the value of C1
(GBW (2 x π x R1 x (C1 + CJ))
/
√
=
.
(CJ 2 x π x R1 x GBW)
/
where
V
= I x R1
√
OUT
P
When using MAX40087 de-compensated Op-Amp, care
where same equation still applies
V
= I x R1
P
OUT
must be taken that the noise gain (1 + C /C1) at higher
J
frequencies is higher than gain of 5V/V in order to stabilize
the TIA.
The input capacitance of the diode can destabilize the
amplifier when choosing R1 in such a way that 1/(2 x π x
R1 x C ) < GBW of the op amp. A feedback capacitance
Noise Consideration: choosing lower R1 will provide lower
transimpedance and higher BW, but this may result in
higher noise as the signal reduces by a factor of R1 and
noise reduces by factor of √R1.
J
C1
The noise contribution of R1 can be reduced by increasing
the C1 value, but this lowers the bandwidth. A careful
trade-off must be done to improve the signal-to-noise
ratio (SNR).
R1
5V
Output Buffering of an Un-Buffered DAC:
D1
5V
MAX40079
The Figure 7 shows the single MAX40079 configured as
an output buffer for the MAX5541 16-bit DAC. Because
the MAX5541 has an unbuffered voltage output, the
input bias current of the op amp used must be less than
6nA to maintain 16-bit accuracy. This family of amplifiers
have an input bias current of only 160pA (max) over
temperature, virtuallyeliminatingthisasasourceoferror. In
addition, the MAX40079 has excellent open loop gain and
common-mode rejection, making this an excellent output
buffer amplifier.
R2
R3
Figure 5. Single-Supply Transimpedance Amplifier Configuration
with Single-Channel Op Amp
C1
R1
5V
5V
½
½
D1
MAX40077
MAX40077
R2
R3
Figure 6. Single-Supply Transimpedance Amplifier Configuration with Dual-Channel Op Amp
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MAX40078
Single/Dual/Quad Ultra-Low
Input Bias Current, Low Noise Amplifiers
V
=5V
DD
V
=2.5V
REF
DD
V =5V
DD
V
CS
REF
IN+
IN-
MAX5541
OUT
AGND
SERIAL
INTERFACE
0V TO +2.5V
OUTPUT
SCLK
MAX40079
DIN DGND
SHDN =5V
V
=0V
SS
Figure 7. DAC Output Buffering with Op Amp
cleaning in bath is highly recommended. Once the bath is
completed, it can be dried up either at room temperature
for several hours or placing the cleaned up PCB in an
oven at elevated temperature for quick usage.
Capacitive Load Stability
The MAX40079 family of op amps drive up to 50pF in
all configurations without any oscillation. Driving higher
capacitive loads than 50pF might lead to oscillation in
certain configurations due to reduction in phase margin
and it can be seen as overshoot and undershoot with a
step response on oscilloscope. If the application demands
for the op amp to drive more than 50pF capacitive loads,
it is recommended to add a series isolation resistor of
10-50Ω on the op amp output before capacitive load. Size
of this resistor depends on the amount of capacitive load
op amp is driving. Please refer to Isolation Resistance
vs. Capacitive Stability graph in Typical Operating
Characteristics for more information on resistance sizing.
Power Supplies and Layout
The
MAX40079/MAX40087/MAX40077/MAX40089/
MAX40078 op amps operate from a single +2.7V to
+5.5V power supply or from dual supplies of ±1.35V to
±2.75V. For single-supply operation, bypass the V
power
DD
supply pin with a 0.1μF ceramic capacitor placed close to
the V pin. If operating from dual supplies, bypass both
DD
V
and V
supply pins with 0.1μF ceramic capacitor
DD
SS
to ground. If additional decoupling is needed add another
4.7μF or 10μF where supply voltage is applied on PCB.
This series isolation resistance is very useful in unity gain
buffer configuration when full scale signal output swing is
used as the unity gain configuration is the worst case for
stability while driving capacitive loads.
Good layout improves performance by decreasing
the amount of stray capacitance and noise at the op
amp inputs and output. To decrease stray capacitance,
minimize PC board trace lengths and resistor leads, and
place external components close to the op amp’s pins.
Flux and Solder Contaminant Removal
Upon soldering process of the op amp on the PCB,
remains of solder flux is a major performance degrading
factor in measuring ultra-low input bias currents in the
order of 50fA. Solvents like isopropyl alcohol (IPA) are
effective in cleaning up solder flux contaminants. Upon
clearly rubbing off the solder flux areas with IPA, ultrasonic
Guard rings and Shielding is highly recommended to
guard the high impedance input traces against input leak-
age current. Refer to MAX40077 EV kit data sheet for
more information on this. This is accomplished using a
Triax connector and drving it's guard to the same potential
as the signal on high impedance input.
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MAX40079/MAX40087/
MAX40077/MAX40089/
MAX40078
Single/Dual/Quad Ultra-Low
Input Bias Current, Low Noise Amplifiers
Ordering Information
NUMBER OF
CHANNELS
[GAIN BANDWIDTH
PRODUCT IN MHZ]
PART NUMBER
TEMP RANGE
PIN-PACKAGE
[STABLE GAIN V/V]
MAX40079ANT+T*
MAX40079AUT+T
MAX40087ANT+T*
MAX40087AUT+T
MAX40077ANT+T*
MAX40077AUA+T*
MAX40089ANT+T*
MAX40089AUA+T
MAX40078AUD+T*
Single
Single
Single
Single
Dual
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
6-WLP
6-SOT23
6-WLP
1
1
5
5
1
1
5
5
1
10
10
42
42
10
10
42
42
10
6-SOT23
8-WLP
Dual
μMAX-8
8-WLP
Dual
Dual
μMAX-8
14 TSSOP
Quad
*Denotes Future Product-Contact Maxim for availability
+Denotes a lead(Pb)-free/RoHS-compliant package.
T = Denotes tape-and-reel.
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MAX40079/MAX40087/
MAX40077/MAX40089/
MAX40078
Single/Dual/Quad Ultra-Low
Input Bias Current, Low Noise Amplifiers
Revision History
REVISION REVISION
PAGES
CHANGED
DESCRIPTION
NUMBER
DATE
0
1
1/18
Initial release
Updated Electrical Characteristics and Ordering Information tables
—
3/18
3, 4, 6, 8, 16
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
©
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
2018 Maxim Integrated Products, Inc.
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