MAX4030EESA [MAXIM]
Low-Cost, 144MHz, Dual/Triple Op Amps with ±15kV ESD Protection;
| 型号： | MAX4030EESA |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | Low-Cost, 144MHz, Dual/Triple Op Amps with ±15kV ESD Protection |
| 文件： | 总12页 (文件大小：392K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
19-3570; Rev 1; 6/05
Low-Cost, 144MHz, Dual/Triple Op Amps
with 1ꢀ5k EꢁD ꢂrotection
General Description
Features
The MAX4030E/MAX4031E unity-gain stable op amps
combine high-speed performance, rail-to-rail outputs,
and ±1ꢀ5k EꢁS protectionꢂ Targeted for applications
where an input or an output is exposed to the outside
world, such as video and communications, these
devices are compliant with International EꢁS
ꢁtandards: ±1ꢀ5k IEꢃ 1000-4-ꢄ Air-ꢅap Sischarge,
±±5k IEꢃ 1000-4-ꢄ ꢃontact Sischarge, and the ±1ꢀ5k
Human Body Modelꢂ
♦ ESD-Protected Video Inputs and Outputs
±±15V ꢀ ꢁuꢂan ꢃodꢄ ꢅodeꢆ
±ꢇ5V ꢀ IEꢈ ±ꢉꢉꢉ-ꢊ-ꢋ ꢈontact Discꢌarꢍe
±±15V ꢀ IEꢈ ±ꢉꢉꢉ-ꢊ-ꢋ ꢎir-ꢏap Discꢌarꢍe
♦ 1V Sinꢍꢆe-Suppꢆꢄ Operation
♦ ꢉ.±µꢎ Low-Power Sꢌutdown ꢅode (ꢅꢎXꢊꢉ3±E)
♦ Input ꢈoꢂꢂon-ꢅode Ranꢍe Extends to ꢏround
The MAX4030E/MAX4031E operate from a single ꢀk
supply and consume only 1ꢄmA of quiescent supply
current per amplifier while achieving a 144MHz -3dB
bandwidth, ꢄ0MHz 0ꢂ1dB gain flatness, and a 11ꢀk/µs
slew rateꢂ The MAX4031E provides individual shutdown
control for each of the amplifiersꢂ
♦ ꢋV
Larꢍe-Siꢍnaꢆ -3dꢃ ꢃW > 1ꢉꢅꢁz
P-P
♦ Directꢆꢄ Drives ±1ꢉ Loads
♦ Low Differentiaꢆ ꢏain/Pꢌase: ꢉ.ꢋ%/ꢉ.ꢋ°
♦ -ꢊꢉ°ꢈ to +ꢇ1°ꢈ Extended Teꢂperature Ranꢍe
®
♦ ꢈoꢂpact ꢇ-Pin µꢅꢎX and ±ꢊ-Pin TSSOP
The dual MAX4030E is available in ±-pin µMAX and ꢁO
pac5ages, and the triple MAX4031E is available in 14-pin
TꢁꢁOP and ꢁO pac5agesꢂ All devices are specified over
the -40°ꢃ to +±ꢀ°ꢃ extended temperature rangeꢂ
Pac5aꢍes
Applications
Noteboo5s
Ordering Information
ꢁet-Top Boxes
PꢎRT
TEꢅP RꢎNꢏE
-40°ꢃ to +±ꢀ°ꢃ
-40°ꢃ to +±ꢀ°ꢃ
-40°ꢃ to +±ꢀ°ꢃ
-40°ꢃ to +±ꢀ°ꢃ
PIN-PꢎꢈKꢎꢏE
± µMAX
ꢁtandard Sefinition
Television (ꢁSTk)
Projectors
ꢅꢎXꢊꢉ3ꢉEEUA
MAX4030EEꢁA
ꢅꢎXꢊꢉ3±EEUS
MAX4031EEꢁS
ꢁecurity kideo ꢁystems
ꢃamcorders
± ꢁO
Enhanced Television
(ETk)
14 TꢁꢁOP
14 ꢁO
Sigital ꢁtill ꢃameras
Portable SkS Players
High-Sefinition
Television (HSTk)
µMAX is a registered trademark of Maxim Integrated Products, Inc.
ꢂin Configurations
Typical Operating Circuit
5V
TOP VIEW
0.1 F
MAX4030E
MAX4031E
IN_+
75
SHDNA
SHDNC
SHDNB
1
2
3
4
5
6
7
14 OUTC
13 INC-
12 INC+
11 GND
10 INB+
OUTA
INA-
INA+
GND
1
2
3
4
8
7
6
5
V
CC
75
OUT
OUTB
INB-
Z = 75
o
MAX4030E
V
MAX4031E
CC
75
INB+
INA+
INA-
9
8
INB-
ꢅꢎX/SO
200
OUTA
OUTB
200
TSSOP/SO
VIDEO LINE DRIVER
________________________________________________________________ Maxim Integrated Products
±
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Low-Cost, 144MHz, Dual/Triple Op Amps
with 1ꢀ5k EꢁD ꢂrotection
ꢎꢃSOLUTE ꢅꢎXIꢅUꢅ RꢎTINꢏS
(All voltages referenced to ꢅNS, unless otherwise notedꢂ)
14-Pin TꢁꢁOP (derate 9ꢂ1mW/°ꢃ above +70°ꢃ) ꢂꢂꢂꢂꢂꢂꢂꢂꢂ7ꢄ7mW
k
ꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂ-0ꢂ3k to +6k
14-Pin ꢁO (derate ±ꢂ3mW/°ꢃ above +70°ꢃ)ꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂ667mW
Operating Temperature Range ꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂ-40°ꢃ to +±ꢀ°ꢃ
Junction Temperature ꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂ+1ꢀ0°ꢃ
ꢁtorage Temperature Rangeꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂ-6ꢀ°ꢃ to +1ꢀ0°ꢃ
Lead Temperature (soldering, 10s) ꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂ+300°ꢃ
ꢃꢃ
IN_-, IN_+, OUT_, SHDN_ ꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂ-0ꢂ3k to (k
ꢃurrent into IN_-, IN_+, SHDNꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂ±ꢄ0mA
Output ꢁhort-ꢃircuit Suration to k or ꢅNSꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢃontinuous
+ 0ꢂ3k)
ꢃꢃ
ꢃꢃ
A
ꢃontinuous Power Sissipation (T = +70°ꢃ)
±-Pin µMAX (derate 4ꢂꢀmW/°ꢃ above +70°ꢃ)ꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂ36ꢄmW
±-Pin ꢁO (derate ꢀꢂ9mW/°ꢃ above +70°ꢃ)ꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂꢂ471mW
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Dꢈ ELEꢈTRIꢈꢎL ꢈꢁꢎRꢎꢈTERISTIꢈS
(k
= ꢀk, k
= 0k, k
= k /ꢄ, SHDN_ = k , R = to k /ꢄ, T = T
to T
, unless otherwise notedꢂ Typical values are
MAX
ꢃꢃ
ꢃM
OUT_
ꢃꢃ
ꢃꢃ
L
ꢃꢃ
A
MIN
at T = +ꢄꢀ°ꢃꢂ) (Note 1)
A
PꢎRꢎꢅETER
SYꢅꢃOL
ꢈONDITIONS
ꢅIN
TYP
ꢅꢎX UNITS
Operating ꢁupply koltage Range
Quiescent ꢃurrent (per Amplifier)
ꢁhutdown ꢃurrent (per Amplifier)
k
ꢅuaranteed by PꢁRR
4ꢂꢀ
ꢀꢂꢀ
ꢄꢄ
10
k
ꢃꢃ
ꢃꢃ
I
1ꢄ
mA
µA
I
SHDN_ = ꢅNS (MAX4031E)
0ꢂ1
ꢁHSN
k
ꢄꢂꢄꢀ
-
ꢃꢃ
Input ꢃommon-Mode koltage
Input Offset koltage
k
ꢅuaranteed by ꢃMRR
0
k
ꢃM
T
T
= +ꢄꢀ°ꢃ
ꢀ
13
A
A
k
mk
Oꢁ
= -40°ꢃ to +±ꢀ°ꢃ
ꢄ6
Input Offset koltage Matching
Input Offset koltage Tempco
Input Bias ꢃurrent
k
ꢄꢂ6
31
mk
µk/°ꢃ
µA
Oꢁ
Tꢃ
kOꢁ
I
0ꢂ01
0ꢂ01
1
1
B
Input Offset ꢃurrent
I
µA
Oꢁ
Input Resistance
R
ꢅ
IN
ꢃommon-Mode Rejection Ratio
Power-ꢁupply Rejection Ratio
ꢃMRR
PꢁRR
ꢅNS
4ꢂꢀk
0ꢂꢀk
0ꢂ6k
0ꢂ4k
k
k
- ꢄꢂꢄꢀk
ꢃꢃ
ꢀ0
40
70
dB
ꢃM
k
k
k
k
ꢀꢂꢀk
4ꢂꢀk, R = ꢄ5 to k /ꢄ
60
dB
ꢃꢃ
±0
OUT_
OUT_
OUT_
L
ꢃꢃ
Open-Loop ꢅain
A
4ꢂ4k, R = 1ꢀ0 to k /ꢄ
ꢀ0
ꢀ0
70
dB
k
kOL
L
ꢃꢃ
3ꢂꢀk, R = 1ꢀ0 to ꢅNS
70
L
k
k
k
k
k
k
- k
0ꢂ0ꢀ
0ꢂ0ꢀ
0ꢂ1ꢀ
0ꢂ1ꢀ
0ꢂ3
ꢃꢃ
OL
ꢃꢃ
OL
ꢃꢃ
OL
OH
R = ꢄ5 to k /ꢄ
L
ꢃꢃ
- ꢅNS
- k
0ꢂ4
0ꢂ4
OH
Output koltage ꢁwing
k
R = 1ꢀ0 to k /ꢄ
L ꢃꢃ
OUT_
- ꢅNS
- k
0ꢂ±
OH
R = 1ꢀ0 to ꢅNS
L
- ꢅNS
0ꢂ01
±100
0ꢂ0ꢀ
Output ꢁhort-ꢃircuit ꢃurrent
I
ꢁin5ing or sourcing
MAX4031E
mA
k
ꢁꢃ
k
0ꢂ±
IL
IH
IL
SHDN_ Logic Threshold
k
MAX4031E
ꢄꢂ0
I
SHDN_ = ꢅNS (MAX4031E)
SHDN_ = k (MAX4031E)
0ꢂ10
0ꢂ10
10
10
SHDN_ Logic Input ꢃurrent
µA
I
IH
ꢃꢃ
ꢋ
_______________________________________________________________________________________
Low-Cost, 144MHz, Dual/Triple Op Amps
with 1ꢀ5k EꢁD ꢂrotection
Dꢈ ELEꢈTRIꢈꢎL ꢈꢁꢎRꢎꢈTERISTIꢈS (continued)
(k
= ꢀk, k
= 0k, k
= k /ꢄ, SHDN_ = k , R = to k /ꢄ, T = T
to T
, unless otherwise notedꢂ Typical values are
MAX
ꢃꢃ
ꢃM
OUT_
ꢃꢃ
ꢃꢃ
L
ꢃꢃ
A
MIN
at T = +ꢄꢀ°ꢃꢂ) (Note 1)
A
PꢎRꢎꢅETER
SYꢅꢃOL
ꢈONDITIONS
ꢅIN
TYP
0ꢂ1
ꢅꢎX UNITS
Sisabled Output Lea5age ꢃurrent
I
SHDN_ = ꢅNS (MAX4031E)
Human Body Model
10
µA
OUT_ꢁH
±1ꢀ
±±
EꢁS Protection koltage (Note ꢄ)
IEꢃ 1000-4-ꢄ ꢃontact Sischarge
IEꢃ 1000-4-ꢄ Air-ꢅap Sischarge
5k
±1ꢀ
ꢎꢈ ELEꢈTRIꢈꢎL ꢈꢁꢎRꢎꢈTERISTIꢈS
(k
= ꢀk, k
= 1ꢂꢀk, R = 1ꢀ0 to ꢅNS, SHDN_ = k , A
= +ꢄk/k, T = +ꢄꢀ°ꢃ, unless otherwise notedꢂ)
ꢃꢃ
ꢃM
L
ꢃꢃ kꢃL_ A
PꢎRꢎꢅETER
SYꢅꢃOL
ꢈONDITIONS
= 100mk , A = +1k/k
ꢅIN
TYP
144
ꢀ3
ꢀꢄ
40
ꢄ0
10
ꢄ0
9
ꢅꢎX
UNITS
k
k
k
k
k
k
k
k
k
k
OUT_
OUT_
OUT_
OUT_
OUT_
OUT_
OUT_
OUT_
OUT_
OUT_
P-P kꢃL
ꢁmall-ꢁignal -3dB Bandwidth
Large-ꢁignal -3dB Bandwidth
ꢁmall-ꢁignal 0ꢂ1dB ꢅain Flatness
Large-ꢁignal 0ꢂ1dB ꢅain Flatness
BW
MHz
ꢁꢁ
Lꢁ
= 100mk , A
= +ꢄk/k
P-P kꢃL
= ꢄk , A
= +1k/k
P-P kꢃL
BW
MHz
MHz
MHz
= ꢄk , A
= +ꢄk/k
P-P kꢃL
= 100mk , A
= +1k/k
= +ꢄk/k
P-P kꢃL
BW
BW
0ꢂ1dBꢁꢁ
= 100mk , A
P-P kꢃL
= ꢄk , A
= +1k/k
P-P kꢃL
0ꢂ1dBLꢁ
ꢁR
= ꢄk , A
= +ꢄk/k
P-P kꢃL
ꢁlew Rate
= ꢄk step
= ꢄk step
11ꢀ
40
6ꢀ
0ꢂꢄ
0ꢂꢄ
±
k/µs
ns
ꢁettling Time to 0ꢂ1%
ꢃhannel-to-ꢃhannel Isolation
Sifferential Phase Error
Sifferential ꢅain Error
Input ꢃapacitance
ꢃapacitive-Load ꢁtability
Output Impedance
Enable Time
t
ꢁ
ꢃH
f = 4ꢂ43MHz
NTꢁꢃ, R = 1ꢀ0 to ꢅNS, A
dB
IꢁO
SP
Sꢅ
= +ꢄk/k
= +ꢄk/k
Segrees
%
L
kꢃL
kꢃL
NTꢁꢃ, R = 1ꢀ0 to ꢅNS, A
L
ꢃ
pF
IN
No sustained oscillations
f = 4ꢂ43MHz
ꢄ00
ꢄ
pF
Z
OUT
t
k
k
= 1k (MAX4031E)
= 1k (MAX4031E)
ꢄ
µs
µs
ON
IN_
IN_
Sisable Time
t
0ꢂ1ꢀ
OFF
Note ±: All devices are 100% production tested at T = +ꢄꢀ°ꢃꢂ ꢁpecifications over temperature limits are guaranteed by designꢂ
A
Note ꢋ: EꢁS protection is specified for test point A and test point B only (Figure 7)ꢂ
_______________________________________________________________________________________
3
Low-Cost, 144MHz, Dual/Triple Op Amps
with 1ꢀ5k EꢁD ꢂrotection
Typical Operating Characteristics
(k
ꢃꢃ
= ꢀk, k
= 1ꢂꢀk, A
= +ꢄk/k, R = 1ꢀ0 to k /ꢄ, T = +ꢄꢀ°ꢃ, unless otherwise notedꢂ)
ꢃM
kꢃL
L
ꢃꢃ
A
SMALL-SIGNAL GAIN FLATNESS
vs. FREQUENCY
SMALL-SIGNAL GAIN vs. FREQUENCY
LARGE-SIGNAL GAIN vs. FREQUENCY
0.5
0.4
5
4
4
3
V
OUT
= 2V
P-P
V
OUT
= 100mV
P-P
V
= 100mV
P-P
OUT
0.3
3
2
0.2
2
1
0.1
1
0
0
0
-1
-2
-3
-4
-5
-6
-0.1
-0.2
-0.3
-0.4
-0.5
-1
-2
-3
-4
-5
0.1
1
10
100
0.1
1
10
100
0.1
1
10
100
1000
FREQUENCY (MHz)
FREQUENCY (MHz)
FREQUENCY (MHz)
LARGE-SIGNAL GAIN FLATNESS
vs. FREQUENCY
OUTPUT IMPEDANCE vs. FREQUENCY
DISTORTION vs. FREQUENCY
1000
100
10
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
0.5
0.4
V
= 2V
V
A
= 2V
OUT
P-P
OUT
P-P
= 2V/V
VCL
0.3
0.2
0.1
2ND HARMONIC
0
1
-0.1
-0.2
-0.3
-0.4
-0.5
3RD HARMONIC
0.1
0.01
0.1
1
10
100
0.1
1
10
100
0.1
1
10
100
1000
FREQUENCY (MHz)
FREQUENCY (MHz)
FREQUENCY (MHz)
POWER-SUPPLY REJECTION
vs. FREQUENCY
COMMON-MODE REJECTION
vs. FREQUENCY
DIFFERENTIAL GAIN
0
-20
0.2
0.1
0
0
-20
-0.1
-0.2
-40
-40
1st
2nd
3rd
4th
5th
6th
DIFFERENTIAL PHASE
-60
-60
0.2
0.1
0
-80
-80
-0.1
-0.2
-100
-100
0.1
1
10
100
1st
2nd
3rd
4th
5th
6th
0.01
0.1
1
10
100
FREQUENCY (MHz)
FREQUENCY (MHz)
ꢊ
_______________________________________________________________________________________
Low-Cost, 144MHz, Dual/Triple Op Amps
with 1ꢀ5k EꢁD ꢂrotection
Typical Operating Characteristics (continued)
(k
ꢃꢃ
= ꢀk, k
= 1ꢂꢀk, A
= +ꢄk/k, R = 1ꢀ0 to k /ꢄ, T = +ꢄꢀ°ꢃ, unless otherwise notedꢂ)
kꢃL L ꢃꢃ A
ꢃM
OUTPUT VOLTAGE SWING
vs. RESISTIVE LOAD
SMALL-SIGNAL PULSE RESPONSE
LARGE-SIGNAL PULSE RESPONSE
MAX4030 toc12
MAX4030 toc11
0.50
0.45
0.40
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0
V
IN
V
IN
20mV/div
500mV/div
V
OL
V
OUT
V
OUT
1V/div
50mV/div
V
- V
OH
CC
0
50 100 150 200 250 300 350 400
20ns/div
20ns/div
RESISTIVE LOAD (
)
ISOLATION RESISTANCE
vs. CAPACITIVE LOAD
CROSSTALK vs. FREQUENCY
20
18
16
14
12
10
8
0
-20
-40
-60
6
4
-80
2
0
0
-100
100
200
300
400
500
0.1
1
10
100
CAPACITIVE LOAD (pF)
FREQUENCY (MHz)
_______________________________________________________________________________________
1
Low-Cost, 144MHz, Dual/Triple Op Amps
with 1ꢀ5k EꢁD ꢂrotection
ꢂin Description
PIN
NꢎꢅE
FUNꢈTION
ꢅꢎXꢊꢉ3ꢉE
ꢅꢎXꢊꢉ3±E
1
ꢄ
7
6
OUTA
INA-
Amplifier A Output
Amplifier A Inverting Input
Amplifier A Noninverting Input
ꢅround
3
ꢀ
INA+
ꢅNS
INB+
INB-
4
11
10
9
ꢀ
Amplifier B Noninverting Input
Amplifier B Inverting Input
Amplifier B Output
6
7
±
OUTB
±
4
k
Positive Power ꢁupplyꢂ Bypass k
to ꢅNS with a 0ꢂ1µF capacitorꢂ
ꢃꢃ
ꢃꢃ
—
—
—
—
—
—
1
SHDNA
SHDNC
SHDNB
INꢃ+
Amplifier A ꢁhutdown Inputꢂ ꢃonnect SHDNA high to enable amplifier Aꢂ
Amplifier ꢃ ꢁhutdown Inputꢂ ꢃonnect SHDNC high to enable amplifier ꢃꢂ
Amplifier B ꢁhutdown Inputꢂ ꢃonnect SHDNB high to enable amplifier Bꢂ
Amplifier ꢃ Noninverting Input
ꢄ
3
1ꢄ
13
14
INꢃ-
Amplifier ꢃ Inverting Input
OUTꢃ
Amplifier ꢃ Output
Detailed Description
Applications Information
The MAX4030E/MAX4031E dual/triple, ꢀk operational
amplifiers achieve 11ꢀk/µs slew rates and 144MHz
bandwidthsꢂ High ±1ꢀ5k EꢁS protection at video inputs
and outputs guards against unexpected dischargeꢂ
Excellent harmonic distortion and differential gain/
phase performance ma5e these amplifiers an ideal
choice for a wide variety of video and RF signal-pro-
cessing applicationsꢂ
Choosing Resistor kalues
Unity-Gain Configuration
The MAX4030E/MAX4031E are internally compensated
for unity gainꢂ When configured for unity gain, a ꢄ4
resistor (R ) in series with the feedbac5 path optimizes
F
Aꢃ performanceꢂ This resistor improves Aꢃ response by
reducing the Q of the parallel Lꢃ circuit formed by the
parasitic feedbac5 capacitance and lead inductanceꢂ
Ground-ꢁensing Inputs
The MAX4030E/MAX4031E input stage can sense com-
mon-mode voltages from ground to within ꢄꢂꢄꢀk of the
positive supplyꢂ
Video Line Driver
The MAX4030E/MAX4031E are low-power, voltage-
feedbac5 amplifiers featuring bandwidths up to 40MHz
and 0ꢂ1dB gain flatness to 9MHzꢂ They are designed to
minimize differential-gain error and differential-phase
error to 0ꢂꢄ% and 0ꢂꢄ°, respectivelyꢂ They have a 40ns
settling time to 0ꢂ1%, 110k/µs slew rates, and output-
current-drive capability of up to ꢀ0mA, ma5ing them
ideal for driving video loadsꢂ
Rail-to-Rail Outputs
The MAX4030E/MAX4031E rail-to-rail outputs can
swing to within 100mk of each supply because local
feedbac5 around the output stage ensures low open-
loop output impedance, reducing gain sensitivity to
load variationsꢂ
Inverting and Noninverting Configurations
ꢁhutdown (MAX4031E Only)
The MAX4031E offers individual shutdown control for
each amplifierꢂ Srive SHDN_ low to shut down the
amplifierꢂ In shutdown, the amplifier output impedance
is high impedanceꢂ
ꢁelect the feedbac5 (R ) and input (R ) resistor values
F
ꢅ
to fit the gain requirements of the applicationꢂ Large
resistor values increase voltage noise and interact with
the amplifier’s input and Pꢃ board capacitanceꢂ This
can generate undesirable poles and zeros and
6
_______________________________________________________________________________________
Low-Cost, 144MHz, Dual/Triple Op Amps
with 1ꢀ5k EꢁD ꢂrotection
•
Use a Pꢃ board with at least two layersꢂ The Pꢃ
board should be as free from voids as possibleꢂ
R
R
F
G
•
Keep signal lines as short and as straight as possi-
bleꢂ So not ma5e 90° turns; round all cornersꢂ
V
OUT_
MAX403_E
Output Capacitive Loading and ꢁtability
IN_+
R
150
L
V
= [1+ (R / R )] V
OUT
F
G
IN_+
The MAX4030E/MAX4031E are optimized for Aꢃ perfor-
mance and do not drive highly reactive loads, which
decreases phase margin and can produce excessive
ringing and oscillationꢂ Figure 3 shows a circuit modifi-
Figure 1. Noninverting Gain Configuration
cation that uses an isolation resistor (R ) to eliminate
IꢁO
this problemꢂ Figure 4 shows a graph of the Optimal
Isolation Resistor (R ) vsꢂ ꢃapacitive Loadꢂ Figure ꢀ
IꢁO
shows how a capacitive load causes excessive pea5-
ing of the amplifier’s frequency response if the capaci-
tor is not isolated from the amplifier by a resistorꢂ A
small isolation resistor (usually 10 to 1ꢀ ) placed
before the reactive load prevents ringing and oscilla-
tionꢂ At higher capacitive loads, the interaction of the
load capacitance and the isolation resistor controls the
Aꢃ performanceꢂ Figure 6 shows the effect of a 10
isolation resistor on closed-loop responseꢂ
R
R
G
F
IN
V
OUT_
MAX403_E
R
150
L
V
= -(R / R ) V
F G IN
OUT
EꢁD ꢂrotection
As with all Maxim devices, EꢁS protection structures
are incorporated on all pins to protect against EꢁS
encountered during handling and assemblyꢂ Input and
output pins of the MAX4030E/MAX4031E have extra
protection against static electricityꢂ Maxim’s engineers
have developed state-of-the-art structures enabling
these pins to withstand EꢁS up to ±1ꢀ5k without dam-
age when placed in the test circuit (Figure 7)ꢂ The
MAX4030E/MAX4031E are characterized for protection
to the following limits:
Figure 2. Inverting Gain Configuration
decrease bandwidth or cause oscillationsꢂ For exam-
ple, a noninverting gain-of-two configuration (R = R )
F
ꢅ
using ꢄ5 resistors, combined with 4pF of amplifier
input capacitance and 1pF of Pꢃ board capacitance,
cause a pole at 79ꢂ6MHzꢂ ꢁince this pole is within the
amplifier bandwidth, it jeopardizes stabilityꢂ Reducing
the ꢄ5 resistors to 100 extends the pole frequency
to 1ꢂꢀ9ꢅHz, but could limit output swing by adding
ꢄ00 in parallel with the amplifier’s load resistor
(Figures 1 and ꢄ)ꢂ
•
•
±1ꢀ5k using the Human Body Model
±±5k using the ꢃontact Sischarge method speci-
fied in IEꢃ 1000-4-ꢄ
Layout and ꢂower-ꢁupply Bypassing
These amplifiers operate from a single ꢀk power sup-
•
±1ꢀ5k using the Air-ꢅap Sischarge method speci-
fied in IEꢃ 1000-4-ꢄ
plyꢂ Bypass k
to ground with a 0ꢂ1µF capacitor as
ꢃꢃ
close to k
as possibleꢂ Maxim recommends using
ꢃꢃ
microstrip and stripline techniques to obtain full band-
widthꢂ To ensure that the Pꢃ board does not degrade
the amplifier’s performance, design it for a frequency
greater than 1ꢅHzꢂ Pay careful attention to inputs and
outputs to avoid large parasitic capacitanceꢂ Under all
conditions observe the following design guidelines:
R
24
F
R
ISO
V
OUT_
•
•
•
So not use wire-wrap boardsꢂ Wire-wrap boards are
too inductiveꢂ
MAX403_E
V
IN_+
C
L
So not use Iꢃ soc5etsꢂ ꢁoc5ets increase parasitic
capacitance and inductanceꢂ
Use surface mount instead of through-hole compo-
nents for better high-frequency performanceꢂ
Figure 3. Driving a Capacitive Load Through an Isolation Resistor
_______________________________________________________________________________________
7
Low-Cost, 144MHz, Dual/Triple Op Amps
with 1ꢀ5k EꢁD ꢂrotection
SMALL-SIGNAL GAIN vs. FREQUENCY WITH LOAD
CAPACITANCE AND 10 ISOLATION RESISTOR
ISOLATION RESISTANCE
vs. CAPACITIVE LOAD
6
5
4
20
18
16
14
12
10
8
C = 20pF
L
3
2
1
0
C = 10pF
L
-1
-2
C = 5pF
L
6
-3
-4
-5
-6
4
2
0
0.1
1
10
FREQUENCY (MHz)
100
1000
0
100
200
300
400
500
CAPACITIVE LOAD (pF)
Figure 4. Isolation Resistance vs. Capacitive Load
Figure 6. Small-Signal Gain vs. Frequency with Load
Capacitance and 10 Isolation Resistor
IEC 1000-4-2
SMALL-SIGNAL GAIN vs. FREQUENCY WITH LOAD
The IEꢃ 1000-4-ꢄ standard covers EꢁS testing and per-
formance of finished equipment; it does not specifically
refer to Iꢃsꢂ The MAX4030E/MAX4031E enable the
design of equipment that meets the highest level (level
4) of IEꢃ 1000-4-ꢄ without the need for additional EꢁS
protection componentsꢂ The major difference between
tests done using the Human Body Model and IEꢃ 1000-
4-ꢄ is higher pea5 current in IEꢃ 1000-4-ꢄꢂ Because
series resistance is lower in the IEꢃ 1000-4-ꢄ model, the
EꢁS-withstand voltage measured to this standard is gen-
erally lower than that measured using the Human Bodyꢂ
Figure 10 shows the IEꢃ 1000-4-ꢄ model and Figure 11
shows the current waveform for the ±±5k IEꢃ 1000-4-ꢄ
level 4 EꢁS ꢃontact Sischarge testꢂ The Air-ꢅap test
involves approaching the device with a charged probeꢂ
The ꢃontact Sischarge method connects the probe to
the device before the probe is energizedꢂ
CAPACITANCE AND NO ISOLATION RESISTOR
6
5
C = 20pF
L
4
3
2
1
0
C = 10pF
L
C = 5pF
L
-1
-2
-3
-4
-5
-6
0.1
1
10
FREQUENCY (MHz)
100
1000
Figure 5. Small-Signal Gain vs. Frequency with Load
Capacitance and No Isolation Resistor
Chip Information
MAX4030E TRANꢁIꢁTOR ꢃOUNT: ꢄ71
MAX4031E TRANꢁIꢁTOR ꢃOUNT: 3±7
PROꢃEꢁꢁ: BiꢃMOꢁ
Human Body Model
Figure ± shows the Human Body Model and Figure 9
shows the current waveform it generates when dis-
charged into low impedanceꢂ This model consists of a
1ꢀ0pF capacitor charged to the EꢁS voltage of interest,
and then discharged into the test device through a
1ꢂꢀ5 resistorꢂ
ꢇ
_______________________________________________________________________________________
Low-Cost, 144MHz, Dual/Triple Op Amps
with 1ꢀ5k EꢁD ꢂrotection
R
5V
C
R
330
50M TO
100M
D
C
BYPASS
0.1 F
DISCHARGE
RESISTANCE
CHARGE CURRENT
LIMIT RESISTOR
TEST
POINT A
75
75
HIGH-
VOLTAGE
DC
DEVICE
UNDER
TEST
TEST
POINT B
C
S
150pF
STORAGE
CAPACITOR
MAX403_E
SOURCE
V
EE
200
200
Figure 10. IEC 1000-4-2 ESD Test Model
Figure 7. ESD Test Circuit
I
100%
90%
R
= 1.5k
R
= 1M
D
C
CHARGE CURRENT
LIMIT RESISTOR
DISCHARGE
RESISTANCE
HIGH-
VOLTAGE
DC
DEVICE
UNDER
TEST
STORAGE
CAPACITOR
C
= 150pF
S
SOURCE
10%
t
t = 0.7ns TO 1ns
r
30ns
Figure 8. Human Body ESD Model
60ns
Figure 11. IEC 1000-4-2 ESD Generator Current Waveform
I
100%
90%
PEAK-TO-PEAK RINGING
(NOT DRAWN TO SCALE)
I
P
r
AMPERES
36.8%
10%
0
TIME
0
t
RL
t
DL
CURRENT WAVEFORM
Figure 9. Human Body Current Waveform
_______________________________________________________________________________________
9
Low-Cost, 144MHz, Dual/Triple Op Amps
with 1ꢀ5k EꢁD ꢂrotection
ꢂac5age Information
(The pac5age drawing(s) in this data sheet may not reflect the most current specificationsꢂ For the latest pac5age outline information,
go to www.ꢂaxiꢂ-ic.coꢂ/pac5aꢍesꢂ)
4X S
8
8
MILLIMETERS
INCHES
DIM MIN
MAX
MAX
MIN
-
-
0.043
0.006
0.037
0.014
0.007
0.120
1.10
0.15
0.95
0.36
0.18
3.05
A
0.002
0.030
0.010
0.005
0.116
0.05
0.75
0.25
0.13
2.95
A1
A2
b
E
H
Ø0.50 0.1
c
D
e
0.0256 BSC
0.65 BSC
0.6 0.1
E
H
0.116
0.188
0.016
0∞
0.120
2.95
4.78
0.41
0∞
3.05
5.03
0.66
6∞
0.198
0.026
6∞
L
1
1
0.6 0.1
S
0.0207 BSC
0.5250 BSC
BOTTOM VIEW
D
TOP VIEW
A1
A2
A
c
e
L
b
SIDE VIEW
FRONT VIEW
PROPRIETARY INFORMATION
TITLE:
PACKAGE OUTLINE, 8L uMAX/uSOP
APPROVAL
DOCUMENT CONTROL NO.
REV.
1
21-0036
J
1
±ꢉ ______________________________________________________________________________________
Low-Cost, 144MHz, Dual/Triple Op Amps
with 1ꢀ5k EꢁD ꢂrotection
ꢂac5age Information (continued)
(The pac5age drawing(s) in this data sheet may not reflect the most current specificationsꢂ For the latest pac5age outline information,
go to www.ꢂaxiꢂ-ic.coꢂ/pac5aꢍesꢂ)
PACKAGE OUTLINE, TSSOP 4.40mm BODY
1
21-0066
G
1
______________________________________________________________________________________ ±±
Low-Cost, 144MHz, Dual/Triple Op Amps
with 1ꢀ5k EꢁD ꢂrotection
ꢂac5age Information (continued)
(The pac5age drawing(s) in this data sheet may not reflect the most current specificationsꢂ For the latest pac5age outline information,
go to www.ꢂaxiꢂ-ic.coꢂ/pac5aꢍesꢂ)
INCHES
MILLIMETERS
DIM
A
MIN
MAX
0.069
0.010
0.019
0.010
MIN
1.35
0.10
0.35
0.19
MAX
1.75
0.25
0.49
0.25
0.053
0.004
0.014
0.007
N
A1
B
C
e
0.050 BSC
1.27 BSC
E
0.150
0.228
0.016
0.157
0.244
0.050
3.80
5.80
0.40
4.00
6.20
1.27
E
H
H
L
VARIATIONS:
INCHES
1
MILLIMETERS
DIM
D
MIN
MAX
0.197
0.344
0.394
MIN
4.80
8.55
9.80
MAX
5.00
N
8
MS012
AA
TOP VIEW
0.189
0.337
0.386
D
8.75 14
10.00 16
AB
D
AC
D
C
A
B
0∞-8∞
e
A1
L
FRONT VIEW
SIDE VIEW
PROPRIETARY INFORMATION
TITLE:
PACKAGE OUTLINE, .150" SOIC
APPROVAL
DOCUMENT CONTROL NO.
REV.
1
21-0041
B
1
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
±ꢋ ____________________Maxim Integrated ꢂroducts, 120 ꢁan Gabriel Drive, ꢁunnyvale, CA 94086 408-737-7600
© ꢄ00ꢀ Maxim Integrated Products
Printed UꢁA
is a registered trademar5 of Maxim Integrated Products, Incꢂ
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