MAX4503-MAX4504 [MAXIM]
Low-Voltage, Dual-Supply, SPST, CMOS Analog Switches; 低电压，双电源， SPST ， CMOS模拟开关
| 型号： | MAX4503-MAX4504 |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | Low-Voltage, Dual-Supply, SPST, CMOS Analog Switches |
| 文件： | 总12页 (文件大小：116K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
19-1064; Rev 0; 6/96
Lo w -Vo lt a g e , Du a l-S u p p ly, S P S T,
CMOS An a lo g S w it c h e s
3/MAX504
_______________Ge n e ra l De s c rip t io n
____________________________Fe a t u re s
♦ Available in SOT23-5 Package
The MAX4503/MAX4504 are low-voltage, dual-supply,
single-pole/single-throw (SPST), CMOS analog switch-
es. The MAX4503 is normally open (NO). The MAX4504
is normally closed (NC).
♦ Dual-Supply Operation from ±1V to ±6V
♦ Guaranteed On-Resistance:
250Ω with ±5V Supplies
These CMOS switches can operate continuously with
dual supplies between ±1.V and ±6V. Each switch can
handle rail-to-rail analog signals. The off-leakage cur-
rent is only 1nA at +25°C or 10nA at +85°C.
♦ Guaranteed Low Off-Leakage Currents:
1nA at +25°C
10nA at +85°C
♦ Guaranteed Low On-Leakage Currents:
2nA at +25°C
The digital input is CMOS-logic compatible when using
±5V supplies. A unique logic input architecture allows
this even though the parts have no ground pin.
20nA at +85°C
♦ Guaranteed Low Charge Injection: 10pC Max
For s ing le -s up p ly op e ra tion, us e the MAX4501/
MAX4502, which are pin-for-pin equivalents.
♦ Fast Switching Speed: t
= 150ns, t
= 100ns
ON
OFF
♦ CMOS-Logic Compatible Input
______________Ord e rin g In fo rm a t io n
________________________Ap p lic a t io n s
Battery-Operated Equipment
Audio and Video Signal Routing
Low-Voltage Data-Acquisition Systems
Communications Circuits
Cellular Phones
PART
TEMP. RANGE
0°C to +70°C
PIN-PACKAGE
8 Plastic DIP
8 SO
MAX4503CPA
MAX4503CSA
MAX4503CUK
MAX4503C/D
MAX4503EPA
MAX4503ESA
MAX4503EUK
MAX4503MJA
0°C to +70°C
0°C to +70°C
5 SOT23-5
Dice*
0°C to +70°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-55°C to +125°C
8 Plastic DIP
8 SO
PCMCIA Cards
5 SOT23-5
8 CERDIP**
Modems
Ordering Information continued at end of data sheet.
* Contact factory for dice specifications.
** Contact factory for availability.
___________________________________________________________P in Co n fig u ra t io n s
TOP VIEW
1
2
3
4
8
7
6
5
1
2
8
7
6
5
1
2
3
5
V+
1
2
3
COM
N.C.
N.C.
V+
NO
V-
COM
N.C.
N.C.
V+
NC
V-
COM
NO
V-
5
V+
COM
NC
IN
3
4
IN
N.C.
N.C.
MAX4503
MAX4504
4
IN
V-
4
IN
MAX4503
MAX4504
DIP/SO
DIP/SO
SOT23-5
SOT23-5
MARKING INFORMATION (SOTs ONLY)
LOT SPECIFIC CODE
SWITCH STATE
MAX4503 MAX4504
INPUT
XX XX
LOW
HIGH
OFF
ON
ON
OFF
AC = MAX4503
AD = MAX4504
N.C. = NOT INTERNALLY CONNECTED
________________________________________________________________ Maxim Integrated Products
1
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800
Lo w -Vo lt a g e , Du a l-S u p p ly, S P S T,
CMOS An a lo g S w it c h e s
ABSOLUTE MAXIMUM RATINGS
(Voltages Referenced to V-)
5-Pin SOT23-5 (derate 7.1mW/°C above +70°C) ........571mW
V+ ..............................................................................-0.3V, +13V
Voltage into Any Terminal (Note 1) ..........-0.3V to (V+ + 0.3V) or
±10mA (whichever occurs first)
Continuous Current into Any Terminal..............................±10mA
Peak Current, NO_ or COM_
8-Pin CERDIP (derate 8.00mW/°C above +70°C)........640mW
Operating Temperature Ranges
MAX4503C_ _/MAX4504C_ _ .............................0°C to +70°C
MAX4503E_ _/MAX4504E_ _ ...........................-40°C to +85°C
MAX4503MJA/MAX4504MJA ........................-55°C to +125°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10sec) .............................+300°C
(pulsed at 1ms,10% duty cycle)...................................±20mA
Continuous Power Dissipation (T = +70°C)
A
8-Pin Plastic DIP (derate 9.09mW/°C above +70°C) ...727mW
8-Pin SO (derate 5.88mW/°C above +70°C)................471mW
Note 1: Voltages on any signal terminal exceeding V+ or V- are clamped by internal diodes. Limit forward-diode current to maximum
current rating.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS—±5V Supply
(V+ = +4.5V to +5.5V, V- = -4.5V to -5.5V, V
=3.5V, V = 1.5V, T = T
to T , unless otherwise noted. Typical values are at
MAX
3/MAX504
INH
INL
A
MIN
T
A
= +25°C.)
MIN
TYP
(Note 2)
MAX
PARAMETER
SYMBOL
CONDITIONS
UNITS
ANALOG SWITCH
V
, V
NC
,
COM NO
V
Analog Signal Range
V-
V+
V
T
+25°C
60
250
350
1
A =
COM to NO or NC
On-Resistance
R
V
= 3.5V, I = 1mA
COM
Ω
ON
COM_
T
T
to T
A = MIN MAX
T
A =
+25°C
-1
-10
-100
-1
0.01
V+ = 5.5V, V- = -5.5V,
= ±4.5V,
NO or NC Off Leakage
Current (Note 3)
I
NO(OFF),
NC(OFF)
V
COM_
C, E
M
10
100
1
nA
nA
nA
T
T
A = MIN
_
I
V
NO
or V = + 4.5V
NC
to T
MAX
T
A =
+25°C
0.01
0.01
V+ = 5.5V, V- = -5.5V,
= ±4.5V,
COM Off Leakage Current
(Note 3)
I
V
COM_
C, E
M
-10
-100
-2
10
100
2
COM(OFF)
T
T
A = MIN
_
V
NO
or V = + 4.5V
NC
to T
MAX
T
A =
+25°C
V+ = 5.5V, V- = -5.5V,
= ±4.5V,
COM On Leakage Current
(Note 3)
I
V
C, E
M
-20
-200
20
200
COM(ON)
COM
T
T
A = MIN
V
NO
or V = ±4.5V
NC
to T
MAX
DIGITAL I/O
IN Input Logic High
IN Input Logic Low
V
(V+) - 1.5
V-
V+
V
V
IH
V
IL
(V+) - 3.5
IN Input Current Logic
High or Low
I
, I
V
IN
= V+, 0V
-1
0.03
1
µA
IH IL
2
_______________________________________________________________________________________
Lo w -Vo lt a g e , Du a l-S u p p ly, S P S T,
CMOS An a lo g S w it c h e s
3/MAX504
ELECTRICAL CHARACTERISTICS—±5V Supply (continued)
(V+ = +4.5V to +5.5V, V- = -4.5V to -5.5V, V
= 3.5V, V = 1.5V, T = T
to T , unless otherwise noted. Typical values are at
MAX
INH
INL
A
MIN
T
A
= +25°C.)
MIN
TYP
(Note 2)
MAX
PARAMETER
SYMBOL
CONDITIONS
UNITS
SWITCH DYNAMIC CHARACTERISTICS
T
+25°C
30
20
150
240
100
150
A =
V
V
NO
= 3V, R = 1kΩ
L
or V = 3V, Figure 1
NC
IN
Turn-On Time
Turn-Off Time
t
ns
ns
ON
T
T
to T
A = MIN
MAX
MAX
T
A =
+25°C
V
= 3V, R = 1kΩ
L
or V = 3V, Figure 1
NC
IN
t
OFF
Q
V
NO
T
T
to T
A = MIN
Charge Injection
(Note 4)
C
= 1nF, V = 0V, R = 0Ω,
NO_ S
L
1
10
pC
dB
T
A =
+25°C, Figure 2
R
= 50Ω, C = 15pF, V = 1V
,
L
L
NO
RMS
Off Isolation
V
<-90
ISO
f = 100kHz, T
+25°C, Figure 3
A =
NO or NC Off Capacitance
COM Off Capacitance
COM On Capacitance
POWER SUPPLY
C
f = 1MHz, T
f = 1MHz, T
f = 1MHz, T
+25°C, Figure 4
+25°C, Figure 4
+25°C, Figure 4
3
3
9
pF
pF
pF
NO(OFF)
A =
A =
A =
C
OFF(COM)
C
ON(COM)
T
+25°C
-125
-200
40
125
200
A =
V+, V- Supply Current
I+, I-
V
IN
= 0V or V+
µA
T
T
to T
A = MIN MAX
_______________________________________________________________________________________
3
Lo w -Vo lt a g e , Du a l-S u p p ly, S P S T,
CMOS An a lo g S w it c h e s
ELECTRICAL CHARACTERISTICS—±3V Supply
(V+ = +2.7V to +3.3V, V- = -2.7V to -3.3V, V
= 2.4V, V = 0.8V, T = T
to T , unless otherwise noted. Typical values are at
MAX
INH
INL
A
MIN
T
A
= +25°C.)
MIN
TYP
(Note 2)
MAX
PARAMETER
SYMBOL
CONDITIONS
UNITS
ANALOG SWITCH
V
, V
NC
,
COM NO
V
Analog Signal Range
0
V+
V
T
+25°C
100
400
500
1
A =
COM to NO or NC
On-Resistance
R
V
= 1.5V, I = 0.1mA
COM
Ω
ON
COM_
T
T
to T
A = MIN MAX
T
A =
+25°C
-1
-10
-100
-1
V
COM_
= ±1.5V,
_
NO or NC Off Leakage
Current (Notes 3, 4)
I
NO(OFF),
NC(OFF)
V
or V = + 1.5V,
C, E
10
100
1
nA
nA
nA
NO
NC
T
T
A = MIN
I
V+ = 3.3V, V- = -3.3V
to T
MAX
M
T
A =
+25°C
V
COM_
= ±1.5V,
_
COM Off Leakage Current
(Notes 3, 4)
I
V
or V = + 1.5V,
C, E
M
-10
-100
-2
10
100
2
COM(OFF)
NO
NC
T
to T
T
A = MIN
V+ = 3.3V, V- = -3.3V
MAX
3/MAX504
T
A =
+25°C
V
or V = ±1.5V,
NO
NC
COM On Leakage Current
(Notes 3, 4)
I
V
COM_
= ±1.5V,
C, E
M
-20
-200
20
200
COM(ON)
T
to T
T
A = MIN
V+ = 3.3V, V- = -3.3V
MAX
DIGITAL I/O
IN Input Logic High
IN Input Logic Low
V
2.4
V-
V+
V
V
INH
V
INL
(V+) - 2.3
IN Input Current Logic High
or Low
I
, I
-1
0.03
25
1
µA
IH IL
POWER SUPPLY
T
+25°C
-100
-175
100
175
A =
V+, V- Supply Current
I+, I-
IN = 0V or V+
µA
T
T
to T
A = MIN MAX
Note 2: The algebraic convention is used in this data sheet; the most negative value is shown in the minimum column.
Note 4: Guaranteed, not production tested.
Note 3: Leakage parameters are 100% tested at maximum rated hot operating temperature, and guaranteed by correlation at +25°C.
Note 5: SOT packaged parts are 100% tested at +25°C. Limits at maximum and minimum rated temperature are guaranteed by
design and correlation limits at +25°C.
4
_______________________________________________________________________________________
Lo w -Vo lt a g e , Du a l-S u p p ly, S P S T,
CMOS An a lo g S w it c h e s
3/MAX504
__________________________________________Typ ic a l Op e ra t in g Ch a ra c t e ris t ic s
(V+ = +5V, V- = -5V, T = +25°C, unless otherwise noted.)
A
ON-RESISTANCE
vs. V
COM
AND TEMPERATURE
CHARGE INJECTION vs. V
COM
ON-RESISTANCE vs. V
COM
200
180
160
140
120
100
80
5
4
1000
100
10
V+ = +5V
V- = -5V
V+ = +1V
V- = -1V
3
2
V+ = +3V
V- = -3V
V+ = +2V
V- = -2V
1
T
= +125°C
A
V+ = +4V
V- = -4V
0
-1
-2
-3
-4
-5
T
A
= +85°C
60
V+ = +5V
V- = -5V
40
T
= +25°C
A
20
T
= -55°C
A
0
-5 -4 -3 -2 -1
0
1
2
3
4
5
-5 -4 -3 -2 -1
0
1
2
3
4
5
-5 -4 -3 -2 -1
0
1
2
3
4
5
V
COM
(V)
V
(V)
V
COM
(V)
COM
LEAKAGE CURRENT
vs. TEMPERATURE
FREQUENCY RESPONSE (50Ω IN AND OUT)
MAX4503-05
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
60
50
40
30
20
10
0
10
1
I
ON
COM
ON LOSS
0.01
ON PHASE
-10
-20
-30
-40
-50
-60
0.001
0.0001
0.00001
I
OFF
COM/NO/NC
OFF ISOLATION
-100
-110
-120
0.0001 0.001 0.01 0.1
1
10 100 1000
-60 -40 -20
0
20 40 60 80 100 120 140
FREQUENCY (MHz)
TEMPERATURE (°C)
LOGIC THRESHOLD
vs. V+ AND V-
TOTAL HARMONIC DISTORTION
vs. FREQUENCY
100
10
3.0
2.5
2.0
1.5
1.0
0.5
0
600Ω IN/OUT
V+ = 5V
V- = -5V
1
0.1
-0.5
-1.0
0.01
10
100
1000
10,000 100,000
0
1
2
3
4
5
FREQUENCY (Hz)
V+, V- VOLTAGE (V)
_______________________________________________________________________________________
5
Lo w -Vo lt a g e , Du a l-S u p p ly, S P S T,
CMOS An a lo g S w it c h e s
______________________________________________________________P in De s c rip t io n
PIN
MAX4503
MAX4504
NAME
FUNCTION
DIP/SO
SOT23-5
DIP/SO
SOT23-5
1
1
–
1
1
–
COM
N.C.
V+
Analog Switch Common Terminal
2, 3, 5
2, 3, 5
No Connect (not internally connected)
Positive (analog and digital) Supply Voltage Input
Digital Control Input
4
6
7
8
–
5
4
3
2
–
4
6
7
–
8
5
4
3
–
2
IN
V-
Negative (analog) Supply Voltage Input
Analog Switch Normally Open Terminal
Analog Switch Normally Closed Terminal
NO
NC
5
Note: NO, NC, and COM pins are identical and interchangeable. Either may be considered as an input or output; signals pass
equally well in both directions.
has a low-current pull-up to V+ and the logic limit is set
by an internal comparator referenced to V+. The logic-
__________Ap p lic a t io n s In fo rm a t io n
P o w e r-S u p p ly Co n s id e ra t io n s
The MAX4503/MAX4504’s construction is typical of
most CMOS analog switches, except they have only
two supply pins: V+ and V-. These voltages set the
analog voltage limits of the switch. Reverse ESD-pro-
tection diodes are internally connected between IN and
each analog signal pin and both V+ and V-. If any ana-
log signal exceeds V+ or V-, one of these diodes will
conduct. During normal operation, these (and other)
reverse-biased ESD diodes leak, forming the only cur-
rent drawn from V-. Additional current flows through V+
from the logic-level translator.
level translators convert the logic levels to switched V+
and V- signals, to drive the gates of the analog signals.
This drive signal is the only connection between the
logic supplies (and signals) and the analog supplies.
COM, NO, and NC pins have ESD-protection diodes to
V+ and V-.
The logic is CMOS compatible when V+ is +5V. CMOS
compatibility is maintained with all V+ values, assuming
that the CMOS logic is operated from the same V+ sup-
p ly. Sinc e the MAX4503/MAX4504 ha ve no ground
pins, the logic levels are internally referenced to V+.
Do not connect the MAX4503/MAX4504 V+ to +3V
and connect the logic-level pins to TTL-logic-level
signals. TTL levels can exceed +3V and violate the
absolute maximum ratings, damaging the part
and/or external circuits.
Virtually all the analog leakage current is provided
through the ESD diodes. Although the ESD diodes on a
given signal pin are identical and therefore fairly well
balanced, they are reverse biased differently. Each is
biased by either V+ or V- and the analog signal. This
means their leakages will vary as the signal varies. The
difference in the two diode leakages to the V+ and V-
pins constitutes the analog-signal-path leakage current.
All analog leakage current flows between each pin and
one of the supply terminals, not to the other switch ter-
minal. This is why both sides of a given switch can
show leakage currents of either the same or opposite
polarity.
Hig h -Fre q u e n c y P e rfo rm a n c e
In 50Ω systems, signal response is reasonably flat up
to 50MHz. (see Typical Operating Characteristics).
Ab ove 20MHz the on-re s p ons e ha s s e ve ra l minor
peaks which are highly layout dependent. The problem
is not in turning the switch on, but in turning it off. The
off-state switch acts like a capacitor, and passes higher
frequencies with less attenuation. At 10MHz, off isola-
tion is about -65dB in 50Ω systems, becoming worse
(a p p roxima te ly 20d B p e r d e c a d e ) a s fre q ue nc y
increases. Higher circuit impedances also make off iso-
lation worse.
The re is no c onne c tion b e twe e n the a na log s ig na l
paths and V+ or V-.
V+ and V- also power the internal logic and logic-level
translators. Since there is no ground pin, the logic input
6
_______________________________________________________________________________________
Lo w -Vo lt a g e , Du a l-S u p p ly, S P S T,
CMOS An a lo g S w it c h e s
3/MAX504
______________________________________________Te s t Circ u it s /Tim in g Dia g ra m s
V+
V
IN
50%
V
IN
V+
0V
NO
V
NO
MAX4503
V-
V
OUT
0V
V
IN
90%
90%
IN
COM
V
OUT
V
OUT
35pF
50Ω
1k
V-
t
ON
t
OFF
V+
V+
V
IN
50%
V
IN
0V
NC
V
NC
MAX4504
V
OUT
0V
V
IN
90%
90%
IN
COM
V
OUT
V
OUT
V-
V-
35pF
50Ω
1k
t
t
ON
OFF
Figure 1. Switching Times
V+
V+
V+
0V
NO
or
NC
V
IN
V
NO
or V = 0V
NC
MAX4503
MAX4504
MAX4504
MAX4503
V
IN
IN
COM
V
OUT
∆V
OUT
V-
V
OUT
C
L
1000pF
50Ω
∆V IS THE MEASURED VOLTAGE DUE TO CHARGE TRANSFER
ERROR Q WHEN THE CHANNEL TURNS OFF.
OUT
V-
Q = ∆V x C
OUT
L
Figure 2. Charge Injection
_______________________________________________________________________________________
7
Lo w -Vo lt a g e , Du a l-S u p p ly, S P S T,
CMOS An a lo g S w it c h e s
_________________________________Te s t Circ u it s /Tim in g Dia g ra m s (c o n t in u e d )
V+ 10nF
V
V
OUT
OFF ISOLATION = 20log
ON LOSS = 20log
NETWORK
ANALYZER
IN
50Ω
50Ω
V+
V
V
IN
OUT
NO
or
NC
V
IN
MAX4503
MAX4504
V+
MEAS.
REF
V
OUT
MEASUREMENTS ARE STANDARDIZED AGAINST SHORT
AT SOCKET TERMINALS. OFF ISOLATION IS MEASURED
BETWEEN COM AND “OFF” TERMINAL ON EACH SWITCH.
ON LOSS IS MEASURED BETWEEN COM AND “ON”
TERMINAL ON EACH SWITCH. SIGNAL DIRECTION
THROUGH SWITCH IS REVERSED; WORST-VALUES
ARE RECORDED.
IN
COM
V-
50Ω
50Ω
V-
Figure 3. Off Isolation and On Loss
3/MAX504
___________________Ch ip To p o g ra p h y
V+
V+
NO
or
NC
V+
IN
MAX4503
MAX4504
1MHz
CAPACITANCE
ANALYZER
AS
REQUIRED
IN
COM
V-
V-
0. 035"
(0. 889mm)
Figure 4. NO, NC, and COM Capacitance
COM
_Ord e rin g In fo rm a t io n (c o n t in u e d )
PART
TEMP. RANGE
0°C to +70°C
PIN-PACKAGE
8 Plastic DIP
8 SO
NO/NC
MAX4504CPA
MAX4504CSA
MAX4504CUK
MAX4504C/D
MAX4504EPA
MAX4504ESA
MAX4504EUK
MAX4504MJA
V–
0°C to +70°C
0°C to +70°C
5 SOT23-5
Dice*
0°C to +70°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-55°C to +125°C
8 Plastic DIP
8 SO
0. 030"
5 SOT23-5
8 CERDIP**
(0. 762mm)
* Contact factory for dice specifications.
** Contact factory for availability.
TRANSISTOR COUNT: 36
SUBSTRATE IS INTERNALLY CONNECTED TO V+
8
_______________________________________________________________________________________
Lo w -Vo lt a g e , Du a l-S u p p ly, S P S T,
CMOS An a lo g S w it c h e s
3/MAX504
__________________________________________________Ta p e -a n d -Re e l In fo rm a t io n
E
W
B
D
0
P
P
2
0
t
D
1
F
P
NOTE: DIMENSIONS ARE IN MM.
K
0
A
0
AND FOLLOW EIA481-1 STANDARD.
P0
3.988
40.005
2.007
0.254
±0.102
A0
B0
3.200
3.099
±0.102
±0.102
E
1.753
3.505
1.397
3.988
±0.102
P010
±0.203
±0.051
±0.127
F
±0.051
±0.102
±0.102
+0.102
+0.000
P2
t
K0
P
D
1.499
0.991
+0.254
+0.000
D1
+0.305
-0.102
W
8.001
_______________________________________________________________________________________
9
Lo w -Vo lt a g e , Du a l-S u p p ly, S P S T,
CMOS An a lo g S w it c h e s
________________________________________________________P a c k a g e In fo rm a t io n
MILLIMETERS
DIM
MIN
0.90
0.00
0.90
0.35
0.08
2.80
2.60
1.50
0.35
MAX
1.45
0.15
1.30
0.50
0.20
3.00
3.00
1.75
0.55
A
A1
A2
b
C
E
D
E
E1
L
0.95ref
1.90ref
10°
e
e1
α
e1
D
0°
α
21-0057B
3/MAX504
A2
A
5-PIN SOT23-5
SMALL-OUTLINE
L
TRANSISTOR PACKAGE
A1
INCHES
MILLIMETERS
DIM
MIN
0.053
MAX
0.069
0.010
0.019
0.010
0.157
MIN
1.35
0.10
0.35
0.19
3.80
MAX
1.75
0.25
0.49
0.25
4.00
A
D
A1 0.004
B
C
E
e
0.014
0.007
0.150
0°-8°
A
0.101mm
0.004in.
0.050
1.27
e
H
L
0.228
0.016
0.244
0.050
5.80
0.40
6.20
1.27
A1
C
B
L
INCHES
MILLIMETERS
DIM PINS
Narrow SO
SMALL-OUTLINE
PACKAGE
MIN MAX
MIN
MAX
5.00
8.75
8
0.189 0.197 4.80
D
D
D
E
H
14 0.337 0.344 8.55
16 0.386 0.394 9.80 10.00
21-0041A
(0.150 in.)
10 ______________________________________________________________________________________
Lo w Vo lt a g e , Du a l-S u p p ly, S P S T,
CMOS An a lo g S w it c h e s
___________________________________________P a c k a g e In fo rm a t io n (c o n t in u e d )
INCHES
MILLIMETERS
DIM
E
MIN
MAX
0.200
–
MIN
–
MAX
5.08
–
A
–
E1
D
A1 0.015
A2 0.125
A3 0.055
0.38
3.18
1.40
0.41
1.14
0.20
0.13
7.62
6.10
2.54
7.62
–
0.175
0.080
0.022
0.065
0.012
0.080
0.325
0.310
–
4.45
2.03
0.56
1.65
0.30
2.03
8.26
7.87
–
A3
A2
A1
A
L
B
0.016
B1 0.045
0.008
D1 0.005
0.300
E1 0.240
0.100
eA 0.300
C
0° - 15°
E
C
e
e
B1
eA
eB
–
–
B
eB
L
–
0.400
0.150
10.16
3.81
0.115
2.92
D1
INCHES
MILLIMETERS
PKG. DIM
PINS
Plastic DIP
PLASTIC
DUAL-IN-LINE
PACKAGE
(0.300 in.)
MIN
MAX MIN
MAX
8
P
P
P
P
P
N
D
D
D
D
D
D
0.348 0.390 8.84
9.91
14
16
18
20
24
0.735 0.765 18.67 19.43
0.745 0.765 18.92 19.43
0.885 0.915 22.48 23.24
1.015 1.045 25.78 26.54
1.14 1.265 28.96 32.13
21-0043A
______________________________________________________________________________________ 11
Lo w -Vo lt a g e , Du a l-S u p p ly, S P S T,
CMOS An a lo g S w it c h e s
___________________________________________P a c k a g e In fo rm a t io n (c o n t in u e d )
INCHES
MIN
MILLIMETERS
DIM
MAX
0.200
0.023
0.065
0.015
0.310
0.320
MIN
–
MAX
5.08
0.58
1.65
0.38
7.87
8.13
E1
E
A
B
–
0.014
0.36
0.97
0.20
5.59
7.37
D
B1 0.038
A
C
E
0.008
0.220
E1 0.290
e
L
0.100
2.54
0.125
0.150
0.015
–
0.200
–
3.18
3.81
0.38
–
5.08
–
0°-15°
C
Q
L1
Q
S
L
L1
0.070
0.098
–
1.78
2.49
–
e
B1
S1 0.005
0.13
B
S1
S
INCHES
MILLIMETERS
3/MAX504
DIM PINS
MIN
–
MAX MIN MAX
CERDIP
D
D
D
D
D
D
8
0.405
0.785
0.840
0.960
1.060
1.280
–
–
–
–
–
–
10.29
19.94
21.34
24.38
26.92
CERAMIC DUAL-IN-LINE
PACKAGE
14
16
18
20
24
–
–
–
(0.300 in.)
–
–
32.51
21-0045A
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
12 __________________Ma x im In t e g ra t e d P ro d u c t s , 1 2 0 S a n Ga b rie l Drive , S u n n yva le , CA 9 4 0 8 6 (4 0 8 ) 7 3 7 -7 6 0 0
© 1996 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products.
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