MAX4687EBT-T [MAXIM]
2.5?, Low-Voltage, SPST/SPDT Analog Switches in UCSP Package; 2.5Ω ，低电压， SPST / SPDT模拟开关的UCSP封装
| 型号： | MAX4687EBT-T |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | 2.5?, Low-Voltage, SPST/SPDT Analog Switches in UCSP Package |
| 文件： | 总8页 (文件大小：184K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
19-2042; Rev 1; 2/03
2.5Ω, Low-Voltage, SPST/SPDT
Analog Switches in UCSP Package
General Description
Features
The MAX4686/MAX4687/MAX4688 low on-resistance
ꢀ 6-Bump, 0.5mm Pitch, UCSP
(R ), low-voltage analog switches operate from a sin-
ON
ꢀ R
ON
gle +1.8V to +5.5V supply. The MAX4686/MAX4687 are
single-pole/single-throw (SPST) analog switches, and
the MAX4688 is a single-pole/double-throw (SPDT) ana-
log switch. The MAX4686 is a normally open (NO)
switch, and the MAX4687 is a normally closed (NC)
switch. The MAX4688 has one normally open (NO)
switch and one normally closed (NC) switch.
2.5Ω max (+3V Supply)
10Ω max (+1.8V Supply)
ꢀ 0.4Ω max R
Match Between Channels
ON
ꢀ 1Ω max R
Flatness Over Signal Range
ON
ꢀ Low Leakage Currents Over Temperature
When powered from a 3V supply these devices feature
0.5nA (max) at T = +25°C
A
2.5Ω (max) R , with 0.4Ω (max) R
matching and 1Ω
ON
ON
(max) flatness. The MAX4686/MAX4687/MAX4688 offer
ꢀ Fast Switching: t
= 30ns, t
= 12ns
ON
OFF
fast switching speeds (t
= 30ns max, t
= 12ns
OFF
ON
max). The MAX4688 offers break-before-make action.
ꢀ Guaranteed Break-Before-Make (MAX4688)
ꢀ +1.8V to +5.5V Single-Supply Operation
ꢀ Rail-to-Rail® Signal Handling
The digital logic inputs are 1.8V logic compatible from a
+2.7V to +3.3V supply. The MAX4686/MAX4687/
MAX4688 are available in the chip-scale package
(UCSP™), significantly reducing the required PC board
area. The chip occupies only a 1.50mm x 1.02mm area.
The 3 x 2 array of solder bumps are spaced with a
0.5mm bump pitch.
ꢀ Low Crosstalk: -95dB (100kHz)
ꢀ High Off-Isolation: -90dB (100kHz)
ꢀ 1.8V Logic Compatible
________________________Applications
MP3 Players
Cellular Phones
Power Routing
Ordering Information
Battery-Operated Equipment
Relay Replacement
Audio and Video Signal Routing
Communications Circuits
PCMCIA Cards
TEMP
RANGE
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
BUMP-
TOP
MARK
AAI
AAJ
AAK
PART
PACKAGE
6 UCSP-6
6 UCSP-6
6 UCSP-6
MAX4686EBT-T
MAX4687EBT-T
MAX4688EBT-T
Cellular Phones
Hard Drives
Pin Configurations/Functional Diagrams/Truth Table
TOP VIEW
B1
A1
B1
A1
B1
A1
V+
NO
V+
NC
I.C.
V+
IN
NO
SWITCHES SHOWN FOR LOGIC "0"
B2
B3
A2
A3
IN
B2
B3
A2
A3
B2
B3
A2
A3
IN
I.C.
COM
NC
MAX4686/MAX4687/MAX4688
IN
NO
OFF
ON
NC
ON
GND
0
1
GND
COM
COM
GND
OFF
MAX4686
SPST NO
MAX4687
SPST NC
MAX4688
SPDT
Rail-to-Rail is a registered trademark of Nippon Motorola, Ltd.
UCSP is a trademark of Maxim Integrated Products, Inc.
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
2.5Ω, Low-Voltage, SPST/SPDT
Analog Switches in UCSP Package
ABSOLUTE MAXIMUM RATINGS
All Voltages Referenced to GND
Continuous Power Dissipation (T = +70°C)
A
V+, IN .......................................................................-0.3V to +6V
COM, NO, NC (Note1)..................................-0.3V to (V+ + 0.3V)
Continuous Current NO, NC, COM ................................ 100ꢀA
Peak Current NO, NC, COM
3 x 2 UCSP (derate 10.1ꢀW/°C at +70°C) ..................808ꢀW
Operating Teꢀperature Range ...........................-40°C to +85°C
Storage Teꢀperature Range ............................-65°C to +150°C
Buꢀp Reflow Teꢀperature .............................................+235°C
(pulsed at 1ꢀs, 10% duty cycle) ............................... 200ꢀA
Note 1: Signals on NO, NC, and COM exceeding V+ are claꢀped by an internal diode. Liꢀit forward-diode current to ꢀaxiꢀuꢀ cur-
rent rating.
Note 2: This device is constructed using a unique set of packaging techniques that iꢀpose a liꢀit on the therꢀal profile the device
can be exposed to during board level solder attach and rework. This liꢀit perꢀits only the use of the solder profiles recoꢀ-
ꢀended in the industry standard specification, JEDEC 020A, paragraph 7.6, Table 3 for IR/VPR and convection reflow.
Preheating is requied. Hand or wave soldering is not allowed.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V+ = +2.7V to +3.3V, V = +1.4V, V = 0.5V, T = T
to T
, unless otherwise noted. Typical values are at 3V and T = +25°C.)
MAX A
IH
IL
A
MIN
(Notes 3, 4)
PARAMETER
SYMBOL
CONDITIONS
T
MIN
TYP
MAX
UNITS
A
ANALOG SWITCH
V
, V
NC
,
T
to
COM NO
V
MIN
Analog Signal Range
0
V+
2.5
3.5
V
T
MAX
+25°C
1.5
0.3
V+ = 2.7V, V
= 0 to V+,
NC
NO
On-Resistance
R
Ω
ON
T
MIN
to
MAX
I
= 10ꢀA
COM
T
On-Resistance Match
Between Channels
(MAX4688 only)
(Note 5)
+25°C
0.4
V+ = 2.7V, V
or V
or V
= 1.5V,
NC
NC
∆R
Ω
Ω
ON
I
= 10ꢀA
COM
T
MIN
to
MAX
0.5
1
T
+25°C
0.5
On-Resistance Flatness
(Note 6)
V+ = 2.7V, V
= 0 to V+,
NO
R
FLAT(ON)
T
MIN
to
MAX
I
= 10ꢀA
COM
1
+0.5
1
T
+25°C
-0.5
-1
0.01
0.01
0.01
NO, NC Off-Leakage
Current (Note 7)
I
,
V+ = 3.3V; V
= 0.3V or 3V;
COM
NO(OFF)
nA
nA
nA
T
MIN
to
I
V
or V
= 3V, 0.3V
NC
NC(OFF)
NO
T
MAX
+25°C
-0.5
-1
0.5
1
COM Off-Leakage
Current (Note 7)
V+ = 3.3V; V
= 0.3V or 3V;
COM
I
COM_(OFF)
T
MIN
to
V
or V
= 3V, 0.3V
NC
NO
T
MAX
+25°C
-0.5
-1
0.5
1
COM On-Leakage
Current (Note 7)
V+ = 3.3V; V
= 3V or 0.3V;
COM
I
COM_(ON)
T
MIN
to
MAX
V
or V
= 3V, 0.3V, or floating
NO
NO
NC
NC
T
DYNAMIC CHARACTERISTICS
Turn-On Tiꢀe (Note 7)
+25°C
20
30
35
t
V
or V
= 1.5V, Figure 2
ns
ON
T
MIN
to
MAX
T
2
_______________________________________________________________________________________
2.5Ω, Low-Voltage, SPST/SPDT
Analog Switches in UCSP Package
ELECTRICAL CHARACTERISTICS (continued)
(V+ = +2.7V to +3.3V, V = +1.4V, V = 0.5V, T = T
(Notes 3, 4)
to T
, unless otherwise noted. Typical values are at 3V and T = +25°C.)
MAX A
IH
IL
A
MIN
PARAMETER
SYMBOL
CONDITIONS
T
MIN
TYP
MAX
UNITS
A
+25°C
10
12
Turn-Off Tiꢀe (Note 7)
Break-Before-Make
t
V
or V = 1.5V, Figure 2
NC
ns
OFF
NO
T
T
to
MIN
15
MAX
+25°C
8
t
V
V
, V = 1.5V, Figure 3
NO NC
ns
BBM
T
MIN
to
(MAX4688 only) (Note 7)
2
T
MAX
= 0, R
= 0,
GEN
GEN
Charge Injection
Q
+25°C
40
200
-90
-95
0.06
12
pC
MHz
dB
dB
%
C = 1.0nF, Figure 4
L
On-Channel -3dB
Bandwidth
Signal = 0dBꢀ, 50Ω in and out,
Figure 5
BW
+25°C
+25°C
+25°C
+25°C
+25°C
C = 5pF, R = 50Ω, f = 100kHz,
Figure 5
L
L
Off-Isolation (Note 8)
V
ISO
Crosstalk (MAX4688
only) (Note 9)
C = 5pF, R = 50Ω, f = 100kHz,
Figure 5
L
L
V
CR
Total Harꢀonic
Distortion
THD
R = 600Ω, 2Vp-p, f = 20Hz to 20kHz
L
NO, NC Off-
Capacitance
C
C
,
NO(OFF)
NC(OFF)
f = 1MHz, Figure 6
pF
COM Off-Capacitance
Switch On-Capacitance
DIGITAL I/O
C
f = 1MHz, Figure 6
f = 1MHz, Figure 6
+25°C
+25°C
12
35
pF
pF
COM(OFF)
C
(ON)
T
T
to
MIN
Input Logic High
Input Logic Low
V
1.4
-1
V
V
IH
MAX
T
MIN
to
V
0.5
1
IL
T
MAX
Logic Input
Leakage Current
T
MIN
to
I
, I
V
= 0 or V+
IN
µA
IH IL
T
MAX
POWER SUPPLY
T
T
to
MIN
Power-Supply Range
V+
I+
1.8
-1
5.5
1
V
MAX
T
MIN
to
Supply Current
V+ = 3.3V, V = 0 or V+
µA
IN
T
MAX
Note 3: The algebraic convention, where the ꢀost negative value is a ꢀiniꢀuꢀ and the ꢀost positive value a ꢀaxiꢀuꢀ, is used in
this data sheet.
Note 4: UCSP parts are 100% tested at +25°C only and guaranteed by correlation at the full hot-rated teꢀperature.
Note 5: ∆R
= R
) - R
, between switches.
ON
ON(MAX
ON(MIN)
Note 6: Flatness is defined as the difference between the ꢀaxiꢀuꢀ and ꢀiniꢀuꢀ value of on-resistance as ꢀeasured over the
specified analog signal ranges.
Note 7: Guaranteed by design.
Note 8: Off Isolation = 20log (V
/ V ), V
NO
= output, V
= input to off switch.
NO
10 COM
COM
Note 9: Between switches.
_______________________________________________________________________________________
3
2.5Ω, Low-Voltage, SPST/SPDT
Analog Switches in UCSP Package
Typical Operating Characteristics
(T = +25°C, unless otherwise noted.)
A
SUPPLY CURRENT vs. SUPPLY VOLTAGE
ON-RESISTANCE vs. V
ON-RESISTANCE vs. V
(V+ = +3V)
COM
COM
12
4.0
3.5
3.0
2.5
2.0
1.5
1.0
3.0
2.5
2.0
1.5
1.0
0.5
V+ = +1.8V
10
8
T
= +85°C
A
T
= +25°C
A
V+ = +2.7V
V+ = +3.3V
6
4
T
= -40°C
A
2
V+ = +5V
0
0
1
2
3
4
5
6
0
1
2
3
4
5
0
0.5
1.0
1.5
(V)
2.0
2.5
3.0
SUPPLY VOLTAGE (V)
V
(V)
V
COM
COM
LOGIC THRESHOLD VOLTAGE
vs. SUPPLY VOLTAGE
TURN-ON/OFF TIME vs. SUPPLY VOLTAGE
ON-RESISTANCE vs. V
(V+ = +5V)
COM
2.0
1.5
1.0
0.5
0
2.5
2.3
2.1
1.9
1.7
1.5
1.3
1.1
0.9
0.7
0.5
35
30
25
20
15
10
5
V
RISING
IN
T
= +85°C
A
T
= +25°C
A
t
ON
V
FALLING
IN
t
OFF
T
= -40°C
A
0
1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
V+ (V)
1
2
3
4
5
6
0
1
2
3
4
5
V+ (V)
V
(V)
COM
ON/OFF-LEAKAGE CURRENT
vs. TEMPERATURE
TURN-ON/OFF TIME vs. TEMPERATURE
CHARGE INJECTION vs. V
COM
1000
100
10
18
15
12
9
80
60
40
20
0
V+ = +3V
V+ = +3V
V+ = +5V
I
COMON
t
ON
t
V+ = +3V
OFF
6
I
I
NOOFF,
NCOFF
1
3
0
0.1
-40
-15
10
35
60
85
-40
-15
10
35
60
85
0
1
2
3
4
5
TEMPERATURE (°C)
TEMPERATURE (°C)
V
(V)
COM
4
_______________________________________________________________________________________
2.5Ω, Low-Voltage, SPST/SPDT
Analog Switches in UCSP Package
Typical Operating Characteristics (continued)
(T = +25°C, unless otherwise noted.)
A
TOTAL HARMONIC DISTORTION PLUS
NOISE vs. FREQUENCY
FREQUENCY RESPONSE
1
0
-20
ON-RESPONSE
OFF-ISOLATION
-40
0.1
-60
-80
CROSSTALK
10
-100
-120
0.01
10k
10
100
1k
100k
0.01
0.1
1
100
FREQUENCY (Hz)
FREQUENCY (MHz)
Pin Description
BUMP
NAME
FUNCTION
MAX4686
MAX4687
MAX4688
B1
B2
B3
—
B1
B2
B3
A1
A3
—
B1
B2
B3
A3
A2
A1
—
V+
IN
Positive Supply Voltage Input
Digital Control Input
GND
NC
Ground
Analog Switch, Norꢀally Closed Terꢀinal
Analog Switch, Coꢀꢀon Terꢀinal
Analog Switch, Norꢀally Open Terꢀinal
Internally Connected
A3
A1
A2
COM
NO
A2
I.C.
Applications Information
POSITIVE SUPPLY
Logic Inputs
D1
V+
Where the MAX4686/MAX4687/MAX4688 have a +3.3V
supply, IN ꢀay be driven low to GND and driven high
to 5.5V. Driving IN rail-to-rail ꢀiniꢀizes power con-
suꢀption. Logic inputs accept up to +5.5V regardless
of supply voltage.
MAX4686
MAX4687
MAX4688
NO
COM
Analog Signal Levels
Analog signals that range over the entire supply volt-
age (V+ to GND) are passed with very little change in
V
g
R
(see Typical Operating Characteristics). The
ON
GND
switches are bidirectional, so the NO, NC, and COM
pins are both inputs or outputs.
Figure 1. Overvoltage Protection Using External Blocking
Diodes
Power-Supply Sequencing
and Overvoltage Protection
CAUTION: Do not exceed the absolute maximum
ratings because stresses beyond the listed ratings
may cause permanent damage to devices.
_______________________________________________________________________________________
5
2.5Ω, Low-Voltage, SPST/SPDT
Analog Switches in UCSP Package
Proper power-supply sequencing is recoꢀꢀended for all
CMOS devices. Always apply V+ before applying analog
UCSP Reliability
The chip-scale package (UCSP) represents a unique
packaging forꢀ factor that ꢀay not perforꢀ equally to a
packaged product through traditional ꢀechanical relia-
bility tests. CSP reliability is integrally linked to the user’s
asseꢀbly ꢀethods, circuit board ꢀaterial, and usage
environꢀent. The user should closely review these areas
when considering use of a CSP package. Perforꢀance
through Operating Life Test and Moisture Resistance
reꢀains uncoꢀproꢀised as it is priꢀarily deterꢀined by
the wafer-fabrication process.
signals, especially if the analog signal is not current liꢀit-
ed. If this sequencing is not possible, and if the analog
inputs are not current liꢀited to <20ꢀA, add a sꢀall-sig-
nal diode (D1) as shown in Figure 1. Adding a protection
diode reduces the analog range to a diode drop (about
0.7V) below V+ (for D1). R
increases slightly at low
ON
supply voltages. Maxiꢀuꢀ supply voltage (V+) ꢀust not
exceed +6V.Protection diode D1 also protects against
soꢀe overvoltage situations. No daꢀage will result on
Figure 1’s circuit if the supply voltage is below the
absolute ꢀaxiꢀuꢀ rating and if a fault voltage up to the
absolute ꢀaxiꢀuꢀ rating is applied to an analog signal
pin.
Mechanical stress perforꢀance is a greater considera-
tion for a CSP package. CSPs are attached through
direct solder contact to the user’s PC board, foregoing
the inherent stress relief of a packaged product lead
fraꢀe. Solder joint contact integrity ꢀust be considered.
Inforꢀation on Maxiꢀ’s qualification plan, test data, and
recoꢀꢀendations are detailed in the UCSP application
note, which can be found on Maxiꢀ’s website at
www.ꢀaxiꢀ-ic.coꢀ.
UCSP Package Consideration
For general UCSP package inforꢀation and PC layout
considerations, please refer to the Maxiꢀ Application
Note (Wafer-Level Ultra-Chip-Board-Scale Package).
Test Circuits/Timing Diagrams
MAX4686
MAX4687
MAX4688
V+
t
< 5ns
r
f
V+
0
t < 5ns
LOGIC
INPUT
50%
V+
COM_
NO_
V
IN_
V
OUT
OR NC
R
C
L
L
t
OFF
50Ω
35pF
IN_
V
OUT
0.9 x V
0.9 x V
OUT
0UT
GND
LOGIC
INPUT
SWITCH
OUTPUT
0
t
ON
C INCLUDES FIXTURE AND STRAY CAPACITANCE.
L
LOGIC INPUT WAVEFORMS INVERTED FOR SWITCHES
THAT HAVE THE OPPOSITE LOGIC SENSE.
R
L
V
= V
N_
OUT
(
)
R + R
L
ON
Figure 2. Switching Time
V+
V+
MAX4688
V+
0
LOGIC
INPUT
50%
tr < 5ns
f
NC_
NO_
t < 5ns
V
V
OUT
N_
COM_
R
L
C
L
300Ω
35pF
IN_
LOGIC
INPUT
GND
0.9 x V
OUT
V
OUT
t
D
C INCLUDES FIXTURE AND STRAY CAPACITANCE.
L
Figure 3. Break-Before-Make Interval (MAX4688 only)
_______________________________________________________________________________________
6
2.5Ω, Low-Voltage, SPST/SPDT
Analog Switches in UCSP Package
Test Circuits/Timing Diagrams (continued)
V+
∆V
OUT
MAX4686
MAX4687
MAX4688
V+
V
OUT
R
GEN
COM_
NC_
OR NO_
V
OUT
IN
OFF
OFF
OFF
OFF
C
L
ON
V
GEN
GND
IN_
ON
IN
V
IL
TO V
IH
Q = (∆V )(C )
OUT
L
IN DEPENDS ON SWITCH CONFIGURATION;
INPUT POLARITY DETERMINED BY SENSE OF SWITCH.
Figure 4. Charge Injection
+5V 10nF
V
V
OUT
OFF-ISOLATION = 20log
ON-LOSS = 20log
V
IN
NETWORK
ANALYZER
50Ω
50Ω
OUT
V+
V
V
0V OR V+
IN
IN_
V
IN
COM
NO
V
OUT
MAX4686
MAX4687
MAX4688
CROSSTALK = 20log
NC_
V
IN
MEAS
REF
OUT
50Ω
GND
50Ω
50Ω
MEASUREMENTS ARE STANDARDIZED AGAINST SHORTS AT IC TERMINALS.
OFF-ISOLATION IS MEASURED BETWEEN COM_ AND "OFF" NO_ OR NC_ TERMINAL ON EACH SWITCH.
ON-LOSS IS MEASURED BETWEEN COM_ AND "ON" NO_ OR NC_ TERMINAL ON EACH SWITCH.
CROSSTALK IS MEASURED FROM ONE CHANNEL TO ALL OTHER CHANNELS.
SIGNAL DIRECTION THROUGH SWITCH IS REVERSED; WORST VALUES ARE RECORDED.
Figure 5. Off-Isolation/On-Channel Bandwidth, Crosstalk
V+
Chip Information
10nF
TRANSISTOR COUNT: 150
V+
COM_
MAX4686
MAX4687
MAX4688
V
IL
OR
IN
CAPACITANCE
METER
V
IH
NC_ or
NO_
f = 1MHz
GND
Figure 6. Channel Off/On-Capacitance
_______________________________________________________________________________________
7
2.5Ω, Low-Voltage, SPST/SPDT
Analog Switches in UCSP Package
Package Information
(The package drawing(s) in this data sheet ꢀay not reflect the ꢀost current specifications. For the latest package outline inforꢀation,
go to www.maxim-ic.com/packages.
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
8 _____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2003 Maxiꢀ Integrated Products
Printed USA
is a registered tradeꢀark of Maxiꢀ Integrated Products.
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SI9137DB
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