MAX4888C [MAXIM]
Superior Bandwidth Return Loss;
| 型号： | MAX4888C |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | Superior Bandwidth Return Loss |
| 文件： | 总10页 (文件大小：1099K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
19-5706; Rev 0; 12/10
Up to 8.0Gbps Dual Passive Switches
General Description
Features
The MAX4888B/MAX4888C dual double-pole/double-
throw (2 x DPDT), high-speed passive switches are
S Single +3.3V Power-Supply Voltage
S Supports PCIe Gen I, Gen II, and Gen III Data
M
ideal for switching two half-lanes of PCI Express (PCIe)
Rates
data between two possible destinations. These devices
feature a dual digital control input to switch signal paths.
The MAX4888C is intended for use in systems where
both the input and output are capacitively coupled (e.g.,
SAS, SATA, XAUI, and PCIe) and provides a 10FA (typ)
source current and a 60kI (typ) internal biasing resistor
to GND at the AOUT_ and BOUT_ pins.
S Supports Up To and Including 6.0Gbps SAS/SATA
Signals
S Supports Other High-Speed Interfaces (e.g., XAUI)
S Superior Bandwidth Return Loss
S Small, 3.5mm x 5.5mm, 28-Pin TQFN Package
The devices are fully specified to operate from a single
+3.3V (typ) power supply. Both devices are available
in an industry-standard 3.5mm x 5.5mm, 28-pin TQFN
package. They operate over the -40NC to +85NC extend-
ed temperature range.
Ordering Information
PART
TEMP RANGE
-40NC to +85NC
-40NC to +85NC
PIN-PACKAGE
28 TQFN-EP*
28 TQFN-EP*
MAX4888BETI+
MAX4888CETI+
+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed pad.
Applications
Desktop PCs
Notebook PCs
Servers
Typical Operating Circuit
CONNECTION SELECT
V
V
CC
CC
AOUTA+
AOUTA-
BOUTA+
BOUTA-
SEL
SEL
AOUTA+
AOUTA-
BOUTA+
BOUTA-
PCIe HOST
PCIe DEVICE
SELB
SELB
AIN+
AIN-
BIN+
BIN-
AIN+
AIN-
BIN+
BIN-
MAX4888C
MAX4888C
AOUTB+
AOUTB-
BOUTB+
BOUTB-
AOUTB+
AOUTB-
BOUTB+
BOUTB-
SAS HOST
SAS DEVICE
GND
GND
NOTE: CAPACITIVE COUPLING WAS OMITTED TO SIMPLIFY ILLUSTRATION.
PCI Express is a registered trademark of PCI-SIG Corp.
_______________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
Up to 8.0Gbps Dual Passive Switches
ABSOLUTE MAXIMUM RATINGS
(All voltages referenced to GND, unless otherwise noted.)
Continuous Current (SEL, SELB) .................................... Q10mA
V
CC
..........................................................................-0.3V to +4V
Peak Current (SEL, SELB)
SEL, SELB, AIN+, AIN-, BIN+, BIN-, AOUTA+,
AOUTA-, AOUTB+, AOUTB-, BOUTA+,
(pulsed at 1ms, 10% duty cycle) ................................ Q10mA
Continuous Power Dissipation (T = +70NC)
A
BOUTA-, BOUTB+, BOUTB- (Note 1).. -0.3V to (V
Continuous Current (AIN_ to AOUTA_/AOUTB_,
BIN_ to BOUTA_/BOUTB_).......................................... Q15mA
Peak Current (AIN_ to AOUTA_/AOUTB_,
BIN_ to BOUTA_/BOUTB_)
(pulsed at 1ms, 10% duty cycle) ................................ Q70mA
+ 0.3V)
TQFN (derate 28.6mW/NC above +70NC)..................2286mW
Operating Temperature Range.......................... -40NC to +85NC
Junction Temperature .....................................................+150NC
Storage Temperature Range............................ -65NC to +150NC
Lead Temperature (soldering, 10s) ................................+300NC
Soldering Temperature (reflow) ......................................+260NC
CC
Note 1: Signals on SEL, SELB, AIN_, BIN _, AOUTA_, AOUTB_, BOUTA_, and BOUTB_ exceeding V
or GND are clamped by
CC
internal diodes. Limit forward-diode current to maximum current rating.
PACKAGE THERMAL CHARACTERISTICS (Note 2)
TQFN
Junction-to-Ambient Thermal Resistance (q ) ..........35°C/W
JA
Junction-to-Case Thermal Resistance (q ).................2°C/W
JC
Note 2: Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-
layer board. For detailed information on package thermal considerations, refer to www.maxim-ic.com/thermal-tutorial.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V
CC
= 3.3V Q10%, T = -40NC to +85NC unless otherwise noted. Typical values are at V
= 3.3V, T = +25NC, unless otherwise
CC A
A
,
noted.) (Note 3)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
DC PERFORMANCE
AIN_, BIN_, AOUTA_, BOUTA_, AOUTB_,
BOUTB_
V
1.8
-
CC
Analog-Signal Range
On-Resistance
V
-0.3
V
I
I
I
INPUT
V
CC
= +3.0V, I
= I
= 15mA,
AIN_
BIN_
R
6.4
0.2
0.3
8.4
ON
V_
OUTA_
= V_
= 0V, 1.2V
OUTB_
On-Resistance Match
Between Channels
V
CC
= +3.0V, I
= I
= 15mA,
AIN_
BIN_
DR
1.5
1
ON
V_
OUTA_
= V_
= 0V (Note 4)
OUTB_
V
CC
= +3.0V, I
= I
= 15mA,
AIN_
BIN_
On-Resistance Flatness
R
FLAT(ON)
V_
OUTA_
= V_
= 0V, 1.2V (Note 5)
OUTB_
V
V
= +3.6V, V
= V
= 1.2V, 0V
= 0V, 1.2V;
CC
AIN_
BIN_
_OUTA_ or _OUTB_
Off-Leakage Current
I_
OUTA_(OFF),
or V
-1
-1
+1
+1
FA
FA
_OUTA_
_OUTB_
I_
OUTB_(OFF)
(MAX4888B)
V
V
= +3.6V , V
= V
= V
= 0V, 1.2V;
CC
AIN_
BIN_
I
AIN_(ON),
AIN_, BIN_ On-Leakage Current
or V
= V
or
_OUTA_
_OUTB_
AIN_
BIN_
I
BIN_(ON)
unconnected (MAX4888B)
All other ports are unconnected
(MAX4888C)
Output Short-Circuit Current
Output Open-Circuit Voltage
5
15
FA
All other ports are unconnected
(MAX4888C)
0.2
0.6
0.9
V
2
Up to 8.0Gbps Dual Passive Switches
ELECTRICAL CHARACTERISTICS (continued)
(V
CC
= 3.3V Q10%, T = -40NC to +85NC unless otherwise noted. Typical values are at V
= 3.3V, T = +25NC, unless otherwise
CC A
A
,
noted.) (Note 3)
PARAMETER
AC PERFORMANCE
Switch Turn-On Time
SYMBOL
CONDITIONS
= Z = 50I
MIN
TYP
MAX
UNITS
t
Z
Z
65
7
ns
ns
ON_SEL
S
L
= Z = 50I, Figure 1, measured at
S
L
Switch Turn-Off Time
Propagation Delay
t
OFF_SEL
500MHz
Z
S
= Z = 50I, Figure 2, measured at
L
t
43
8
ps
ps
ps
PD
500MHz
Z
S
= Z = 50I, Figure 2, measured at
L
Output Skew Between Pairs
t
SK1
SK2
500MHz
Output Skew Between Same
Pair
t
Z
S
= Z = 50I, Figure2
10
L
0Hz < f P 2.8GHz
2.8GHz < f P 5.0GHz
5.0GHz < f P 8.0GHz
f > 8.0GHz
-14
-8
Differential Return Loss (Note 6)
S
S
dB
DD11
-5
-1
Differential Insertion Loss
Bandwidth
Table 1
dB
DD21
S
/S
8
GHz
DD12 DD21
0Hz < f P 2.5GHz
2.5GHz < f P 5.0GHz
5.0GHz < f P 8.0GHz
f > 8.0GHz
-30
-25
-35
-35
-15
-12
-12
-12
Differential Crosstalk (Note 6)
Differential Off-Isolation (Note 6)
S
dB
dB
DDCTK
0Hz < f P 2.5GHz
2.5GHz < f P 5.0GHz
5.0GHz < f P 8.0GHz
f > 8.0GHz
S
DD21_OFF
CONTROL INPUT
Input Logic-High
V
1.4
3.0
V
V
IH
Input Logic-Low
V
0.6
IL
Input Logic Hysteresis
POWER SUPPLY
Power-Supply Range
V
130
mV
HYST
V
CC
3.6
1
V
V
CC
Supply Current
I
mA
CC
Note 3: All units are 100% production tested at T = +85NC. Limits over the operating temperature range are guaranteed by
A
design and characterization and are not production tested.
Note 4: DR
= R
- R
.
ON
ON(MAX)
ON(MIN)
Note 5: Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the
specified analog-signal range.
Note 6: Guaranteed by design; not production tested.
3
Up to 8.0Gbps Dual Passive Switches
Test Circuits/Timing Diagrams
SOURCE
LOAD
MAX4888B
MAX4888C
Z
S
V
OUT
Z
Σ
L
SEL
50%
90%
50%
SEL
V
OUT
10%
t
t
OFF_SEL
ON_SEL
THE FREQUENCY OF THE SIGNAL SHOULD BE ABOVE THE HIGHPASS FILTER CORNER OF THE COUPLING CAPACITORS.
Figure 1. Switching Time
Table 1. Insertion Loss Mask
FREQUENCY RANGE (GHz)
MAXIMUM INSERTION LOSS (dB)
1/3 x f + 17/30
0 to 2.5
2.5 to 5
GHZ
2/5 x f
- 2/5
- 4/15
- 12
GHZ
GHZ
GHZ
5 to 8
18/5 x f
Greater than 8
2 x f
4
Up to 8.0Gbps Dual Passive Switches
Test Circuits/Timing Diagrams (continued)
SOURCE
LOAD
MAX4888B
MAX4888C
Z
Z
S
S
V
OUTp
OUTn
Z
V
Σ
L
S+
V
V
Z
L
S-
Σ
SEL
CALIBRATION
TRACES
Z
Z
S
S
V
V
CALp
CALn
Z
V
Σ
L
SC+
V
Z
L
SC-
Σ
50%
50%
V
V
- V
CALp CALn
50%
50%
- V
OUTp OUTn
t
t
t
= max (t , t
)
PDr
PDf
PD
PDr PDf
VCM
VCM
V
V
OUTp
VCM
VCM
OUTn
t
= max (t , t
)
SKEW
SK1 SK2
t
t
SK2
SK1
AFTER ELIMINATING SOURCE AND CABLE SKEWS.
Figure 2. Propagation Delay and Output Skew
5
Up to 8.0Gbps Dual Passive Switches
Typical Operating Characteristics
(V
CC
= 3.3V, T = +25NC, unless otherwise noted.)
A
SUPPLY CURRENT vs. TEMPERATURE
ON-RESISTANCE vs. V
ON-RESISTANCE vs. V
_IN_
_IN_
350
300
250
200
150
100
8.0
10
9
MAX4888B
MAX4888C
7.5
7.0
6.5
6.0
5.5
5.0
4.5
4.0
T = +85°C
A
V
V
V
= 3.6V
CC
CC
CC
8
V
= 3.0V
CC
= 3.3V
= 3.0V
7
6
V
V
V
= 3.6V
= 3.3V
= 3.0V
CC
CC
CC
5
V
CC
= 3.3V
V
= 3.6V
CC
T = +25°C
A
4
T = -40°C
A
3
2
-40
-15
10
35
60
85
0
0.3
0.6
0.9
1.2
1.5
1.8
0
0.3
0.6
0.9
(V)
1.2
1.5
TEMPERATURE (°C)
V
(V)
V
_IN_
_IN_
DIFFERENTIAL RETURN LOSS
vs. FREQUENCY
LOGIC THRESHOLD
vs. SUPPLY VOLTAGE
TURN-ON/OFF TIME
vs. SUPPLY VOLTAGE
0
-10
-20
-30
-40
-50
-60
-70
-80
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
100
90
80
70
60
50
40
30
20
10
0
MASK
V
IH
t
ON_SEL
V
IL
t
OFF_SEL
MAX4888B
MAX4888C
8
0
2
4
6
10
3.0
3.1
3.2
3.3
(V)
3.4
3.5
3.6
3.0
3.1
3.2
3.3
(V)
3.4
3.5
3.6
FREQUENCY (GHz)
V
V
CC
CC
DIFFERENTIAL INSERTION LOSS
vs. FREQUENCY
DIFFERENTIAL OFF-ISOLATION
vs. FREQUENCY
DIFFERENTIAL CROSSTALK
vs. FREQUENCY
0
-2
0
-10
-20
-30
-40
-50
-60
-70
-80
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
-4
-6
MASK
-8
-10
-12
-14
-16
-18
-20
MAX4888B
MAX4888C
8
0
2
4
6
10
0
2
4
6
8
10
0
2
4
6
8
10
FREQUENCY (GHz)
FREQUENCY (GHz)
FREQUENCY (GHz)
6
Up to 8.0Gbps Dual Passive Switches
Pin Configuration
TOP VIEW
24 23 22 21 20 19 18 17 16 15
25
26
27
14
13 GND
12
11 GND
V
V
CC
CC
GND
MAX4888B
MAX4888C
V
CC
V
CC
GND 28
*EP
9
+
1
2
3
4
5
6
7
8
10
TQFN
*CONNECT EXPOSED PAD TO GND.
Pin Description
PIN
NAME
FUNCTION
1, 10, 11,
13, 16,
20, 23,
26, 28
GND
Ground
2
3
4
5
6
7
8
9
AIN+
AIN-
Analog Switch 1, Common Positive Terminal
Analog Switch 1, Common Negative Terminal
AOUTB+ Analog Switch 1, Normally Open Positive Terminal
AOUTB-
BIN+
Analog Switch 1, Normally Open Negative Terminal
Analog Switch 2, Common Positive Terminal
Analog Switch 2, Common Negative Terminal
BIN-
BOUTB+ Analog Switch 2, Normally Open Positive Terminal
BOUTB- Analog Switch 2, Normally Open Negative Terminal
12, 14,
19, 25,
27
Positive Supply-Voltage Input. Connect V
a 0.1FF ceramic capacitor placed as close as possible to the device. See the Board Layout section.
to a 3.0V to 3.6V supply voltage. Bypass V
to GND with
CC
CC
V
CC
Control Signal Input. SELB has a 70kI (typ) pullup resistor to V . If SELB is not in use, leave
unconnected.
CC
15
SELB
17
18
21
22
24
—
BOUTA-
Analog Switch 2, Normally Closed Negative Terminal
BOUTA+ Analog Switch 2, Normally Closed Positive Terminal
AOUTA- Analog Switch 1, Normally Closed Negative Terminal
AOUTA+ Analog Switch 1, Normally Closed Positive Terminal
SEL
EP
Control Signal Input. SEL has a 70kI (typ) pulldown resistor to GND.
Exposed Pad. Connect EP to GND.
7
Up to 8.0Gbps Dual Passive Switches
Functional Diagram/Truth Table
V
V
CC
CC
MAX4888B
MAX4888C
AIN+
AIN-
AOUTA+
AOUTA-
AIN+
AIN-
AOUTA+
AOUTA-
AOUTB+
AOUTB-
AOUTB+
AOUTB-
BIN+
BIN-
BOUTA+
BOUTA-
BIN+
BIN-
BOUTA+
BOUTA-
BOUTB+
BOUTB-
BOUTB+
BOUTB-
V
V
CC
CC
AIN_, BIN_ AIN_, BIN_
TO AOUTA_, TO AOUTB_,
SELB
SEL
SELB
SEL
CONTROL
CONTROL
SEL
SELB
BOUTA_
BOUTB_
0 (DEFAULT)
1
0
0
OFF
ON
OFF
ON
0 (DEFAULT) 1 (DEFAULT)
1 (DEFAULT)
ON
OFF
GND
GND
1
OFF
ON
8
Up to 8.0Gbps Dual Passive Switches
Detailed Description
Applications Information
The MAX4888B high-speed passive switch routes high-
speed differential signals such as PCIe, SAS, SATA,
and XAUI from one source to two possible destina-
tions or vice versa. The MAX4888B is ideal for routing
PCIe signals to change the system configuration. The
MAX4888C features a 10FA (typ) source current and
a 60kI (typ) internal biasing resistor to GND at the
AOUTA_, BOUTA_, AOUTB_, and BOUTB_ terminals.
The MAX4888C is ideal for circuits that are capacitively
coupled at both the output and input. These devices are
protocol independent and can be used to switch two dif-
ferent protocol signals over the same physical lane. They
feature dual digital control inputs (SEL, SELB) to switch
signal paths. SEL has a 70kI (typ) pulldown resistor to
High-Speed Switching
The devices’ primary applications are aimed at sharing
resources. For example, a single lane of PCIe or SAS
can be shared between a single host and two devices.
This could be used for redundancy or to share resources
such as a physical lane or route a lane between one host
and two devices or two hosts and one device.
Board Layout
High-speed switches require proper layout and design
procedures for optimum performance. Keep controlled
impedance PCB traces as short as possible or follow
impedance layouts per the PCIe specification. Ensure
that power-supply bypass capacitors are placed as
close as possible to the device. Multiple bypass capaci-
tors are recommended. Connect all grounds and the
exposed pad to a large ground plane.
GND and SELB has a 70kI (typ) pullup resistor to V
.
CC
These devices are fully specified to operate from a single
3.0V to 3.6V power supply.
Chip Information
Digital Control Input (SEL, SELB)
The devices provide dual digital control inputs (SEL,
SELB) to select the signal path between the AIN_, BIN_
and AOUTA_, BOUTA_ or AOUTB_, BOUTB_ chan-
nels. In most cases SEL is chosen and SELB is uncon-
nected. The truth table for the devices is depicted in the
Functional Diagram/Truth Table. SEL has a 70kI (typ)
pulldown resistor to GND and SELB has a 70kI (typ)
PROCESS: CMOS
Package Information
For the latest package outline information and land patterns,
go to www.maxim-ic.com/packages. Note that a “+”, “#”, or
“-” in the package code indicates RoHS status only. Package
drawings may show a different suffix character, but the drawing
pertains to the package regardless of RoHS status.
pullup resistor to V
.
CC
PACKAGE
TYPE
PACKAGE
CODE
OUTLINE
NO.
LAND
PATTERN NO.
Analog-Signal Levels
The devices accept signals from -0.3V to (V - 1.8V).
CC
Signals on the AIN+ and BIN+ channels are routed to
either the AOUTA+, BOUTA+ or AOUTB+, BOUTB+
channels. Signals on the AIN- and BIN- channels are rout-
ed to either the AOUTA-, BOUTA- or AOUTB-, BOUTB-
channels. The devices are bidirectional switches, allow-
ing AIN_, BIN_ and AOUTA_, BOUTA_, AOUTB_, and
BOUTB_ to be used as either inputs or outputs.
28 TQFN-EP
T283555+1
21-0184
90-0123
9
Up to 8.0Gbps Dual Passive Switches
Revision History
REVISION REVISION
PAGES
CHANGED
DESCRIPTION
NUMBER
DATE
0
12/10
Initial release
—
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied.
Maxim reserves the right to change the circuitry and specifications without notice at any time.
10
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
2010 Maxim Integrated Products Maxim is a registered trademark of Maxim Integrated Products, Inc.
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