MAX4906EFELB+ [MAXIM]
SPDT, 2 Func, 1 Channel, BICMOS, 2 X 2 MM, 0.80 MM HEIGHT, LEAD FREE, MICRO DFN-10;
| 型号： | MAX4906EFELB+ |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | SPDT, 2 Func, 1 Channel, BICMOS, 2 X 2 MM, 0.80 MM HEIGHT, LEAD FREE, MICRO DFN-10 信息通信管理 光电二极管 输出元件 |
| 文件： | 总13页 (文件大小：184K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
±9-06±3; Rev 2; 3/09
High-/Full-Speed USB 2.0 Switches
with High ESD
MAX4906EF
General Description
Features
The MAX4906EF are electrostatic discharge (ESD)-pro-
tected analog switches that combine low on-capacitance
♦
15kV (Human Body Model) ESD Protection,
on COM_
(C ) and low on-resistance (R ) necessary for high-
ON
ON
♦ Fully Specified for a Single +2.7V to +3.6V
Power-Supply Voltage
♦ Low 4Ω (typ), 7Ω (max) On-Resistance (R
♦ -3dB Bandwidth: 500MHz (typ)
♦ Low Bit-to-Bit Skew ≤ 20ps
♦ Charge-Pump Noise = 90µV (typ)
performance switching applications. The COM_ inputs
are protected against ±±15k ESD without latchup or dam-
age. The device is designed for USB 2.0 high-speed
applications at 480Mbps. The switches also handle all the
requirements for USB low- and full-speed signaling.
)
ON
The MAX4906EF features two single-pole/double-throw
(SPDT) switches. The device is fully specified to operate
from a single +2.7k to +3.6k power supply and is protect-
ed against a +1.1k short to all analog inputs (COM_, NC_,
NO_). This feature ma5es the MAX4906EF fully compliant
with the USB 2.0 specification of +1.1k fault protection.
The device features a low threshold voltage and a +±.4k
♦ Charge-Pump Enable
♦ No Need for Logic-Level Shifters for 1.4V or
Above
♦ COM Analog Inputs Fault-Protected Against
_
Shorts to USB Supply Rail Up to +5.5V
k , permitting them to be used with low-voltage logic.
IH
The device features a QP input that when driven high,
turns the charge pump off and sets the device in standby
mode. When the device is in standby mode, the quies-
cent supply current is reduced to 3µA (max) and the
switches remain operable.
♦ Low Supply Current 3µA (max) in Standby
♦ Space-Saving 10-Pin, 2mm x 2mm µDFN Package
Ordering Information
The MAX4906EF is available in a space-saving, 2mm x
2mm µDFN pac5age and operates over a -40°C to +81°C
temperature range.
PIN-
TOP
PART
TEMP RANGE
PACKAGE MARK
MAX4906EFELB+T -40°C to +85°C
10 μDFN AAJ
Applications
+Denotes a lead(Pb)-free/RoHS-compliant pac5age.
T = Tape and reel.
USB Switching
Cell Phones
PDAs
Relay Replacements
Ethernet Switching
kideo Switching
Bus Switches
Digital Still Cameras
GPS
T3/E3 Switches for
Redundancy Protection
Noteboo5 Computers
Typical Operating Characteristics
Pin Configuration
EYE DIAGRAM
V+ = 3.3V
TOP VIEW
V
I
= 9mA
NO1OUT
BIAS
+
UI = 2.08ns
IN
QP
1
2
3
4
5
10 V+
9
8
7
6
NC1
NC2
NO1
NO2
USB 2.0
HIGH SPEED
TRANSMIT
TEMPLATE
GND
MAX4906EF
100mV/div
COM1
COM2
V
NO2OUT
μDFN
200ps/div
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
High-/Full-Speed USB 2.0 Switches
with High ESD
ABSOLUTE MAXIMUM RATINGS
(All voltages referenced to GND.)
Continuous Power Dissipation (T = +70°C)
A
k+.............................................................................-0.3k to +4k
IN, QP (Note ±).........................................................-0.3k to +4k
COM_, NO_, NC_ ..................................................-0.3k to +1.1k
Continuous Current (COM_ to NO_/NC_) ......................±±20mA
Pea5 Current, (COM_ to NO_/NC_)
±0-Pin µDFN (derate 1.0mW/°C above +70°C) ...........403mW
Operating Temperature Range ..........................-40°C to +81°C
Junction Temperature .....................................................+±10°C
Storage Temperature Range.............................-61°C to +±10°C
Lead Temperature (soldering, ±0s) .................................+300°C
(pulsed at ±ms ±0% duty cycle).................................±240mA
Note 1: Signals on IN, QP exceeding GND are clamped by internal diodes. Limit forward-diode current to maximum current rating.
MAX4906EF
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(k+ = +2.7k to +3.6k, T = T
A
to T
, charge-pump enabled, unless otherwise noted. Typical values are at k+= 3.3k, T =
MAX A
MIN
+21°C.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
ANALOG SWITCH
k
_,k
,
COM NO_
k
Analog Signal Range
QP = GND or k+ (Note 3)
0
3.6
k
k
NC_
Fault-Protection Trip Threshold
(Note 4)
k
3.62
3.9
3.8
4.20
FP
k+ = 2.7k,
T
T
T
T
T
T
T
T
T
T
= +21°C
1
6
A
A
A
A
A
A
A
A
A
A
I
= -±0mA,
COM_
Ω
Ω
k
= 0k, ±.1k,
COM_
= T
to T
MIN
MAX
MAX
MAX
MAX
MAX
QP = GND
k+ = 2.7k,
On-Resistance, Charge-Pump
Enabled
R
ON
= +21°C
= T to T
4
1
7
I
k
= -±0mA,
= 2.7k,
COM_
COM_
8
MIN
QP = GND
k+ = 3.0k,
= +21°C
= T to T
±2
±3
±1
±7
0.8
±.0
I
= -±0mA,
COM_
k
= 0k, ±.1k,
COM_
MIN
QP = k+
On-Resistance, Charge-Pump
Disabled
R
Ω
ON
k+=2.7k,
= +21°C
= T to T
8
I
= -±0mA,
COM_
k
= 0k, ±.1k,
COM_
MIN
QP = k+
k+ = 2.7k,
= +21°C
= T to T
0.1
On-Resistance Match Between
Channels
I
= -±0mA,
COM_
ΔR
Ω
Ω
ON
k
= 0k, ±.1k, 2.7k
COM_
MIN
(Note 1)
k+ = 2.7k,
I
= -±0mA, k
= 0k, ±.1k
On-Resistance Flatness
R
0.1
COM_
COM_
FLAT(ON)
(Note 6)
2
_______________________________________________________________________________________
High-/Full-Speed USB 2.0 Switches
with High ESD
MAX4906EF
ELECTRICAL CHARACTERISTICS (continued)
(k+ = +2.7k to +3.6k, T = T
A
to T
, charge-pump enabled, unless otherwise noted. Typical values are at k+= 3.3k, T =
MAX A
MIN
+21°C.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
= 0.3k, 3.3k;
= 3.3k, 0.3k
NC_
MIN
TYP
MAX
UNITS
I
I
k+ = 3.6k, k
COM_
NC_, NO_
Off-Lea5age Current
On-Lea5age Current
-±
+±
µA
k
or k
(OFF)
NO_
I
I
k+ = 3.6k, k
= 0.3k, 3.3k;
COM
= 0.3k, 3.3k, or unconnected
NC_
NC_, NO_
-±
+±
µA
MHz
dB
k
or k
(ON)
NO_
SWITCH AC PERFORMANCE
On-Channel -3dB Bandwidth
BW
R = R = 10Ω, signal = 0dBm, Figure ±
100
-60
L
S
f = ±0MHz; k
, k
NO_ NC_
= ±k
;
P-P
R = R = 10Ω, Figure ±
L
S
Off-Isolation
k
ISO
f = 210MHz; k
, k
NO_ NC_
= ±k
;
P-P
-32
-19
R = R = 10Ω, Figure ±
L
S
f = ±0MHz; k
, k
NO_ NC_
= ±k
;
P-P
R = R = 10Ω, Figure ±
L
S
Crosstal5 (Note 7)
k
dB
µk
CT
QP
f = 210MHz; k
, k
= ±k
;
NO_ NC_ P-P
-3±
90
R = R = 10Ω, Figure ±
L
S
Charge-Pump Noise (Note 8)
k
Any input or output switch terminal = 10Ω
SWITCH DYNAMICS
NO_, NC_, COM_
Off-Capacitance (Note 9)
C
f = ±MHz, Figure 2
f = ±MHz, Figure 2
f = ±MHz
9
±0
±2
pF
pF
pF
ns
(OFF)
NO_, NC_, COM_
On-Capacitance (Note 9)
C
±0
0.4
±.4
(ON)
ONM
Switch On-Capacitance Matching
(Note 9)
C
k
k
_, k _ = ±.1k; R = 300Ω, C = 31pF,
NC L L
NO
Turn-On Time
t
ON
= k+, k = 0k, QP = GND, Figure 3
IH
IL
k
k
_, k _ = ±.1k; R = 300Ω, C = 31pF,
NC L L
NO
Turn-Off Time
t
31
0.2
±
ns
ns
µs
OFF
= k+, k = GND, QP = GND, Figure 3
IH
IL
Propagation Delay
t
,t
R = R = 10Ω, Figure 4
L S
PLH_ PHL
k
= 0 to 1k step,
COM_
Fault-Protection Response Time
t
FP
R = R = 10Ω, C = ±0pF, Figure 1
L
S
L
k
= 1k to 3k step,
COM_
Fault-Protection Recovery Time
t
±
20
1
µs
ps
ps
FPR
R = R = 10Ω, C = ±0pF, Figure 1
L
S
L
Output S5ew Between Switches
(Note 9)
S5ew between switch ± and switch 2,
R = R = 10Ω, Figure 4
t
±00
±00
SK(o)
SK(p)
L
S
Output S5ew Same Switch
(Note 9)
S5ew between opposite transitions in same
switch, R = R = 10Ω, Figure 4
t
L
S
_______________________________________________________________________________________
3
High-/Full-Speed USB 2.0 Switches
with High ESD
ELECTRICAL CHARACTERISTICS (continued)
(k+ = +2.7k to +3.6k, T = T
A
to T
, charge-pump enabled, unless otherwise noted. Typical values are at k+= 3.3k, T =
MAX A
MIN
+21°C.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Total Harmonic Distortion Plus
Noise
k
= 2k , R = 600Ω, f = 20Hz to
COM_
P-P
L
THD+N
0.0±
%
205Hz
k
= ±.1k, R
= 0Ω, C = ±00pF,
GEN L
GEN
Charge Injection
Q
20
pC
Figure 6
SWITCH LOGIC
MAX4906EF
Logic-Input koltage Low
Logic-Input koltage High
Input-Logic Hysteresis
Input Lea5age Current
k
0.4
k
k
IL
k
±.4
IH
k
±00
±60
mk
µA
k
HYST
I
IN
k+ = 3.6k, k = 0 or k+
-±
+±
3.6
IN
Operating Supply-koltage Range
Quiescent Supply Current
k+
I+
2.7
k+ = 3.6k, k = 0 or k+, QP = GND
±000
µA
IN
Quiescent Supply Current With
Charge-Pump Disabled
I+
k+ = 3.6k, k = 0 or k+, QP = k+
3
µA
IN
ESD PROTECTION
COM_
Human Body Model
±±1
5k
Note 2: All units are ±00% production tested at T = +21°C. Limits over the operating temperature range are guaranteed by design
A
and not production tested.
Note 3: The switch will turn off for voltages above (k ); therefore, protecting downstream circuits in case of a fault condition.
FP
Note 4: Fault-protection trip threshold limits are not production tested; guaranteed by design.
Note 5: ΔR
= | R
R
|
ON(MAX)
ON(CH±) – ON(CH2)
Note 6: Flatness is defined as the difference between the maximum and minimum value of on-resistance, as measured over
specified analog signal ranges.
Note 7: Between any two switches.
Note 8: Noise specification is measured pea5 to pea5.
Note 9: Switch off-capacitance, switch on-capacitance, output s5ew between switches, and output s5ew same-switch limits are not
production tested; design guaranteed by correlation.
Typical Operating Characteristics
(k+ = 3.3k, T = +21°C, unless otherwise noted.)
A
ON-RESISTANCE vs. V
ON-RESISTANCE vs. V
COM
LEAKAGE CURRENT vs. TEMPERATURE
COM
MAX4906EF toc03
10
9
8
7
6
5
4
3
2
1
0
10
9
8
7
6
5
4
3
2
1
0
6
5
4
3
2
1
0
6
V+ = 3.6V
V+ = 3.6V
T
A
= +85°C
5
V+ = 2.7V
4
3
COM ON-LEAKAGE
V+ = 3.3V
T
A
= +25°C
T
A
= -40°C
2
1
0
COM OFF-LEAKAGE
0
1.1
2.2
3.3
0
0.9
1.8
2.7
3.6
-40
-15
10
35
60
85
V
(V)
V
(V)
TEMPERATURE (°C)
COM
COM
4
_______________________________________________________________________________________
High-/Full-Speed USB 2.0 Switches
with High ESD
MAX4906EF
Typical Operating Characteristics (continued)
(k+ = 3.3k, T = +21°C, unless otherwise noted.)
A
QUIESCENT SUPPLY CURRENT
vs. LOGIC LEVEL
QUIESCENT SUPPLY CURRENT
vs. TEMPERATURE
CHARGE INJECTION vs. V
COM
200
180
160
140
120
100
80
25
20
15
10
5
220
C = 100pF
L
V+ = 3.6V
200
180
160
V+ = 2.7V
60
40
20
0
140
0
0
1.1
2.2
3.3
0
1.1
2.2
3.3
-40
-15
10
35
60
85
V
(V)
LOGIC LEVEL (V)
TEMPERATURE (°C)
COM
LOGIC-INPUT LOW THRESHOLD
vs. SUPPLY VOLTAGE
TURN-ON/-OFF TIME
vs. SUPPLY VOLTAGE
MAX4906EF toc08
1.0
0.8
0.6
0.4
0.2
0
5
4
3
2
1
0
40
38
36
34
32
30
t
OFF
V
IL
t
ON
2.7
3.0
3.3
3.6
2.7
3.0
3.3
3.6
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
TURN-ON/-OFF TIME
vs. TEMPERATURE
RISE-/FALL-TIME PROPAGATION DELAY
vs. SUPPLY VOLTAGE
MAX4906EF toc09
10
8
40
38
36
34
32
30
250
240
230
220
210
200
t
OFF
6
t
PHL
4
2
t
PLH
t
ON
0
-40
-15
10
35
60
85
2.7
3.0
3.3
3.6
TEMPERATURE (°C)
SUPPLY VOLTAGE (V)
_______________________________________________________________________________________
5
High-/Full-Speed USB 2.0 Switches
with High ESD
Typical Operating Characteristics (continued)
(k+ = 3.3k, T = +21°C, unless otherwise noted.)
A
RISE-/FALL-TIME PROPAGATION DELAY
SAME SWITCH OUTPUT SKEW
vs. SUPPLY VOLTAGE
OUTPUT SKEW BETWEEN SWITCHES
vs. SUPPLY VOLTAGE
vs. TEMPERATURE
250
10
9
8
7
6
5
4
3
2
1
0
30
20
10
0
240
230
MAX4906EF
t
PLH
220
210
200
t
PHL
-40
-15
10
35
60
85
2.7
3.0
3.3
3.6
2.7
3.0
3.3
3.6
TEMPERATURE (°C)
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
TOTAL HARMONIC DISTORTION
PLUS NOISE vs. FREQUENCY
FREQUENCY RESPONSE
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
-110
1
0.1
R = 600Ω
L
OFF-ISOLATION
0.01
0.001
CROSSTALK
10
1
100
1000
10
100
1k
10k
100k
FREQUENCY (MHz)
FREQUENCY (Hz)
6
_______________________________________________________________________________________
High-/Full-Speed USB 2.0 Switches
with High ESD
MAX4906EF
Pin Description
PIN
±
NAME
IN
FUNCTION
Digital Control Input. IN controls switch ± and switch 2.
Charge-Pump Enable Input. Drive QP high to turn charge pump off. For normal operation, drive QP low.
Ground
2
QP
3
GND
COM±
COM2
NO2
NO±
NC2
NC±
4
Analog Switch ±—Common Terminal
1
Analog Switch 2—Common Terminal
6
Analog Switch 2—Normally Open Terminal
7
Analog Switch ±—Normally Open Terminal
8
Analog Switch 2—Normally Closed Terminal
Analog Switch ±—Normally Closed Terminal
9
Positive-Supply koltage Input. Connect k+ to a +2.7k to +3.6k supply voltage. Bypass k+ to GND with a
0.±µF capacitor.
±0
k+
Test Circuits/Timing Diagrams
10nF
+3.3V
V+
V
V
OUT
OFF-ISOLATION = 20log
CROSSTALK = 20log
IN
NETWORK
ANALYZER
V
OUT
50Ω
50Ω
V
V
0V OR V+
IN
IN_
V
IN
COM1
NO1*
MAX4906EF
NC1
MEAS
REF
OUT
50Ω
50Ω
50Ω
GND
*FOR CROSSTALK THIS PIN IS NO2.
NC2 AND COM2 ARE OPEN.
MEASUREMENTS ARE STANDARDIZED AGAINST SHORTS AT IC TERMINALS.
OFF-ISOLATION IS MEASURED BETWEEN COM_ AND "OFF" NO_ OR NC_ TERMINAL ON EACH SWITCH.
CROSSTALK IS MEASURED FROM ONE CHANNEL TO THE OTHER CHANNEL.
SIGNAL DIRECTION THROUGH SWITCH IS REVERSED; WORST VALUES ARE RECORDED.
Figure ±. Off-Isolation and Crosstal5
_______________________________________________________________________________________
7
High-/Full-Speed USB 2.0 Switches
with High ESD
Test Circuits/Timing Diagrams (continued)
V+
10nF
V+
COM_
MAX4906EF
IN
V
OR V
IL
IH
CAPACITANCE
METER
MAX4906EF
NC_ or
NO_
f = 1MHz
GND
Figure 2. Channel Off-/On-Capacitance
MAX4906EF
V+
t < 5ns
t < 5ns
f
r
V
IH
LOGIC
INPUT
50%
V+
COM_
V
IL
NO_
V
N_
V
OUT
OR NC_
t
OFF
R
L
C
L
IN
V
OUT
0.9 x V
0UT
0.1 x V
GND
OUT
LOGIC
INPUT
SWITCH
OUTPUT
0V
t
ON
C INCLUDES FIXTURE AND STRAY CAPACITANCE.
L
IN DEPENDS ON SWITCH CONFIGURATION;
INPUT POLARITY DETERMINED BY SENSE OF SWITCH.
R
L
V
= V
N_
OUT
(
)
ON
R + R
L
Figure 3. Switching Time
8
_______________________________________________________________________________________
High-/Full-Speed USB 2.0 Switches
with High ESD
MAX4906EF
Test Circuits/Timing Diagrams (continued)
MAX4906EF
NC1 OR
NO1
R
R
S
COM1
IN+
IN-
OUT+
OUT-
RISE-TIME PROPAGATION DELAY = t
OR t
PLHY
PLHX
FALL-TIME PROPAGATION DELAY = t
OR t
PHLY
PHLX
|
|
R
R
L
L
t
t
= |t
= |t
- t
| OR |t
- t
- t
SK(O)
SK(P)
PLHX PLHY
PHLX PHLY
- t
| OR |t
PLHX PHLX
PLHY PHLY
NC2 OR
NO2
S
COM2
IN
V
TO V
IH
IL
t
INFALL
t
INRISE
10%
V+
90%
90%
V
IN+
50%
50%
50%
10%
0V
V+
V
50%
IN-
0V
V+
t
t
OUTRISE
10%
OUTFALL
10%
t
t
PLHX
PHLX
90%
90%
V
OUT+
50%
50%
0V
V+
50%
50%
V
OUT-
0V
t
t
PHLY
PLHY
Figure 4. Output Signal S5ew, Rise/Fall Time, Propagation Delay
_______________________________________________________________________________________
9
High-/Full-Speed USB 2.0 Switches
with High ESD
Test Circuits/Timing Diagrams (continued)
5V
3V
2.5V
VCOM_
0V
t
PF
t
FPR
MAX4906EF
V
PF
3V
0V
VNO_
VNC_
2.5V
1.5V
Figure 1. MAX4906EF Fault-Protection Response/Recovery Time
V+
MAX4906EF
ΔV
OUT
V+
V
OUT
R
GEN
COM_
NC_
V
OUT
IN
OR NO_
OFF
OFF
OFF
OFF
C
L
ON
ON
V
GEN
GND
IN
V
IL
TO V
IH
IN
Q = (ΔV )(C )
OUT
L
LOGIC-INPUT WAVEFORMS INVERTED FOR SWITCHES
THAT HAVE THE OPPOSITE LOGIC SENSE.
Figure 6. Charge Injection
When operating from a +2.7k to +3.6k supply, the low
threshold of the device permits them to be used with
logic levels as low as ±.4k. The MAX4906EF is based on
a charge-pump-assisted n-channel architecture and thus
operate at ±70µA (max) quiescent current. The device
features a standby mode to reduce the quiescent current
to less than 3µA (max).
Detailed Description
The MAX4906EF are ESD-protected analog switches
where the COM_ inputs are further protected up to
±±15k ESD without latchup or damage. The device is
targeted for USB 2.0 high-speed (480Mbps) switching
applications. The device still meets USB low- and full-
speed requirements and is suitable for ±0/±00 Ethernet
switching. The MAX4906EF features two SPDT switches.
Digital Control Input
The MAX4906EF provides a single-digit control logic
input, IN. IN controls the position of the switches as
shown in the Functional Diagram/Truth Table. Driving IN
The MAX4906EF is fully specified to operate from a single
+2.7k to +3.6k supply and is +1.1k fault protected.
10 ______________________________________________________________________________________
High-/Full-Speed USB 2.0 Switches
with High ESD
MAX4906EF
device in standby mode. When the device is in standby
Functional Diagram/Truth Table
mode, the quiescent supply current is reduced to 3µA
(max) and the switches remain operable. When QP is
driven low, the charge pump is enabled and the switch-
es enter an improved high-performance mode.
V+
QP
MAX4906EF
Applications Information
IN
USB Switching
The MAX4906EF analog switch is fully compliant with
the USB 2.0 specification. The low on-resistance and
low on-capacitance of these switches ma5e the device
ideal for high-performance switching applications. The
MAX4906EF is ideal for routing USB data lines (see
Figure 7) and for applications that require switching
between multiple USB hosts (see Figure 8). The
MAX4906EF also features +1.1k fault protection to
guard systems against shorts to the USB bus voltage
that is recommended for all USB applications.
NO1
COM1
COM2
NC1
NO2
NC2
Ethernet Switching
The wide bandwidth of the MAX4906EF meets the needs
of ±0/±00 Ethernet switching. The device switch the sig-
nals from two interface transformers and connect the sig-
nals to a single ±0/±00 Base-T Ethernet PHY, simplifying
doc5ing station design and reducing manufacturing
costs.
GND
MAX4906EF
NO1
NO2
NC1
NC2
QP
IN
0
0
1
0
1
OFF
ON
ON
OFF
ON
HIGH PERFORMANCE
HIGH PERFORMANCE
LOW PERFORMANCE
LOW PERFORMANCE
0
1
±±15k ESD Protection
As with all Maxim devices, ESD-protection structures are
incorporated on all pins to protect against electrostatic
discharges encountered during handling and assembly.
COM_ are further protected against static electricity.
Maxim’s engineers have developed state-of-the-art
structures to protect these pins against ESD up to
±±15k without damage. The ESD structures withstand
high ESD in normal operation, and when the device is
powered down. After an ESD event, the MAX4906EF
continues to function without latchup, whereas compet-
ing products can latch and must be powered down to
restore functionality.
OFF
ON
1
OFF
rail-to-rail minimizes power consumption. With a +2.7k
to +3.6k supply voltage range, the device is +±.4k
logic compatible.
Analog Signal Levels
The on-resistance of the MAX4906EF is very low and sta-
ble as the analog input signals are swept from ground to
k+ (see the Typical Operating Characteristics). These
switches are bidirectional, allowing NO_, NC_, and
COM_ to be configured as either inputs or outputs.
ESD protection can be tested in various ways. The ESD
protection of COM_ are characterized for ± ±15k
(Human Body Model) using the MIL-STD-883.
Overvoltage Fault Protection
The MAX4906EF features +1.1k fault protection to
all analog inputs. Fault protection prevents these
switches from being damaged due to shorts to the USB
bus voltage rail.
ESD Test Conditions
ESD performance depends on a variety of conditions.
Contact Maxim for a reliability report that documents
test setup, test methodology, and test results.
Charge-Pump Enable
The MAX4906EF features a charge-pump enable mode
that improves the performance and the dynamic range
of the device. The device features a QP input that when
driven high, turns the charge pump off and sets the
Human Body Model
Figure 9a shows the Human Body Model and Figure 9b
shows the current waveform it generates when dis-
charged into a low impedance. This model consists of
______________________________________________________________________________________ 11
High-/Full-Speed USB 2.0 Switches
with High ESD
ASIC I
R
R
C
D
1500Ω
1MΩ
D+
V
USB
TRANSCEIVER
BUS
D+
DISCHARGE
RESISTANCE
CHARGE-CURRENT-
LIMIT RESISTOR
MAX4906EF
D-
NC1
HIGH-
VOLTAGE
DC
DEVICE
UNDER
TEST
C
STORAGE
CAPACITOR
s
COM1
COM2
100pF
NO1
NC2
NO2
SOURCE
MAX4906EF
D-
ASIC II
D+
D-
Figure 9a. Human Body ESD Test Model
USB
TRANSCEIVER
GND
USB
CONNECTOR
I
P
100%
90%
PEAK-TO-PEAK RINGING
(NOT DRAWN TO SCALE)
I
r
Figure 7. USB Data Routing
AMPERES
36.8%
10%
0
MAX4906EF
TIME
0
t
RL
t
DL
NC1
NO1
CURRENT WAVEFORM
USB +
0
COM1
COM2
USB +
1
Figure 9b. Human Body Current Waveform
USB
TRANSCEIVER
NC2
NO2
USB -
0
USB -
1
Figure 8. Switching Between Multiple USB Hosts
a ±00pF capacitor charged to the ESD voltage of inter-
est, which is then discharged into the test device
through a ±.15Ω resistor.
Chip Information
Pac5age Information
PROCESS: BiCMOS
Layout
High-speed switches require proper layout and design
procedures for optimum performance. Keep design-
controlled-impedance PC board traces as short as pos-
sible. Ensure that bypass capacitors are as close to the
device as possible. Use large ground planes where
possible.
For the latest pac5age outline information and land patterns,
go to www.maxim-ic.com/packages. Note that a “+”, “#”, or
“-” in the pac5age code indicates RoHS status only. Pac5age
drawings may show a different suffix character, but the drawing
pertains to the pac5age regardless of RoHS status.
PACKAGE TYPE PACKAGE CODE DOCUMENT NO.
±0 µDFN
L±022+±
21-0164
12 ______________________________________________________________________________________
High-/Full-Speed USB 2.0 Switches
with High ESD
MAX4906EF
Revision History
REVISION REVISION
PAGES
DESCRIPTION
CHANGED
NUMBER
DATE
0
1
2
8/06
Initial release.
—
11/07
3/09
Changed the Electrical Characteristics table.
2, 4
Changed the Electrical Characteristics table to show QP = GND.
2, 3, 4
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, ±20 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 13
© 2009 Maxim Integrated Products
Maxim is a registered trademar5 of Maxim Integrated Products, Inc.
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