MAX5043ETN-T [MAXIM]
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| 型号： | MAX5043ETN-T |
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MAXIM INTEGRATED PRODUCTS |
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19-3046; Rev 2; 6/04
Two-Switch Power ICs with Integrated
Power MOSFETs and Hot-Swap Controller
General Description
Features
The MAX5042/MAX5043 isolated multimode PWM power
ICs feature integrated switching power MOSFETs con-
nected in a voltage-clamped, two-transistor, power-circuit
configuration. These devices operate from a wide 20V to
76V input voltage range. The MAX5042 includes a hot-
swap controller for use with an external power MOSFET to
limit inrush current for applications where the power sup-
ply is plugged into a live power backplane. The MAX5043
does not include a hot-swap controller.
♦ Reliable Single-Stage Clamped Two-Switch Power
ICs for High Efficiency
♦ No Reset Winding Required
♦ Up to 50W Output Power
♦ Integrated High-Voltage 75mΩ Power MOSFETs
♦ 20V to 76V Wide Input Voltage Range
♦ Feed-Forward Voltage or Current-Mode Control
♦ Programmable Brownout Undervoltage Lockout
The voltage-clamped power topology of the MAX5042/
MAX5043 enables full recovery of stored magnetizing
and leakage inductive energy for enhanced efficiency
and reliability. Operating at up to 500kHz switching fre-
quency, these devices provide up to 50W of output
power. The MAX5042/MAX5043 allow the implementa-
tion of both forward and flyback voltage or current-mode
converter topologies. A dedicated latched external shut-
down provides protection in addition to internal thermal
shutdown.
♦ Integrated Current Signal Amplifier for High-
Efficiency, Current-Mode Control
♦ Internal Overtemperature Shutdown
♦ Indefinite Short-Circuit Protection
♦ Integrated Thermally Protected High-Voltage
Startup Linear Regulator
The MAX5042/MAX5043 achieve higher efficiency when
used with secondary-side synchronous rectification.
These devices generate a look-ahead signal for driving
secondary-side synchronous rectifiers.
♦ Integrated Hot-Swap Controller (MAX5042)
♦ Integrated Look-Ahead Signal Output Drives
High-Speed Optocoupler for Secondary-Side
Synchronous Rectification
The MAX5042/MAX5043 are rated for operation over the
-40°C to +125°C and -40°C to +85°C temperature
range, respectively, and are available in a small surface-
mount 56-pin thin QFN package.
♦ >90% Efficiency with Synchronous Rectification
♦ Up to 500kHz Switching Frequency
Warning: The MAX5042/MAX5043 are designed to
work with high voltages. Exercise caution.
♦ High-Power, Small-Footprint 56-Pin Thermally
Enhanced QFN Package
Applications
Ordering Information
High-Efficiency Telecom/Datacom Power
Supplies
PART
MAX5042ATN
MAX5043ETN
TEMP RANGE
-40°C to +125°C
-40°C to +85°C
PIN-PACKAGE
56 Thin QFN
56 Thin QFN
Router/Switch Cards with 48V Backplane Power
Systems
Servers with 48V Backplane Power Systems
xDSL Line Cards
Selector Guide
xDSL Line-Driver Power Supplies
Distributed Power Systems with 48V Bus
42V Automotive Power Supplies
Power-Supply Modules
PART
DESCRIPTION
Two-Switch Power IC with Integrated Power
MOSFETs and Hot-Swap Controller for Isolated
Power Supplies
MAX5042
Two-Switch Power IC with Integrated Power
MOSFETs for Isolated Power Supplies
MAX5043
Pin Configurations appear at end of data sheet.
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Two-Switch Power ICs with Integrated
Power MOSFETs and Hot-Swap Controller
ABSOLUTE MAXIMUM RATINGS
(See the Absolute Maximum Ratings Diagram below to better understand the absolute maximum ratings of the various blocks.)
PWMNEG, POSINPWM, DRNH,
XFRMRH Continuous Average Current (all pins combined)
T = +125°C.........................................................................2A
XFRMRH, XFRMRL, SRC to NEGIN....................-0.3V to +80V
BST to NEGIN.........................................................-0.3V to +95V
BST to XFRMRH .....................................................-0.3V to +12V
SRC to PWMNEG .....................................................-0.3V to +6V
REG15 to PWMNEG ...............................................-0.3V to +40V
REG15 to POSINPWM............................................-80V to +0.3V
REG9, DRVIN to PWMNEG ....................................-0.3V to +12V
REG5 to PWMNEG ...................................................-0.3V to +6V
REG15 Current.................................................................. 80mA
REG9 Current......................................................................40mA
REG5 Current......................................................................20mA
UVLO, RAMP, CSS, FLTINT, CSOUT,
J
T = +150°C......................................................................1.4A
J
XFRMRL Continuous Average Current (all pins combined)
T = +125°C.........................................................................2A
J
T = +150°C......................................................................1.4A
J
SRC Continuous Current (all pins combined)
T = +125°C.........................................................................2A
J
T = +150°C......................................................................1.4A
J
POSINHS to NEGIN................................................-0.3V to +80V
HSEN to NEGIN........................................................-0.3V to +4V
DEN to PWMNEG .....................................................-0.3V to +4V
HSGATE to NEGIN .................................................-0.3V to +12V
HSDRAIN, HSOK to NEGIN....................................-0.3V to +80V
HSOK Current .....................................................................20mA
RCFF, RCOSC to PWMNEG...............................-0.3V to +12V
OPTO, PWMSD, SYNC, CSP, CSN,
DRVDEL to PWMNEG...........................................-0.3V to +6V
PPWM to PWMNEG .................................-0.3V to (REG5 + 0.3V)
PPWM Current ................................................................. 20mA
PWMPNEG to PWMNEG .......................................-0.3V to +0.3V
DRNH Continuous Average Current (all pins combined)
Continuous Power Dissipation (T = +70°C)
56-Pin Thin QFN (derate 47.6mW/°C above +70°C) .......3.8W
A
Junction to Ambient Thermal Resistance, θ ...............+21°C/W
JA
Operating Temperature Range
MAX5042ATN ................................................-40°C to +125°C
MAX5043ETN ..................................................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range.............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
T = +125°C.........................................................................2A
J
T = +150°C......................................................................1.4A
J
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Absolute Maximum Ratings Diagram
POSINHS,
POSINPWM
BST
12V
XFRMRH, DRNH
XFRMRL
REG15
REG9, UVLO, RAMP, CSS, FLTINT,
CSOUT, RCFF, RCOSC, DRVIN
80V
80V
80V
REG5, OPTO, PWMSD, SYNC, CSP,
CSN, DRVDEL, SRC, PPWM
95V
40V
12V
80V
DEN
6V
PWMNEG,
PWMPNEG,
HSDRAIN,
HSOK
4V
80V
80V
12V
HSGATE
HSEN
4V
IC SUBSTRATE, NEGIN
2
_______________________________________________________________________________________
Two-Switch Power ICs with Integrated
Power MOSFETs and Hot-Swap Controller
ELECTRICAL CHARACTERISTICS
(V
= 20V to 76V, V
= 18V, C
= 4.7µF, C
= 1µF, C
= 1µF, R
PWMNEG
= 24kΩ, C
= 100pF, C
=
POSINPWM
REG15
DRVDEL
REG15
REG9
REG5
= V
RCOSC
= V
RCOSC
= 0, T = T
BST
0.22µF, R
= 10kΩ, C
= 0.22µF, V
= V
= V
= V
to T
, unless
DRVDEL
CSS
CSP
CSN
RAMP
NEGIN
A
MIN
MAX
otherwise noted. Typical values are at V
unless otherwise noted.)
= 48V, T = +25°C, unless otherwise noted. All voltages are referred to PWMNEG,
POSINPWM
A
PARAMETER
Input Supply Range
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
V
20
76
V
POSINPWM
REG15 REGULATOR
REG15 Output Voltage Range
V
V
V
= 20V to 76V
13.0
16.6
1.5
80
V
V
REG15
POSINPWM
POSINPWM
REG15 Output Voltage Load
Regulation
= 20V, I
= 0 to 80mA
REG15
REG15 Output Current
REG15 Current Limit
Inferred from load regulation test
mA
mA
REG15 shorted to PWMNEG with 10Ω
140
REG15 Overdrive Voltage
18
40
V
REG9 REGULATOR
REG9 Output Voltage Range
V
= 18V to 40V
8.3
10.1
0.35
40
V
V
REG15
REG9 Output Voltage Load
Regulation
I
= 0 to 40mA
REG9
REG9 Output Current
REG9 Current Limit
Inferred from load regulation test
mA
mA
REG9 shorted to PWMNEG with 10Ω
100
REG5 REGULATOR
REG5 Output Voltage Range
V
= 18V to 40V
4.5
5.5
0.35
20
V
V
REG15
REG5 Output Voltage Load
Regulation
I
= 0 to 20mA
REG5
REG5 Output Current
REG5 Current Limit
Inferred from load regulation test
mA
mA
REG5 shorted to PWMNEG with 10Ω
40
PWM COMPARATOR
Common-Mode Range
Input Offset Voltage
Input Bias Current
V
0
5.5
V
CM-PWM
10
70
mV
µA
ns
-2.5
+2.5
Propagation Delay
50mV overdrive, 0 ≤ V
≤ 5.5V
CM-PWM
RCOSC OSCILLATOR
PWM Period
t
3.9
47
µs
%
OSC-PWM
Maximum Duty Cycle
Maximum RCOSC Frequency
RCOSC Peak Trip Level
RCOSC Valley Trip Level
RCOSC Input Bias Current
f
1.2
MHz
V
RCOSC
V
2.55
0.2
TH
V
-0.3
µA
RCOSC Discharge MOSFET
Sinking 10mA
60
50
120
0.8
Ω
R
DS(ON)
RCOSC Discharge Pulse Width
SYNC High Level
ns
V
3.5
SYNC Low Level
V
_______________________________________________________________________________________
3
Two-Switch Power ICs with Integrated
Power MOSFETs and Hot-Swap Controller
ELECTRICAL CHARACTERISTICS (continued)
(V
= 20V to 76V, V
= 18V, C
= 4.7µF, C
= 1µF, C
= 1µF, R
PWMNEG
= 24kΩ, C
= 100pF, C
=
POSINPWM
REG15
DRVDEL
REG15
REG9
REG5
= V
RCOSC
= V
RCOSC
= 0, T = T
BST
0.22µF, R
= 10kΩ, C
= 0.22µF, V
= V
= V
= V
to T
, unless
MAX
DRVDEL
CSS
CSP
CSN
RAMP
NEGIN
A
MIN
otherwise noted. Typical values are at V
unless otherwise noted.)
= 48V, T = +25°C, unless otherwise noted. All voltages are referred to PWMNEG,
POSINPWM
A
PARAMETER
SYNC Leakage Current
SYNC Maximum Frequency
SYNC On-Time
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
µA
1
f
2.4
MHz
ns
SYNC
50
SYNC Off-Time
200
ns
PWM LOGIC
PWM Comparator Propagation
Delay
70
ns
PPWM to XFRMRL Delay
DRVDEL Reference Voltage
PPWM Output High
PPWM Output Low
PPWM rising
120
ns
V
1.14
2.8
1.38
0.4
Sourcing 2mA
Sinking 2mA
V
V
PWMSD Logic High
PWMSD Logic Low
PWMSD Leakage Current
SOFT-START
3.5
V
0.8
1
V
µA
Soft-Start Current
I
33
µA
V
CSS
Minimum OPTO Voltage
RAMP GENERATOR
Minimum RCFF Voltage
RCFF Leakage
CSS = 0, sinking 2mA
RCFF sinking 2mA
1.4
2.1
0.1
V
1
µA
OVERLOAD FAULT
FLTINT Pulse Current
FLTINT Trip Point
I
80
2.7
µA
V
FLTINT
2.0
3.5
FLTINT Hysteresis
0.75
V
INTERNAL POWER FETs
V
= V
= 190mA
= 9V, V
= V
= 0,
SRC
DRVIN
BST
XFRMRH
On-Resistance
R
DSON
75
45
80
200
10
mΩ
I
DS
Off-State Leakage Current
Total Gate Charge Per FET
HIGH-SIDE DRIVER
µA
nC
Inferred from supply current with V = 50V
DS
Driver delay until FET V reaches 0.9 x
(V
GS
Low-to-High Latency
High-to-Low Latency
ns
- V
)
BST
XFRMRH
Driver delay until FET V reaches 0.1 x
(V
GS
45
8
ns
V
- V
)
BST
XFRMRH
Output Drive Voltage
BST to XFRMRH with high side on
LOW-SIDE DRIVER
Driver delay until FET V reaches 0.9 x
GS
Low-to-High Latency
80
ns
V
DRVIN
4
_______________________________________________________________________________________
Two-Switch Power ICs with Integrated
Power MOSFETs and Hot-Swap Controller
ELECTRICAL CHARACTERISTICS (continued)
(V
= 20V to 76V, V
= 18V, C
= 4.7µF, C
= 1µF, C
= 1µF, R
PWMNEG
= 24kΩ, C
= 100pF, C
=
POSINPWM
REG15
DRVDEL
REG15
REG9
REG5
= V
RCOSC
= V
RCOSC
= 0, T = T
BST
0.22µF, R
= 10kΩ, C
= 0.22µF, V
= V
= V
= V
to T
, unless
DRVDEL
CSS
CSP
CSN
RAMP
NEGIN
A
MIN
MAX
otherwise noted. Typical values are at V
unless otherwise noted.)
= 48V, T = +25°C, unless otherwise noted. All voltages are referred to PWMNEG,
POSINPWM
A
PARAMETER
SYMBOL
CONDITIONS
Driver delay until FET V reaches
MIN
TYP
MAX
UNITS
GS
High-to-Low Latency
45
ns
0.1 x V
DRVIN
CURRENT-SENSE COMPARATOR
Current-Limit-Comparator
Threshold Voltage
140
156
40
172
mV
ns
Current-Limit-Comparator
Propagation Delay
10mV overdrive
CURRENT-SENSE AMPLIFIER
Current Amplifier Gain
V
V
= 0, V
= 0 to 0.35V
9.75
185
-0.3
10
10.25
230
V/V
mV
V
CSN
CN
CSP
Input Voltage Offset
= V
= -0.3V to +0.3V
200
CSP
Input Common-Mode Range
Input Differential-Mode Range
CSP Input Bias Current
+0.3
0.35
-40
Inferred from current amplifier gain test
V
V
V
V
= -0.3V to +0.3V, V
= -0.3V to +0.3V, V
= 0
= 0
-160
-160
µA
µA
CSP
CSP
CSN
CSN
CSN Input Bias Current
-30
= 0, V
steps from 0 to 0.2V, 10%
CSN
CSP
Settling Time
70
7
ns
settling time, C = 20pF
L
3dB Bandwidth
MHz
BOOST VOLTAGE CIRCUIT
QB R
Sinking 100mA
10
20
Ω
DS(ON)
ns
Driver Output Delay
200
300
One-Shot Pulse Width
THERMAL SHUTDOWN
Shutdown Temperature
Thermal Hysteresis
ns
Temperature rising
150
°C
°C
14.5
PWM CONVERTER UNDERVOLTAGE LOCKOUT (UVLO)
Preset UVLO Threshold
UVLO Threshold Hysteresis
UVLO Resistance
Measured at POSINPWM rising
28
31
3
34
V
V
Looking into UVLO
30
75
kΩ
V
UVLO Trip Point
Measured at UVLO rising
1.15
1.27
1.39
UVLO Hysteresis
+127
mV
MAX5043 only, measured at POSINPWM
rising
Preset DEN Threshold
27
34
V
DEN Threshold Hysteresis
DEN Startup Delay
MAX5043 only
MAX5043 only
MAX5043 only
3.1
12
V
3.5
0.2
27.0
1.5
ms
ms
DEN Turn-Off Delay
0.7
MAX5043 only, rising with respect to
PWMNEG
DEN Trip Point
1.11
1.35
V
_______________________________________________________________________________________
5
Two-Switch Power ICs with Integrated
Power MOSFETs and Hot-Swap Controller
ELECTRICAL CHARACTERISTICS (continued)
(V
= 20V to 76V, V
= 18V, C
= 4.7µF, C
= 1µF, C
= 1µF, R
PWMNEG
= 24kΩ, C
= 100pF, C
=
POSINPWM
REG15
DRVDEL
REG15
REG9
REG5
= V
RCOSC
= V
RCOSC
= 0, T = T
BST
0.22µF, R
= 10kΩ, C
= 0.22µF, V
= V
= V
= V
to T
, unless
DRVDEL
CSS
CSP
CSN
RAMP
NEGIN
A
MIN
MAX
otherwise noted. Typical values are at V
unless otherwise noted.)
= 48V, T = +25°C, unless otherwise noted. All voltages are referred to PWMNEG,
POSINPWM
A
PARAMETER
DEN Hysteresis
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
mV
MAX5043 only
MAX5043 only, looking into DEN
124
DEN Input Resistance
18
55
kΩ
SUPPLY CURRENT
From V
= V
= 76V,
POSINPWM
POSINHS
2
6
3
CSS shorted to PWMNEG, REG15 = 18V
From REG15 = 18V, V
=
POSINHS
V
= 76V, CSS shorted to
8.5
POSINPWM
Supply Current
mA
PWMNEG
From REG15 = 18V, V
=
POSINHS
20
V
= 76V, V
= V
=
XFRMRH
POSINPWM
DRNH
V
= V
= 0V
XFRMRL
SRC
MAX5042 only, V
= V
=
POSINPWM
POSINHS
Standby Supply Current
0.6
1
mA
V
V
= V
= V
= 76V,
HSDRAIN
PWMNEG
PWMPNEG
HSEN = NEGIN
HOT-SWAP CONTROLLER (MAX5042 Only)
POSINHS with respect to NEGIN, voltage
rising
Hot-Swap UVLO Threshold
27
34
Hot-Swap UVLO Hysteresis
Hot-Swap UVLO Resistance
Startup Delay
3.1
V
Looking into HSEN
18
50
3
55
350
25
kΩ
ms
ms
From HSEN rising to HSOK falling
From HSEN falling to HSOK rising
165
10
HSEN Turn-Off Delay
HSOK Output-High Leakage
Current
1
µA
HSEN Reference Threshold
HSEN Hysteresis
Rising with respect to NEGIN
Sinking 5mA
1.11
7.5
1.35
V
mV
V
124
10
HSOK Output Low Voltage
HSGATE Voltage High
Hot-Swap Slew Rate
0.4
10.0
V
C = 10µF, from HSDRAIN to NEGIN
L
V/ms
6
_______________________________________________________________________________________
Two-Switch Power ICs with Integrated
Power MOSFETs and Hot-Swap Controller
Typical Operating Characteristics
(V
= 20V, T = +25°C, unless otherwise noted.)
A
POSINPWM
HOT-SWAP UNDERVOLTAGE LOCKOUT
THRESHOLD vs. TEMPERATURE
HOT-SWAP GATE VOLTAGE
vs. INPUT VOLTAGE
HOT-SWAP STARTUP DELAY
vs. TEMPERATURE
32
31
30
29
28
27
26
8.73
8.72
8.71
8.70
8.69
175
170
165
160
155
150
V
RISING
POSINHS
V
FALLING
POSINHS
-50 -25
0
25
50
75 100 125
20
30
40
50
60
70
80
-50 -25
0
25
50
75 100 125
TEMPERATURE (°C)
INPUT VOLTAGE (V)
TEMPERATURE (°C)
PWM UNDERVOLTAGE LOCKOUT
THRESHOLD vs. TEMPERATURE
HOT-SWAP STARTUP WAVEFORM
MAX5042 toc04
32
V
HSGATE
5V/div
31
30
29
28
27
26
OV
V
RISING
POSINPWM
V
HSDRAIN
20V/div
OV
V
FALLING
V
POSINPWM
HSOK
20V/div
100kΩ
PULLUP
OV
-50 -25
0
25
50
75 100 125
10ms/div
TEMPERATURE (°C)
POSINPWM INPUT CURRENT, REG15
INPUT CURRENT vs. INPUT VOLTAGE
OPERATING FREQUENCY
vs. TEMPERATURE
POSINPWM INPUT CURRENT, REG15
INPUT CURRENT vs. TEMPERATURE
6
5
4
3
2
1
0
350
330
310
290
270
250
230
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
I
REG15
R
= 25kΩ, C
= 100pF
RCOSC
RCOSC
I
, V
= 76V
REG15 POSINPWM
I
POSINPWM
I
, V
= 76V
POSINPWM POSINPWM
R
= 19kΩ, C
= 100pF
RCOSC
RCOSC
50
V = 18V, CSS = 0,
REG15
V
= 18V, CSS = 0,
REG15
XFRMRH = 0, NO SWITCHING
50 60 70
INPUT VOLTAGE (V)
XFRMRH = 0, NO SWITCHING
25 50 75 100 125
TEMPERATURE (°C)
20
30
40
80
-50 -25
0
25
75 100 125
-50 -25
0
TEMPERATURE (°C)
_______________________________________________________________________________________
7
Two-Switch Power ICs with Integrated
Power MOSFETs and Hot-Swap Controller
Typical Operating Characteristics (continued)
(V
= 20V, T = +25°C, unless otherwise noted.)
A
POSINPWM
REG15 VOLTAGE
vs. REG15 LOAD CURRENT
MAXIMUM DUTY CYCLE
vs. TEMPERATURE
15.0
REG15 VOLTAGE vs. INPUT VOLTAGE
15.0
14.9
14.8
14.7
14.6
14.5
14.4
14.3
50
49
48
47
46
14.8
14.6
14.4
14.2
MEASURED AT XFRMRL
14.0
0
20
40
60
80
20
30
40
50
60
70
80
-50 -25
0
25
50
75 100 125
REG15 LOAD CURRENT (mA)
INPUT VOLTAGE (V)
TEMPERATURE (°C)
REG9 OUTPUT VOLTAGE
vs. REG15 VOLTAGE
REG9 VOLTAGE
vs. REG9 LOAD CURRENT
REG5 VOLTAGE
vs. REG5 LOAD CURRENT
9.4
9.3
9.2
9.1
9.0
9.30
9.25
9.20
9.15
9.10
9.05
9.00
5.1
V
= 48V
V
= 20V
POSINPWM
V
= 20V
REG15
REG15
5.0
4.9
4.8
4.7
20
25
30
35
40
0
10
20
30
40
0
4
8
12
16
20
REG15 VOLTAGE (V)
REG9 LOAD CURRENT (mA)
REG5 LOAD CURRENT (mA)
SOFT-START CURRENT
vs. TEMPERATURE
MINIMUM RCFF LEVEL, MINIMUM OPTO
LEVEL vs. TEMPERATURE
REG5 OUTPUT VOLTAGE
vs. REG15 VOLTAGE
33
32
31
30
29
28
27
3.0
2.5
2.0
1.5
1.0
0.5
0
5.02
5.01
5.00
4.99
4.98
4.97
V
= 48V
POSINPWM
V
RCFF
V
OPTO
I
INTO OPTO AND
PULLUP
RCFF = 2mA, CSS = 0
-50 -25 25
TEMPERATURE (°C)
-50 -25
0
25
50
75 100 125
0
50
75 100 125
20
25
30
REG15 VOLTAGE (V)
35
40
TEMPERATURE (°C)
8
_______________________________________________________________________________________
Two-Switch Power ICs with Integrated
Power MOSFETs and Hot-Swap Controller
Typical Operating Characteristics (continued)
(V
= 20V, T = +25°C, unless otherwise noted.)
A
POSINPWM
CURRENT-LIMIT THRESHOLD
vs. TEMPERATURE
CURRENT-LIMIT PROPAGATION DELAY
CPWM PROPAGATION DELAY
vs. TEMPERATURE
vs. TEMPERATURE
160
158
156
154
152
150
170
160
150
140
130
120
110
100
180
160
140
120
100
80
MEASURED FROM RAMP RISING
TO XFRMRL RISING
MEASURED FROM CSP RISING
TO XFRMRL RISING
-50 -25
0
25
50
75 100 125
-50 -25
0
25
50
75 100 125
-50 -25
0
25
50
75 100 125
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
PPWM TO XFRMRL SKEW
FAULT INTEGRATION CURRENT
vs. TEMPERATURE
vs. R
CSA OFFSET vs. TEMPERATURE
DRVDEL
300
260
220
180
140
100
80
79
78
77
76
75
220
215
210
205
200
MEASURED FROM PPWM RISING
TO XFRMRL FALLING
10
20
30
40
50
60
70
80
-50 -25
0
25
50
75 100 125
-50 -25
0
25
50
75 100 125
R
(kΩ)
TEMPERATURE (°C)
TEMPERATURE (°C)
DRVDEL
FAULT INTEGRATION SHUTDOWN VOLTAGE
vs. TEMPERATURE
FAULT INTEGRATION RESTART VOLTAGE
vs. TEMPERATURE
POWER FETs ON-RESISTANCE
vs. TEMPERATURE
2.8
2.7
2.6
2.5
2.4
2.00
1.95
1.90
1.85
1.80
140
120
100
80
HIGH-SIDE FET
LOW-SIDE FET
60
40
-50 -25
0
25
50
75 100 125
-50 -25
0
25
50
75 100 125
-50 -25
0
25
50
75 100 125
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
_______________________________________________________________________________________
9
Two-Switch Power ICs with Integrated
Power MOSFETs and Hot-Swap Controller
Pin Description
PIN
NAME
FUNCTION
MAX5042
MAX5043
1, 2, 14, 15,
40, 42–45, 56 40, 42–45, 56
1, 2, 14, 15,
N.C.
No Connection. Not internally connected.
Voltage-Mode PWM Ramp. Connect a resistor to the input supply and a capacitor to
PWMNEG for input voltage feed-forward. Input voltage feed-forward provides
instantaneous input-voltage transient rejection and constant loop gain with varying
input voltage.
3
4
3
4
RCFF
PWM Ramp Input. For voltage-mode control, connect RAMP to RCFF. For current-
mode control, connect RAMP to CSOUT, the output of the current-sense amplifier.
RAMP
Inverting Input of the PWM Comparator. Connect OPTO to the collector of the
optotransistor. Connect a pullup resistor from OPTO to REG5.
5
6
7
5
6
7
OPTO
CSS
Soft-Start. Connect a capacitor from CSS to PWMNEG to soft-start the converter.
Boost-Capacitor Bypass for High-Side MOSFET Gate Drive. Connect a 0.1µF
capacitor from BST to XFRMRH for the internal high-side MOSFET driver.
BST
Low-Side MOSFET Driver Supply. Bypass DRVIN with a 0.22µF capacitor to
PWMPNEG.
8
9
8
9
DRVIN
Low-Side MOSFET Driver Return. Connect PWMPNEG externally to PWMNEG with a
short trace.
PWMPNEG
Oscillator Timing Resistor and Capacitor Connection. Connect a capacitor from
RCOSC to PWMNEG and a resistor from RCOSC to REG5. The switching frequency
is half the frequency of the sawtooth signal at this connection.
10
10
RCOSC
Fault Integration Input. Use FLTINT in addition to cycle-by-cycle current limit. During
persistent current-limit faults, a capacitor connected to FLTINT charges with an
internal 80µA current source. Switching terminates when the voltage reaches 2.7V.
An external resistor connected in parallel discharges the capacitor. Switching
resumes when the voltage drops to 1.8V.
11
12
13
11
12
13
FLTINT
SYNC
Synchronization Input. The switching frequency of the power supply is half the
synchronization frequency, ensuring less than 50% maximum duty cycle.
Latched Shutdown Input. Pull PWMSD low with respect to PWMNEG to stop
switching. To restart, release PWMSD and cycle the input supply. Do not leave
PWMSD unconnected. Use PWMSD to prevent catastrophic secondary rectifier
overheating by monitoring the temperature and issuing a shutdown command with
an optocoupler. Connect PWMSD to REG5 when not used.
PWMSD
16, 17, 20,
21, 24
16, 17, 20,
21, 24
Source Connection for the Internal Low-Side Power MOSFET. Connect SRC to
PWMPNEG with a low-value resistor for current limiting.
SRC
18, 19, 22, 23 18, 19, 22, 23
XFRMRL
POSINHS
Low-Side Connection for the Isolation Transformer
Hot-Swap Controller Positive Input Supply (MAX5042 Only). Connect POSINHS
along with POSINPWM to the most positive rail of the input supply.
25
—
10 ______________________________________________________________________________________
Two-Switch Power ICs with Integrated
Power MOSFETs and Hot-Swap Controller
Pin Description (continued)
PIN
NAME
FUNCTION
MAX5042
MAX5043
Hot-Swap OK (MAX5042 Only). HSOK’s open-drain output is forced to NEGIN upon
hot-swap completion.
26
—
HSOK
Hot-Swap Enable (MAX5042 Only). HSEN is the center point of the internal hot-swap
UVLO divider. Use an external voltage-divider or a 100kΩ pullup resistor to the most
positive rail to override.
27
—
—
HSEN
Negative Supply Input (MAX5042 Only). NEGIN connects to the most negative input
supply rail. NEGIN provides the hot-swap circuit’s most negative connection. NEGIN
is at the same potential as the IC substrate.
28, 29
NEGIN
Hot-Swap Gate (MAX5042 Only). Connect HSGATE to the gate of the external hot-
swap MOSFET.
30
31
32
33
34
35
—
—
32
33
34
HSGATE
HSDRAIN
CSOUT
CSP
Hot-Swap MOSFET Drain Sense (MAX5042 Only). Connect HSDRAIN to the drain of
the external hot-swap MOSFET.
Current-Sense Amplifier Output. The amplifier has a gain of 10. Connect CSOUT to
RAMP for current-mode control.
Positive Current-Sense Connection. Place the current-sense resistor as close as
possible to the device and use a Kelvin connection.
Negative Current-Sense Connection. Place the current-sense resistor as close as
possible to the device and use a Kelvin connection.
CSN
26, 28, 29,
31, 35
PWMNEG
Analog Signal Return for the PWM Section
Driver Delay Adjust Connection. Connect a resistor and a 0.22µF capacitor from
DRVDEL to PWMNEG. The resistor at DRVDEL controls the skew between the
PPWM signal and the power pulse applied to the internal power MOSFETs. Use in
conjunction with a secondary-side synchronous-rectifier controller. The skew allows
for the optimization of the synchronous-rectifier drive pulse.
36
36
DRVDEL
PWM Pulse Output. PPWM leads the internal power MOSFET pulse by an amount
determined with the resistor value at DRVDEL.
37
38
39
41
37
38
39
41
PPWM
REG9
REG5
REG15
9V Internal Regulator Output. Use primarily as a source for the internal gate drivers.
Bypass REG9 to PWMNEG with a 1µF ceramic capacitor.
5V Internal Regulator Output. Bypass REG5 to PWMNEG with a 1µF ceramic
capacitor.
15V Startup Regulator Output. A voltage greater than 18V on REG15 disables the
regulator. Bypass REG15 to PWMNEG with at least one 1µF ceramic capacitor.
PWM Undervoltage Lockout. UVLO is the center point of the PWM undervoltage
lockout divider. Use an external divider or a 100kΩ pullup resistor to POSINPWM to
override. Connect the external resistor-divider network from POSINPWM to
PWMNEG.
46
46
UVLO
______________________________________________________________________________________ 11
Two-Switch Power ICs with Integrated
Power MOSFETs and Hot-Swap Controller
Pin Description (continued)
PIN
NAME
FUNCTION
MAX5042
MAX5043
PWM Analog Positive-Supply Input. Connect POSINPWM to the most positive input
supply rail.
47
25, 47
POSINPWM
Drain Connection of the Internal High-Side PWM Power MOSFET. Connect DRNH to
the most positive rail of the input supply.
48, 51, 54, 55 48, 51, 54, 55
49, 50, 52, 53 49, 50, 52, 53
DRNH
XFRMRH
High-Side Connection for the Isolation Transformer
Delayed Enable Input (MAX5043 Only). DEN is the center point of the delayed
enable divider. Use an external voltage-divider or a 100kΩ pullup resistor to the
most positive rail to override.
—
—
27
30
DEN
N.C.
No Connection (MAX5043 Only). Leave unconnected.
Detailed Description
+V
POSINPWM
The MAX5042/MAX5043 PWM multimode power ICs
are designed for the primary side of voltage or current-
mode isolated, forward or flyback power converters.
These devices provide a high degree of integration
aimed at reducing the cost and PC board area of isolat-
ed output power supplies. Use the MAX5042/MAX5043
primarily for 24V, 42V, or 48V power bus applications.
MAX5042
BULK STORAGE CAPACITOR
(HOT-SWAPPED CAPACITOR)
QH
C
IN
L
T1
PWM
CIRCUIT
WITH
V
OUT
C
OUT
INTEGRATED
FETs
QL
The MAX5042/MAX5043 provide a complete system
capable of delivering up to 50W of output power. The
MAX5042 contains a hot-swap controller in addition to
the PWM and power MOSFETs. The hot-swap section
requires an external MOSFET (QHS). Figure 1 details
PWMNEG, PWMPNEG
QHS
INTEGRATED
HOT-SWAP
CONTROLLER
EXTERNAL
HOT-SWAP FET
the MAX5042 conceptual block diagram. C represents
IN
NEGIN
the input bulk storage capacitance of the PWM circuit
that requires the soft-start to reduce the inrush current
from the backplane. When input power is applied,
Figure 1. Simplified Diagram of a MAX5042-Based Isolated
Power Supply
capacitor C is completely discharged and QHS is off.
IN
The MAX5043, detailed in Figure 2, does not contain an
integrated hot-swap controller. The MAX5043 begins
operating when the input voltage exceeds both of the
undervoltage lockout voltages (at UVLO and DEN pins)
for 10ms.
An applied voltage higher than the default undervoltage
lockout threshold of the hot-swap controller (30.5V) for
more than 165ms (internal turn-on delay) causes the
gate voltage of QHS to start gradually increasing. This
results in a controlled slew-rate turn-on. The drain volt-
age of QHS falls at a rate of approximately 10V/ms,
drawing a current load from the backplane of approxi-
The MAX5042/MAX5043 support both forward and fly-
back power topologies. In forward mode, the maximum
output power is approximately 50W. In flyback mode,
the maximum output power is approximately 20W. The
amount of power dissipated by the package limits the
output power. The MAX5042/MAX5043’s QFN package
features an exposed metal pad on the bottom of the
package. Solder the exposed pad directly to the most
negative supply in the system. Use a large copper area
to improve heat dissipation. Facilitate heat transfer with
thermal vias.
mately 1A for each 100µF of C capacitance. The
IN
MAX5042’s PWM block is prevented from starting up
until the QHS MOSFET is fully enhanced. After QHS
completely turns on and the voltage across capacitor
C
is above the default startup voltage (31V) of the
IN
PWM section, the hot swap enables the PWM block and
the soft-start cycle begins. Soft-start limits the amount of
current initially drawn from the primary during startup
and also prevents possible output-voltage overshoots.
12 ______________________________________________________________________________________
Two-Switch Power ICs with Integrated
Power MOSFETs and Hot-Swap Controller
Power Topology
The two-switch forward-converter topology offers out-
standing robustness against faults and transformer satu-
ration while affording efficient use of the integrated
75mΩ power MOSFETs. Voltage-mode control with feed-
forward compensation allows the rejection of input sup-
ply disturbances within a single cycle similar to that of
current-mode controlled topologies. This control method
offers some significant benefits when compared with
current-mode control. These benefits include:
+V
POSINPWM
MAX5043
QH
BULK STORAGE CAPACITOR
L
C
IN
T1
PWM
CIRCUIT
WITH
V
OUT
C
OUT
INTEGRATED
FETs
QL
• No minimum duty-cycle requirement due to current-
signal filtering or blanking.
• Clean modulator ramp and higher amplitude for
increased stability.
PWMNEG
• Stable bias point of the optocoupler LED and photo-
transistor for maximized control-loop bandwidth (in
current-mode applications, the optocoupler bias
point is output-load dependent).
Figure 2. Simplified Diagram of a MAX5043-Based Isolated
Power Supply
• Predictable loop dynamics simplifying the design of
the control loop.
Set the switching frequency with a resistor and a
capacitor at RCOSC. Switching at 250kHz ensures
switching losses are minimal and external power pas-
sives are small enough for a compact circuit.
The two-switch power topology recovers energy stored
in both the magnetizing and parasitic leakage induc-
tances of the transformer. Figure 7 shows the schemat-
ic diagram of a 48V input and 5V, 8A output isolated
power supply built with the MAX5042.
The MAX5042/MAX5043 incorporate an advanced set of
protection features that make them uniquely suitable
when high reliability and comprehensive fault protection
are required, as in telecommunication equipment power-
supply applications. The MAX5042/MAX5043 15V linear
regulator output powers the 9V and 5V regulators used to
drive the gates and internal circuitry. A tertiary winding
connects to REG15 through a rectifier to power the
device after startup and reduces power dissipation in the
MAX5042/MAX5043 package. When REG15 is externally
powered, the internal 15V regulator is disabled.
The MAX5042/MAX5043 also support current-mode con-
trol. Current-mode control has advantages such as a sin-
gle-pole power circuit and a small-signal transfer
function that simplify the design of power supplies with
widely varying output capacitors.
Undervoltage Lockout
The MAX5042 has two UVLO functions. Both the hot-
swap section and the PWM section contain their own
undervoltage lockout comparators (HSEN and UVLO,
respectively). The MAX5043 lacks the hot-swapping
function, but retains the PWM UVLO and the deglitched
undervoltage lockout/power-on reset. In both cases,
internal resistors set a default input-voltage enable
threshold of 31V (typ).
Figures 3 and 4 show the block diagrams of the MAX5042
and MAX5043, respectively. The power-OK signals from
the hot-swap section, regulators, thermal shutdown, and
UVLO combine to generate the internal shutdown signal
SHDN. When asserted, SHDN disables the comparators
and oscillator. Deasserting SHDN releases the compara-
tors and oscillators. The falling edge of SHDN is delayed
allowing the internal signals to settle before the PWM puls-
es appear. During the time between the falling edge of
SHDN and its delayed signal, the 10Ω internal MOSFET
(QB) from XFRMRH to PWMPNEG turns on, charging the
BST capacitor. After startup, this MOSFET also turns on
for approximately 300ns at each half period to help
charge the BST capacitor.
The PWM default input voltage threshold value can be
adjusted by using an external divider in parallel with the
internal divider. The tolerances of the external divider
resistors dominate the precision of the UVLO trip point if
their values are smaller than those of the internal divider.
Override the default threshold by using:
R
×R ×R × V -V
(
)
Le
Li
Hi
IN REF
R
=
He
V
×R
R
+R -R ×R × V -V
(
)
(
)
REF
Hi
Li
Le
Le
Li
IN REF
______________________________________________________________________________________ 13
Two-Switch Power ICs with Integrated
Power MOSFETs and Hot-Swap Controller
MAX5042
REG15 OK
OVT
41
47
46
REG15
(15V)
REG15
POSINPWM
UVLO
1.2MΩ
REG9 OK
39
38
REG5
(5V)
REG9
(9V)
REF
(1.25V)
REG5
REG9
REG5 OK
REF OK
REG15 OK
REG5 OK
UVLO
CUVLO
1.25V
1.125V
7.5V
50kΩ
3
RCFF
PWMNEG
5V
7.5V
"1"
D
37
36
PPWM
IFLT
DRVDEL
80µA
Q
7
BST
48
OVRLD
PWMNEG
QH
0.1Ω
11
DRNH (51, 54, 55)
FLTINT
LEVEL
SHIFT
R
2.3V/1.6V
LEADING-
EDGE
DELAY
RES
4
5
R
S
Q
RAMP
OPTO
49
XFRMRH (50, 52, 53)
CPWM
5V
CLK
R
SHDN
OSC
Q
32µA
T-FF
QB
10Ω
6
CSS
LEADING-
EDGE
DELAY
ONE
SHOT
OVT
UVLO
7.5V
REFOK
35
13
8
THERMAL
PWMNEG
PWMSD
REG15OK
REG9OK
REG5OK
OVRLD
DRVIN
SHUTDOWN
+150°C
12°C HYSTERESIS
OVT
QL
0.1Ω
18
XFRMRL (19, 22, 23)
PWMNEG
R
S
Q
16
9
SRC (17, 20, 21, 24)
PWMPNEG
UVLO
10
12
RCOSC
SYNC
33
34
CSP
CSN
ILIM
10MHz
150mV
GAIN = 10
IAMP
32
CSOUT
200mV
LEVEL SHIFT
TO PWM
HOT-SWAP SECTION
25
27
28
31
30
26
POSINHS
HSEN
HSDRAIN
HSGATE
HSOK
HOT-SWAP
CONTROL
LOGIC
840kΩ
35kΩ
40Ω
80V, DMOS
460kΩ
3V
NEGIN (29)
Figure 3. Block Diagram of the MAX5042 Power IC
14 ______________________________________________________________________________________
Two-Switch Power ICs with Integrated
Power MOSFETs and Hot-Swap Controller
MAX5043
REG15 OK
OVT
41
47
46
REG15
(15V)
REG15
POSINPWM
UVLO
1.2MΩ
REG9 OK
39
38
REG5
(5V)
REG9
(9V)
REF
(1.25V)
REG5
REG9
REG5 OK
REF OK
REG5 OK
REG15 OK
UVLO
CUVLO
1.25V
1.125V
7.5V
50kΩ
3
RCFF
PWMNEG
5V
7.5V
"1"
D
37
36
PPWM
IFLT
3Ω
DRVDEL
80µA
Q
7
BST
48
OVRLD
PWMNEG
QH
0.1Ω
11
DRNH (51, 54, 55)
FLTINT
LEVEL
SHIFT
R
2.3V/1.6V
LEADING-
EDGE
DELAY
RES
4
5
R
S
Q
RAMP
OPTO
49
XFRMRH (50, 52, 53)
CPWM
5V
CLK
R
SHDN
OSC
Q
32µA
T-FF
QB
10Ω
6
CSS
LEADING-
EDGE
DELAY
ONE
SHOT
OVT
UVLO
7.5V
REFOK
35
13
50Ω
8
THERMAL
PWMNEG (26)
PWMSD
REG15OK
REG9OK
REG5OK
OVRLD
DRVIN
SHUTDOWN
+150°C
12°C HYSTERESIS
OVT
QL
0.1Ω
18
XFRMRL (19, 22, 23)
PWMNEG
R
S
Q
16
9
SRC (17, 20, 21, 24)
PWMPNEG
UVLO
10
12
RCOSC
SYNC
33
34
CSP
CSN
ILIM
10MHz
150mV
GAIN = 10
IAMP
32
CSOUT
200mV
25
27
28
POSINPWM
DEN
840kΩ
10ms
DELAY
CDEN
1.25V
1.125V
35kΩ
3V
PWMNEG (29, 31)
Figure 4. Block Diagram of the MAX5043 Power IC
______________________________________________________________________________________ 15
Two-Switch Power ICs with Integrated
Power MOSFETs and Hot-Swap Controller
where R
is the external high-side resistor, R is the
Le
He
external low-side resistor, R is the internal high-side
Hi
resistor (1.2MΩ, typ), R is the internal low-side resistor
Le
MAX5042/MAX5043
DRVDEL
R1
(50kΩ, typ), V
is 1.27V (typ), and V is the desired
IN
REF
threshold.
C1
0.22µF
5V
Use an external 100kΩ pullup resistor to POSINPWM to
override UVLO functionality for either lockout.
R2
PPWM
Internal Regulators
An internal high-voltage linear regulator provides a 15V
output at REG15. This serves as the input to the 9V reg-
ulator that provides bias for the internal MOSFET dri-
vers. The 15V regulator also provides the bias for REG5,
a 5V supply used both by internal as well as external cir-
cuitry. Bypass the REG15, REG9, and REG5 regulators
with 1µF ceramic capacitors. A voltage greater than 18V
and less than 40V on REG15 disables the internal high-
voltage startup regulator. The REG9 regulator steps
down the voltage on REG15 to an output of 9V with a
current limit of 100mA. The REG5 regulator steps down
the voltage on REG15 to an output of 5V with a current
limit of 40mA. Disabling the REG15 regulator by power-
ing REG15 with an external power supply considerably
reduces the internal power dissipation in the
MAX5042/MAX5043. The voltage and power necessary
to override the REG15 internal regulator can be generat-
ed with a rectifier and an extra winding from the main
transformer.
C2
PS9715
OR EQUIVALENT
HIGH-SPEED
PWMNEG
OPTOCOUPLER
Figure 5. Secondary-Side Synchronous Rectifier Driver Using a
High-Speed Optocoupler
required to set the delay between the PPWM and the
power pulse applied to the transformer:
kΩ
2ns
⎛
⎞
R
=
t
− 100ns
(
)
)
(
⎜
⎝
⎟
⎠
DRVDEL
DRVDEL
where t
is the required delay from the rising edge
of PPWM to the switching of the internal power MOSFETs.
DRVDEL
PWM Regulation
The MAX5042/MAX5043 are multimode PWM power
ICs supporting both voltage and current-mode control.
Voltage-Mode Control and the PWM Ramp
For voltage-mode control, the feed-forward PWM ramp
is generated at RCFF. From RCFF connect a capacitor
to PWMNEG and a resistor to POSINPWM. The ramp
generated is applied to the noninverting input of the
PWM comparator at RAMP and has a minimum voltage
of 1.5V to 2.5V. The slope of the ramp is determined by
the voltage at POSINPWM and affects the overall loop
gain. The ramp peak must remain below the dynamic
range of RCFF (0 to 5.5V). Assuming the maximum duty
cycle approaches 50% at a minimum input voltage
(PWM UVLO turn-on threshold), use the following for-
mula to calculate the minimum value of either the ramp
capacitor or resistor:
Soft-Start
Program the MAX5042/MAX5043 soft-start with an
external capacitor between CSS and PWMNEG. When
the device turns on, the soft-start capacitor (C
)
CSS
charges with a constant current of 33µA, ramping up to
7.3V. During this time, OPTO is clamped to CSS + 0.6V.
This initially holds the duty cycle lower than the value
the regulator tries to impose, limiting the current inrush
and the voltage overshoot at the secondary. When the
MAX5042/MAX5043 turn off, the soft-start capacitor
internally discharges to PWMNEG.
Secondary-Side Synchronization
The MAX5042/MAX5043 provide convenient synchro-
nization of the secondary-side synchronous rectifiers.
Figure 5 shows the connection diagram with a high-
speed optocoupler. Choose an optocoupler with a
propagation delay of less than 50ns.
V
INUVLO
R
× C
≥
RCFF
RCFF
2f × V
S
rP-P
where:
For optimum results, adjust the resistor connected to
DRVDEL to provide the required amount of delay
between the leading edge of the PPWM signal and the
turn-on of the power MOSFETs. Use the following formu-
V
= the minimum input supply voltage (typically
INUVLO
the PWM UVLO turn-on voltage),
f = the switching frequency,
s
la to calculate the approximate resistance (R
)
DRVDEL
V
r
P-P
= the peak-to-peak ramp voltage (2V, typ).
16 ______________________________________________________________________________________
Two-Switch Power ICs with Integrated
Power MOSFETs and Hot-Swap Controller
Maximize the signal-to-noise ratio by setting the ramp
Oscillator and Synchronization
Program the MAX5042/MAX5043 oscillator using an RC
network at RCOSC with the resistor connected to REG5
and the capacitor connected to PWMNEG. The PWM
frequency is half the frequency at RCOSC.
peak as high as possible. Calculate the low-frequency,
small-signal gain of the power stage (the gain from the
inverting input of the PWM comparator to the output)
using the following formula:
G
= N ✕ R
SP RCFF
✕ C ✕ f
RCFF S
Use the following formula to calculate the oscillator
components:
PS
where N = the secondary to primary power transformer
SP
turns ratio.
1
R
=
RCOSC
Current-Sense Amplifier and Current-Mode Control
The MAX5042/MAX5043 can also be programmed for
current-mode control (see Figure 6). This control
method offers beneficial advantages for certain appli-
cations. Current-mode control reduces the order of the
output filter, allowing easier control-loop compensation.
In current-mode control, the voltage across the current-
sense resistor at SRC is amplified by the internal gain-
of-10 amplifier IAMP. The cycle-by-cycle current-limit
threshold is 156mV. This is the peak voltage amplified
by IAMP. A 200mV offset is added to this voltage. The
voltage at the output of the current-sense amplifier is:
⎛
⎞
V
REG5
− V
2f C
+ C
ln
(
)
S
RCOSC
PCB
⎜
⎟
⎠
V
⎝
REG5
TH
where C
= 14pF,
PCB
REG5 = 5V,
f = switching frequency,
S
V
TH
= RCOSC peak trip level.
The delay programmed by the resistor at DRVDEL lim-
its the power MOSFET’s maximum duty cycle to less
than 50 percent.
SYNC allows synchronization of the MAX5042/MAX5043
to an external clock. For proper synchronization, set the
external SYNC frequency 15% to 20% higher than the
programmed free-running frequency of the MAX5042/
MAX5043’s internal oscillator. The actual switching
frequency will be half the synchronizing frequency.
V
= 2 + 10(V
- V
)
CSN
CSOUT
CSP
The low-frequency, small-signal gain of the power
stage (the gain from the inverting input of the PWM
comparator to the output) can be calculated using the
following formula:
R
L
Integrating Fault Protection
The integrating fault protection feature allows the
MAX5042/MAX5043 to ignore transient overcurrent
conditions for a programmable amount of time, giving
the power supply time to behave like a current source
to the load. This can happen, for example, under load-
current transients when the control loop requests maxi-
mum current to keep the output voltage from going out
of regulation. Program the ignore time externally by
connecting a capacitor to FLTINT. Under sustained
overcurrent faults, the voltage across this capacitor
ramps up toward the FLTINT shutdown threshold (typi-
cally 2.7V). When FLTINT reaches the threshold, the
power supply shuts down. A high-value bleed resistor
connected in parallel with the FLTINT capacitor allows
the capacitor to discharge toward the restart threshold
(typically 1.8V). Crossing the restart threshold soft-
starts the supply again.
G
= N
×
PS
PS
R
SENSE
where N
= the primary to secondary power trans-
PS
former turns ratio,
R = the low-frequency output impedance,
L
R
= the primary current-sense resistor value.
SENSE
MAX5042/MAX5043
SRC
RAMP
CSP
RS
50mΩ
(APPROXIMATELY
35W TO 40W)
CSOUT
OPTO
CSN
PWMPNEG
PWMNEG
The ILIM comparator provides cycle-by-cycle current
limiting with a typical threshold of 156mV. The fault inte-
gration circuit works by forcing an 80µA current out of
FLTINT for one clock cycle every time the current-limit
comparator (Figures 3 and 4, ILIM) trips. Use the fol-
lowing formula to calculate the approximate capaci-
Figure 6. Simplified Connection Diagram for Current-Mode
Control
tance (C ) needed for the desired shutdown time.
FLTINT
______________________________________________________________________________________ 17
Two-Switch Power ICs with Integrated
Power MOSFETs and Hot-Swap Controller
Thermal Shutdown
The MAX5042/MAX5043 feature internal thermal shut-
down. Internal sensors monitor the high-power areas.
Thermal faults arise from excessive dissipation in the
power FETs or in the regulators. When the temperature
limit is reached, switching is terminated and the regulator
shuts down. The integration of thermal shutdown and the
power MOSFETs result in a very robust power circuit.
I
× t
FLTINT SH
1.4
C
≅
FLTINT
where I
= 80µA,
FLTINT
t
sh
is the desired ignore time during which current-limit
events from the current-limit comparator are ignored.
Some testing may be required to fine tune the actual
value of the capacitor.
MAX5042 Hot-Swap Controller
The MAX5042 integrates a PWM power IC with a hot-
swap controller. The design allows a power supply built
around the MAX5042 to be safely hot-plugged into a
live backplane without causing a glitch on the power-
supply rail. The hot-swap section operates from
POSINHS to NEGIN. The MAX5042 only requires an
external N-channel MOSFET to provide hot-swap con-
trol. Figures 1 and 3 detail hot-swap functionality.
Calculate the approximate bleed resistance (R
needed for the desired recovery time using the follow-
ing formula:
)
FLTINT
t
RT
R
≅
FLTINT
2.3
1.6
⎛
⎞
C
ln
⎜
⎝
⎟
⎠
FLTINT
where t is the desired recovery time.
RT
Choose at least t = 10 x t . Typical values for t
SH
range from a few hundred microseconds to a few mil-
liseconds.
The MAX5042 controls an external N-channel power
MOSFET placed in the negative power-supply pathway.
When power is applied, the MAX5042 keeps the MOS-
FET off. The MOSFET remains off indefinitely if HSEN is
below 1.26V, POSINHS is below the undervoltage lock-
out level (31V), or the die temperature exceeds
+150°C. If none of these conditions exist for 165ms, the
MAX5042 gradually turns on the MOSFET, allowing the
voltage on HSDRAIN to fall no faster than 10V/ms.
During this period, the PWM block remains in shut-
down. The inrush current through the external MOSFET
RT
SH
Shutdown Modes
Latched Shutdown
The MAX5042/MAX5043 feature a latched shutdown that
terminates switching in the event of a serious fault.
External faults in synchronously rectified power supplies
cause a loss of control for the rectifiers. Either the body or
the external Schottky diodes conduct, resulting in a very
high power dissipation and a quick rise of the power-sup-
ply temperature. A thermal sensor placed on the same
ground plane as the secondary-side rectifiers can sense
this catastrophic increase in temperature and issue a
shutdown signal to PWMSD. Asserting PWMSD stops
switching and latches the fault until the power is cycled.
Connect PWMSD to REG5 to disable latched shutdown.
(and therefore through the capacitor C ) is limited to a
IN
level proportional to its capacitance, and the constant
HSDRAIN slew rate. After the MOSFET completely turns
on, and HSDRAIN falls to its final value, the hot-swap
period is terminated and the PWM section of the IC
powers up.
HSEN offers external control of the MAX5042, facilitat-
ing power-supply sequencing. HSEN can also be used
to change the undervoltage lockout level using an
external divider network, if necessary. Undervoltage
lockout keeps the external hot-swap MOSFET switched
off as long as the magnitude of the input voltage is
below the desired level. There is a 10ms turn-off delay
on the HSEN signal.
Functional Shutdown
Shut down the MAX5042/MAX5043 by pulling UVLO to
PWMNEG using an open-collector or open-drain transis-
tor connected to PWMNEG. Pulling HSEN to NEGIN also
shuts down the MAX5042 after a 10ms turn-off delay.
Pulling DEN low also shuts down the MAX5043 with a
1ms turn-off delay. When HSEN is used, the MAX5042
goes through a full hot-swap startup sequence with a
165ms startup delay. The MAX5043 also has a 10ms
delay from when DEN asserts.
A power-good output, HSOK, asserts when the external
MOSFET completely turns on. HSOK is an open-drain
output referenced to NEGIN, and can withstand up to
80V above NEGIN.
18 ______________________________________________________________________________________
Two-Switch Power ICs with Integrated
Power MOSFETs and Hot-Swap Controller
Determining Hot-Swap Inrush Current
Table 1. MAX5042 Suggested External
Hot-Swap MOSFETs
Calculate the hot-swap inrush current using the follow-
ing formula:
MAXIMUM I
(A)
SUGGESTED EXTERNAL MOSFET
LOAD
dV
HSDRAIN
dt
0.25
0.5
1
IRFL110
IRFL4310
IRFR3910
IRF540NS
IRF1310NS
IRF1310NS
I
= C
= C S
IN HSLR
C
IN
IN
where:
2
C
IN
= the load capacitance,
3
S
is the MAX5042 hot-swap slew rate magnitude
given in the Electrical Characteristics table.
HSLR
4
For example, assuming an input bulk capacitance of
100µF, and using the typical value of 10V/ms for the
slew rate, the calculated inrush current is 1A. See Table
1 for suggested external hot-swap MOSFETs.
Typical Application Circuits
V
IN+
32V TO 72V
C1
220µF
100V
R12
200kΩ
1%
L1
4.4µH
POSINPWM
DRNH
UVLO
D3
BST
D1
5V
8A
RAMP
RCFF
REG9
DRVIN
FLTINT
DRVDEL
SYNC
C6
0.1µF
T1
XFRMRH
R11
20Ω
1%
C17
150µF
6.3V
C18
150µF
6.3V
C4
0.1µF
U1
MAX5042
C16
0.001µF
XFRMRL
REG15
R9
D2
SGND
R22
10kΩ
15Ω
D4
C5
0.0047µF
R13
1MΩ
PWMSD
C30
0.68µF
100V
C7
1µF
C25
0.22µF
C3
1µF
CSP, SRC
R14
10kΩ
R20
10kΩ
R4
10Ω
REG5
PWMNEG,
NEGIN HSGATE HSDRAIN CSN PWMPNEG OPTO
C9
C12
RCOSC HSEN CSS
220pF 0.1µF
R15
24.9kΩ
1%
C11
0.1µF
R10
33mΩ
1%
C13
C14
R3
150Ω
1%
R1
25.5kΩ
1%
1µF
100pF
C19
0.15µF
C8
0.33µF
C20
0.1µF
100V
N1
E
LED
FB
R2
8.25kΩ
1%
(HOT-SWAP MOSFET)
R6
200Ω
1%
C15
0.1µF
U2
FOD2712
R21
1.24kΩ
1%
NEGIN
COMP
GND
C
R5
10Ω
1%
Figure 7. MAX5042 Typical Application Circuit (48V Power Supply with Hot-Swap Capability)
______________________________________________________________________________________ 19
Two-Switch Power ICs with Integrated
Power MOSFETs and Hot-Swap Controller
Typical Application Circuits (continued)
V
IN+
32V TO 72V
C1
220µF
100V
R12
200kΩ
1%
L1
4.4µH
POSINPWM
DRNH
UVLO
D3
BST
D1
5V
10A
RAMP
RCFF
REG9
C6
0.1µF
T1
XFRMRH
C17
150µF
6.3V
C18
150µF
6.3V
DRVIN
FLTINT
DRVDEL
SYNC
C4
0.1µF
U1
XFRMRL
REG15
R9
15Ω
D2
MAX5043
SGND
R22
D4
10kΩ
R13
PWMSD
C7
0.68µF
100V
C13
1µF
1MΩ
C25
0.22µF
1µF
R14
10kΩ
R20
10kΩ
R4
10Ω
REG5
PWMNEG,
CSN
C9
C12
RCOSC
CSS
PWMNEG
OPTO SRC, CSP
220pF 0.1µF
R15
24.9kΩ
1%
C11
0.1µF
R10
33mΩ
1%
C13
C14
R3
150Ω
1%
R1
25.5kΩ
1%
1µF
100pF
C19
0.15µF
PWMNEG
C8
0.33µF
E
LED
FB
R2
8.25kΩ
1%
R6
200Ω
1%
C15
0.1µF
U2
FOD2712
R21
1.24kΩ
1%
COMP
GND
C
R5
10Ω
1%
Figure 8. MAX5043 Typical Application Circuit (48V Power Supply without Hot-Swap Capability, this Circuit has not been Tested)
20 ______________________________________________________________________________________
Two-Switch Power ICs with Integrated
Power MOSFETs and Hot-Swap Controller
Pin Configurations
TOP VIEW
56 55 54 53 52 51 50 49 48 47 46 45 44 43
56 55 54 53 52 51 50 49 48 47 46 45 44 43
N.C.
N.C.
1
2
3
4
5
6
7
8
9
42 N.C.
N.C.
N.C.
1
2
3
4
5
6
7
8
9
42 N.C.
41 REG15
40 N.C.
41 REG15
40 N.C.
RCFF
RCFF
RAMP
OPTO
39 REG5
RAMP
OPTO
39 REG5
38 REG9
38 REG9
CSS
37 PPWM
36 DRVDEL
35 PWMNEG
34 CSN
CSS
37 PPWM
36 DRVDEL
35 PWMNEG
34 CSN
BST
BST
MAX5042ATN
MAX5043ETN
DRVIN
PWMPNEG
DRVIN
PWMPNEG
RCOSC 10
33 CSP
RCOSC 10
FLTINT 11
SYNC 12
PWMSD 13
N.C. 14
33 CSP
FLTINT 11
SYNC 12
PWMSD 13
N.C. 14
32 CSOUT
31 HSDRAIN
30 HSGATE
29 NEGIN
32 CSOUT
31 PWMNEG
30 N.C.
29 PWMNEG
15 16 17 18 19 20 21 22 23 24 25 26 27 28
15 16 17 18 19 20 21 22 23 24 25 26 27 28
THIN QFN
THIN QFN
EXPOSED PADDLE CONNECTED TO NEGIN.
EXPOSED PADDLE CONNECTED TO PWMNEG.
Chip Information
TRANSISTOR COUNT: 35,247
PROCESS: BiCMOS DMOS
______________________________________________________________________________________ 21
Two-Switch Power ICs with Integrated
Power MOSFETs and Hot-Swap Controller
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
22 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2004 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products.
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