MAX5068FAUE+ [MAXIM]
Switching Controller, Current-mode, 1A, 2500kHz Switching Freq-Max, BICMOS, PDSO16, 4.40 MM, ROHS COMPLIANT, MO-153-ABT, TSSOP-16;型号: | MAX5068FAUE+ |
厂家: | MAXIM INTEGRATED PRODUCTS |
描述: | Switching Controller, Current-mode, 1A, 2500kHz Switching Freq-Max, BICMOS, PDSO16, 4.40 MM, ROHS COMPLIANT, MO-153-ABT, TSSOP-16 信息通信管理 开关 光电二极管 |
文件: | 总20页 (文件大小:311K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
19-3176; Rev 1; 7/04
High-Frequency, Current-Mode PWM Controller
with Accurate Programmable Oscillator
General Description
Features
♦ Current-Mode Control with 47µA (typ) Startup
The MAX5068 is a high-frequency, current-mode,
pulse-width modulation (PWM) controller that integrates
all the building blocks necessary for implementing AC-
DC or DC-DC fixed-frequency power supplies. Isolated
or nonisolated power supplies are easily constructed
using either primary- or secondary-side regulation.
Current-mode control with leading-edge blanking sim-
plifies control-loop design, and a programmable inter-
nal slope-compensation circuit stabilizes the current
loop when operating at duty cycles above 50%. The
MAX5068A/B limit the maximum duty cycle to 50% for
use in single-ended forward converters. The
MAX5068C/D/E/F allow duty cycles up to 75%. The
MAX5068 features an accurate externally programma-
ble oscillator that simplifies system design.
Current
♦ Resistor-Programmable 4ꢀ.5 Aꢁꢁurate
Switꢁhing Frequenꢁy:
2.kHz to 1ꢀ2.MHz (MAX.068A/B)
12ꢀ.kHz to 62.kHz (MAX.068C/D/E/F)
♦ Reꢁtified 8.V
to 26.V
or 36V
to 72V
DC DC
AC
AC
Input (MAX.068A/C/D)
♦ Input Direꢁtly Driven from 10ꢀ8V to 24V
(MAX.068B/E/F)
♦ Frequenꢁy Synꢁhronization Input
(MAX.068A/B/C/E)
♦ Programmable Dead Time and Slope
Compensation
♦ Programmable Startup Voltage (UVLO)
An input undervoltage lockout (UVLO) programs the
input-supply startup voltage and ensures proper opera-
tion during brownout conditions.
♦ Programmable UVLO Hysteresis
(MAX.068A/B/D/F)
♦ Integrating Fault Proteꢁtion (Hiꢁꢁup)
A single external resistor programs the output switching
frequency from 12.5kHz to 1.25MHz. The MAX5068A/
B/C/E provide a SYNC input for synchronization to an
external clock. The maximum FET-driver duty cycle is
50% for the MAX5068A/B and 75% for the MAX5068C/
D/E/F. Programmable hiccup current limit provides
additional protection under severe faults.
♦ -40°C to +12.°C Automotive Temperature Range
♦ 16-Pin Thermally Enhanꢁed TSSOP-EP Paꢁkage
Ordering Information
PART
TEMP RANGE
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
-40°C to +125°C
PIN-PACKAGE
16 TSSOP-EP*
16 TSSOP-EP*
16 TSSOP-EP*
16 TSSOP-EP*
16 TSSOP-EP*
16 TSSOP-EP*
MAX5068AAUE
MAX5068BAUE
MAX5068CAUE
MAX5068DAUE
MAX5068EAUE
MAX5068FAUE
*EP = Exposed pad.
The MAX5068 is specified over the -40°C to +125°C
automotive temperature range and is available in a
16-pin thermally enhanced TSSOP-EP package. Refer to
the MAX5069 data sheet for dual FET-driver applications.
Warning: The MAX5068 is designed to work with high
voltages. Exercise caution.
Pin Configurations
Applications
Universal-Input AC Power Supplies
Isolated Telecom Power Supplies
Networking System Power Supplies
Server Power Supplies
TOP VIEW
RT
1
2
3
4
5
6
7
8
16 REG5
15 IN
SYNC
HYST
14
V
CC
MAX5068A/B
Industrial Power Conversion
DT
13 NDRV
12 AGND
11 PGND
10 AGND
UVLO/EN
FB
COMP
FLTINT
9
CS
TSSOP-EP
Pin Configurations continued at end of data sheet.
Selector Guide appears at end of data sheet.
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
High-Frequency, Current-Mode PWM Controller
with Accurate Programmable Oscillator
ABSOLUTE MAXIMUM RATINGS
IN to PGND ............................................................-0.3V to +30V
IN to AGND.............................................................-0.3V to +30V
AGND to PGND.....................................................-0.3V to +0.3V
Continuous Power Dissipation
V
V
to PGND..........................................................-0.3V to +13V
to AGND..........................................................-0.3V to +13V
16-Pin TSSOP-EP (derate 21.3mW/°C above +70°C)...1702mW
Operating Temperature Range..........................-40°C to +125°C
Maximum Junction Temperature .....................................+150°C
Storage Temperature Range .............................-60°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
CC
CC
FB, COMP, CS, HYST, SYNC, REG5 to AGND ........-0.3V to +6V
UVLO/EN, RT, DT, SCOMP, FLTINT to AGND .........-0.3V to +6V
NDRV to PGND...........................................-0.3V to (V
+ 0.3V)
CC
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V = +12V for the MAX5068B/E/F; V = +23.6V for the MAX5068A/C/D at startup, then reduces to +12V; C = C
= 0.1µF;
IN
IN
IN
REG5
C
VCC
= 1µF; R = 100kΩ; NDRV = floating; T = T
to T , unless otherwise noted. Typical values are at T = +25°C.) (Note 1)
MAX A
RT
A
MIN
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
UNDERVOLTAGE LOCKOUT/STARTUP
Bootstrap UVLO Wake-Up Level
Bootstrap UVLO Shutdown Level
UVLO/EN Wake-Up Threshold
UVLO/EN Shutdown Threshold
V
V
V
V
V
V
V
rising, MAX5068A/C/D only
falling, MAX5068A/C/D only
19.68
9.05
21.6 23.60
9.74 10.43
V
V
V
V
SUVR
SUVF
ULR2
IN
IN
rising
falling
1.205 1.230 1.255
1.18
UVLO/EN
UVLO/EN
V
ULF2
MAX5068A/B/D/F only, sinking 50mA,
HYST FET On-Resistance
HYST FET Leakage Current
R
10
3
Ω
nA
µA
V
DS(ON)_H
V
= 0V
UVLO/EN
I
V
= 2V, V
= 5V
HYST
LEAK_H
UVLO/EN
IN Supply Current In
Undervoltage Lockout
I
V
= +19V, V
< V
ULF2
47
90
START
IN
UVLO/EN
IN Range
V
10.8
24.0
IN
INTERNAL SUPPLIES (V
and REG.)
CC
V
Regulator Set Point
V
V
V
= +10.8V to +24V, V sourcing 1µA to 25mA
7.0
10.5
5.15
V
V
CC
CCSP
REG5
IN
CC
REG5 Output Voltage
I
= 0 to 1mA
4.85
5.00
18
REG5
REG5 Short-Circuit Current Limit
I
mA
REG5_SC
f
f
= 1.25MHz
= 100kHz
5
SW
IN Supply Current After Startup
I
V
= +24V
IN
mA
µA
IN
2.5
SW
Shutdown Supply Current
I
90
IN_SD
GATE DRIVER (NDRV)
Z
NDRV sinking 100mA
NDRV sourcing 25mA
Sinking
2
3
4
6
OUT(LOW)
Driver Output Impedance
Driver Peak Output Current
Ω
Z
OUT(HIGH)
1000
650
I
mA
NDRV
Sourcing
PWM COMPARATOR
Comparator Offset Voltage
Comparator Propagation Delay
Minimum On-Time
V
V
V
- V
CS
1.30
298
1.60
40
2.00
330
V
OS_PWM
COMP
t
= 0.1V
ns
ns
PD_PWM
CS
t
Includes t
110
ON(MIN)
CS_BLANK
CURRENT-LIMIT COMPARATOR
Current-Limit Trip Threshold
V
314
mV
CS
2
_______________________________________________________________________________________
High-Frequency, Current-Mode PWM Controller
with Accurate Programmable Oscillator
ELECTRICAL CHARACTERISTICS (ꢁontinued)
(V = +12V for the MAX5068B/E/F; V = +23.6V for the MAX5068A/C/D at startup, then reduces to +12V; C = C
= 0.1µF;
IN
IN
IN
REG5
C
VCC
= 1µF; R = 100kΩ; NDRV = floating; T = T
to T , unless otherwise noted. Typical values are at T = +25°C.) (Note 1)
MAX A
RT
A
MIN
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
µA
CS Input Bias Current
CS Blanking Time
I
V
= 0V
CS
0
+2
B_CS
CS_BLANK
t
70
40
ns
Propagation Delay from
Comparator Input to NDRV
50mV overdrive
ns
V
IN CLAMP VOLTAGE
IN Clamp Voltage
V
V
sinking 2mA (Note 2)
IN
24.0
26.0
29.0
IN_CLAMP
ERROR AMPLIFIER (FB, COMP)
Voltage Gain
A
R
R
C
= 100kΩ to AGND
80
5
dB
V
COMP
= 100kΩ to AGND,
= 100pF to AGND
COMP
Unity-Gain Bandwidth
BW
MHz
LOAD
R
C
= 100kΩ to AGND,
= 100pF to AGND
COMP
Phase Margin
PM
65
degrees
mV
LOAD
FB Input Offset Voltage
COMP Clamp Voltage
Error-Amplifier Output Current
V
3
OS_FB
High
Low
2.6
0.4
0.5
3.8
1.1
V
V
COMP
COMP
I
Sinking or sourcing
+25°C ≤ T ≤ +125°C (Note 3)
mA
1.215 1.230 1.245
1.205 1.230 1.242
A
Reference Voltage
V
V
REF
-40°C ≤ T ≤ +125°C
A
Input Bias Current
I
100
12
300
nA
B_EA
COMP Short-Circuit Current
THERMAL SHUTDOWN
Thermal-Shutdown Temperature
Thermal Hysteresis
I
mA
COMP_SC
T
SD
+170
+25
°C
°C
T
HYST
OSCILLATOR SYNC INPUT (MAX.068A/B/C/E Only)
SYNC High-Level Voltage
SYNC Low-Level Voltage
SYNC Input Bias Current
Maximum SYNC Frequency
SYNC High-Level Pulse Width
SYNC Low-Level Pulse Width
DIGITAL SOFT-START
Soft-Start Duration
V
2.4
V
V
IH_SYNC
V
0.4
IL_SYNC
B_SYNC
I
10
nA
MHz
ns
f
f
= 2.5MHz (Note 4)
3.125
30
SYNC
OSC
t
SYNC_HI
t
30
ns
SYNC_LO
t
(Note 5)
2047
9.7
cycles
mV
SS
Reference-Voltage Step
V
STEP
Reference-Voltage Steps During
Soft-Start
127
steps
OSCILLATOR
Internal Oscillator Frequency
Range
f
f
= (1011 / R
)
RT
50
2500
kHz
OSC
OSC
_______________________________________________________________________________________
3
High-Frequency, Current-Mode PWM Controller
with Accurate Programmable Oscillator
ELECTRICAL CHARACTERISTICS (ꢁontinued)
(V = +12V for the MAX5068B/E/F; V = +23.6V for the MAX5068A/C/D at startup, then reduces to +12V; C = C
= 0.1µF;
IN
IN
IN
REG5
C
VCC
= 1µF; R = 100kΩ; NDRV = floating; T = T
to T , unless otherwise noted. Typical values are at T = +25°C.) (Note 1)
MAX A
RT
A
MIN
PARAMETER
SYMBOL
CONDITIONS
= 1011/(2 x R ),
MIN
TYP
MAX
UNITS
f
SW
RT
25
1250
kHz
MAX5068A/B
NDRV Switching Frequency
RT Voltage
f
(Note 6)
SW
f
= 1011/(4 x R ),
SW
RT
12.5
625
kHz
V
MAX5068C/D/E/F
V
40kΩ < R < 500kΩ
2.0
RT
RT
f
f
f
f
≤ 500kHz
> 500kHz
≤ 500kHz
> 500kHz
-2.5
-4
+2.5
+4
OSC
OSC
OSC
OSC
T
= +25°C
A
A
Oscillator Accuracy
%
%
-4.5
-6
+4.5
+6
T
= -40°C to +125°C
MAX5068A/B
50
75
DT connected to
REG5
Maximum Duty Cycle
D
MAX
MAX5068C/D/E/F
DEAD-TIME CONTROL (DT)
Dead Time
t
R
DT
= 24.9kΩ
60
ns
V
DT
V
DT_DISABLE
V
REG5
Dead-Time Disable Voltage
- 0.5V
Dead-Time Regulation Voltage
V
1.23
V
DT
INTEGRATING FAULT PROTECTION (FLTINT)
FLTINT Source Current
I
V
V
V
= 0
60
2.8
1.6
µA
V
FLTINT
FLTINT
FLTINT
FLTINT
FLTINT Shutdown Threshold
FLTINT Restart Threshold
V
V
rising
falling
FLTINT_SD
FLTINT_RS
V
SLOPE COMPENSATION (SCOMP) MAX.068C/D/E/F Only
Slope Compensation
V
C
= 100pF, R = 110kΩ
15
mV/µs
mV/µs
SLOPE
SLOPE
RT
Slope-Compensation Range
V
0
0
90
SLOPER
Slope-Compensation Voltage
Range
V
2.7
V
SCOMP
Note 1: The MAX5068 is 100% tested at T = +25°C. All limits over temperature are guaranteed by design.
A
Note 2: The MAX5068A/B are intended for use in universal-input power supplies. The internal clamp circuit is used to prevent the
bootstrap capacitor (C1 in Figure 1) from charging to a voltage beyond the absolute maximum rating of the device when
UVLO/EN is low. The maximum current to V (hence to clamp) when UVLO is low (device is in shutdown) must be external-
IN
ly limited to 2mA. Clamp currents higher than 2mA may result in clamp voltages higher than 30V, thus exceeding the
absolute maximum rating for V . For the MAX5068C/D, do not exceed the 24V maximum operating voltage of the device.
IN
Note 3: Reference voltage (V ) is measured with FB connected to COMP (see the Functional Diagram).
REF
Note 4: The SYNC frequency must be at least 25% higher than the programmed oscillator frequency.
Note .: The internal oscillator clock cycle.
Note 6: The MAX5068A/B driver switching frequency is one-half of the oscillator frequency. The MAX5068C/D/E/F driver switching
frequency is one-quarter of the oscillator frequency.
4
_______________________________________________________________________________________
High-Frequency, Current-Mode PWM Controller
with Accurate Programmable Oscillator
Typical Operating Characteristics
(V = +12V for the MAX5068B/E/F; V = +23.6V for MAX5068A/C/D at startup, then reduces to +12V; C = C
= 0.1µF;
IN
IN
IN
REG5
C
VCC
= 1µF; R = 100kΩ; NDRV = floating; V = 0; V
= floating; V = 0; T = +25°C, unless otherwise noted.)
COMP CS A
RT
FB
BOOTSTRAP UVLO SHUTDOWN LEVEL
vs. TEMPERATURE
UVLO/EN WAKE-UP THRESHOLD
vs. TEMPERATURE
BOOTSTRAP UVLO WAKE-UP LEVEL
vs. TEMPERATURE
10.0
9.9
9.8
9.7
9.6
9.5
1.245
1.240
1.235
1.230
1.225
1.220
21.6
UVLO/EN RISING
V
FALLING
IN
MAX5068A/C/D
MAX5068A/C/D
21.5
21.4
21.3
21.2
21.1
21.0
-40
-15
10
35
60
85
110
-40
-15
10
35
60
85
110
-40
-15
10
35
60
85
110
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
UVLO/EN SHUTDOWN THRESHOLD
vs. TEMPERATURE
V SUPPLY CURRENT IN
IN
UNDERVOLTAGE LOCKOUT vs. TEMPERATURE
V
SUPPLY CURRENT AFTER STARTUP
vs. TEMPERATURE
IN
1.20
1.19
1.18
1.17
1.16
1.15
1.14
1.13
1.12
1.11
1.10
60
56
52
48
44
40
6
V
= 19V
UVLO/EN FALLING
IN
V
= 24V
IN
WHEN IN BOOTSTRAP UVLO (MAX5068A/C/D)
UVLO/EN (MAX5068B/E/F) IS LOW
f
= 1.25MHz
SW
5
4
3
2
1
f
= 500kHz
SW
f
= 250kHz
SW
f
= 100kHz
10
SW
f
= 50kHz
SW
-40
-15
10
35
60
85
110
-40
-15
10
35
60
85
110
-40
-15
35
60
85
110
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
REG5 OUTPUT VOLTAGE
vs. OUTPUT CURRENT
V
vs. TEMPERATURE
CC
REG5 vs. TEMPERATURE
10.0
9.7
9.4
9.1
8.8
8.5
8.2
7.9
7.6
7.3
7.0
4.980
4.975
4.970
4.965
4.960
4.955
4.950
5.00
V = 10.8V
IN
R
= 100kΩ
RT
V
= 19V, I = 10mA
IN
4.99
4.98
4.97
4.96
4.95
4.94
4.93
4.92
4.91
4.90
IN
V
= 19V, I = 25mA
IN
100µA LOAD
IN
1mA LOAD
V
= 10.8V, I = 10mA
IN
IN
V
= 10.8V, I = 25mA
IN
IN
-40
-15
10
35
60
85
110
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
OUTPUT CURRENT (mA)
-40
-15
10
35
60
85
110
TEMPERATURE (°C)
TEMPERATURE (°C)
_______________________________________________________________________________________
.
High-Frequency, Current-Mode PWM Controller
with Accurate Programmable Oscillator
Typical Operating Characteristics (continued)
(V = +12V for the MAX5068B/E/F; V = +23.6V for MAX5068A/C/D at startup, then reduces to +12V; C = C
= 0.1µF;
IN
IN
IN
REG5
C
VCC
= 1µF; R = 100kΩ; NDRV = floating; V = 0; V
= floating; V = 0; T = +25°C, unless otherwise noted.)
COMP CS A
RT
FB
SWITCHING FREQUENCY
vs. TEMPERATURE
CS TRIP THRESHOLD
vs. TEMPERATURE
REG5 OUTPUT VOLTAGE vs. V
IN
4.985
520
515
510
505
500
495
490
330
327
324
321
318
315
312
f
= 500kHz
SW
TOTAL NUMBER OF
DEVICES = 200
I
= 100µA
REG5
4.984
4.983
4.982
4.981
4.980
4.979
4.978
4.977
4.976
4.975
+3σ
MEAN
-3σ
485
480
475
309
306
303
470
-40
300
-40
10
12
14
16
V
18
(V)
20
22
24
10
TEMPERATURE (°C)
35
60
85
110
-15
110
-15
10
35
60
85
IN
TEMPERATURE (°C)
PROPAGATION DELAY FROM CS COMPARATOR
INPUT CURRENT
vs. INPUT CLAMP VOLTAGE
INPUT CLAMP VOLTAGE
vs. TEMPERATURE
INPUT TO NDRV vs. TEMPERATURE
50
14
12
10
8
27.0
I
= 2mA
SINK
48
46
44
42
40
38
36
34
32
30
26.8
26.6
26.4
26.2
26.0
25.8
25.6
25.4
25.2
25.0
6
4
2
0
-40 -15
10
35
60
85
110
10.0 12.5 15.0 17.5 20.0 22.5 25.0 27.5 30.0
INPUT CLAMP VOLTAGE (V)
-40 -15
10
35
60
85
110
TEMPERATURE (°C)
TEMPERATURE (°C)
NDRV OUTPUT IMPEDANCE
vs. TEMPERATURE
NDRV OUTPUT IMPEDANCE
vs. TEMPERATURE
ERROR AMPLIFIER OPEN-LOOP GAIN
AND PHASE vs. FREQUENCY
3.0
2.8
2.6
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
4.0
3.8
3.6
3.4
3.2
3.0
2.8
2.6
2.4
2.2
2.0
120
100
80
30
V
= 24V
SINKING 100mA
V = 24V
IN
SOURCING 25mA
IN
0
-30
-60
-90
-120
-150
-180
-210
GAIN
60
40
PHASE
20
0
-20
-40
-40
-15
10
35
60
85
110
-40
-15
10
35
60
85
110
0.1
10
1k
100k
10M
TEMPERATURE (°C)
TEMPERATURE (°C)
FREQUENCY (Hz)
6
_______________________________________________________________________________________
High-Frequency, Current-Mode PWM Controller
with Accurate Programmable Oscillator
Typical Operating Characteristics (continued)
(V = +12V for the MAX5068B/E/F; V = +23.6V for MAX5068A/C/D at startup, then reduces to +12V; C = C
= 0.1µF;
IN
IN
IN
REG5
C
VCC
= 1µF; R = 100kΩ; NDRV = floating; V = 0; V
= floating; V = 0; T = +25°C, unless otherwise noted.)
COMP CS A
RT
FB
NDRV SWITCHING FREQUENCY (f
)
SW
vs. R
FLTINT CURRENT vs. TEMPERATURE
HYST R vs. TEMPERATURE
ON
RT
63.0
13.0
12.5
12.0
11.5
11.0
10.5
10.0
9.5
2
1
V
= 24V
IN
62.9
62.8
62.7
62.6
62.5
62.4
62.3
62.2
62.1
62.0
SINKING 50mA
MAX5068A/B
0.1
MAX5068C/D/E/F
9.0
8.5
8.0
0.01
-40
-15
10
35
60
85
110
-40
-15
10
35
60
85
110
0.03
0.1
1
2
TEMPERATURE (°C)
TEMPERATURE (°C)
R
(MΩ)
RT
NDRV SWITCHING FREQUENCY
vs. TEMPERATURE
NDRV SWITCHING FREQUENCY
vs. TEMPERATURE
NDRV SWITCHING FREQUENCY
vs. TEMPERATURE
505
504
52.0
51.6
51.2
50.8
50.4
50.0
49.6
49.2
48.8
48.4
48.0
1.40
1.35
1.30
1.25
1.20
1.15
1.10
f
= 500kHz
f
= 50kHz
SW
MAX5068A/B
SW
f
= 1.25MHz
SW
503
502
501
500
499
498
497
496
495
-25
0
25
100
125
-50
50
75
-40 -15
10
35
60
85
110
-15
10
35
110
-40
60
85
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
DEAD TIME vs. TEMPERATURE
DEAD TIME vs. R
DT
70
65
60
55
50
45
40
200
V
R
R
= 24V
= 24.9kΩ
= 100kΩ
IN
DT
RT
180
160
140
120
100
80
60
40
20
0
-40 -15
10
35
60
85
110
1
10
100
TEMPERATURE (°C)
R
(kΩ)
DT
_______________________________________________________________________________________
7
High-Frequency, Current-Mode PWM Controller
with Accurate Programmable Oscillator
Pin Description
PIN
NAME
FUNCTION
MAX.068A MAX.068C MAX.068D
MAX.068B MAX.068E MAX.068F
Oscillator-Timing Resistor Connection. Connect a resistor from RT to AGND
to set the internal oscillator frequency.
1
1
1
RT
External-Clock Sync Input. Connect SYNC to AGND when not using an
external clock.
2
3
2
—
3
—
2
SYNC
HYST
Programmable Hysteresis Input
Slope-Compensation Capacitor Input. Connect a capacitor to AGND to set
the slope compensation.
—
3
SCOMP
Dead-Time Adjustment. Connect a resistor from DT to AGND to adjust NDRV
dead time. Connect to REG5 for maximum duty cycle.
4
5
4
5
4
5
DT
Externally Programmable Undervoltage Lockout. UVLO/EN programs the
input start voltage. Drive UVLO/EN to AGND to disable the output.
UVLO/EN
6
7
6
7
6
7
FB
Error-Amplifier Inverting Input
COMP
Error-Amplifier Compensation Output
Fault-Integration Input. A capacitor connected to FLTINT charges with an
internal 60µA current source during repeated current-limit events. Switching
8
8
8
FLTINT
terminates when V
reaches 2.9V. An external resistor connected in
FLTINT
parallel discharges the capacitor. Switching resumes when V
1.6V.
drops to
FLTINT
9
10, 12
11
9
10, 12
11
9
10, 12
11
CS
Current-Sense Resistor Connection
AGND
PGND
Analog Ground. Connect to PGND through a ground plane.
Power Ground. Connect to AGND through a ground plane.
Gate-Driver Output. Connect the NDRV output to the gate of the external
N-channel FET.
13
14
13
14
13
14
NDRV
9V Linear-Regulator Output. Decouple V with a minimum 1µF ceramic
CC
capacitor to the AGND plane; also internally connected to the FET driver.
V
CC
Power-Supply Input. IN provides power for all internal circuitry. Decouple IN
with a minimum 0.1µF ceramic capacitor to AGND (see the Typical
Operating Circuit).
15
15
15
IN
5V Linear-Regulator Output. Decouple to AGND with a 0.1µF ceramic
capacitor.
16
EP
16
EP
16
EP
REG5
PAD
Exposed Pad. Connect to GND.
8
_______________________________________________________________________________________
High-Frequency, Current-Mode PWM Controller
with Accurate Programmable Oscillator
up from a minimum voltage of 10.8V. Internal digital soft-
start reduces output-voltage overshoot at startup.
Detailed Description
The MAX5068 is a current-mode PWM controller for use
A single external resistor programs the switching fre-
quency from 12.5kHz to 1.25MHz. The MAX5068A/B/C/E
provide a SYNC input for synchronization to an external
clock. The maximum FET driver duty cycle is 50% for the
MAX5068A/B, and 75% for the MAX5068C/D/E/F.
Integrating fault protection ignores transient overcurrent
conditions for a set length of time. The length of time is
programmed by an external capacitor. The internal ther-
mal-shutdown circuit protects the device if the junction
temperature should exceed +170°C.
in isolated and nonisolated power-supply applications.
A bootstrap UVLO with a programmable hysteresis,
very low startup, and low operating current result in
high-efficiency universal-input power supplies. In addi-
tion to the internal bootstrap UVLO, the device also
offers programmable input startup and turn-off volt-
ages, programmed through the UVLO/EN input. When
using the MAX5068 in the bootstrapped mode, if the
power-supply output is shorted, the tertiary winding
voltage drops below the 10V threshold, causing the
bootstrap UVLO to turn off the gate drive to the external
power MOSFET, reinitiating a startup sequence with
soft-start.
Power supplies designed with the MAX5068 use a
high-value startup resistor, R1, which charges a reser-
voir capacitor, C1 (Figure 1). During this initial period,
while the voltage is less than the internal bootstrap
UVLO threshold, the device typically consumes only
47µA of quiescent current. This low startup current and
the large bootstrap UVLO hysteresis help to minimize
the power dissipation across R1, even at the high end
The MAX5068 includes a cycle-by-cycle current limit
that turns off the gate drive to the external MOSFET
during an overcurrent condition. The MAX5068 integrat-
ing fault protection reduces average power dissipation
during persistent fault conditions (see the Integrating
Fault Protection section).
of the universal AC input voltage (265V ).
AC
The MAX5068 includes a cycle-by-cycle current limit
that turns off the gate to the external MOSFET during an
overcurrent condition. When using the MAX5068A/C/D
in the bootstrap mode (if the power-supply output is
shorted), the tertiary winding voltage drops below the
9.74V bootstrap UVLO to turn off the gate to the exter-
nal power MOSFET. This reinitiates a startup sequence
with soft-start.
The MAX5068 features a very accurate, wide-range,
programmable oscillator that simplifies and optimizes
the design of the magnetics. The MAX5068A/C/D are
well suited for universal-input (rectified 85V
to
AC
265V ) or telecom (-36V
to -72V ) power sup-
AC
DC
DC
plies. The MAX5068B/E/F are well suited for low-input
voltage (10.8V to 24V ) power supplies.
DC
DC
The MAX5068 high-frequency, universal input, offline/
telecom, current-mode PWM controller integrates all the
building blocks necessary for implementing AC-DC and
DC-DC fixed-frequency power supplies. Isolated or non-
isolated power supplies are easily constructed using
either primary- or secondary-side regulation. Current-
mode control with leading-edge blanking simplifies con-
trol-loop design, and an external slope-compensation
control stabilizes the current loop when operating at
duty cycles above 50% (MAX5068C/D/E/F). The
MAX5068A/B limit the maximum duty cycle to 50% for
use in single-ended forward converters. The
MAX5068C/D/E/F allow duty cycles up to 75% for use in
flyback converters.
Current-Mode Control
The MAX5068 offers a current-mode control operation
feature, such as leading-edge blanking with a dual
internal path that only blanks the sensed current signal
applied to the input of the PWM controller. The current-
limit comparator monitors CS at all times and provides
cycle-by-cycle current limit without being blanked. The
leading-edge blanking of the CS signal prevents the
PWM comparator from prematurely terminating the on
cycle. The CS signal contains a leading-edge spike
that results from the MOSFET gate charge current, and
the capacitive and diode reverse-recovery current of
the power circuit. Since this leading-edge spike is nor-
mally lower than the current-limit comparator threshold,
current limiting is provided under all conditions.
An input undervoltage lockout (UVLO) programs the
input-supply startup voltage and ensures proper opera-
tion during brownout conditions. An external voltage-
divider programs the supply startup voltage. The
MAX5068A/B/D/F feature a programmable UVLO hys-
teresis. The MAX5068A/C/D feature an additional internal
bootstrap UVLO with large hysteresis that requires a min-
imum startup voltage of 23.6V. The MAX5068B/E/F start
Use the MAX5068C/D/E/F in flyback applications where
wide line voltage and load-current variations are
expected. Use the MAX5068A/B for forward/flyback
converters where the maximum duty must be limited to
less than 50%.
_______________________________________________________________________________________
9
High-Frequency, Current-Mode PWM Controller
with Accurate Programmable Oscillator
D1
VOUT
D2
C6
V
IN
R1
C1
R8
R9
R2
C2
IN
NDRV
CS
Q1
R
FLTINT
C3
C4
CS
V
CC
FB
R5
C5
MAX5068A
REG5
RT
COMP
R6
R3
UVLO/EN
R4
R
HYST
DT
HYST
PGND
SYNC
R7
AGND
Figure 1. Nonisolated Power Supply with Programmable Input Supply Voltage
Use the MAX5068C/D/E/F in forward converter applica-
MAX5068C/E UVLO Adjustment
tions with greater than 50% duty cycle. The large duty
cycle results in much lower operating primary RMS cur-
rent through the MOSFET switch and, in most cases,
requires a smaller output filter capacitor. The major dis-
advantage to this is that the MOSFET voltage rating
must be higher. The MAX5068C/D/E/F capacitor
adjustable-slope-compensation feature allows for easy
stabilization of the inner current loop.
The MAX5068C/E have an input voltage UVLO/EN with
a 1.231V threshold. Before any operation can com-
mence, the UVLO/EN voltage must exceed the 1.231V
threshold. The UVLO circuit keeps the PWM compara-
tor, ILIM comparator, oscillator, and output driver shut
down to reduce current consumption (see the
Functional Diagram).
Calculate R6 in Figure 2 by using the following formula:
Undervoltage Lockout
The MAX5068 features an input voltage UVLO/EN func-
tion to enable the PWM controller before any operation
can begin. The MAX5068C/E shut down if the voltage
at UVLO/EN falls below its 1.18V threshold. The
MAX5068A/B/D/F also incorporate an UVLO hysteresis
input to set the desired turn-off voltage.
⎛
⎞
V
ON
R6 =
−1 × R7
⎜
⎟
V
⎝
⎠
ULR2
where V
is the UVLO/EN’s 1.231V rising threshold
is the desired startup voltage. Choose an R7
value in the 20kΩ range.
ULR2
and V
ON
After a successful startup, the MAX5068C/E shut down if
the voltage at UVLO/EN drops below its 1.18V threshold.
10 ______________________________________________________________________________________
High-Frequency, Current-Mode PWM Controller
with Accurate Programmable Oscillator
V
IN
MAX5068C/E
R6
R7
UVLO/EN
V
HYST
= V - V
ON OFF
1.23V
1.18V
V
OFF
V
ON
Figure 2. Setting the MAX5068C/E Undervoltage Lockout
Threshold
Figure 3. MAX5068 Hysteresis
MAX5068A/B/D/F UVLO with
Programmable Hysteresis
V
IN
In addition to programmable undervoltage lockout dur-
ing startup, the MAX5068A/B/D/F incorporate a
UVLO/EN hysteresis that allows the user to set a volt-
MAX5068A/B/D/F
R6
age (V
) to disable the controller (see Figure 3).
OFF
UVLO/EN
HYST
At the beginning of the startup sequence, UVLO/EN is
below the 1.23V threshold, Q1 turns on connecting
R
HYST
R
to GND (Figure 4). Once the UVLO 1.23V thresh-
HYST
1.23V
1.18V
old is crossed, Q1 turns off, resulting in the series com-
bination of R6, R , and R7, placing the MAX5068 in
HYST
normal operating condition.
Q1
R7
Calculate the turn-on voltage (V ) by using the fol-
ON
lowing formula:
⎛
⎞
V
ON
R6 =
−1 × R
HYST
⎜
⎟
V
⎝
⎠
ULR2
Figure 4. Setting the MAX5068A/B/D/F Turn-On/Turn-Off Voltages
where V
is the UVLO/EN’s 1.23V rising threshold.
ULR2
Choose an R
value in the 20kΩ range.
HYST
Bootstrap Undervoltage Lockout
(MAX5068A/C/D Only)
In addition to the externally programmable UVLO func-
tion offered by the MAX5068, the MAX5068A/C/D fea-
ture an additional internal bootstrap UVLO for use in
high-voltage power supplies (see the Functional
Diagram). This allows the device to bootstrap itself dur-
The MAX5068 turns off when the MAX5068 UVLO/EN
falls below the 1.18V falling threshold. The turn-off volt-
age (V
) is then defined as:
OFF
⎛
⎞
V
OFF
R7 = R6/
−1 − R
HYST
⎜
⎟
V
⎝
⎠
ULF2
ing initial power-up. The MAX5068A/C/D start when V
exceeds the bootstrap UVLO threshold of 23.6V.
IN
where V
is the 1.18V UVLO/EN falling threshold.
ULF2
______________________________________________________________________________________ 11
High-Frequency, Current-Mode PWM Controller
with Accurate Programmable Oscillator
During startup, the UVLO circuit keeps the PWM com-
parator, ILIM comparator, oscillator, and output driver
shut down to reduce current consumption. Once V
IN
reaches 23.6V, the UVLO circuit turns on both the PWM
and ILIM comparators, as well as the oscillator, and
allows the output driver to switch. When V drops
IN
V
CC
2V/div
below 9.7V, the UVLO circuit shuts down the PWM
comparator, ILIM comparator, oscillator, and output dri-
ver returning the MAX5068A/C/D to the startup mode.
MAX5068
V
PIN
IN
5V/div
MAX5068A/C/D Startup Operation
Normally, V is derived from the tertiary winding of the
IN
transformer. However, at startup there is no energy
delivered through the transformer, hence, a special
bootstrap sequence is required. Figure 5 shows the
0V
voltages on V and V
during startup. Initially, both
CC
IN
100ms/div
V
and V
are zero. After the input voltage is applied,
IN
CC
C1 charges through the startup resistor, R1, to an inter-
mediate voltage (see Figure 1). At this point, the inter-
nal regulator begins charging C3 (see Figure 5). Only
47µA of the current supplied by R1 is used by the
MAX5068A/C/D. The remaining input current charges
Figure 5. V
and V
During Startup When Using the
CC
IN
MAX5068 in Bootstrapped Mode (Also see Figure 1)
C1 and C3. The charging of C3 stops when the V
CC
for telecom applications). Size the startup resistor, R1,
to supply both the maximum startup bias of the device
(90µA) and the charging current for C1 and C3. The
bypass capacitor, C3, must charge to 9.5V, and C1
must charge to 24V, within the desired time period of
500ms. Because of the internal soft-start time of the
MAX5068, C1 must store enough charge to deliver cur-
rent to the device for at least 2047 oscillator clock
cycles. To calculate the approximate amount of capaci-
tance required, use the following formula:
voltage reaches approximately 9.5V. The voltage
across C1 continues rising until it reaches the wake-up
level of 23.6V. Once V exceeds the bootstrap UVLO
IN
threshold, NDRV begins switching the MOSFET and
energy is transferred to the secondary and tertiary out-
puts. If the voltage on the tertiary output builds to high-
er than 9.74V (the bootstrap UVLO lower threshold),
startup ends and sustained operation commences.
If V drops below 9.74V before startup is complete, the
IN
device goes back to low-current UVLO. If this occurs,
increase the value of C1 to store enough energy to
allow for the voltage at the tertiary winding to build up.
I
= Q
x f
gtot SW
g
(I + I ) x t
IN
g
SS
C1 =
Startup Time Considerations for
Power Supplies Using the MAX5068A/C/D
The V bypass capacitor, C1, supplies current imme-
IN
V
HYST
where I is the MAX5068’s internal supply current after
IN
diately after wakeup (see Figure 1). The size of C1 and
the connection configuration of the tertiary winding
determine the number of cycles available for startup.
Large values of C1 increase the startup time and also
supply extra gate charge for more cycles during initial
startup (2.5mA typ), Q
is the total gate charge for
gtot
Q1, f
is the MAX5068’s programmed switching fre-
SW
quency, V
is the bootstrap UVLO hysteresis (12V),
HYST
and t is the internal soft-start time (2047 x 1 / f
).
OSC
ss
Example: I = (8nC) (250kHz) ≅ 2.0mA
g
startup. If the value of C1 is too small, V drops below
IN
f
= 2 x 250kHz
9.74V because NDRV does not have enough time to
switch and build up sufficient voltage across the tertiary
output that powers the device. The device goes back
into UVLO and does not start. Use low-leakage capaci-
tors for C1 and C3.
OSC
Soft-start duration = 2047 x (1 / f
) = 4.1ms
OSC
(2.5mA + 2mA) (4.1ms)
C1 =
= 1.54µF
12V
Generally, offline power supplies keep typical startup
times to less than 500ms, even in low-line conditions
Use a 2.2µF ceramic capacitor for C1.
(85V
input for universal offline applications or 36V
DC
AC
12 ______________________________________________________________________________________
High-Frequency, Current-Mode PWM Controller
with Accurate Programmable Oscillator
D1
VOUT
D2
C7
V
IN
R1
C1
R2
C2
C3
C4
IN
NDRV
CS
Q1
R11
C6
FLTINT
R
MAX5068A
CS
V
CC
FB
V
CC
C5
R5
REG5
RT
R3
R4
COMP
R6
C10
R12
R13
UVLO/EN
PS2913
DT
R
HYST
R9
SYNC
AGND
MAX8515
HYST
PGND
R8
R10
R7
Figure 6. Secondary-Side, Regulated, Isolated Power Supply
Assuming C1 > C3, calculate the value of R1 as follows:
To minimize power loss on this resistor, choose a high-
er value for R1 than the one calculated above (if a
longer startup time can be tolerated).
V
× C1
500ms
− 0.5 x V
SUVR
I
=
C1
The above startup method is applicable to a circuit sim-
ilar to the one shown in Figure 1. In this circuit, the ter-
tiary winding has the same phase as the output
windings. Thus, the voltage on the tertiary winding at
any given time is proportional to the output voltage and
goes through the same soft-start period as the output
voltage. The minimum discharge time of C1 from 22V to
V
IN(MIN)
SUVR
R1 ≅
I
+ I
START
C1
where V
is the bootstrap UVLO wakeup level
SUVR
(23.6V max), V
is the minimum input supply volt-
IN(MIN)
age for the application (36V for telecom), and I
the V supply current at startup (90µA, max).
IN
is
START
10V must be greater than the soft-start time (t ).
SS
Oscillator/Switching Frequency
Use an external resistor at RT to program the MAX5068
internal oscillator frequency from 50kHz to 2.5MHz. The
MAX5068A/B output switching frequency is one-half of
the programmed oscillator frequency with a 50% duty
cycle. The MAX5068C/D/E/F output switching frequen-
cy is one-quarter of the programmed oscillator frequen-
cy with a 75% duty cycle.
For example:
24V x 2.2µF
500ms
36V − 12V
I
=
= 106µA
C1
R1 ≅
= 122.4kΩ
106µA + 90µA
______________________________________________________________________________________ 13
High-Frequency, Current-Mode PWM Controller
with Accurate Programmable Oscillator
Use the following formula to calculate the internal oscil-
lator frequency:
External Synchronization
(MAX5068A/B/C/E)
The MAX5068A/B/C/E can be synchronized using an
external clock at the SYNC input. For proper frequency
synchronization, the SYNC’s input frequency must be at
least 25% higher than the MAX5068A/B/C/E pro-
grammed internal oscillator frequency. Connect SYNC
to AGND when not using an external clock.
11
10
R
f
=
osc
RT
where f
is the oscillator frequency and R
resistor connected from RT to AGND.
is a
RT
OSC
Choose the appropriate resistor at RT to calculate the
Integrating Fault Protection
The integrating fault-protection feature allows transient
overcurrent conditions to be ignored for a programma-
ble amount of time, giving the power supply time to
behave like a current source to the load. For example,
this can occur under load current transients when the
control loop requests maximum current to keep the out-
put voltage from going out of regulation. Program the
fault-integration time by connecting an external suitably
sized capacitor to the FLTINT. Under sustained over-
current faults, the voltage across this capacitor ramps
up towards the FLTINT shutdown threshold (typically
2.8V). Once the threshold is reached, the power supply
shuts down. A high-value bleed resistor connected in
parallel with the FLTINT capacitor allows it to discharge
towards the restart threshold (typically 1.6V). Once this
threshold is reached, the supply restarts with a new
soft-start cycle.
desired output switching frequency (f ):
SW
11
10
=
=
for the MAX5068A/B and
for the MAX5068C/D/E/F
R
R
RT
RT
2f
SW
11
10
4f
SW
The MAX5068A/B and the MAX5068C/D/E/F have pro-
grammable output switching frequencies from 25kHz to
1.25MHz and 12.5kHz to 625kHz, respectively.
Dead-Time Adjustment
The MAX5068 programmable dead-time function
(Figure 7) allows additional flexibility in optimizing mag-
netics design and overcoming parasitic effects. The
MAX5068A/B and the MAX5068C/D/E/F have a maxi-
mum 50% and 75% duty cycle, respectively. In many
applications, the duty cycle of the external MOSFET
may need to be slightly decreased to prevent satura-
tion in the transformer’s primary. The dead time can be
Note that cycle-by-cycle current limiting is provided at
all times by CS with a threshold of 314mV (typ). The
fault-integration circuit forces a 60µA current onto
FLTINT each time that the current-limit comparator is
tripped (see the Functional Diagram). Use the following
formula to calculate the value of the capacitor neces-
sary for the desired shutdown time of the circuit:
configured from 30ns to 1 / (0.5 x f ) when program-
SW
ming the MAX5068. Connect a resistor between DT and
AGND to set the desired dead time using the following
formula:
I
x t
SH
2.8V
60
29.4
FLTINT
C
≅
Dead time =
× R (ns)
DT
FLTINT
where R is in kΩ and the dead time is in ns.
DT
Connect DT to REG5 to remove the delay and achieve
the MAX5068 maximum duty cycles.
SYNC
MAX5068A/B/C/E
RT
DEAD TIME
NDRV
t
DT
< 50%
< 50%
AGND
Figure 7. MAX5068 NDRV Dead-Time Timing Diagram
Figure 8. External Synchronization of the MAX5068A/B/C/E
14 ______________________________________________________________________________________
High-Frequency, Current-Mode PWM Controller
with Accurate Programmable Oscillator
where I
= 60µA, t
is the desired fault-integra-
rent. Therefore, select a MOSFET that yields acceptable
conduction and switching losses.
FLTINT
SH
tion time during which current-limit events from the cur-
rent-limit comparator are ignored. For example, a 0.1µF
capacitor gives a fault-integration time of 4.7ms.
Error Amplifier
The MAX5068 includes an internal error amplifier that
can regulate the output voltage in the case of a noniso-
lated power supply (Figure 1). Calculate the output volt-
age using the following equation:
This is an approximate formula. Some testing may be
required to fine-tune the actual value of the capacitor. To
calculate the recovery time, use the following formula:
t
RT
R
≅
FLTINT
R8
R9
⎛
⎞
0.595 × C
V
=
1 +
x V
REF
FLTINT
⎜
⎝
⎟
⎠
OUT
where t is the desired recovery time.
RT
where V
= 1.23V. The amplifier’s noninverting input
REF
Choose t = 10 x t . Typical values for t range from
internally connects to a digital soft-start reference voltage.
This forces the output voltage to come up in an orderly
and well-defined manner under all load conditions.
RT
SH
SH
a few hundred microseconds to a few milliseconds.
Soft-Start
The MAX5068 soft-start feature allows the load voltage
to ramp up in a controlled manner, eliminating output-
voltage overshoot. Soft-start begins after UVLO is
deasserted. The voltage applied to the noninverting
node of the amplifier ramps from 0 to 1.23V in 2047
oscillator clock cycles (soft-start timeout period). Unlike
other devices, the MAX5068 reference voltage to the
internal amplifier is soft-started. This method results in
superior control of the output voltage under heavy- and
light-load conditions.
Slope Compensation (MAX5068C/D/E/F)
The MAX5068C/D/E/F use an internal-ramp generator
for slope compensation. The internal-ramp signal resets
at the beginning of each cycle and slews at the rate
programmed by the external capacitor connected at
SCOMP and the resistor at RT. Adjust the MAX5068
slew rate up to 90mV/µs using the following equation:
−6
165 × 10
SR =
(mV/ µs)
R
× C
RT
SCOMP
Internal Regulators
where R is the external resistor at RT that sets the oscil-
RT
Two internal linear regulators power the MAX5068 inter-
lator frequency and C
is the capacitor at SCOMP.
SCOMP
nal and external control circuits. V
powers the exter-
CC
nal N-channel MOSFET and is internally set to
approximately 9.5V. The REG5 5V regulator has a 1mA
sourcing capability and may be used to provide power
PWM Comparator
The PWM comparator uses the instantaneous current,
the error amplifier, and the slope compensation to
determine when to switch NDRV off. In normal opera-
tion, the N-channel MOSFET turns off when:
to external circuitry. Bypass V
and REG5 with 1µF
CC
and 0.1µF high quality capacitors, respectively. Use
lower value ceramics in parallel to bypass other
unwanted noise signals. Bootstrapped operation
requires startup through a bleed resistor. Do not exces-
sively load the regulators while the MAX5068 is in the
power-up mode. Overloading the outputs can cause
the MAX5068 to fail upon startup.
I
x R > V – V
- V
OFFSET SCOMP
PRIMARY
CS
EA
where I
is the current through the N-channel
is the output voltage of the internal
is the 1.6V internal DC offset and
is the ramp function starting at zero and slew-
PRIMARY
MOSFET, V
EA
amplifier, V
OFFSET
V
SCOMP
ing at the programmed slew rate (SR). When using the
MAX5068 in a forward-converter configuration, the fol-
lowing conditions must be met to avoid current-loop
subharmonic oscillations:
N-Channel MOSFET Switch Driver
NDRV drives an external N-channel MOSFET. The NDRV
output is supplied by the internal regulator (V ), which
CC
is internally set to approximately 9.5V. For the universal
input-voltage range, the MOSFET used must be able to
withstand the DC level of the high-line input voltage plus
the reflected voltage at the primary of the transformer.
For most applications that use the discontinuous flyback
topology, a MOSFET rated at 600V is required. NDRV
can source/sink in excess of 650mA/1000mA peak cur-
K ×
×
V
N
R
S
CS
L
OUT
×
= SR
N
P
where K = 0.75 and N and N are the number of turns
S
P
on the secondary and primary side of the transformer,
respectively. L is the secondary filter inductor. When
______________________________________________________________________________________ 1.
High-Frequency, Current-Mode PWM Controller
with Accurate Programmable Oscillator
optimally compensated, the current loop responds to
Applications Information
Layout Recommendations
Keep all PC board traces carrying switching currents
as short as possible, and minimize current loops.
input-voltage transients within one cycle.
Current Limit
The current-sense resistor (R ), connected between
CS
the source of the MOSFET and ground, sets the current
For universal AC input design, follow all applicable safe-
ty regulations. Offline power supplies may require UL,
VDE, and other similar agency approvals. Contact these
agencies for the latest layout and component rules.
limit. The CS input has a voltage trip level (V ) of
CS
314mV. Use the following equation to calculate the
value of R
:
CS
Typically, there are two sources of noise emission in a
switching power supply: high di/dt loops and high dv/dt
surfaces. For example, traces that carry the drain cur-
rent often form high di/dt loops. Similarly, the heatsink of
the MOSFET presents a dv/dt source, thus minimize the
surface area of the heatsink as much as possible.
V
CS
R
=
CS
I
PRI
where I
is the peak current in the primary that flows
through the MOSFET at full load.
PRI
When the voltage produced by this current (through the
current-sense resistor) exceeds the current-limit com-
parator threshold, the MOSFET driver (NDRV) quickly
terminates the current on-cycle. In most cases, a small
RC filter is required to filter out the leading-edge spike
on the sense waveform. Set the corner frequency to a
few MHz above the switching frequency.
To achieve best performance and to avoid ground
loops, use a solid ground-plane connection.
16 ______________________________________________________________________________________
High-Frequency, Current-Mode PWM Controller
with Accurate Programmable Oscillator
Typical Operating Circuit
D1
VOUT
D2
C7
V
IN
R1
C1
IN
R2
C2
NDRV
CS
Q1
R
R11
C6
FLTINT
C3
C4
CS
MAX5068C
V
CC
FB
V
CC
C5
R5
REG5
COMP
R6
R7
R3
C10
R12
R13
RT
DT
UVLO/EN
PS2913
R4
R9
MAX8515
SCOMP
PGND
SYNC
AGND
R8
R10
Selector Guide
PROGRAMMABLE
UVLO
PART
NUMBER
MAX DUTY
CYCLE
BOOTSTRAP
UVLO
STARTUP
VOLTAGE (V)
OSCILLATOR
SYNC
SLOPE
COMPENSATION
HYSTERESIS
MAX5068A
MAX5068B
MAX5068C
MAX5068D
MAX5068E
MAX5068F
50%
50%
75%
75%
75%
75%
Yes
No
23.6
10.8
23.6
23.6
10.8
10.8
Yes
Yes
No
Yes
Yes
Yes
No
No
No
Yes
Yes
No
Yes
Yes
Yes
Yes
Yes
No
Yes
No
No
Yes
______________________________________________________________________________________ 17
High-Frequency, Current-Mode PWM Controller
with Accurate Programmable Oscillator
Functional Diagram
HYST*
BOOTSTRAP
UVLO
21.6V/
9.74V
MAX5068
UVLO/EN
UVLO
1.23V
REFERENCE
1.23V/
1.18V
IN
V
IN
CLAMP
26V
IN
2.8V/
1.6V
60µA
5V
OUT
REGULATOR
REG5
REG_OK
V
CC
R
S
Q
FLTINT
V
CC
CURENT-LIMIT
COMPARATOR
S
R
Q
NDRV
PGND
314mV
1.6V
5kΩ
Σ*
+
CS
+
70ns
BLANKING
AGND
PWM
OSC
COMPARATOR
THERMAL
SHUTDOWN
DEAD
TIME
SLOPE
COMPENSATION
***SCOMP
DIGITAL
SOFT-START
1.23V
ERROR
AMP
FB
COMP
SYNC**
RT
DT
*MAX5068A/B/D AND MAX5068F ONLY.
**MAX5068A/B/C AND MAX5068E ONLY.
***MAX5068C/D/E/F ONLY.
18 ______________________________________________________________________________________
High-Frequency, Current-Mode PWM Controller
with Accurate Programmable Oscillator
Pin Configurations (continued)
TOP VIEW
RT
RT
1
2
3
4
5
6
7
8
16 REG5
15 IN
1
2
3
4
5
6
7
8
16 REG5
15 IN
SYNC
SCOMP
DT
HYST
SCOMP
DT
14
V
CC
14 V
CC
MAX5068C/E
13 NDRV
12 AGND
11 PGND
10 AGND
MAX5068D/F
13 NDRV
12 AGND
11 PGND
10 AGND
UVLO/EN
FB
UVLO/EN
FB
COMP
FLTINT
COMP
FLTINT
9
CS
9
CS
TSSOP-EP
TSSOP-EP
Chip Information
TRANSISTOR COUNT: 4,266
PROCESS: BiCMOS
______________________________________________________________________________________ 19
High-Frequency, Current-Mode PWM Controller
with Accurate Programmable Oscillator
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to wwwꢀmaxim-iꢁꢀꢁom/paꢁkages.)
PACKAGE OUTLINE, TSSOP, 4.40 MM BODY
EXPOSED PAD
1
21-0108
D
1
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
20 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2004 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products.
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