MAX5304CUA [MAXIM]

10-Bit Voltage-Output DAC in 8-Pin レMAX; 10位电压输出DAC, 8引脚μMAX
MAX5304CUA
型号: MAX5304CUA
厂家: MAXIM INTEGRATED PRODUCTS    MAXIM INTEGRATED PRODUCTS
描述:

10-Bit Voltage-Output DAC in 8-Pin レMAX
10位电压输出DAC, 8引脚μMAX

文件: 总12页 (文件大小:406K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
19-1562; Rev 0; 10/99  
10-Bit Voltage-Output DAC  
in 8-Pin µMAX  
General Description  
Features  
The MAX5304 combines a low-power, voltage-output,  
10-bit digital-to-analog converter (DAC) and a precision  
output amplifier in an 8-pin µMAX package. It operates  
from a single +5V supply, drawing less than 280µA of  
supply current.  
10-Bit DAC with Configurable Output Amplifier  
+5V Single-Supply Operation  
Low Supply Current  
0.28mA Normal Operation  
2µA Shutdown Mode  
The output amplifier’s inverting input is available to the  
user, allowing specific gain configurations, remote  
sensing, and high output-current capability. This makes  
the MAX5304 ideal for a wide range of applications,  
including industrial process control. Other features  
include a software shutdown and power-on reset.  
Available in 8-Pin µMAX  
Power-On Reset Clears DAC Output to Zero  
SPI/QSPI/MICROWIRE Compatible  
Schmitt-Trigger Digital Inputs for Direct  
The serial interface is SPI™/QSPI™/MICROWIRE™  
compatible. The DAC has a double-buffered input,  
organized as an input register followed by a DAC regis-  
ter. A 16-bit serial word loads data into the input regis-  
ter. The DAC register can be updated independently or  
simultaneously with the input register. All logic inputs  
are TTL/CMOS-logic compatible and buffered with  
Schmitt triggers to allow direct interfacing to optocou-  
plers.  
Optocoupler Interface  
Applications  
_________________Ordering Information  
Digital Offset and Gain Adjustment  
PART  
TEMP. RANGE  
PIN-PACKAGE  
Industrial Process Control  
MAX5304CUA  
MAX5304EUA  
0°C to +70°C  
8 µMAX  
-40°C to +85°C  
8 µMAX  
Microprocessor-Controlled Systems  
Portable Test Instruments  
Remote Industrial Control  
Functional Diagram  
Pin Configuration  
V
REF  
GND  
DD  
TOP VIEW  
FB  
OUT  
DAC  
REGISTER  
DAC  
1
2
3
4
8
7
6
5
V
DD  
OUT  
CS  
CONTROL  
GND  
REF  
FB  
MAX5304  
INPUT  
REGISTER  
DIN  
SCLK  
CS  
DIN  
16-BIT  
SHIFT  
MAX5304  
µMAX  
REGISTER  
SCLK  
SPI and QSPI are trademarks of Motorola, Inc.  
MICROWIRE is a trademark of National Semiconductor Corp.  
________________________________________________________________ Maxim Integrated Products  
1
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800.  
For small orders, phone 1-800-835-8769.  
10-Bit Voltage-Output DAC  
in 8-Pin µMAX  
ABSOLUTE MAXIMUM RATINGS  
DD  
V
to GND...............................................................-0.3V to +6V  
Operating Temperature Ranges  
REF, OUT, FB to GND.................................-0.3V to (V  
Digital Inputs to GND................................................-0.3V to +6V  
Continuous Current into Any Pin....................................... 20mA  
+ 0.3V)  
MAX5304CUA...................................................0°C to +70°C  
MAX5304EUA................................................-40°C to +85°C  
Junction Temperature......................................................+150°C  
Storage Temperature Range.............................-65°C to +150°C  
Lead Temperature (soldering, 10s)........................... ......+300°C  
DD  
Continuous Power Dissipation (T = +70°C)  
A
8-Pin µMAX (derate 4.10mW/°C above+70°C)..........330mW  
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional  
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to  
absolute maximum rating conditions for extended periods may affect device reliability.  
ELECTRICAL CHARACTERISTICS  
(Circuit of Figure 8, V = +5V 10ꢀ, V  
= +2.5V, R = 5k, C = 100pF, T = T  
to T , unless otherwise noted. Typical values  
MAX  
DD  
REF  
L
A
MIN  
L
are at T = +25°C. Output buffer connected in unity-gain configuration.)  
A
PARAMETER  
SYMBOL  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
STATIC PERFORMANCE—ANALOG SECTION  
Resolution  
N
10  
Bits  
Differential Nonlinearity  
DNL  
Guaranteed monotonic  
1.0  
4
LSB  
Integral Nonlinearity  
(Note 1)  
INL  
LSB  
Offset Error  
V
0.3  
6
8
mV  
ppm/°C  
LSB  
OS  
Offset-Error Tempco  
Gain Error (Note 1)  
TCV  
OS  
GE  
-0.3  
1
2
Gain-Error Tempco  
ppm/°C  
µV/V  
Power-Supply Rejection Ratio  
REFERENCE INPUT  
Reference Input Range  
Reference Input Resistance  
PSRR  
4.5V V  
5.5V  
800  
DD  
V
REF  
0
V
DD  
- 1.4  
V
R
REF  
Code dependent, minimum at code 1550 hex  
= 0.67Vp-p  
18  
30  
kΩ  
MULTIPLYING-MODE PERFORMANCE  
Reference -3dB Bandwidth  
V
REF  
650  
-84  
kHz  
dB  
Reference Feedthrough  
Input code = all 0s, V  
= 3.6Vp-p at 1kHz  
REF  
Signal-to-Noise Plus  
SINAD  
V
REF  
= 1Vp-p at 25kHz, code = full scale  
77  
dB  
Distortion Ratio  
DIGITAL INPUTS  
Input High Voltage  
Input Low Voltage  
Input Leakage Current  
Input Capacitance  
V
2.4  
V
V
IH  
V
I
0.8  
0.5  
IL  
V
IN  
= 0 or V  
0.001  
8
µA  
pF  
DD  
IN  
C
IN  
2
_______________________________________________________________________________________  
10-Bit Voltage-Output DAC  
in 8-Pin µMAX  
ELECTRICAL CHARACTERISTICS (continued)  
(Circuit of Figure 8, V = +5V 10ꢀ, V  
= +2.5V, R = 5k, C = 100pF, T = T  
to T , unless otherwise noted. Typical values  
MAX  
DD  
REF  
L
A
MIN  
L
are at T = +25°C. Output buffer connected in unity-gain configuration.)  
A
PARAMETER  
DYNAMICPERFORMANCE  
Voltage Output Slew Rate  
Output Settling Time  
Output Voltage Swing  
Current into FB  
SYMBOL  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
SR  
0.6  
10  
V/µs  
µs  
To 1/2LSB, V  
= 2.5V  
STEP  
Rail-to-rail (Note 2)  
0 to V  
V
DD  
0.001  
20  
0.1  
µA  
µs  
Start-Up Time  
Digital Feedthrough  
5
nVs  
CS = V , DIN = 100kHz  
DD  
POWER SUPPLIES  
Supply Voltage  
V
4.5  
5.5  
0.4  
20  
V
DD  
Supply Current  
I
(Note 3)  
(Note 3)  
0.28  
4
mA  
µA  
µA  
DD  
Supply Current in Shutdown  
Reference Current in Shutdown  
0.001  
0.5  
TIMING CHARACTERISTICS (Figure 6)  
SCLK Clock Period  
t
100  
40  
ns  
ns  
ns  
ns  
CP  
CH  
SCLK Pulse Width High  
SCLK Pulse Width Low  
CS Fall to SCLK Rise Setup Time  
t
t
40  
CL  
t
40  
CSS  
CSH  
t
0
40  
0
ns  
ns  
ns  
ns  
SCLK Rise to CS Rise Hold Time  
DIN Setup Time  
t
DS  
DIN Hold Time  
t
DH  
t
t
40  
SCLK Rise to CS Fall Delay  
CS0  
40  
ns  
ns  
CS Rise to SCLK Rise Hold Time  
CS Pulse Width High  
CS1  
t
100  
CSW  
Note 1: Guaranteed from code 3 to code 1023 in unity-gain configuration.  
Note 2: Accuracy is better than 1LSB for V  
= 8mV to (V  
- 100mV), guaranteed by a power-supply rejection test at the end  
OUT  
DD  
points.  
Note 3: R = , digital inputs at GND or V  
.
L
DD  
_______________________________________________________________________________________  
3
10-Bit Voltage-Output DAC  
in 8-Pin µMAX  
__________________________________________Typical Operating Characteristics  
(V  
= +5V, R = 5k, C = 100pF, T = +25°C, unless otherwise noted.)  
L L  
A
DD  
REFERENCE VOLTAGE INPUT  
FREQUENCY RESPONSE  
SUPPLY CURRENT  
vs. TEMPERATURE  
INTEGRAL NONLINEARITY  
vs. REFERENCE VOLTAGE  
0.050  
0.025  
0
0
-4  
400  
380  
360  
340  
320  
300  
280  
260  
240  
220  
200  
R =   
L
-8  
-12  
-16  
-20  
-0.025  
-0.050  
0
500k  
1M  
1.5M 2M 2.5M  
3M  
-60  
-20  
20  
60  
100  
140  
0.4  
1.2  
2.0  
2.8  
3.6  
4.4  
REFERENCE VOLTAGE (V)  
FREQUENCY (Hz)  
TEMPERATURE (°C)  
POWER-DOWN SUPPLY CURRENT  
vs. TEMPERATURE  
SUPPLY CURRENT  
vs. SUPPLY VOLTAGE  
TOTAL HARMONIC DISTORTION  
PLUS NOISE vs. FREQUENCY  
500  
450  
400  
350  
300  
250  
200  
150  
100  
50  
-50  
-55  
10  
9
V
= +2.5V + 1Vp-p SINE  
DC  
REF  
CODE = FULL SCALE  
8
-60  
-65  
-70  
-75  
-80  
-85  
-90  
7
6
5
4
3
2
1
0
-60  
0
100  
1
10  
-20  
20  
60  
100  
140  
4.0  
4.4  
4.8  
5.2  
5.6  
6.0  
FREQUENCY (kHz)  
SUPPLY VOLTAGE (V)  
TEMPERATURE (°C)  
REFERENCE FEEDTHROUGH  
AT 1kHz  
OUTPUT VOLTAGE  
vs. LOAD  
OUTPUT FFT PLOT  
0
2.49980  
2.49976  
2.49972  
2.49968  
2.49964  
2.49960  
2.49956  
0
-20  
V
= +3.6Vp-p  
REF  
REFERENCE INPUT SIGNAL  
CODE = FULL SCALE  
= 1kHz  
f
IN  
-20  
-40  
-40  
-60  
-60  
OUTPUT FEEDTHROUGH  
-80  
-80  
-100  
-100  
0.5  
1.6  
2.7  
3.8  
4.9  
6.0  
0.5  
1.6  
2.7  
3.8  
4.9  
6.0  
0.1k  
1k  
10k  
100k  
1M  
FREQUENCY (kHz)  
LOAD ()  
FREQUENCY (kHz)  
4
_______________________________________________________________________________________  
10-Bit Voltage-Output DAC  
in 8-Pin µMAX  
____________________________Typical Operating Characteristics (continued)  
(V  
DD  
= +5V, R = 5k, C = 100pF, T = +25°C, unless otherwise noted.)  
L L  
A
MAJOR-CARRY TRANSITION  
DIGITAL FEEDTHROUGH (f  
= 100kHz)  
SCLK  
SCLK  
2V/div  
CS  
5V/div  
OUT  
AC-COUPLED  
10mV/div  
OUT  
AC-COUPLED  
100mV/div  
CODE = 512  
10µs/div  
2µs/div  
CS = 5V  
DYNAMIC RESPONSE  
OUT  
1V/div  
GND  
10µs/div  
GAIN = +2V/V, SWITCHING FROM CODE 0 TO 1005  
_______________________________________________________________________________________  
5
10-Bit Voltage-Output DAC  
in 8-Pin µMAX  
_____________________Pin Description  
FB  
PIN  
NAME  
OUT  
CS  
FUNCTION  
DAC Output Voltage  
Chip-Select Input. Active low.  
Serial-Data Input  
OUT  
1
R
R
R
2
2R  
2R  
2R  
2R  
MSB  
2R  
3
DIN  
4
SCLK  
Serial-Clock Input  
5
6
7
8
FB  
DAC Output Amplifier Feedback  
Reference Voltage Input  
Ground  
REF  
REF  
GND  
AGND  
V
DD  
Positive Power Supply  
SHOWN FOR ALL 1s ON DAC  
Figure 1. Simplified DAC Circuit Diagram  
In shutdown mode, the MAX5304’s REF input enters a  
high-impedance state with a typical input leakage cur-  
rent of 0.001µA.  
_______________Detailed Description  
The MAX5304 contains a voltage-output digital-to-ana-  
log converter (DAC) that is easily addressed using a  
simple 3-wire serial interface. Each IC includes a 16-bit  
shift register, and has a double-buffered input com-  
posed of an input register and a DAC register (see the  
Functional Diagram). In addition to the voltage output,  
the amplifier’s negative input is available to the user.  
The reference input capacitance is also code depen-  
dent and typically ranges from 15pF (with an input  
code of all 0s) to 50pF (at full scale).  
The MAX873 +2.5V reference is recommended for use  
with the MAX5304.  
The DAC is an inverted R-2R ladder network that con-  
verts a digital input (10 data bits plus 3 sub-bits) into an  
equivalent analog output voltage in proportion to the  
applied reference voltage. Figure 1 shows a simplified  
circuit diagram of the DAC.  
Output Amplifier  
The MAX5304’s DAC output is internally buffered by a  
precision amplifier with a typical slew rate of 0.6V/µs.  
Access to the output amplifier’s inverting input provides  
the user greater flexibility in output gain setting/signal  
conditioning (see the Applications Information section).  
Reference Inputs  
The reference input accepts positive DC and AC sig-  
nals. The voltage at the reference input sets the full-  
scale output voltage for the DAC. The reference input  
With a full-scale transition at the MAX5304 output, the  
typical settling time to 1/2LSB is 10µs when loaded  
with 5kin parallel with 100pF (loads less than 2kΩ  
degrade performance).  
voltage range is 0V to (V  
OUT  
age source, as expressed in the following equation:  
- 1.4V). The output voltage  
DD  
(V  
) is represented by a digitally programmable volt-  
The amplifier’s output dynamic responses and settling  
performances are shown in the Typical Operating  
Characteristics.  
V
OUT  
= (V · NB / 1024) Gain  
REF  
where NB is the numeric value of the DAC’s binary  
Shutdown Mode  
The MAX5304 features a software-programmable shut-  
down that reduces supply current to a typical value of  
4µA. Writing 111X XXXX XXXX XXXX as the input-con-  
trol word puts the device in shutdown mode (Table 1).  
input code (0 to 1023), V  
is the reference voltage,  
REF  
and Gain is the externally set voltage gain.  
The impedance at the reference input is code depen-  
dent, ranging from a low value of 18kwhen the DAC  
has an input code of 1550 hex, to a high value exceed-  
ing several gigohms (leakage currents) with an input  
code of 0000 hex. Because the input impedance at the  
reference pin is code dependent, load regulation of the  
reference source is important.  
6
_______________________________________________________________________________________  
10-Bit Voltage-Output DAC  
in 8-Pin µMAX  
In shutdown mode, the amplifier’s output and the refer-  
ence input enter a high-impedance state. The serial  
interface remains active. Data in the input register is  
retained in shutdown, allowing the MAX5304 to recall  
the output state prior to entering shutdown. Exit shut-  
down mode by either recalling the previous configura-  
tion or updating the DAC with new data. When  
powering up the device or bringing it out of shutdown,  
allow 20µs for the outputs to stabilize.  
SCLK  
SK  
MICROWIRE  
PORT  
MAX5304  
DIN  
CS  
SO  
I/O  
Serial-Interface Configurations  
The MAX5304’s 3-wire serial interface is compatible  
with MICROWIRE (Figure 2) and SPI/QSPI (Figure 3).  
The serial-input word consists of three control bits fol-  
lowed by 10+3 data bits (MSB first), as shown in Figure  
4. The 3-bit control code determines the MAX5304’s  
response outlined in Table 1.  
Figure 2. Connections for MICROWIRE  
The MAX5304’s digital inputs are double buffered.  
Depending on the command issued through the serial  
interface, the input register can be loaded without  
affecting the DAC register, the DAC register can be  
loaded directly, or the DAC register can be updated  
from the input register (Table 1).  
+5V  
SS  
Serial-Interface Description  
The MAX5304 requires 16 bits of serial data. Table 1  
lists the serial-interface programming commands. For  
certain commands, the 10+3 data bits are “don’t  
cares.” Data is sent MSB first and can be sent in two 8-  
bit packets or one 16-bit word (CS must remain low  
until 16 bits are transferred). The serial data is com-  
posed of three control bits (C2, C1, C0), followed by  
the 10+3 data bits D9...D0, S2, S1, S0 (Figure 4). Set  
the sub-bits (S2, S1, S0) to zero. The 3-bit control code  
determines the register to be updated and the configu-  
ration when exiting shutdown.  
DIN  
MOSI  
SCK  
SPI/QSPI  
PORT  
MAX5304  
SCLK  
CS  
I/O  
CPOL = 0, CPHA = 0  
Figure 5 shows the serial-interface timing requirements.  
The chip-select pin (CS) must be low to enable the  
DAC’s serial interface. When CS is high, the interface  
control circuitry is disabled. CS must go low at least  
Figure 3. Connections for SPI/QSPI  
t
before the rising serial-clock (SCLK) edge to prop-  
CSS  
erly clock in the first bit. When CS is low, data is  
clocked into the internal shift register through the serial-  
data input pin (DIN) on SCLK’s rising edge. The maxi-  
mum guaranteed clock frequency is 10MHz. Data is  
latched into the MAX5304 input/DAC register on CS’s  
rising edge.  
MSB..................................................................................LSB  
16 Bits of Serial Data  
Control  
Bits  
Data Bits  
MSB............................LSB Sub-Bits  
C2  
C1  
C0 D9 ...............................D0, S2, S1, S0  
3 Control  
Bits  
10+3 Data Bits  
Figure 4. Serial-Data Format  
_______________________________________________________________________________________  
7
10-Bit Voltage-Output DAC  
in 8-Pin µMAX  
Table 1. Serial-Interface Programming Commands  
16-BITSERIALWORD  
FUNCTION  
D9.......................D0  
C2 C1 C0  
S2...S0  
MSB  
LSB  
Load input register; DAC register immediately updated (also exit  
shutdown).  
X
X
X
0
0
1
0
1
0
10 bits of data  
000  
000  
XXX  
10 bits of data  
XXXXXXXXXX  
Load input register; DAC register unchanged.  
Update DAC register from input register (also exit shutdown; recall  
previous state).  
1
0
1
1
1
1
XXXXXXXXXX  
XXXXXXXXXX  
XXX  
XXX  
Shutdown  
No operation (NOP)  
X = Don’t care  
CS  
COMMAND  
EXECUTED  
SCLK  
DIN  
1
8
9
16  
D3 D2 D1 D0 S2 S1 S0  
C1  
C0 D9 D8 D7 D6 D5  
C2  
D4  
Figure 5. Serial-Interface Timing Diagram  
t
CSW  
CS  
t
t
CSH  
t
t
CH  
CP  
CSS  
t
t
CSO  
CL  
t
CS1  
SCLK  
t
DS  
t
DH  
DIN  
Figure 6. Detailed Serial-Interface Timing Diagram  
8
_______________________________________________________________________________________  
10-Bit Voltage-Output DAC  
in 8-Pin µMAX  
DIN  
SCLK  
CS1  
CS2  
TO OTHER  
SERIAL DEVICES  
CS3  
CS  
CS  
CS  
MAX5304  
MAX5304  
MAX5304  
SCLK  
DIN  
SCLK  
DIN  
SCLK  
DIN  
Figure 7. Multiple MAX5304s Sharing Common DIN and SCLK Lines  
Figure 7 shows a method of connecting several  
MAX5304s. In this configuration, the clock and the data  
bus are common to all devices, and separate chip-  
select lines are used for each IC.  
Table 2. Unipolar Output Codes  
DAC CONTENTS  
ANALOG OUTPUT  
MSB  
LSB  
1023  
1024  
Applications Information  
11 1111 1111 (000)  
10 0000 0001 (000)  
10 0000 0000 (000)  
01 1111 1111 (000)  
00 0000 0001 (000)  
+V  
REF  
Unipolar Output  
For a unipolar output, the output voltage and the refer-  
ence input have the same polarity. Figure 8 shows the  
MAX5304 unipolar output circuit, which is also the typi-  
cal operating circuit. Table 2 lists the unipolar output  
codes.  
513  
+V  
REF  
1024  
+V  
512  
REF  
2
+V  
REF  
=
1024  
®
Figure 9 illustrates a Rail-to-Rail output configuration.  
511  
+V  
REF  
This circuit shows the MAX5304 with the output amplifi-  
er configured for a closed-loop gain of +2V/V to provide  
a 0 to 5V full-scale range when a 2.5V reference is used.  
1024  
1
+V  
REF  
1024  
Bipolar Output  
The MAX5304 output can be configured for bipolar  
operation using Figure 10’s circuit according to the fol-  
lowing equation:  
00 0000 0000 (000)  
0V  
Note: ( ) are for sub-bits.  
Using an AC Reference  
V
OUT  
= V  
[(2NB / 1024) - 1]  
REF  
In applications where the reference has AC signal com-  
ponents, the MAX5304 has multiplying capability within  
the reference input range specifications. Figure 11  
shows a technique for applying a sine-wave signal to  
the reference input where the AC signal is offset before  
being applied to REF. The reference voltage must  
never be more negative than GND.  
where NB is the numeric value of the DAC’s binary  
input code. Table 3 shows digital codes (offset binary)  
and corresponding output voltages for Figure 10’s cir-  
cuit.  
Rail-to-Rail is a registered trademark of Nippon Motorola, Ltd.  
_______________________________________________________________________________________  
9
10-Bit Voltage-Output DAC  
in 8-Pin µMAX  
The MAX5304’s total harmonic distortion plus noise  
Table 3. Bipolar Output Codes  
(THD+N) is typically less than -77dB (full-scale code),  
given a 1Vp-p signal swing and input frequencies up to  
25kHz. The typical -3dB frequency is 650kHz, as  
shown in the Typical Operating Characteristics graphs.  
DAC CONTENTS  
ANALOG OUTPUT  
MSB  
LSB  
511  
512  
+V  
REF  
11 1111 1111 (000)  
Digitally Programmable Current Source  
Figure 12’s circuit places an NPN transistor (2N3904 or  
similar) within the op amp feedback loop to implement  
a digitally programmable, unidirectional current source.  
The output current is calculated with the following  
equation:  
1
10 0000 0001 (000)  
10 0000 0000 (000)  
01 1111 1111 (000)  
+V  
REF  
512  
0V  
1
I
= (V  
/ R)(NB / 1024)  
OUT  
REF  
-V  
REF  
512  
where NB is the numeric value of the DAC’s binary  
input code, and R is the sense resistor shown in Figure  
12.  
511  
00 0000 0001 (000)  
-V  
REF  
512  
512  
512  
00 0000 0000 (000)  
-V  
REF  
= - V  
REF  
Note: ( ) are for sub-bits.  
+5V  
+5V  
REF  
REF  
V
V
DD  
DD  
10k  
10k  
OUT  
FB  
FB  
MAX5304  
MAX5304  
DAC  
DAC  
OUT  
GND  
GND  
Figure 8. Unipolar Output Circuit  
Figure 9. Unipolar Rail-to-Rail Output Circuit  
10 ______________________________________________________________________________________  
10-Bit Voltage-Output DAC  
in 8-Pin µMAX  
+5V  
R1  
R2  
+5V  
REF  
26k  
AC  
MAX495  
REFERENCE  
INPUT  
+5V  
V
DD  
500mVp-p  
10k  
V+  
V-  
FB  
V
DD  
REF  
V
OUT  
DAC  
OUT  
DAC  
OUT  
MAX5304  
GND  
MAX5304  
GND  
R1 = R2 = 10k0.1ꢀ  
Figure 10. Bipolar Output Circuit  
Figure 11. AC Reference Input Circuit  
Power-Supply Considerations  
On power-up, the input and DAC registers are cleared  
(set to zero code). For rated MAX5304 performance,  
+5V  
REF  
REF must be at least 1.4V below V . Bypass V  
with  
DD  
DD  
V
DD  
V
L
a 4.7µF capacitor in parallel with a 0.1µF capacitor to  
GND. Use short lead lengths, and place the bypass  
capacitors as close to the supply pins as possible.  
MAX5304  
I
OUT  
DAC  
OUT  
FB  
2N3904  
Grounding and Layout Considerations  
Digital or AC transient signals on GND can create noise  
at the analog output. Connect GND to the highest-qual-  
ity ground available. Good PC board ground layout  
minimizes crosstalk between the DAC output, reference  
input, and digital input. Reduce crosstalk by keeping  
analog lines away from digital lines. Wire-wrapped  
boards are not recommended.  
GND  
R
Figure 12. Digitally Programmable Current Source  
___________________Chip Information  
TRANSISTOR COUNT: 3053  
SUBSTRATE CONNECTED TO AGND  
______________________________________________________________________________________ 11  
10-Bit Voltage-Output DAC  
in 8-Pin µMAX  
Package Information  
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are  
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.  
12 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600  
© 1999 Maxim Integrated Products  
Printed USA  
is a registered trademark of Maxim Integrated Products.  

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