MAX5419PETA [MAXIM]
256-Tap, Nonvolatile, I2C-Interface, Digital Potentiometers; 256抽头，非易失， I²C接口，数字电位器
| 型号： | MAX5419PETA |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | 256-Tap, Nonvolatile, I2C-Interface, Digital Potentiometers |
| 文件： | 总15页 (文件大小：795K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
19-3185; Rev 2; 8/04
2
256-Tap, Nonvolatile, I C-Interface,
Digital Potentiometers
General Description
Features
The MAX5417/MAX5418/MAX5419 nonvolatile, linear-
taper, digital potentiometers perform the function of a
mechanical potentiometer, but replace the mechanics
with a simple 2-wire digital interface, allowing communi-
cation with multiple devices. Each device performs the
same function as a discrete potentiometer or variable
resistor and has 256 tap points.
♦ Power-On Recall of Wiper Position from
Nonvolatile Memory
♦ Tiny 3mm x 3mm 8-Pin TDFN Package
♦ 35ppm/°C End-to-End Resistance Temperature
Coefficient
♦ 5ppm/°C Ratiometric Temperature Coefficient
♦ 50kΩ/100kΩ/200kΩ Resistor Values
♦ Fast I2C-Compatible Serial Interface
♦ 500nA (typ) Static Supply Current
♦ Single-Supply Operation: +2.7V to +5.25V
♦ 256 Tap Positions
The devices feature an internal, nonvolatile EEPROM
used to store the wiper position for initialization during
power-up. The fast-mode I2C™-compatible serial inter-
face allows communication at data rates up to 400kbps,
minimizing board space and reducing interconnection
complexity in many applications. Each device is available
with one of four factory-preset addresses (see the
Selector Guide) and features an address input for a total
of eight unique address combinations.
The MAX5417/MAX5418/MAX5419 provide three nomi-
nal resistance values: 50kΩ (MAX5417), 100kΩ
(MAX5418), or 200kΩ (MAX5419). The nominal resistor
temperature coefficient is 35ppm/°C end-to-end, and
only 5ppm/°C ratiometric. This makes the devices ideal
for applications requiring a low-temperature-coefficient
variable resistor, such as low-drift, programmable gain-
amplifier circuit configurations.
♦
0.5 ꢀSꢁ DNꢀ in Voltage-Divider Mode
0.5 ꢀSꢁ INꢀ in Voltage-Divider Mode
♦
Functional Diagram
H
256-
POSITION
DECODER
8-BIT
SHIFT
REGISTER
8
8
256
8-BIT
LATCH
V
W
DD
GND
L
The MAX5417/MAX5418/MAX5419 are available in a
3mm x 3mm 8-pin TDFN package, and are specified
over the extended -40°C to +85°C temperature range.
2
SDA
SCL
POR
I C
MAX5417
MAX5418
MAX5419
INTERFACE
8-BIT
NV
MEMORY
A
0
Applications
Mechanical Potentiometer Replacement
Low-Drift Programmable-Gain Amplifiers
Volume Control
I2C is a trademark of Phillips Corp.
2
Purchase of I C components from Maxim Integrated Products,
Inc. or one of its sublicensed Associated Companies, conveys
2
a license under the Philips I C Patent Rights to use these com-
2
Liquid-Crystal Display (LCD) Contrast Control
ponents in an I C system, provided that the system conforms
2
to the I C Standard Specification as defined by Philips.
Ordering Information/Selector Guide
PART
MAX5417LETA
MAX5417META*
MAX5417NETA*
MAX5417PETA*
MAX5418LETA
MAX5418META*
MAX5418NETA*
MAX5418PETA*
MAX5419LETA
MAX5419META*
MAX5419NETA*
MAX5419PETA*
TEMP RANGE
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
I2C ADDRESS
R (kΩ)
50
PIN-PACKAGE
8 TDFN-EP**
8 TDFN-EP**
8 TDFN-EP**
8 TDFN-EP**
8 TDFN-EP**
8 TDFN-EP**
8 TDFN-EP**
8 TDFN-EP**
8 TDFN-EP**
8 TDFN-EP**
8 TDFN-EP**
8 TDFN-EP**
TOP MARK
AIB
010100A
010101A
010110A
010111A
010100A
010101A
010110A
010111A
010100A
010101A
010110A
010111A
0
0
0
0
0
0
0
0
0
0
0
0
50
ALS
50
ALT
50
ALU
AIC
100
100
100
100
200
200
200
200
ALV
ALW
ALX
AID
ALY
ALZ
AMA
*Future product—contact factory for availability.
**Exposed pad.
Pin Configuration appears at end of data sheet.
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
2
256-Tap, Nonvolatile, I C-Interface,
Digital Potentiometers
AꢁSOꢀUTE MAXIMUM RATINGS
DD
V
to GND...........................................................-0.3V to +6.0V
Continuous Power Dissipation (T = +70°C)
A
All Other Pins to GND.................................-0.3V to (V
Maximum Continuous Current into H, L, and W
MAX5417...................................................................... 1.3mA
MAX5418...................................................................... 0.6mA
MAX5419...................................................................... 0.3mA
+ 0.3V)
8-Pin TDFN (derate 24.4mW/°C above +70°C) .........1951mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range.............................-60°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
DD
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
EꢀECTRICAꢀ CHARACTERISTICS
(V = +2.7V to +5.25V, H = V , L = GND, T = -40°C to +85°C, unless otherwise noted. Typical values are at V = +5V, T = +25°C.)
DD
DD
A
DD
A
PARAMETER
SYMꢁOꢀ
CONDITIONS
MIN
TYP
MAX
UNITS
DC PERFORMANCE (VOꢀTAGE-DIVIDER MODE)
Resolution
256
Taps
LSB
LSB
Integral Nonlinearity
INL
(Note 1)
(Note 1)
0.5
0.5
Differential Nonlinearity
DNL
End-to-End Temperature
Coefficient
TC
35
5
ppm/°C
ppm/°C
R
Ratiometric Temperature
Coefficient
MAX5417_, 50Ω
-0.6
-0.3
-0.15
0.6
Full-Scale Error
Zero-Scale Error
MAX5418_, 100kΩ
MAX5419_, 200kΩ
MAX5417_, 50kΩ
MAX5418_, 100kΩ
MAX5419_, 200kΩ
LSB
LSB
0.3
0.15
DC PERFORMANCE (VARIAꢁꢀE-RESISTOR MODE)
V
V
= 3V
= 5V
3
DD
DD
Integral Nonlinearity
(Note 2)
INL
LSB
LSB
1.5
V
= 3V, MAX5417_, 50kΩ,
DD
-1
+2
guaranteed monotonic
Differential Nonlinearity
(Note 2)
DNL
V
= 3V, MAX5418_, 100kΩ
1
1
1
DD
MAX5419_, 200kΩ
= 5V
V
DD
DC PERFORMANCE (RESISTOR CHARACTERISTICS)
Wiper Resistance
Wiper Capacitance
R
W
C
W
V
= 3V to 5.25V (Note 3)
DD
325
10
675
Ω
pF
MAX5417_
MAX5418_
MAX5419_
37.5
75
50
62.5
125
250
End-to-End Resistance
R
100
200
kΩ
HL
150
2
_______________________________________________________________________________________
2
256-Tap, Nonvolatile, I C-Interface,
Digital Potentiometers
EꢀECTRICAꢀ CHARACTERISTICS (continued)
(V = +2.7V to +5.25V, H = V , L = GND, T = -40°C to +85°C, unless otherwise noted. Typical values are at V = +5V, T = +25°C.)
DD
DD
A
DD
A
PARAMETER
SYMꢁOꢀ
CONDITIONS
MIN
TYP
MAX
UNITS
DIGITAꢀ INPUTS
V
V
V
= 3.4V to 5.25V
2.4
DD
DD
DD
Input High Voltage (Note 4)
V
V
IH
< 3.4V
0.7 x V
DD
Input Low Voltage
V
= 2.7V to 5.25V (Note 4)
0.8
0.4
1
V
V
IL
Low-Level Output Voltage
Input Leakage Current
Input Capacitance
V
3mA sink current
OL
I
µA
pF
LEAK
5
DYNAMIC CHARACTERISTICS
MAX5417_
MAX5418_
MAX5419_
100
50
Wiper -3dB Bandwidth (Note 5)
kHz
25
NONVOꢀATIꢀE MEMORY
Data Retention
T
A
T
A
T
A
= +85°C
= +25°C
= +85°C
50
Years
200,000
50,000
Endurance
Stores
POWER SUPPꢀY
Power-Supply Voltage
V
2.70
5.25
1
V
DD
Digital inputs = V or GND,
DD
Standby Current
I
0.5
µA
DD
T
A
= +25°C
During nonvolatile write;
digital inputs = V or GND (Note 6)
Programming Current
200
400
µA
DD
TIMING CHARACTERISTICS
(V
= +2.7V to +5.25V, H = V , L = GND, T = -40°C to +85°C, unless otherwise noted. Typical values are at V
= +5V, T
=
DD
DD
A
DD
A
+25°C. See Figures 1 and 2.) (Note 7)
PARAMETER
SYMꢁOꢀ
CONDITIONS
MIN
TYP
MAX
UNITS
ANAꢀOG SECTION
MAX5417_
MAX5418_
MAX5419_
500
600
Wiper Settling Time (Note 8)
t
ns
IL
1000
DIGITAꢀ SECTION
SCL Clock Frequency
Setup Time for START Condition
Hold Time for START Condition
CLK High Time
f
400
kHz
µs
SCL
t
0.6
0.6
0.6
1.3
SU-STA
HD-STA
t
µs
t
µs
HIGH
CLK Low Time
t
µs
LOW
_______________________________________________________________________________________
3
2
256-Tap, Nonvolatile, I C-Interface,
Digital Potentiometers
TIMING CHARACTERISTICS (continued)
(V
= +2.7V to +5.25V, H = V , L = GND, T = -40°C to +85°C, unless otherwise noted. Typical values are at V
= +5V, T =
DD A
DD
DD
A
+25°C. See Figures 1 and 2.) (Note 7)
PARAMETER
Data Setup Time
SYMꢁOꢀ
CONDITIONS
MIN
100
0
TYP
MAX
UNITS
ns
t
SU-DAT
HD-DAT
Data Hold Time
t
0.9
300
300
µs
SDA, SCL Rise Time
SDA, SCL Fall Time
Setup Time for STOP Condition
t
ns
R
t
ns
F
t
0.6
1.3
µs
SU-STO
Bus Free Time Between STOP
and START Condition
t
Minimum power-up rate = 0.2V/ms
µs
ns
BUF
Pulse Width of Spike Suppressed
t
SP
50
12
Maximum Capacitive Load for
Each Bus Line
C
(Note 9)
400
pF
ms
B
Write NV Register Busy Time
t
(Note 10)
BUSY
Note 1: The DNL and INL are measured with the potentiometer configured as a voltage-divider with H = V
and L = GND. The
DD
wiper terminal is unloaded and measured with a high-input-impedance voltmeter.
Note 2: The DNL and INL are measured with the potentiometer configured as a variable resistor. H is unconnected and L = GND.
For the 5V condition, the wiper terminal is driven with a source current of 80µA for the 50kΩ configuration, 40µA for the
100kΩ configuration, and 20µA for the 200kΩ configuration. For the 3V condition, the wiper terminal is driven with a source
current of 40µA for the 50kΩ configuration, 20µA for the 100kΩ configuration, and 10µA for the 200kΩ configuration.
Note 3: The wiper resistance is measured using the source currents given in Note 2. For operation to V
Resistance vs. Temperature in the Typical Operating Characteristics.
= 2.7V, see Wiper
DD
Note 4: The device draws higher supply current when the digital inputs are driven with voltages between (V
0.5V). See Supply Current vs. Digital Input Voltage in the Typical Operating Characteristics.
- 0.5V) and (GND +
DD
Note 5: Wiper at midscale with a 10pF load (DC measurement). L = GND; an AC source is applied to H; and the W output is mea-
sured. A 3dB bandwidth occurs when the AC W/H value is 3dB lower than the DC W/H value.
Note 6: The programming current operates only during power-up and NV writes.
Note 7: SCL clock period includes rise and fall times t and t . All digital input signals are specified with t = t = 2ns and timed
R
F
R
F
from a voltage level of (V + V ) / 2.
IL
IH
Note 8: Wiper settling time is the worst-case 0% to 50% rise time measured between consecutive wiper positions. H = V
,
DD
L = GND, and the wiper terminal is unloaded and measured with a 10pF oscilloscope probe (see the Typical Operating
Characteristics for the tap-to-tap switching transient).
Note 9: An appropriate bus pullup resistance must be selected depending on board capacitance. Refer to the document linked to
this web address: www.semiconductors.philips.com/acrobat/literature/9398/39340011.pdf.
Note 10: The idle time begins from the initiation of the stop pulse.
4
_______________________________________________________________________________________
2
256-Tap, Nonvolatile, I C-Interface,
Digital Potentiometers
Typical Operating Characteristics
(V
= +5V, T = +25°C, unless otherwise noted.)
A
DD
DNL vs. TAP POSITION
INL vs. TAP POSITION
WIPER RESISTANCE vs. TAP POSITION
0.25
0.25
0.20
0.15
0.10
0.05
0
700
600
500
400
300
200
100
0
VOLTAGE-DIVIDER MODE
VOLTAGE-DIVIDER MODE
V
= 2.7V
DD
0.20
0.15
0.10
0.05
0
I
= 50µA
SRC
-0.05
-0.10
-0.15
-0.20
-0.25
-0.05
-0.10
-0.15
-0.20
-0.25
0
32 64 96 128 160 192 224 256
TAP POSITION
0
32 64 96 128 160 192 224 256
TAP POSITION
0
32 64 96 128 160 192 224 256
TAP POSITION
END-TO-END RESISTANCE % CHANGE
vs. TEMPERATURE
WIPER TRANSIENT AT POWER-ON
MAX5417 toc04
1.0
0.8
V
DD
2V/div
0.6
0.4
W
1V/div
0.2
0
-0.2
-0.4
-0.6
-0.8
-1.0
C = 10pF
L
TAP = 128
H = V
DD
4µs/div
-40
-15
10
35
60
85
TEMPERATURE (°C)
STANDBY SUPPLY CURRENT
vs. TEMPERATURE
WIPER RESISTANCE vs. TEMPERATURE
700
1.0
0.8
0.6
0.4
0.2
0
600
500
400
300
200
100
0
V
= 2.7V
DD
V
V
= 3.0V
= 4.5V
= 5.25V
DD
DD
V
DD
-40
-15
10
35
60
85
-40
-15
10
35
60
85
TEMPERATURE (°C)
TEMPERATURE (°C)
_______________________________________________________________________________________
5
2
256-Tap, Nonvolatile, I C-Interface,
Digital Potentiometers
Typical Operating Characteristics (continued)
(V
= +5V, T = +25°C, unless otherwise noted.)
A
DD
SUPPLY CURRENT
vs. DIGITAL INPUT VOLTAGE
INL vs. TAP POSITION
THD+N RESPONSE
(MAX5417)
600
100
3.0
2.5
2.0
1.5
1.0
0.5
0
VARIABLE-RESISTOR MODE
1:1 RATIO
V
I
= 2.7V
= 50µA
DD
SRC
500
400
300
200
100
0
10 20Hz TO 20kHz BANDPASS
1
0.1
0.01
0.001
-0.5
-1.0
0.0001
0
1
2
3
4
5
10
100
1k
10k
100k
0
32 64 96 128 160 192 224 256
TAP POSITION
DIGITAL INPUT VOLTAGE (V)
FREQUENCY (Hz)
INL vs. TAP POSITION
(MAX5418)
INL vs. TAP POSITION
(MAX5419)
1.00
2.0
1.5
1.0
0.5
0
VARIABLE-RESISTOR MODE
VARIABLE-RESISTOR MODE
V
I
= 2.7V
= 20µA
DD
SRC
0.75
0.50
0.25
0
V
I
= 2.7V
= 10µA
DD
SRC
-0.25
-0.50
-0.75
-1.00
-0.5
-1.0
0
32 64 96 128 160 192 224 256
TAP POSITION
0
32 64 96 128 160 192 224 256
TAP POSITION
DNL vs. TAP POSITION
(MAX5417)
DNL vs. TAP POSITION
(MAX5418)
0.5
0.4
0.3
0.2
0.1
0
0.3
0.2
0.1
0
VARIABLE-RESISTOR MODE
VARIABLE-RESISTOR MODE
V
I
= 2.7V
= 20µA
DD
SRC
-0.1
-0.2
-0.3
-0.1
-0.2
-0.3
0
32 64 96 128 160 192 224 256
TAP POSITION
0
32 64 96 128 160 192 224 256
TAP POSITION
6
_______________________________________________________________________________________
2
256-Tap, Nonvolatile, I C-Interface,
Digital Potentiometers
Typical Operating Characteristics (continued)
(V
= +5V, T = +25°C, unless otherwise noted.)
DD
A
DNL vs. TAP POSITION
(MAX5419)
MIDSCALE WIPER RESPONSE vs. FREQUENCY
(MAX5417)
MIDSCALE WIPER RESPONSE vs. FREQUENCY
(MAX5418)
0.3
0.2
0.1
0
0
0
MAX5417
MAX5418
VARIABLE-RESISTOR MODE
TAP = 128
TAP = 128
V
I
= 2.7V
= 10µA
DD
SRC
-5
-5
C = 10pF
L
C = 10pF
L
-10
-15
-20
-25
-30
-10
-15
-20
-25
-30
C = 50pF
L
C = 50pF
L
-0.1
-0.2
-0.3
0
32 64 96 128 160 192 224 256
TAP POSITION
1
10
100
1000
1
10
100
1000
FREQUENCY (kHz)
FREQUENCY (kHz)
MIDSCALE WIPER RESPONSE vs. FREQUENCY
TAP-TO-TAP SWITCHING TRANSIENT
(MAX5419)
(MAX5417)
MAX5417 toc19
0
-5
MAX5419
TAP = 128
C = 10pF
L
-10
-15
-20
-25
-30
-35
-40
-45
SDA
2V/div
C = 50pF
L
MAX5417
W
C = 10pF
L
10mV/div
FROM TAP 127
TO TAP 128
H = V
DD
1
10
100
1000
1µs/div
FREQUENCY (kHz)
TAP-TO-TAP SWITCHING TRANSIENT
TAP-TO-TAP SWITCHING TRANSIENT
(MAX5418)
(MAX5419)
MAX5417 toc20
MAX5417 toc21
SDA
2V/div
SDA
2V/div
W
W
10mV/div
10mV/div
MAX5418
MAX5419
C = 10pF
L
C = 10pF
L
FROM TAP 127
TO TAP 128
FROM TAP 127
TO TAP 128
H = V
DD
H = V
DD
1µs/div
1µs/div
_______________________________________________________________________________________
7
2
256-Tap, Nonvolatile, I C-Interface,
Digital Potentiometers
Pin Description
PIN
1
NAME
FUNCTION
V
Power-Supply Input. 2.7V to 5.25V voltage range. Bypass with a 0.1µF capacitor from V to GND.
DD
DD
2
SCL
SDA
A0
I2C-Interface Clock Input
I2C-Interface Data Input
3
4
Address Input. Sets the A0 bit in the device ID address.
5
GND
L
Ground
6
Low Terminal
Wiper Terminal
High Terminal
Exposed Pad
7
W
8
H
—
EP
t
t
F
R
SDA
t
BUF
t
t
HD-DAT
SU-DAT
t
HD-STA
t
t
SU-STA
SU-STO
t
LOW
SCL
t
HIGH
t
HD-STA
t
t
F
R
S
Sr
A
P
S
PARAMETERS ARE MEASURED FROM 30% TO 70%.
2
Figure 1. I C Serial-Interface Timing Diagram
Detailed Description
V
DD
The MAX5417/MAX5418/MAX5419 contain a resistor
array with 255 resistive elements. The MAX5417 has a
total end-to-end resistance of 50kΩ, the MAX5418 has
an end-to-end resistance of 100kΩ, and the MAX5419
has an end-to-end resistance of 200kΩ. The
MAX5417/MAX5418/MAX5419 allow access to the high,
low, and wiper terminals for a standard voltage-divider
configuration. H, L, and W can be connected in any
desired configuration as long as their voltages fall
I
= 3mA
OL
V
SDA
OUT
400pF
between GND and V
.
DD
I
= 0mA
OH
A simple 2-wire I2C-compatible serial interface moves
the wiper among the 256 tap points. A nonvolatile mem-
ory stores the wiper position and recalls the stored wiper
position in the nonvolatile memory upon power-up. The
nonvolatile memory is guaranteed for 50 years for wiper
data retention and up to 200,000 wiper store cycles.
Figure 2. Load Circuit
8
_______________________________________________________________________________________
2
256-Tap, Nonvolatile, I C-Interface,
Digital Potentiometers
Serial Addressing
The MAX5417/MAX5418/MAX5419 operate as a slave
that receives data through an I2C- and SMBus™-com-
patible 2-wire interface. The interface uses a serial data
access (SDA) line and a serial clock line (SCL) to
achieve communication between master(s) and
slave(s). A master, typically a microcontroller, initiates
all data transfers to the MAX5417/MAX5418/MAX5419,
and generates the SCL clock that synchronizes the
data transfer (Figure 1).
Analog Circuitry
The MAX5417/MAX5418/MAX5419 consist of a resistor
array with 255 resistive elements; 256 tap points are
accessible to the wiper, W, along the resistor string
between H and L. The wiper tap point is selected by
programming the potentiometer through the 2-wire (I2C)
interface. Eight data bits, an address byte, and a con-
trol byte program the wiper position. The H and L termi-
nals of the MAX5417/MAX5418/MAX5419 are similar to
the two end terminals of a mechanical potentiometer.
The MAX5417/MAX5418/MAX5419 feature power-on
reset circuitry that loads the wiper position from non-
volatile memory at power-up.
The MAX5417/MAX5418/MAX5419 SDA line operates
as both an input and an open-drain output. A pullup
resistor, typically 4.7kΩ, is required on the SDA bus.
The MAX5417/MAX5418/MAX5419 SCL operates only
as an input. A pullup resistor, typically 4.7kΩ, is
required on the SCL bus if there are multiple masters
on the 2-wire interface, or if the master in a single-mas-
ter system has an open-drain SCL output.
Digital Interface
The MAX5417/MAX5418/MAX5419 feature an internal,
nonvolatile EEPROM that stores the wiper state for ini-
tialization during power-up. The shift register decodes
the control and address bits, routing the data to the
proper memory registers. Data can be written to a
volatile memory register, immediately updating the
wiper position, or data can be written to a nonvolatile
register for storage.
Each transmission consists of a START (S) condition
(Figure 3) sent by a master, followed by the
MAX5417/MAX5418/MAX5419 7-bit slave address plus
the 8th bit (Figure 4), 1 command byte (Figure 7) and 1
data byte, and finally a STOP (P) condition (Figure 3).
The volatile register retains data as long as the device
is powered. Once power is removed, the volatile regis-
ter is cleared. The nonvolatile register retains data even
after power is removed. Upon power-up, the power-on
reset circuitry controls the transfer of data from the non-
volatile register to the volatile register.
Start and Stop Conditions
Both SCL and SDA remain high when the interface is
not busy. A master signals the beginning of a transmis-
sion with a START condition by transitioning SDA from
high to low while SCL is high. When the master has fin-
ished communicating with the slave, it issues a STOP
condition by transitioning the SDA from low to high
while SCL is high. The bus is then free for another
transmission (Figure 3).
SDA
SCL
Bit Transfer
One data bit is transferred during each clock pulse.
The data on the SDA line must remain stable while SCL
is high (Figure 5).
S
P
START
STOP
CONDITION
CONDITION
Figure 3. Start and Stop Conditions
SDA
SCL
0
1
0
1
0*
0*
NOP/W
ACK
A0
MSB
LSB
*See the Ordering Information/Selector Guide section for other address options.
Figure 4. Slave Address
SMBus is a trademark of Intel Corporation.
_______________________________________________________________________________________
9
2
256-Tap, Nonvolatile, I C-Interface,
Digital Potentiometers
Table 1. MAX5417/MAX5418/MAX5419 Address Codes
ADDRESS ꢁYTE
PART SUFFIX
A6
0
A5
1
A4
0
A3
1
A2
0
A1
0
A0
0
NOP/W
NOP/W
NOP/W
NOP/W
NOP/W
NOP/W
NOP/W
NOP/W
NOP/W
ꢀ
ꢀ
0
1
0
1
0
0
1
M
M
N
N
P
P
0
1
0
1
0
1
0
0
1
0
1
0
1
1
0
1
0
1
1
0
0
0
1
0
1
1
0
1
0
1
0
1
1
1
0
0
1
0
1
1
1
1
Acknowledge
slave address is the NOP/W bit. Set the NOP/W bit low for
a write command and high for a no-operation command.
The acknowledge bit is a clocked 9th bit that the recipient
uses to handshake receipt of each byte of data (Figure
6). Thus, each byte transferred effectively requires 9 bits.
The master generates the 9th clock pulse, and the recipi-
ent pulls down SDA during the acknowledge clock pulse,
so the SDA line is stable low during the high period of the
clock pulse. When the master transmits to the
MAX5417/MAX5418/MAX5419, the devices generate the
acknowledge bit because the MAX5417/MAX5418/
MAX5419 are the recipients.
The MAX5417/MAX5418/MAX5419 are available in one
of four possible slave addresses (Table 1). The first 4
bits (MSBs) of the MAX5417/MAX5418/MAX5419 slave
addresses are always 0101. The next 2 bits are factory
programmed (see Table 1). Connect the A0 input to
either GND or V
to toggle between two unique
DD
device addresses for a part. Each device must have a
unique address to share the bus. Therefore, a maxi-
mum of eight MAX5417/MAX5418/MAX5419 devices
can share the same bus.
Slave Address
The MAX5417/MAX5418/MAX5419 have a 7-bit-long
slave address (Figure 4). The 8th bit following the 7-bit
CLOCK PULSE FOR
ACKNOWLEDGMENT
START
SDA
CONDITION
SCL
1
2
8
9
NOT ACKNOWLEDGE
SCL
SDA
DATA STABLE, CHANGE OF
DATA VALID
DATA ALLOWED
ACKNOWLEDGE
Figure 5. Bit Transfer
Figure 6. Acknowledge
10 ______________________________________________________________________________________
2
256-Tap, Nonvolatile, I C-Interface,
Digital Potentiometers
CONTROL BYTE IS STORED ON RECEIPT OF STOP CONDITION
D15
D14
D13
D12
D11
D10
D9
D8
ACKNOWLEDGE FROM
MAX5417/MAX5418/MAX5419
S
SLAVE ADDRESS
0
A
CONTROL BYTE
A
P
ACKNOWLEDGE FROM
MAX5417/MAX5418/MAX5419
NOP/W
Figure 7. Command Byte Received
ACKNOWLEDGE FROM
MAX5417/MAX5418/MAX5419
ACKNOWLEDGE FROM
MAX5417/MAX5418/MAX5419
HOW CONTROL BYTE AND DATA BYTE MAP INTO
MAX5417/MAX5418/MAX5419 REGISTERS
D15 D14 D13 D12 D11 D10 D9 D8
D7 D6 D5 D4 D3 D2 D1 D0
ACKNOWLEDGE FROM
MAX5417/MAX5418/MAX5419
A
P
S
SLAVE ADDRESS
0
A
CONTROL BYTE
A
DATA BYTE
1 BYTE
NOP/W
Figure 8. Command and Single Data Byte Received
Command Descriptions
Message Format for Writing
VREG: The data byte writes to the volatile memory reg-
ister and the wiper position updates with the data in the
volatile memory register.
A write to the MAX5417/MAX5418/MAX5419 consists of
the transmission of the device’s slave address with the
8th bit set to zero, followed by at least 1 byte of infor-
mation (Figure 7). The 1st byte of information is the
command byte. The bytes received after the command
byte are the data bytes. The 1st data byte goes into the
internal register of the MAX5417/MAX5418/MAX5419 as
selected by the command byte (Figure 8).
NVREG: The data byte writes to the nonvolatile memo-
ry register. The wiper position is unchanged.
NVREGxVREG: Data transfers from the nonvolatile
memory register to the volatile memory register (wiper
position updates).
Command Byte
Use the command byte to select the source and desti-
nation of the wiper data (nonvolatile or volatile memory
registers) and swap data between nonvolatile and
volatile memory registers (see Table 2).
VREGxNVREG: Data transfers from the volatile memo-
ry register into the nonvolatile memory register.
______________________________________________________________________________________ 11
2
256-Tap, Nonvolatile, I C-Interface,
Digital Potentiometers
Table 2. Command ꢁyte Summary
ADDRESS ꢁYTE
CONTROꢀ ꢁYTE
DATA ꢁYTE
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17
18
19
20
21
22
23
24
25
26
27
P
SCꢀ CYCꢀE
NUMꢁER
S
TX
0
A6 A5 A4 A3 A2 A1 A0
ACK
NV
0
V
1
0
0
1
R3 R2 R1 R0 ACK D7
D6
D6
D6
D6
D6
D5
D5
D5
D5
D5
D4
D4
D4
D4
D4
D3
D3
D3
D3
D3
D2
D2
D2
D2
D2
D1
D1
D1
D1
D1
D0 ACK
VREG
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
A2 A1 A0
A2 A1 A0
A2 A1 A0
A2 A1 A0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
D7
D7
D7
D7
D0
D0
D0
D0
NVREG
0
1
NVREGxVREG
VREGxNVREG
1
1
1
0
Nonvolatile Memory
Positive LCD Bias Control
The internal EEPROM consists of an 8-bit nonvolatile
register that retains the value written to it before the
device is powered down. The nonvolatile register is
programmed with the midscale value at the factory.
Figures 9 and 10 show an application where the volt-
age-divider or variable resistor is used to make an
adjustable, positive LCD bias voltage. The op amp pro-
vides buffering and gain to the resistor-divider network
made by the potentiometer (Figure 9) or to a fixed
resistor and a variable resistor (see Figure 10).
Power-Up
Upon power-up, the MAX5417/MAX5418/MAX5419
load the data stored in the nonvolatile memory register
into the volatile memory register, updating the wiper
position with the data stored in the nonvolatile memory
register. This initialization period takes 10µs.
Programmable Filter
Figure 11 shows the configuration for a 1st-order pro-
grammable filter. The gain of the filter is adjusted by
R2, and the cutoff frequency is adjusted by R3. Use the
following equations to calculate the gain (G) and the
Standby
The MAX5417/MAX5418/MAX5419 feature a low-power
standby. When the device is not being programmed, it
goes into standby mode and power consumption is
typically 500nA.
3dB cutoff frequency (f ):
C
R1
R2
G = 1 +
1
f
=
Applications Information
C
2π × R3 × C
The MAX5417/MAX5418/MAX5419 are intended for cir-
cuits requiring digitally controlled adjustable resis-
tance, such as LCD contrast control (where voltage
biasing adjusts the display contrast), or for programma-
ble filters with adjustable gain and/or cutoff frequency.
5V
5V
H
30V
30V
W
MAX5417
V
OUT
MAX5418
MAx5419
H
V
OUT
L
MAX5417
MAX5418
MAX5419
W
L
Figure 10. Positive LCD Bias Control Using a Variable Resistor
12 ______________________________________________________________________________________
Figure 9. Positive LCD Bias Control Using a Voltage-Divider
2
256-Tap, Nonvolatile, I C-Interface,
Digital Potentiometers
W
5V
L
V
IN
MAX5417
MAX5418
MAX5419
H
R3
C
V
OUT
7
1
3
2
R1
8
6
MAX410
H
4
W
MAX5417
MAX5418
MAX5419
R2
W
-5V
L
H
R2
R1
L
Figure 13. Offset Voltage and Gain Adjustment Circuit
Figure 11. Programmable Filter
+5V
Pin Configuration
TOP VIEW
V
IN
V REF
0
OUT
ADJ
H
L
V
1
2
3
4
8
7
6
5
H
DD
MAX6160
W
SCL
SDA
A0
W
MAX5417
MAX5418
MAX5419
GND
MAX5417
MAX5418
MAX5419
L
GND
50kΩ
2
V = 1.23V
FOR THE MAX5417
FOR THE MAX5418
FOR THE MAX5419
0
R (kΩ)
TDFN
100kΩ
V = 1.23V
0
R (kΩ)
2
200kΩ
V = 1.23V
0
R (kΩ)
2
Offset Voltage and Gain Adjustment
Connect the high and low terminals of one potentiometer
of a MAX5417 between the NULL inputs of a MAX410
and the wiper to the op amp’s positive supply to nullify
the offset voltage over the operating temperature range.
Install the other potentiometer in the feedback path to
adjust the gain of the MAX410 (see Figure 13).
Figure 12. Adjustable Voltage Reference
Adjustable Voltage Reference
Figure 12 shows the MAX5417/MAX5418/MAX5419 used
as the feedback resistors in multiple adjustable voltage-
reference applications. Independently adjust the output
voltage of the MAX6160 from 1.23V to V - 0.2V by
IN
changing the wiper positions of the MAX5417/
MAX5418/MAX5419.
Chip Information
TRANSISTOR COUNT: 4637
PROCESS: BiCMOS
______________________________________________________________________________________ 13
2
256-Tap, Nonvolatile, I C-Interface,
Digital Potentiometers
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
D
N
PIN 1
INDEX
AREA
E
E2
DETAIL A
C
C
L
L
L
L
A
e
e
PACKAGE OUTLINE, 6, 8, 10 & 14L,
TDFN, EXPOSED PAD, 3x3x0.80 mm
1
NUMBER OF LEADS SHOWN ARE FOR REFERENCE ONLY
21-0137
F
2
14 ______________________________________________________________________________________
2
256-Tap, Nonvolatile, I C-Interface,
Digital Potentiometers
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
COMMON DIMENSIONS
SYMBOL
MIN.
0.70
2.90
2.90
0.00
0.20
MAX.
0.80
3.10
3.10
0.05
0.40
A
D
E
A1
L
k
0.25 MIN.
0.20 REF.
A2
PACKAGE VARIATIONS
PKG. CODE
T633-1
N
6
D2
E2
e
JEDEC SPEC
MO229 / WEEA
MO229 / WEEC
b
[(N/2)-1] x e
1.90 REF
1.95 REF
2.00 REF
2.40 REF
2.40 REF
1.50 0.10 2.30 0.10 0.95 BSC
1.50 0.10 2.30 0.10 0.65 BSC
0.40 0.05
0.30 0.05
T833-1
8
T1033-1
T1433-1
T1433-2
10
14
14
1.50 0.10 2.30 0.10 0.50 BSC MO229 / WEED-3 0.25 0.05
1.70 0.10 2.30 0.10 0.40 BSC
1.70 0.10 2.30 0.10 0.40 BSC
- - - -
- - - -
0.20 0.03
0.20 0.03
PACKAGE OUTLINE, 6, 8, 10 & 14L,
TDFN, EXPOSED PAD, 3x3x0.80 mm
2
21-0137
F
2
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 15
© 2004 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products.
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