MAX5511ETC+T [MAXIM]
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| 型号： | MAX5511ETC+T |
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MAXIM INTEGRATED PRODUCTS |
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19-3120; Rev 0; 1/04
+1.8V to +5.5V, Ultra-Low-Power, 8-Bit,
Voltage-Output DACs
General Description
Features
The MAX5510/MAX5511 are single, 8-bit, ultra-low-
power, voltage-output, digital-to-analog converters
(DACs) offering Rail-to-Rail® buffered voltage outputs.
The DACs operate from a 1.8V to 5.5V supply and con-
sume less than 6µA, making them desirable for low-
power and low-voltage applications. A shutdown mode
reduces overall current, including the reference input
current, to just 0.18µA. The MAX5510/MAX5511 use a
3-wire serial interface that is compatible with SPI™,
QSPI™, and MICROWIRE™.
♦ Single +1.8V to +5.5V Supply
♦ Ultra-Low 6µA Supply Current
♦ Shutdown Mode Reduces Supply Current to
0.18µA (max)
♦ Small 4mm x 4mm x 0.8mm Thin QFN Package
♦ Flexible Force-Sense-Configured Rail-to-Rail
Output Buffers
♦ Internal Reference Sources 8mA of Current
At power-up, the MAX5510/MAX5511 outputs are dri-
ven to zero scale, providing additional safety for appli-
cations that drive valves or for other transducers that
must be off during power-up. The zero-scale outputs
enable glitch-free power-up.
(MAX5511)
♦ Fast 16MHz 3-Wire SPI-/QSPI-/MICROWIRE-
Compatible Serial Interface
♦ TTL- and CMOS-Compatible Digital Inputs
The MAX5510 accepts an external reference input. The
MAX5511 contains an internal reference and provides
an external reference output. Both devices have force-
sense-configured output buffers.
with Hysteresis
♦ Glitch-Free Outputs During Power-Up
The MAX5510/MAX5511 are available in a 4mm x 4mm
x 0.8mm, 12-pin, thin QFN package and are guaranteed
over the extended -40°C to +85°C temperature range.
Ordering Information
PART
TEMP RANGE
-40°C to +85°C
-40°C to +85°C
PIN-PACKAGE
12 Thin QFN-EP*
12 Thin QFN-EP*
For 12-bit compatible devices, refer to the MAX5530/
MAX5531 data sheet. For 10-bit compatible devices,
refer to the MAX5520/MAX5521 data sheet.
MAX5510ETC
MAX5511ETC
*EP = Exposed paddle (internally connected to GND).
Applications
Portable Battery-Powered Devices
Instrumentation
Pin Configuration
Automatic Trimming and Calibration in Factory
or Field
TOP VIEW
Programmable Voltage and Current Sources
FB
12
N.C.
11
OUT
10
Industrial Process Control and Remote
Industrial Devices
Remote Data Conversion and Monitoring
Chemical Sensor Cell Bias for Gas Monitors
Programmable Liquid Crystal Display (LCD) Bias
CS
1
2
3
9
8
7
GND
SCLK
DIN
V
DD
MAX5510
MAX5511
N.C.
Selector Guide
PART
REFERENCE
External
TOP MARK
AACO
4
5
6
MAX5510ETC
MAX5511ETC
REFIN (MAX5510) N.C.
REFOUT(MAX5511)
N.C.
Internal
AACP
THIN QFN
Rail-to-Rail is a registered trademark of Nippon Motorola, Inc.
SPI and QSPI are trademarks of Motorola, Inc.
MICROWIRE is a trademark of National Semiconductor Corp.
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
+1.8V to +5.5V, Ultra-Low-Power, 8-Bit,
Voltage-Output DACs
ABSOLUTE MAXIMUM RATINGS
V
to GND..............................................................-0.3V to +6V
Operating Temperature Range ...........................-40°C to +85°C
Storage Temperature Range.............................-65°C to +150°C
Junction Temperature..................................................... +150°C
Lead Temperature (soldering, 10s) .................................+300°C
DD
OUT to GND ...............................................-0.3V to (V + 0.3V)
FB to GND ..................................................-0.3V to (V + 0.3V)
SCLK, DIN, CS to GND ..............................-0.3V to (V + 0.3V)
DD
DD
DD
REFIN, REFOUT to GND ............................-0.3V to (V + 0.3V)
DD
Continuous Power Dissipation (T = +70°C)
A
Thin QFN (derate 16.9mW/°C above +70°C).............1349mW
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V
DD
= +1.8V to +5.5V, OUT unloaded, T = T
to T
, unless otherwise noted. Typical values are at T = +25°C.)
A
MAX
A
MIN
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
STATIC ACCURACY (MAX5510 EXTERNAL REFERENCE)
Resolution
N
8
Bits
V
V
= 5V, V
= 4.096V
REF
0.25
0.25
±1
±1
DD
DD
Integral Nonlinearity (Note 1)
INL
LSB
= 1.8V, V
= 1.024V
REF
Guaranteed monotonic,
= 5V, V = 4.096V
0.2
0.2
±1
±1
V
DD
REF
Differential Nonlinearity (Note 1)
DNL
LSB
Guaranteed monotonic,
V
V
V
= 1.8V, V
= 1.024V
REF
DD
DD
DD
= 5V, V
= 4.096V
±1
±1
±20
±20
REF
Offset Error (Note 2)
V
mV
µV/°C
LSB
OS
= 1.8V, V
= 1.024V
REF
Offset-Error Temperature Drift
Gain Error (Note 3)
±2
V
V
= 5V, V
= 4.096V
REF
±0.5
±0.5
±1
±1
DD
DD
GE
= 1.8V, V
= 1.024V
REF
Gain-Error Temperature
Coefficient
±4
ppm/°C
Power-Supply Rejection Ratio
PSRR
1.8V ≤ V
≤ 5.5V
85
dB
DD
STATIC ACCURACY (MAX5511 INTERNAL REFERENCE)
Resolution
N
8
Bits
V
V
= 5V, V
= 3.9V
REF
0.25
0.25
±1
±1
DD
DD
Integral Nonlinearity (Note 1)
INL
LSB
= 1.8V, V
= 1.2V
REF
Guaranteed monotonic,
= 5V, V = 3.9V
0.2
0.2
±1
±1
V
DD
REF
Differential Nonlinearity (Note 1)
DNL
LSB
Guaranteed monotonic,
V
= 1.8V, V
= 1.2V
DD
REF
REF
V
V
= 5V, V
= 3.9V
1
1
±20
±20
DD
DD
REF
Offset Error (Note 2)
V
mV
µV/°C
LSB
OS
= 1.8V, V
= 1.2V
Offset-Error Temperature Drift
Gain Error (Note 3)
±2
0.5
0.5
V
V
= 5V, V
= 3.9V
REF
±1
±1
DD
DD
GE
= 1.8V, V
= 1.2V
REF
Gain-Error Temperature
Coefficient
±4
ppm/°C
2
_______________________________________________________________________________________
+1.8V to +5.5V, Ultra-Low-Power, 8-Bit,
Voltage-Output DACs
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= +1.8V to +5.5V, OUT unloaded, T = T
to T
, unless otherwise noted. Typical values are at T = +25°C.)
A
MAX
A
MIN
PARAMETER
SYMBOL
CONDITIONS
≤ 5.5V
MIN
TYP
MAX
UNITS
Power-Supply Rejection Ratio
REFERENCE INPUT (MAX5510)
Reference-Input Voltage Range
PSRR
1.8V ≤ V
85
dB
DD
V
R
0
V
V
REFIN
DD
Normal operation
In shutdown
4.1
MΩ
GΩ
Reference-Input Impedance
REFIN
2.5
REFERENCE OUTPUT (MAX5511)
No external load, V
No external load, V
No external load, V
No external load, V
= 1.8V
= 2.5V
= 3V
1.197
1.913
2.391
3.828
1.214
1.940
2.425
3.885
1.231
1.967
2.459
3.941
DD
DD
DD
DD
Initial Accuracy
V
V
REFOUT
= 5V
Output-Voltage Temperature
Coefficient
V
T
= -40°C to +85°C (Note 4)
12
2
30
200
2
ppm/°C
TEMPCO
A
Line Regulation
V
< V
- 200mV (Note 5)
µV/V
REFOUT
DD
0 ≤ I
V
≤ 1mA, sourcing, V
= 1.8V,
= 5V,
REFOUT
DD
DD
0.3
= 1.2V
REF
Load Regulation
µV/µA
0 ≤ I
V
≤ 8mA, sourcing, V
REFOUT
0.3
2
= 3.9V
REF
-150µA ≤ I
≤ 0, sinking
0.2
150
600
50
REFOUT
0.1Hz to 10Hz, V
= 3.9V
REFOUT
10Hz to 10kHz, V
= 3.9V
REFOUT
Output Noise Voltage
µV
P-P
0.1Hz to 10Hz, V
10Hz to 10kHz, V
= 1.2V
= 1.2V
REFOUT
450
30
REFOUT
V
V
= 5V
DD
DD
Short-Circuit Current (Note 6)
mA
= 1.8V
14
Capacitive Load Stability Range
Thermal Hysteresis
(Note 7)
(Note 8)
0 to 10
200
5.4
nF
ppm
REFOUT unloaded, V
REFOUT unloaded, V
= 5V
DD
DD
Reference Power-Up Time (from
Shutdown)
ms
= 1.8V
4.4
ppm/
1khrs
Long-Term Stability
200
DAC OUTPUT (OUT)
Capacitive Driving Capability
C
1000
pF
L
V
= 5V, V
set to full scale, OUT
OUT
DD
65
65
14
14
shorted to GND, source current
V
V
= 5V, V
, sink current
set to 0V, OUT shorted to
OUT
DD
DD
Short-Circuit Current (Note 6)
mA
V
= 1.8V, V
set to full scale, OUT
OUT
DD
shorted to GND, source current
V
V
= 1.8V, V
, sink current
set to 0V, OUT shorted to
OUT
DD
DD
_______________________________________________________________________________________
3
+1.8V to +5.5V, Ultra-Low-Power, 8-Bit,
Voltage-Output DACs
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= +1.8V to +5.5V, OUT unloaded, T = T
to T
, unless otherwise noted. Typical values are at T = +25°C.)
A
MAX
A
MIN
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
3
MAX
UNITS
V
V
V
= 5V
DD
DD
Coming out of shutdown
(MAX5510)
= 1.8V
3.8
DAC Power-Up Time
ms
Coming out of standby
(MAX5511)
= 1.8V
DD
0.4
to 5.5V
Output Power-Up Glitch
FB_ Input Current
C = 100pF
L
10
10
mV
pA
DIGITAL INPUTS (SCLK, DIN, CS)
4.5V ≤ V
2.7V < V
1.8V ≤ V
4.5V ≤ V
2.7V < V
1.8V ≤ V
(Note 9)
≤ 5.5V
≤ 3.6V
≤ 2.7V
≤ 5.5V
≤ 3.6V
≤ 2.7V
2.4
2.0
DD
DD
DD
Input High Voltage
Input Low Voltage
V
V
V
IH
0.7 x V
DD
0.8
0.6
DD
DD
DD
V
IL
0.3 x V
DD
Input Leakage Current
Input Capacitance
I
±0.05
±0.5
µA
pF
IN
C
10
IN
DYNAMIC PERFORMANCE
Voltage-Output Slew Rate
SR
Positive and negative (Note 10)
10
V/ms
µs
0.1 to 0.9 of full scale to within 0.5 LSB
(Note 10)
Voltage-Output Settling Time
660
V
V
V
V
= 5V
80
55
DD
DD
DD
DD
0.1Hz to 10Hz
10Hz to 10kHz
= 1.8V
= 5V
Output Noise Voltage
µV
P-P
620
476
= 1.8V
POWER REQUIREMENTS
Supply Voltage Range
V
1.8
5.5
4
V
DD
V
V
V
V
V
V
V
V
V
= 5V
2.6
2.6
3.6
5.3
4.8
5.4
3.3
2.8
2.4
0.05
DD
DD
DD
DD
DD
DD
DD
DD
DD
MAX5510
MAX5511
= 3V
4
= 1.8V
= 5V
5
Supply Current (Note 9)
I
µA
DD
6.5
6.0
7.0
4.0
3.4
3.0
0.18
= 3V
= 1.8V
= 5V
Standby Supply Current
Shutdown Supply Current
I
I
(Note 9)
(Note 9)
µA
µA
= 3V
DDSD
DDPD
= 1.8V
4
_______________________________________________________________________________________
+1.8V to +5.5V, Ultra-Low-Power, 8-Bit,
Voltage-Output DACs
TIMING CHARACTERISTICS
(V
DD
= +4.5V to +5.5V, T = T
A
to T
, unless otherwise noted. Typical values are at T = +25°C.)
MAX A
MIN
PARAMETER
SYMBOL
= 4.5V TO 5.5V)
CONDITIONS
MIN
TYP
MAX
UNITS
TIMING CHARACTERISTICS (V
Serial Clock Frequency
DD
f
0
15
0
16.7
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
SCLK
DIN to SCLK Rise Setup Time
DIN to SCLK Rise Hold Time
SCLK Pulse-Width High
t
DS
DH
CH
t
t
24
24
100
0
SCLK Pulse-Width Low
t
CL
CS Pulse-Width High
t
CSW
SCLK Rise to CS Rise Hold Time
CS Fall to SCLK Rise Setup Time
SCLK Fall to CS Fall Setup
CS Rise to SCK Rise Hold Time
t
CSH
t
20
0
CSS
CSO
t
t
20
CS1
TIMING CHARACTERISTICS
(V
DD
= +1.8V to +5.5V, T = T
A
to T
, unless otherwise noted. Typical values are at T = +25°C.)
MAX A
MIN
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
TIMING CHARACTERISTICS (V
Serial Clock Frequency
= 1.8V TO 5.5V)
DD
f
0
24
0
10
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
SCLK
DIN to SCLK Rise Setup Time
DIN to SCLK Rise Hold Time
SCLK Pulse-Width High
t
DS
DH
CH
t
t
40
40
150
0
SCLK Pulse-Width Low
t
CL
CS Pulse-Width High
t
CSW
SCLK Rise to CS Rise Hold Time
CS Fall to SCLK Rise Setup Time
SCLK Fall to CS Fall Setup
CS Rise to SCK Rise Hold Time
t
CSH
t
30
0
CSS
CSO
t
t
30
CS1
Note 1: Linearity is tested within codes 6 to 255.
Note 2: Offset is tested at code 6.
Note 3: Gain is tested at code 250. FB is connected to OUT.
Note 4: Guaranteed by design. Not production tested.
Note 5: V
must be a minimum of 1.8V.
DD
Note 6: Outputs can be shorted to V
or GND indefinitely, provided that the package power dissipation is not exceeded.
DD
Note 7: Optimal noise performance is at 2nF load capacitance.
Note 8: Thermal hysteresis is defined as the change in the initial +25°C output voltage after cycling the device from T
to T
.
MIN
MAX
Note 9: All digital inputs at V
or GND.
DD
Note 10: Load = 10kΩ in parallel with 100pF, V
= 5V, V
= 4.096V (MAX5510) or V
= 3.9V (MAX5511).
DD
REF
REF
_______________________________________________________________________________________
5
+1.8V to +5.5V, Ultra-Low-Power, 8-Bit,
Voltage-Output DACs
Typical Operating Characteristics
(V
DD
= 5.0V, V
= 4.096V (MAX5510) or V
= 3.9V (MAX5511), T = +25°C, unless otherwise noted.)
REF
REF
A
SUPPLY CURRENT vs. SUPPLY VOLTAGE
(MAX5511)
SHUTDOWN SUPPLY CURRENT
vs. TEMPERATURE (MAX5511)
SUPPLY CURRENT vs. TEMPERATURE
(MAX5511)
10
1000
100
10
10
9
8
7
6
5
4
3
2
1
0
9
8
7
6
5
4
3
2
1
0
1
0.1
1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
SUPPLY VOLTAGE (V)
-40
-15
10
35
60
85
-40
-15
10
35
60
85
TEMPERATURE (°C)
TEMPERATURE (°C)
SUPPLY CURRENT
vs. CLOCK FREQUENCY
SUPPLY CURRENT
vs. LOGIC INPUT VOLTAGE
STANDBY SUPPLY CURRENT
vs. TEMPERATURE (MAX5511)
1000
100
10
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
V
= 5V
CS = LOGIC LOW
CODE = 0
DD
ALL DIGITAL INPUTS
SHORTED TOGETHER
V
REF
= 3.9V
V
DD
= 5V
V
= 2.4V
REF
V
REF
= 1.9V
V
REF
= 1.2V
V
DD
= 1.8V
1
0.01 0.1
1
10 100 1000 10000100000
FREQUENCY (kHz)
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
LOGIC INPUT VOLTAGE (V)
-40
-15
10
35
60
85
TEMPERATURE (°C)
DNL vs. INPUT CODE
INL vs. INPUT CODE
INL vs. INPUT CODE
(V = V
= 1.8V)
(V = V
= 1.8V)
(V = V = 5V)
DD
REF
DD
REF
DD
REF
0.014
0.012
0.010
0.008
0.006
0.004
0.002
0
0.10
0.05
0
0.10
0.05
0
-0.05
-0.10
-0.15
-0.20
-0.25
-0.30
-0.05
-0.10
-0.15
-0.20
-0.25
-0.30
-0.002
-0.004
-0.006
0
50
100
150
200
250
300
0
50
100
150
200
250
300
0
50
100
150
200
250
300
DIGITAL INPUT CODE
DIGITAL INPUT CODE
DIGITAL INPUT CODE
6
_______________________________________________________________________________________
+1.8V to +5.5V, Ultra-Low-Power, 8-Bit,
Voltage-Output DACs
Typical Operating Characteristics (continued)
(V
DD
= 5.0V, V
= 4.096V (MAX5510) or V
= 3.9V (MAX5511), T = +25°C, unless otherwise noted.)
REF
REF A
OFFSET VOLTAGE
vs. TEMPERATURE
GAIN-ERROR CHANGE
vs. TEMPERATURE
DNL vs. INPUT CODE
(V = V
= 5V)
DD
REF
1.0
0.8
0.04
0.03
0.02
0.01
0
0.025
0.020
0.015
0.010
0.005
0
V
V
= 5V
DD
V
V
= 5V
DD
= 3.9V
REF
= 3.9V
REF
0.6
0.4
0.2
0
-0.2
-0.4
-0.6
-0.8
-1.0
-0.005
-0.010
-0.015
-0.020
-0.025
-0.01
-0.02
-0.03
-40
-15
10
35
60
85
0
50
100
150
200
250
300
-40
-15
10
35
60
85
TEMPERATURE (°C)
DIGITAL INPUT CODE
TEMPERATURE (°C)
DIGITAL FEEDTHROUGH RESPONSE
(DAC OUTPUT SET TO 0)
DAC OUTPUT LOAD REGULATION
vs. OUTPUT CURRENT
DAC OUTPUT LOAD REGULATION
vs. OUTPUT CURRENT
MAX5510 toc13
0.6050
0.6048
0.6046
0.6044
0.6042
0.6040
1.9440
1.9435
1.9430
1.9425
1.9420
1.9415
1.9410
1.9405
1.9400
ZERO SCALE
V
DD
= 1.8V
V
DD
= 5.0V
CS
5V/div
DAC CODE = MIDSCALE
= 1.2V
DAC CODE = MIDSCALE
V = 3.9V
REF
V
REF
SCLK
5V/div
DIN
5V/div
OUT
50mV/div
-1000-800 -600-400 -200
0
200 400 600 800 1000
-10 -8 -6 -4 -2
0
2
4
6
8
10
20µs/div
DAC OUTPUT CURRENT (µA)
DAC OUTPUT CURRENT (mA)
OUTPUT LARGE-SIGNAL STEP RESPONSE
(V = 1.8V, V = 1.219V)
DAC OUTPUT VOLTAGE
vs. OUTPUT SOURCE CURRENT
DAC OUTPUT VOLTAGE
vs. OUTPUT SINK CURRENT
DD
REF
MAX5510 toc18
5
4
3
2
1
0
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
V
= V
DD
REF
V
= V
DD
REF
CODE = MIDSCALE
CODE = MIDSCALE
V
= 5V
DD
V
= 5V
DD
V
OUT
200mV/div
V
DD
= 3V
V
DD
= 3V
V
DD
= 1.8V
V
= 1.8V
DD
0.001
0.01
0.1
1
10
100
0.001
0.01
0.1
1
10
100
100µs/div
OUTPUT SOURCE CURRENT (mA)
OUTPUT SINK CURRENT (mA)
_______________________________________________________________________________________
7
+1.8V to +5.5V, Ultra-Low-Power, 8-Bit,
Voltage-Output DACs
Typical Operating Characteristics (continued)
(V
DD
= 5.0V, V
= 4.096V (MAX5510) or V
= 3.9V (MAX5511), T = +25°C, unless otherwise noted.)
REF
REF
A
OUTPUT LARGE-SIGNAL STEP RESPONSE
(V = 5V, V = 3.9V)
OUTPUT MINIMUM SERIES RESISTANCE
vs. LOAD CAPACITANCE
POWER-UP OUTPUT VOLTAGE GLITCH
DD
REF
MAX5510 toc19
MAX5510 toc21
600
500
400
300
200
100
0
FOR NO OVERSHOOT
V
DD
2V/div
V
OUT
500mV/div
V
OUT
10mV/div
0.0001 0.001 0.01
0.1
1
10
100
200µs/div
20ms/div
CAPACITANCE (µF)
MAJOR CARRY OUTPUT VOLTAGE GLITCH
(CODE 7FFh TO 800h)
REFERENCE OUTPUT VOLTAGE
vs. TEMPERATURE
REFERENCE OUTPUT VOLTAGE
vs. REFERENCE OUTPUT CURRENT
(V = 5V, V
= 3.9V)
DD
REF
MAX5510 toc22
3.940
3.935
3.930
3.925
3.920
3.915
3.910
3.905
3.900
1.220
1.219
1.218
1.217
1.216
1.215
1.214
V
DD
= 5V
V
= 1.8V
DD
V
OUT
AC-COUPLED
5mV/div
-40
-15
10
35
60
85
-500
1500
3500
5500
7500
100µs/div
TEMPERATURE (°C)
REFERENCE OUTPUT CURRENT (µA)
REFERENCE OUTPUT VOLTAGE
vs. SUPPLY VOLTAGE
REFERENCE LINE-TRANSIENT RESPONSE
(V = 1.2V)
REFERENCE OUTPUT VOLTAGE
vs. REFERENCE OUTPUT CURRENT
REF
MAX5510 toc27
1.21750
1.21748
1.21746
1.21744
1.21742
1.21740
1.21738
1.21736
1.21734
1.21732
1.21730
3.92
3.91
3.90
3.89
3.88
NO LOAD
V
= 5V
DD
2.8V
V
DD
1.8V
V
REF
500mV/div
1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
SUPPLY VOLTAGE (V)
-500 2000 4500 7000 9500 12,000 14,500
100µs/div
REFERENCE OUTPUT CURRENT (µA)
8
_______________________________________________________________________________________
+1.8V to +5.5V, Ultra-Low-Power, 8-Bit,
Voltage-Output DACs
Typical Operating Characteristics (continued)
(V
DD
= 5.0V, V
= 4.096V (MAX5510) or V
= 3.9V (MAX5511), T = +25°C, unless otherwise noted.)
REF
REF A
REFERENCE LINE-TRANSIENT RESPONSE
(V = 3.9V)
REFERENCE LOAD TRANSIENT
REFERENCE LOAD TRANSIENT
(V = 1.8V)
(V = 5V)
REF
DD
DD
MAX5510 toc28
MAX5510 toc29
MAX5510 toc30
5.5V
REFOUT
SOURCE
CURRENT
0.5mA/div
V
DD
REFOUT
SOURCE
CURRENT
0.5mA/div
4.5V
V
REF
V
REFOUT
500mV/div
V
REFOUT
500mV/div
3.9V
500mV/div
3.9V
100µs/div
200µs/div
200µs/div
REFERENCE PSRR
vs. FREQUENCY
REFERENCE LOAD TRANSIENT
REFERENCE LOAD TRANSIENT
(V = 1.8V)
(V = 5V)
DD
DD
MAX5510 toc31
MAX5510 toc32
80
70
60
50
40
30
20
10
0
V
DD
= 1.8V
REFOUT
SINK
CURRENT
50µA/div
REFOUT
SINK
CURRENT
100µA/div
V
REFOUT
V
REFOUT
500mV/div
3.9V
500mV/div
0.01
0.1
1
10
100
1000
200µs/div
200µs/div
FREQUENCY (kHz)
REFERENCE OUTPUT NOISE
REFERENCE PSRR
vs. FREQUENCY
= 1.2V)
(0.1Hz TO 10Hz) (V = 5V, V
= 3.9V)
DD
REF
MAX5510 toc36
80
70
60
50
40
30
20
10
0
V
DD
= 5V
100µV/div
100µV/div
0.01
0.1
1
10
100
1000
1s/div
1s/div
FREQUENCY (kHz)
_______________________________________________________________________________________
9
+1.8V to +5.5V, Ultra-Low-Power, 8-Bit,
Voltage-Output DACs
Pin Description
PIN
NAME
FUNCTION
MAX5510
MAX5511
1
1
CS
SCLK
DIN
Active-Low Digital-Input Chip Select
Serial-Interface Clock
Serial-Interface Data Input
Reference Input
2
2
3
3
4
—
—
4
REFIN
REFOUT
N.C.
Reference Output
5, 6, 7, 11
5, 6, 7, 11
No Connection. Leave N.C. inputs unconnected (floating), or connect to GND.
Power Input. Connect V
0.1µF capacitor.
to a 1.8V to 5.5V power supply. Bypass V to GND with a
DD
DD
8
8
V
DD
9
9
GND
OUT
FB
Ground
10
12
10
12
Analog Voltage Output
Feedback Input
Exposed
Paddle
EP
EP
Exposed Paddle. Connect EP to GND.
MAX5510 Functional Diagram
V
DD
REFIN
POWER-
DOWN
CONTROL
INPUT
REGISTER
DAC
REGISTER
8-BIT DAC
CONTROL
LOGIC
SCLK
DIN
CS
OUT
FB
AND
SHIFT
REGISTER
MAX5510
GND
10 ______________________________________________________________________________________
+1.8V to +5.5V, Ultra-Low-Power, 8-Bit,
Voltage-Output DACs
MAX5511 Functional Diagram
V
DD
POWER-
DOWN
CONTROL
2-BIT
PROGRAMMABLE
REFERENCE
REF
BUF
REFOUT
INPUT
REGISTER
DAC
REGISTER
8-BIT DAC
CONTROL
LOGIC
SCLK
DIN
CS
OUT
FB
AND
SHIFT
REGISTER
MAX5511
GND
Digital Interface
Detailed Description
The MAX5510/MAX5511 use a 3-wire serial interface
compatible with SPI, QSPI, and MICROWIRE protocols
(Figures 1 and 2).
The MAX5510/MAX5511 single, 8-bit, ultra-low-power,
voltage-output DACs offer Rail-to-Rail buffered voltage
outputs. The DACs operate from a 1.8V to 5.5V supply
and require only 6µA (max) supply current. These
devices feature a shutdown mode that reduces overall
current, including the reference input current, to just
0.18µA. The MAX5511 includes an internal reference
that saves additional board space and can source up
to 8mA, making it functional as a system reference. The
16MHz, 3-wire serial interface is compatible with SPI,
The MAX5510/MAX5511 include a single, 16-bit, input
shift register. Data loads into the shift register through
the serial interface. CS must remain low until all 16 bits
are clocked in. Data loads MSB first, D9–D0. The 16
bits consist of 4 control bits (C3–C0), 8 data bits
(D7–D0), and 4 sub-bits. (see Table 1). D7–D0 are the
DAC data bits and S3–S0 are the sub-bits. The sub-bits
must be set to zero for proper operation. The control
bits C3–C0 control the MAX5510/MAX5511, as outlined
in Table 2.
QSPI, and MICROWIRE protocols. When V
is
DD
applied, all DAC outputs are driven to zero scale with
virtually no output glitch. The MAX5510/MAX5511 out-
put buffers are configured in force sense allowing users
to externally set voltage gains on the output (an output-
amplifier inverting input is available). These devices
come in a 4mm x 4mm thin QFN package.
Each DAC channel includes two registers: an input reg-
ister and a DAC register. The input register holds input
data. The DAC register contains the data updated to
the DAC output.
The double-buffered register configuration allows any
of the following:
• Loading the input registers without updating the DAC
registers
• Updating the DAC registers from the input registers
• Updating all the input and DAC registers simultaneously
______________________________________________________________________________________ 11
+1.8V to +5.5V, Ultra-Low-Power, 8-Bit,
Voltage-Output DACs
Table 1. Serial Write Data Format
CONTROL
DATA BITS
MSB
LSB
C3
C2
C1
C0
D7
D6
D5
D4
D3
D2
D1
D0
S3
S2
S1
S0
Sub-bits S3—S0 must be set to zero for proper operation.
t
CH
SCLK
t
CL
t
DS
C3
C2
C1
DIN
S0
t
CS0
t
t
DH
CSH
t
CSS
CS
t
CSW
t
CS1
Figure 1. Timing Diagram
SCLK
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
DIN
CS
C3
C2
C1
C0
D7
D6
D5
D4
D3
D2
D1
D0
S3
S2
S1
S0
CONTROL BITS
DATA BITS
SUB-BITS
COMMAND
EXECUTED
Figure 2. Register Loading Diagram
12 ______________________________________________________________________________________
+1.8V to +5.5V, Ultra-Low-Power, 8-Bit,
Voltage-Output DACs
Table 2. Serial-Interface Programming Commands
CONTROL BITS
INPUT DATA
SUB-BITS
FUNCTION
C3
C2
C1
C0
D7–D0
S3–S0
0
0
0
0
XXXXXXXX
0000
No operation; command is ignored.
Load input register from shift register; DAC register
unchanged; DAC output unchanged.
0
0
0
1
8-bit data
0000
0
0
0
0
0
0
0
0
1
1
1
1
1
1
0
0
1
1
0
1
0
1
0
1
—
—
—
—
—
—
—
—
—
—
—
—
Command reserved; do not use.
Command reserved; do not use.
Command reserved; do not use.
Command reserved; do not use.
Command reserved; do not use.
Command reserved; do not use.
Load DAC register from input register; DAC output
updated; MAX5510 enters normal operation if in
shutdown; MAX5511 enters normal operation if in
standby or shutdown.
1
1
0
0
0
0
0
1
8-bit data
8-bit data
0000
0000
Load input register and DAC register from shift register;
DAC output updated; MAX5510 enters normal operation
if in shutdown; MAX5511 enters normal operation if in
standby or shutdown.
1
1
0
0
1
1
0
1
—
—
—
—
Command reserved; do not use.
Command reserved; do not use.
MAX5510 enters shutdown; MAX5511 enters standby*.
For the MAX5511, D7 and D6 configure the internal
reference voltage (Table 3).
D7, D6,
XXXXXX
1
1
1
1
1
1
1
1
0
0
1
1
0
1
0
1
0000
0000
0000
0000
MAX5510/MAX5511 enter normal operation; DAC output
reflects existing contents of DAC register. For the
MAX5511, D7 and D6 configure the internal reference
voltage (Table 3).
D7, D6,
XXXXXX
MAX5510/MAX5511 enter shutdown; DAC output set to
high impedance. For the MAX5511, D7 and D6 configure
the internal reference voltage (Table 3).
D7, D6,
XXXXXX
Load input register and DAC register from shift register;
DAC output updated; MAX5510 enters normal operation
if in shutdown; MAX5511 enters normal operation if in
standby or shutdown.
8-bit data
X = Don’t care.
*Standby mode can be entered from normal operation only. It is not possible to enter standby mode from shutdown.
______________________________________________________________________________________ 13
+1.8V to +5.5V, Ultra-Low-Power, 8-Bit,
Voltage-Output DACs
directly from shutdown mode. The device must be
Power Modes
The MAX5510/MAX5511 feature two power modes to
conserve power during idle periods. In normal opera-
tion, the device is fully operational. In shutdown mode,
the device is completely powered down, including the
internal voltage reference in the MAX5511. The
MAX5511 also offers a standby mode where all circuitry
is powered down except the internal voltage reference.
Standby mode keeps the reference powered up while
the remaining circuitry is shut down, allowing it to be
used as a system reference. Standby mode also helps
reduce the wake-up delay by not requiring the refer-
ence to power up when returning to normal operation.
brought into normal operation before entering standby
mode. To enter standby from shutdown, issue the com-
mand to return to normal operation, followed immedi-
ately by the command to go into standby.
Table 2 shows several commands that bring the MAX5511
back to normal operation. When transitioning from standby
mode to normal operation, only the DAC power-up time is
required before the DAC outputs are valid.
Reference Input
The MAX5510 accepts a reference with a voltage range
extending from 0 to V . The output voltage (V
) is
OUT
DD
represented by a digitally programmable voltage
source as:
Shutdown Mode
The MAX5510/MAX5511 feature a software-program-
mable shutdown mode that reduces the typical supply
current and the reference input current to 0.18µA
(max). Writing an input control word with control bits
C[3:0] = 1110 places the device in shutdown mode
(Table 2). In shutdown, the MAX5510 reference input
and DAC output buffers go high impedance. Placing
the MAX5511 into shutdown turns off the internal refer-
ence, and the DAC output buffers go high impedance.
The serial interface remains active for all devices.
V
= (V
x N / 256) x gain
REF
OUT
where N is the numeric value of the DAC’s binary input
code (0 to 255), V is the reference voltage and gain
REF
is the externally set voltage gain for the MAX5510/
MAX5511.
In shutdown mode, the reference input enters a high-
impedance state with an input impedance of 2.5GΩ (typ).
Reference Output
The MAX5511 internal voltage reference is software
configurable to one of four voltages. Upon power-up,
the default reference voltage is 1.214V. Configure the
reference voltage using the D6 and D7 data bits (Table
3) when the control bits are as follows: C[3:0] = 1100,
Table 2 shows several commands that bring the
MAX5510/MAX5511 back to normal operation. The
power-up time from shutdown is required before the
DAC outputs are valid.
Note: For the MAX5511, standby mode cannot be
entered directly from shutdown mode. The device must
be brought into normal operation before entering stand-
by mode.
1101, or 1110 (Table 2). V
must be kept at a mini-
DD
mum of 200mV above V
for proper operation.
REF
Standby Mode (MAX5511 Only)
Table 3. Reference Output Voltage
Programming
The MAX5511 features a software-programmable
standby mode that reduces the typical supply current
to 6µA. Standby mode powers down all circuitry except
the internal voltage reference. Place the device in
standby mode by writing an input control word with
control bits C[3:0] = 1100 (Table 2). The internal refer-
ence and serial interface remain active while the DAC
output buffers go high impedance. If the MAX5511 is
coming out of standby, the power-up time from standby
is required before the DAC outputs are valid.
D7
D6
REFERENCE VOLTAGE (V)
0
0
1.214
1.940
2.425
3.885
0
1
1
0
1
1
For the MAX5511, standby mode cannot be entered
14 ______________________________________________________________________________________
+1.8V to +5.5V, Ultra-Low-Power, 8-Bit,
Voltage-Output DACs
Voltage Biasing a Current-Output
Applications Information
Transducer
1-Cell and 2-Cell Circuit
See Figure 3 for an illustration of how to power the
MAX5510/MAX5511 with either one lithium-ion battery
or two alkaline batteries. The low current consumption
of the devices makes the MAX5510/MAX5511 ideal for
battery-powered applications.
See the circuit in Figure 5 for an illustration of how to con-
figure the MAX5510 to bias a current-output transducer.
In Figure 5, the output voltage of the MAX5510 is a func-
tion of the voltage drop across the transducer added to
the voltage drop across the feedback resistor R.
Self-Biased Two-Electrode
Potentiostat Application
See the circuit in Figure 6 for an illustration of how to
use the MAX5511 to bias a two-electrode potentiostat
on the input of an ADC.
Programmable Current Source
See the circuit in Figure 4 for an illustration of how to
configure the MAX5510 as a programmable current
source for driving an LED. The MAX5510 drives a stan-
dard NPN transistor to program the current source. The
current source (I
Figure 4.
) is defined in the equation in
LED
V
DD
536kΩ
+1.25V
1.8V ≤ V
2.2V ≤ V
≤ 3.3V
≤ 3.3V
ALKALINE
LITHIUM
REFIN
DAC
VOUT
V
OUT
(4.88mV / LSB)
0.1µF
0.01µF
MAX6006
(1µA, 1.25V
SHUNT
V
× N
DAC
256
REFIN
V
=
OUT
MAX5510
N
IS THE NUMERIC VALUE
OF THE DAC INPUT CODE.
DAC
REFERENCE)
GND
Figure 3. Portable Application Using Two Alkaline Cells or One Lithium Coin Cell
V+
LED
REFIN
DAC
VOUT
V
OUT
I
LED
V
= V
+ (I × R)
OUT
BIAS T
DAC
REFIN
MAX5510
VOUT
FB
2N3904
R
FB
MAX5510
I
TRANSDUCER
T
V
× N
DAC
256
REFIN
V
=
BIAS
V
BIAS
R
V
× N
DAC
REFIN
N
IS THE NUMERIC VALUE
OF THE DAC INPUT CODE.
I
=
DAC
LED
256 × R
N
DAC
IS THE NUMERIC VALUE OF THE DAC INPUT CODE.
Figure 4. Programmable Current Source Driving an LED
Figure 5. Transimpedance Configuration for a Voltage-Biased
Current-Output Transducer
______________________________________________________________________________________ 15
+1.8V to +5.5V, Ultra-Low-Power, 8-Bit,
Voltage-Output DACs
Unipolar Output
Figure 7 shows the MAX5510 in a unipolar output con-
figuration with unity gain. Table 4 lists the unipolar out-
put codes.
REF
OUT
FB
DAC
TO ADC
TO ADC
Bipolar Output
The MAX5510 output can be configured for bipolar
operation, as shown in Figure 8. The output voltage is
given by the following equation:
I
F
R
F
V
= V
x [(N - 128) / 128]
OUT
REF A
WE
MAX5511
where NA represents the numeric value of the DAC’s
binary input code. Table 5 shows digital codes (offset
binary) and the corresponding output voltage for the
circuit in Figure 4.
SENSOR
CE
Configurable Output Gain
The MAX5510/MAX5511 have a force-sense output,
which provides a connection directly to the inverting ter-
minal of the output op amp, yielding the most flexibility.
The advantage of the force-sense output is that specific
gains can be set externally for a given application. The
gain error for the MAX5510/MAX5511 is specified in a
unity-gain configuration (op-amp output and inverting ter-
minals connected), and additional gain error results from
external resistor tolerances. Another advantage of the
force-sense DAC is that it allows many useful circuits to
be created with only a few simple external components.
REFOUT
BAND
GAP
TO ADC
C
L
Figure 6. Self-Biased Two-Electrode Potentiostat Application
REFIN
DAC
OUT
Table 4. Unipolar Code Table (Gain = +1)
MAX5510
FB
DAC CONTENTS
ANALOG OUTPUT
V
× N
A
REFIN
256
V
OUT
=
MSB
1111
1000
1000
0111
0000
0000
LSB
0000
0000
0000
0000
0000
0000
1111
0001
0000
1111
0001
0000
+V
+V
(255/256)
(129/256)
REF
REF
N IS THE DAC INPUT CODE
A
(0 TO 255 DECIMAL).
+V
(128/256) = +V
/2
REF
REF
Figure 7. Unipolar Output Circuit
+V
(127/256)
REF
+V
(1/256)
REF
0V
10kΩ
10kΩ
Table 5. Bipolar Code Table (Gain = +1)
V+
DAC CONTENTS
V
OUT
ANALOG OUTPUT
DAC
MSB
1111
1000
1000
0111
0000
0000
LSB
0000
0000
0000
0000
0000
0000
OUT
FB
REFIN
1111
0001
0000
1111
0001
0000
+V
(127/128)
REF
V-
+V
(1/128)
REF
MAX5510
0V
-V
-V
(1/128)
REF
(127/128)
REF
Figure 8. Bipolar Output Circuit
-V
REF
(128/128) = -V
REF
16 ______________________________________________________________________________________
+1.8V to +5.5V, Ultra-Low-Power, 8-Bit,
Voltage-Output DACs
An example of a custom fixed gain using the force-sense
output of the MAX5510/MAX5511 is shown in Figure 9. In
this example R1 and R2 set the gain for V
Power Supply and Bypassing
Considerations
Bypass the power supply with a 0.1µF capacitor to GND.
Minimize lengths to reduce lead inductance. If noise
becomes an issue, use shielding and/or ferrite beads to
increase isolation. For the thin QFN package, connect
the exposed paddle to ground.
.
OUT
V
= [(V x N ) / 256] x [1 + (R2 / R1)]
REFIN A
OUT
where N represents the numeric value of the DAC
A
input code.
Layout Considerations
Digital and AC transient signals coupling to GND can
create noise at the output. Use proper grounding tech-
niques, such as a multilayer board with a low-inductance
ground plane. Wire-wrapped boards and sockets are not
recommended. For optimum system performance, use
printed circuit (PC) boards. Good PC board ground lay-
out minimizes crosstalk between DAC outputs, reference
inputs, and digital inputs. Reduce crosstalk by keeping
analog lines away from digital lines.
MAX5510
REFIN
DAC
OUT
V
OUT
R2
R1
FB
Figure 9. Separate Force-Sense Outputs Create Unity and
Greater-than-Unity DAC Gains Using the Same Reference
1.8V ≤ V ≤ 5.5V
DD
REFIN
DAC
VOUT
V
OUT
H
CS1
MAX5510
MAX5401
SOT-POT
100kΩ
V
× N
256
255 - N
255
REFIN
DAC
POT
V
OUT
=
1 +
(
)
FB
W
N
DAC
N
POT
IS THE NUMERIC VALUE OF THE DAC INPUT CODE.
IS THE NUMERIC VALUE OF THE POT INPUT CODE.
SCLK
DIN
5PPM/°C
RATIOMETRIC
TEMPCO
CS2
L
Figure 10. Software-Configurable Output Gain
Chip Information
TRANSISTOR COUNT: 10,688
PROCESS: BiCMOS
______________________________________________________________________________________ 17
+1.8V to +5.5V, Ultra-Low-Power, 8-Bit,
Voltage-Output DACs
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
PACKAGE OUTLINE
12,16,20,24L QFN THIN, 4x4x0.8 mm
1
21-0139
B
2
PACKAGE OUTLINE
12,16,20,24L QFN THIN, 4x4x0.8 mm
2
21-0139
B
2
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
18 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2004 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products.
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SI9122E
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