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MAX6728KARFD1-T [MAXIM]

Analog IC ; 模拟IC\n
MAX6728KARFD1-T
型号： MAX6728KARFD1-T
厂家： MAXIM INTEGRATED PRODUCTS    MAXIM INTEGRATED PRODUCTS
描述：

Analog IC
模拟IC\n

模拟IC
文件： 总19页 (文件大小：314K)
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19-2325; Rev 0; 1/02  
Dual/Triple Ultra-Low-Voltage SOT23 µP  
Supervisory Circuits  
General Description  
Features  
o V 1 (primary supply) Reset Threshold Voltages  
The MAX6715–MAX6729 are ultra-low-voltage microproces-  
sor (µP) supervisory circuits designed to monitor two or three  
system power-supply voltages. These devices assert a sys-  
tem reset if any monitored supply falls below its factory-  
trimmed or adjustable threshold and maintain reset for a  
minimum timeout period after all supplies rise above their  
thresholds. The integrated dual/triple supervisory circuits sig-  
nificantly improve system reliability and reduce size com-  
pared to separate ICs or discrete components.  
CC  
from 1.58V to 4.63V  
o V 2 (secondary supply) Reset Threshold  
CC  
Voltages from 0.79V to 3.08V  
o Externally Adjustable RSTIN Threshold for  
Auxiliary/Triple-Voltage Monitoring  
(0.62V internal reference)  
o Watchdog Timer Option  
These devices monitor primary supply voltages (V 1) from  
CC  
35s (min) Long Startup Period  
1.12s (min) Normal Timeout Period  
1.8V to 5.0V and secondary supply voltages (V 2) from  
CC  
0.9V to 3.3V with factory-trimmed reset threshold voltage  
options (see Reset Voltage Threshold Suffix Guide). An  
externally adjustable RSTIN input option allows customers to  
monitor a third supply voltage down to 0.62V. These devices  
are guaranteed to be in the correct reset output logic state  
o Manual Reset Input Option  
o Power-Fail Input/Power-Fail Output Option  
(Push-Pull and Open-Drain Active-Low)  
when either V 1 or V 2 remains greater than 0.8V.  
CC  
CC  
o Guaranteed Reset Valid Down to V 1 or  
CC  
A variety of push-pull or open-drain reset outputs along with  
watchdog input, manual reset input, and power-fail input/out-  
put features are available (see Selector Guide). Select reset  
timeout periods from 1.1ms to 1120ms (min) (see Reset  
Timeout Period Suffix Guide). The MAX6715–MAX6729 are  
available in small 5, 6, and 8-pin SOT23 packages and oper-  
ate over the -40°C to +85°C temperature range.  
V
2 = 0.8V  
CC  
o Reset Output Logic Options  
o Immune to Short V Transients  
CC  
o Low Supply Current 14µA (typ) at 3.6V  
o Small 5, 6, and 8-Pin SOT23 Packages  
Ordering Information  
Applications  
Multivoltage Systems  
PART  
TEMP RANGE  
-40°C to +85°C  
-40°C to +85°C  
-40°C to +85°C  
-40°C to +85°C  
-40°C to +85°C  
-40°C to +85°C  
PIN-PACKAGE  
6 SOT23-6  
6 SOT23-6  
5 SOT23-5  
5 SOT23-5  
6 SOT23-6  
6 SOT23-6  
Telecom/Networking Equipment  
Computers/Servers  
MAX6715UT_ _D_ -T  
MAX6716UT_ _D_ -T  
MAX6717UK_ _D_ -T  
MAX6718UK_ _D_ -T  
MAX6719UT_ _D_ -T  
MAX6720UT_ _D_ -T  
Portable/Battery-Operated Equipment  
Industrial Equipment  
Printer/Fax  
Set-Top Boxes  
Note: The first “_ _” are placeholders for the threshold voltage  
levels of the devices. Desired threshold levels are set by the part  
number suffix found in the Reset Voltage Threshold Suffix Guide.  
The “_” after the D is a placeholder for the reset timeout delay  
time. Desired delay time is set using the timeout period suffix  
found in the Reset Timeout Period Suffix Guide. For example the  
Typical Operating Circuit  
OUT2  
DC/DC  
UNREGULATED  
IN  
CONVERTER  
DC  
MAX6716UTLTD3-T is a dual-voltage supervisor V 1 = 4.625V,  
OUT1  
1.8V  
I/O  
0.9V  
CORE  
TH  
V 2 = 3.075V, and 210ms (typ) timeout period.  
TH  
V
1
CC  
V
2
CC  
SUPPLY SUPPLY  
R1  
R2  
RESET  
RST  
WDI  
PFO  
Ordering Information continued at end of data sheet.  
Pin Configurations appear at end of data sheet.  
Selector Guide appears at end of data sheet.  
µP  
RSTIN/PFI  
MR  
I/O  
NMI  
MAX67_ _  
PUSHBUTTON  
SWITCH  
________________________________________________________________ Maxim Integrated Products  
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at  
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.  
Dual/Triple Ultra-Low-Voltage SOT23 µP  
Supervisory Circuits  
ABSOLUTE MAXIMUM RATINGS  
Terminal Voltage (with respect to GND)  
Continuous Power Dissipation (T = +70°C)  
A
V
1, V 2 ..........................................................-0.3V to +6V  
5-Pin SOT23-5 (derate 7.1mW/°C above +70°C) ........571mW  
6-Pin SOT23-6 (derate 8.7mW/°C above +70°C) ........696mW  
8-Pin SOT23-8 (derate 8.9mW/°C above +70°C) ........714mW  
Operating Temperature Range ...........................-40°C to +85°C  
Storage Temperature Range.............................-65°C to +150°C  
Junction Temperature......................................................+150°C  
Lead Temperature (soldering, 10s) .................................+300°C  
CC  
CC  
Open-Drain RST, RST1, RST2, PFO, RST ................-0.3V to +6V  
Push-Pull RST, RST1, PFO, RST...............-0.3V to (V 1 + 0.3V)  
Push-Pull RST2.........................................-0.3V to (V 2 + 0.3V)  
RSTIN, PFI, MR, WDI................................................-0.3V to +6V  
Input Current/Output Current (all pins) ...............................20mA  
CC  
CC  
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional  
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to  
absolute maximum rating conditions for extended periods may affect device reliability.  
ELECTRICAL CHARACTERISTICS  
(V 1 = V 2 = 0.8V to 5.5V, GND = 0, T = -40°C to +85°C, unless otherwise noted. Typical values are at T = +25°C.) (Note 1)  
CC  
CC  
A
A
PARAMETER  
SYMBOL  
CONDITIONS  
MIN  
TYP  
MAX  
5.5  
UNITS  
Supply Voltage  
Supply Current  
V
0.8  
V
CC  
V
V
V
V
1 < 5.5V, all I/O pins open  
1 < 3.6V, all I/O pins open  
2 < 3.6V, all I/O pins open  
2 < 2.75V, all I/O pins open  
15  
39  
CC  
CC  
CC  
CC  
I
CC1  
10  
28  
µA  
4
11  
I
CC2  
3
9
L (falling)  
M (falling)  
T (falling)  
S (falling)  
R (falling)  
Z (falling)  
Y (falling)  
W (falling)  
V (falling)  
T (falling)  
S (falling)  
R (falling)  
Z (falling)  
Y (falling)  
W (falling)  
V (falling)  
I (falling)  
H (falling)  
G (falling)  
F (falling)  
E (falling)  
D (falling)  
4.500  
4.250  
3.000  
2.850  
2.550  
2.250  
2.125  
1.620  
1.530  
3.000  
2.850  
2.550  
2.250  
2.125  
1.620  
1.530  
1.350  
1.275  
1.080  
1.020  
0.810  
0.765  
4.625  
4.375  
3.075  
2.925  
2.625  
2.313  
2.188  
1.665  
1.575  
3.075  
2.925  
2.625  
2.313  
2.188  
1.665  
1.575  
1.388  
1.313  
1.110  
1.050  
0.833  
0.788  
20  
4.750  
4.500  
3.150  
3.000  
2.700  
2.375  
2.250  
1.710  
1.620  
3.150  
3.000  
2.700  
2.375  
2.250  
1.710  
1.620  
1.425  
1.350  
1.140  
1.080  
0.855  
0.810  
V
1 Reset Threshold  
V
V
CC  
TH1  
V
2 Reset Threshold  
CC  
V
V
TH2  
Reset Threshold Tempco  
Reset Threshold Hysteresis  
ppm/°C  
V
Referenced to V typical  
0.5  
%
HYST  
TH  
2
_______________________________________________________________________________________  
Dual/Triple Ultra-Low-Voltage SOT23 µP  
Supervisory Circuits  
ELECTRICAL CHARACTERISTICS (continued)  
(V 1 = V 2 = 0.8V to 5.5V, GND = 0, T = -40°C to +85°C, unless otherwise noted. Typical values are at T = +25°C.) (Note 1)  
CC  
CC  
A
A
PARAMETER  
SYMBOL  
CONDITIONS  
1 = (V 1+ 100mV) to (V 1 - 100mV) or  
MIN  
TYP  
MAX  
UNITS  
V
CC  
V
CC  
TH  
TH  
V
to Reset Output Delay  
t
20  
µs  
CC  
RD  
2 = (V 2 + 75mV) to (V 2 - 75mV)  
TH  
TH  
D1  
D2  
D3  
D5  
D6  
D4  
1.1  
8.8  
1.65  
13.2  
210  
2.2  
17.6  
280  
140  
280  
560  
1120  
Reset Timeout Period  
t
ms  
RP  
420  
560  
840  
1120  
2240  
1680  
ADJUSTABLE RESET COMPARATOR INPUT (MAX6719/MAX6720/MAX6723–MAX6727)  
RSTIN Input Threshold  
RSTIN Input Current  
V
611  
-25  
626.5  
642  
+25  
mV  
nA  
RSTIN  
RSTIN  
I
RSTIN Hysteresis  
3
mV  
µs  
RSTIN to Reset Output Delay  
t
V
to (V - 30mV)  
RSTIN  
22  
RSTIND  
RSTIN  
POWER-FAIL INPUT (MAX6728/MAX6729)  
PFI Input Threshold  
PFI Input Current  
PFI Hysteresis  
V
611  
-25  
626.5  
642  
+25  
mV  
nA  
mV  
µs  
PFI  
PFI  
I
V
3
2
PFH  
DPF  
PFI to PFO Delay  
t
(V + 30mV) to (V - 30mV)  
PFI PFI  
MANUAL RESET INPUT (MAX6715–MAX6722/MAX6725–MAX6729)  
V
0.3 ✕ V  
1
CC  
IL  
MR Input Voltage  
V
V
0.7 ✕ V  
1
CC  
IH  
MR Minimum Pulse Width  
MR Glitch Rejection  
MR to Reset Delay  
1
µs  
ns  
ns  
kΩ  
100  
200  
50  
t
MR  
MR Pullup Resistance  
25  
35  
80  
WATCHDOG INPUT (MAX6721–MAX6729)  
First watchdog period after reset timeout  
period  
54  
72  
Watchdog Timeout Period  
t
s
WD  
Normal mode  
(Note 2)  
1.12  
50  
1.68  
2.24  
WDI Pulse Width  
WDI Input Voltage  
WDI Input Current  
t
ns  
V
WDI  
V
0.3 ✕ V  
1
CC  
IL  
V
0.7 ✕ V  
1
CC  
IH  
I
WDI = 0 or V  
1
CC  
-1  
+1  
µA  
WDI  
_______________________________________________________________________________________  
3
Dual/Triple Ultra-Low-Voltage SOT23 µP  
Supervisory Circuits  
ELECTRICAL CHARACTERISTICS (continued)  
(V 1 = V 2 = 0.8V to 5.5V, GND = 0, T = -40°C to +85°C, unless otherwise noted. Typical values are at T = +25°C.) (Note 1)  
CC  
CC  
A
A
PARAMETER  
SYMBOL  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
RESET/POWER-FAIL OUTPUTS  
V
1 or V 2 ≥ 0.8V, I  
= 1µA,  
CC  
CC  
SINK  
SINK  
SINK  
SINK  
SINK  
0.3  
0.3  
0.3  
0.3  
0.4  
output asserted  
V
1 or V 2 ≥ 1.0V, I  
= 50µA,  
CC  
CC  
output asserted  
RST/RST1/RST2/PFO  
Output LOW  
V
1 or V 2 ≥ 1.2V, I  
= 100µA,  
= 1.2mA,  
= 3.2mA,  
CC  
CC  
V
V
OL  
output asserted  
(Push-Pull or Open-Drain)  
V
1 or V 2 ≥ 2.7V, I  
CC  
CC  
output asserted  
V
1 or V 2 ≥ 4.5V, I  
CC  
CC  
output asserted  
V
1 ≥ 1.8V, I  
= 200µA, output not  
= 500µA, output not  
= 800µA, output not  
= 200µA, output not  
= 500µA, output not  
= 800µA, output not  
CC  
SOURCE  
SOURCE  
SOURCE  
SOURCE  
SOURCE  
SOURCE  
0.8 ✕ V  
0.8 ✕ V  
0.8 ✕ V  
0.8 ✕ V  
0.8 ✕ V  
0.8 ✕ V  
1
1
1
2
2
CC  
CC  
CC  
CC  
CC  
asserted  
RST/RST1/PFO  
Output HIGH  
(Push-Pull Only)  
V
1 ≥ 2.7V, I  
CC  
V
V
V
OH  
asserted  
V
1 ≥ 4.5V, I  
CC  
asserted  
V
2 ≥ 1.8V, I  
CC  
asserted  
RST2  
Output HIGH  
(Push-Pull Only)  
V
2 ≥ 2.7V, I  
CC  
V
OH  
asserted  
V
2 ≥ 4.5V, I  
CC  
2
1
1
CC  
CC  
CC  
asserted  
V
V
1 ≥ 1.0V, I  
1 ≥ 1.8V, I  
= 1µA, reset asserted 0.8 ✕ V  
CC  
SOURCE  
= 150µA,  
CC  
SOURCE  
0.8 ✕ V  
reset asserted  
RST  
Output HIGH  
(Push-Pull Only)  
V
V
V
V
1 ≥ 2.7V, I  
= 500µA,  
OH  
CC  
SOURCE  
SOURCE  
0.8 ✕ V  
1
CC  
CC  
reset asserted  
V
1 ≥ 4.5V, I  
CC  
= 800µA,  
0.8 ✕ V  
1
reset asserted  
V
1 or V 2 ≥ 1.8V, I  
= 500µA,  
= 1.2mA,  
= 3.2mA,  
CC  
CC  
SINK  
SINK  
SINK  
0.3  
0.3  
0.4  
0.5  
0.5  
reset not asserted  
RST  
Output LOW  
(Push-Pull or Open Drain)  
V
1 or V 2 ≥ 2.7V, I  
CC  
CC  
V
OL  
reset not asserted  
V
1 or V 2 ≥ 4.5V, I  
CC  
CC  
reset not asserted  
RST/RST1/RST2/PFO Output  
Open-Drain Leakage Current  
Output not asserted  
µA  
µA  
RST Output Open-Drain  
Leakage Current  
Output asserted  
Note 1: Devices tested at +25°C. Overtemperature limits are guaranteed by design and not production tested.  
Note 2: Parameter guaranteed by design.  
4
_______________________________________________________________________________________  
Dual/Triple Ultra-Low-Voltage SOT23 µP  
Supervisory Circuits  
Typical Operating Characteristics  
(V 1 = 5V, V 2 = 3.3V, T = +25°C, unless otherwise noted.)  
CC  
CC  
A
SUPPLY CURRENT vs. TEMPERATURE  
SUPPLY CURRENT vs. TEMPERATURE  
SUPPLY CURRENT vs. TEMPERATURE  
V
1 = 5V, V 2 = 3.3V  
V
1 = 3.3V, V 2 = 2.5V  
V 1 = 2.5V, V 2 = 1.8V  
CC CC  
CC  
CC  
CC  
CC  
18  
16  
14  
12  
10  
8
18  
16  
14  
12  
10  
8
18  
16  
14  
12  
10  
8
TOTAL  
TOTAL  
I
1
CC  
TOTAL  
I
1
CC  
I
I
1
2
CC  
6
6
6
4
I
2
4
4
CC  
I
2
CC  
CC  
2
2
2
0
0
0
-40  
-15  
10  
35  
60  
85  
-40  
-15  
10  
35  
60  
85  
-40  
-15  
10  
35  
60  
85  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
SUPPLY CURRENT vs. TEMPERATURE  
MAXIMUM V TRANSIENT DURATION  
CC  
vs. RESET THRESHOLD OVERDRIVE  
NORMALIZED RESET/WATCHDOG  
TIMEOUT PERIOD vs. TEMPERATURE  
V
1 = 1.8V, V 2 = 1.2V  
CC  
CC  
18  
16  
14  
12  
10  
8
1.007  
1.006  
1.005  
1.004  
1.003  
1.002  
1.001  
1.000  
0.999  
0.998  
10,000  
1000  
RESET OCCURS ABOVE  
THIS LINE  
TOTAL  
6
I
I
1
100  
10  
CC  
CC  
4
2
2
0
-40  
-15  
10  
35  
60  
85  
-40  
-15  
10  
35  
60  
85  
1
10  
100  
1000  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
RESET THRESHOLD OVERDRIVE (mV)  
NORMALIZED V RESET THRESHOLD  
CC  
RESET INPUT AND POWER-FAIL INPUT  
THRESHOLD vs. TEMPERATURE  
V
TO RESET DELAY  
CC  
vs. TEMPERATURE  
vs. TEMPERATURE  
54  
1.004  
1.003  
1.002  
1.001  
1.000  
0.999  
0.998  
0.997  
0.996  
631  
630  
629  
628  
627  
626  
625  
100mV OVERDRIVE  
53  
52  
51  
50  
49  
48  
47  
46  
45  
44  
-40  
-15  
10  
35  
60  
85  
-40  
-15  
10  
35  
60  
85  
-40  
-15  
10  
35  
60  
85  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
_______________________________________________________________________________________  
5
Dual/Triple Ultra-Low-Voltage SOT23 µP  
Supervisory Circuits  
Typical Operating Characteristics (continued)  
(V 1 = 5V, V 2 = 3.3V, T = +25°C, unless otherwise noted.)  
CC  
CC  
A
RESET INPUT TO RESET OUTPUT DELAY  
vs. TEMPERATURE  
POWER-FAIL INPUT TO POWER-FAIL  
OUTPUT DELAY vs. TEMPERATURE  
MR TO RESET OUTPUT DELAY  
MAX6715-29 toc12  
24.4  
30mV OVERDRIVE  
30mV OVERDRIVE  
2.4  
2.3  
2.2  
2.1  
2.0  
24.2  
24.0  
23.8  
23.6  
23.4  
23.2  
23.0  
22.8  
V
MR  
2V/div  
0
0
V
RST  
2V/div  
-40  
-15  
10  
35  
60  
85  
50ns/div  
-40  
-15  
10  
35  
60  
85  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
Pin Description  
PIN  
NAME  
FUNCTION  
MAX6715/ MAX6717/ MAX6719/ MAX6721/ MAX6723/ MAX6725/  
MAX6716 MAX6718 MAX6720 MAX6722 MAX6724 MAX6726  
MAX6728/  
MAX6729  
MAX6727  
Active-Low Reset Output,  
Open-Drain or Push-Pull.  
RST/RST1 changes from  
high to low when V 1 or  
CC  
V
2 drops below the  
CC  
selected reset thresholds,  
RSTIN is below threshold,  
MR is pulled low, or the  
watchdog triggers a  
reset. RST/RST1 remains  
low for the reset timeout  
RST/  
RST1  
1
1
1
1
1
1
1, 4  
1
period after V 1/  
CC  
V
2/RSTIN exceed the  
CC  
device reset thresholds,  
MR goes low to high, or  
the watchdog triggers a  
reset. Open-drain outputs  
require an external pullup  
resistor. Push-pull  
outputs are referenced to  
V
1.  
CC  
6
_______________________________________________________________________________________  
Dual/Triple Ultra-Low-Voltage SOT23 µP  
Supervisory Circuits  
Pin Description (continued)  
PIN  
NAME  
FUNCTION  
MAX6715/ MAX6717/ MAX6719/ MAX6721/ MAX6723/ MAX6725/  
MAX6716 MAX6718 MAX6720 MAX6722 MAX6724 MAX6726  
MAX6728/  
MAX6729  
MAX6727  
Active-Low Reset Output,  
Open-Drain or Push-Pull.  
RST2 changes from high  
to low when V 1 or  
CC  
V
2 drops below the  
CC  
selected reset thresholds  
or MR is pulled low. RST2  
remains low for the reset  
5
—
—
—
—
—
—
—
RST2 timeout period after  
1/V 2 exceed the  
V
CC  
CC  
device reset thresholds  
or MR goes low to high.  
Open-drain outputs  
require an external pullup  
resistor. Push-pull  
outputs are referenced to  
V
2.  
CC  
2
3
2
3
2
3
2
3
2
2
5
2
5
2
5
GND Ground  
Active-Low Manual Reset  
Input. Internal 50kΩ  
pullup to V 1. Pull low  
CC  
to force a reset. Reset  
remains active as long as  
MR is low and for the  
—
MR  
reset timeout period after  
MR goes high. Leave  
unconnected or connect  
to V 1 if unused.  
CC  
Secondary Supply  
Voltage Input. Powers the  
device when it is above  
4
6
4
5
4
6
4
6
4
6
6
8
6
8
6
8
V
2
CC  
V
1 and input for  
CC  
secondary reset  
threshold monitor.  
Primary Supply Voltage  
Input. Powers the device  
V
1
CC  
when it is above V  
2
CC  
and input for primary  
reset threshold monitor.  
_______________________________________________________________________________________  
7
Dual/Triple Ultra-Low-Voltage SOT23 µP  
Supervisory Circuits  
Pin Description (continued)  
PIN  
NAME  
FUNCTION  
MAX6715/ MAX6717/ MAX6719/ MAX6721/ MAX6723/ MAX6725/  
MAX6716 MAX6718 MAX6720 MAX6722 MAX6724 MAX6726  
MAX6728/  
MAX6729  
MAX6727  
Watchdog Input. If WDI  
remains high or low for  
longer than the watchdog  
timeout period, the  
internal watchdog timer  
runs out and the reset  
output asserts for the  
reset timeout period. The  
internal watchdog timer  
clears whenever a reset  
is asserted or WDI sees a  
rising or falling edge. The  
watchdog has a long  
timeout period (35s min)  
after each reset event  
and a short timeout  
—
—
—
5
3
3
3
3
WDI  
period (1.12s min) after  
the first valid WDI  
transition. Leave WDI  
floating to disable the  
watchdog timer function.  
Undervoltage Reset  
Comparator Input. High-  
impedance input for  
adjustable reset monitor.  
The reset output is  
asserted when RSTIN falls  
—
—
5
—
5
7
7
—
RSTIN below the 0.626V internal  
reference voltage. Set the  
monitored voltage reset  
threshold with an external  
resistor-divider network.  
Connect RSTIN to V 1 or  
CC  
V
2 if not used.  
CC  
Power-Fail Voltage  
Monitor Input. High-  
impedance input for  
internal power-fail monitor  
comparator. Connect PFI  
to an external resistor-  
divider network to set the  
power-fail threshold  
voltage (0.626V typical  
internal reference  
—
—
—
—
—
—
—
7
PFI  
voltage). Connect to  
GND, V 1, or V 2 if  
CC  
CC  
not used.  
8
_______________________________________________________________________________________  
Dual/Triple Ultra-Low-Voltage SOT23 µP  
Supervisory Circuits  
Pin Description (continued)  
PIN  
NAME  
FUNCTION  
MAX6715/ MAX6717/ MAX6719/ MAX6721/ MAX6723/ MAX6725/  
MAX6716 MAX6718 MAX6720 MAX6722 MAX6724 MAX6726  
MAX6728/  
MAX6729  
MAX6727  
Active-Low Power-Fail  
Monitor Output, Open-  
Drain or Push-Pull. PFO is  
asserted low when PFI is  
less than 0.626V. PFO  
deasserts without a reset  
timeout period. Open-  
drain outputs require an  
external pullup resistor.  
Push-pull outputs are  
—
—
—
—
—
—
—
4
PFO  
referenced to V 1.  
CC  
Active-High Reset  
Output, Open-Drain or  
Push-Pull. RST changes  
from low to high when  
V
1 or V 2 drops  
CC CC  
below selected reset  
thresholds, RSTIN is  
below threshold, MR is  
pulled low, or the  
watchdog triggers a  
reset. RST remains HIGH  
for the reset timeout  
—
—
—
—
—
4
—
—
RST  
period after V 1/  
CC  
V
2/RSTIN exceed the  
CC  
device reset thresholds,  
MR goes low to high, or  
the watchdog triggers a  
reset. Open-drain outputs  
require an external pullup  
resistor. Push-pull  
outputs are referenced to  
V
1.  
CC  
Suffix Guide (Table 1). Contact factory for availability of  
Detailed Description  
other voltage threshold combinations.  
Supply Voltages  
Reset Outputs  
The MAX6715–MAX6729 provides an active-low reset  
output (RST) and the MAX6725/MAX6726 provides  
both an active-high (RST) and an active-low reset out-  
put (RST). RST, RST, RST1, and RST2 are asserted  
The MAX6715–MAX6729 microprocessor (µP) supervi-  
sory circuits maintain system integrity by alerting the µP  
to fault conditions. These ICs are optimized for systems  
that monitor two or three supply voltages. The output-  
reset state is guaranteed to remain valid while either  
when the voltage at either V 1 or V 2 falls below the  
CC  
CC  
V
CC  
1 or V 2 is above 0.8V.  
CC  
voltage threshold level, RSTIN drops below threshold,  
Threshold Levels  
or MR is pulled low. Once reset is asserted it stays low  
Input voltage threshold level combinations are indicat-  
for the reset timeout period (see Table 2). If V 1,  
CC  
ed by a two-letter code in the Reset Voltage Threshold  
V
CC  
2, or RSTIN goes below the reset threshold before  
the reset timeout period is completed, the internal timer  
_______________________________________________________________________________________  
9
Dual/Triple Ultra-Low-Voltage SOT23 µP  
Supervisory Circuits  
restarts. The MAX6715/MAX6717/MAX6719/MAX6721/  
MAX6723/MAX6725/MAX6727/MAX6728 contain open-  
drain reset outputs, while the MAX6716/MAX6718/  
MAX6720/MAX6722/MAX6724/MAX6726/MAX6729  
contain push-pull reset outputs. The MAX6727 provides  
two separate open-drain RST outputs driven by the  
same internal logic.  
MAX6719/  
V
EXT_TH  
MAX6720/  
MAX6723–  
MAX6727  
R1  
R2  
RSTIN  
Manual Reset Input  
Many microprocessor-based products require manual  
reset capability, allowing the operator, a test techni-  
cian, or external logic circuitry to initiate a reset. A logic  
low on MR asserts the reset output. Reset remains  
asserted while MR is low and for the reset timeout peri-  
GND  
od (t ) after MR returns high. This input has an internal  
RP  
50kΩ pullup resistor to V 1 and can be left uncon-  
CC  
Figure 1. Monitoring a Third Voltage  
nected if not used. MR can be driven with TTL or  
CMOS logic levels, or with open-drain/collector outputs.  
Connect a normally open momentary switch from MR to  
GND to create a manual reset function; external  
debounce circuitry is not required. If MR is driven from  
long cables or if the device is used in a noisy environ-  
ment, connect a 0.1µF capacitor from MR to GND to  
provide additional noise immunity.  
when processor activity fails. After each reset event  
(V  
power-up/brownout, manual reset, or watchdog  
CC  
reset), there is a long initial watchdog period of 35s  
minimum. The long watchdog period mode provides an  
extended time for the system to power-up and fully ini-  
tialize all µP and system components before assuming  
responsibility for routine watchdog updates.  
Adjustable Input Voltage  
The MAX6719/MAX6720 and MAX6723–MAX6727 provide  
an additional input to monitor a third system voltage. The  
threshold voltage at RSTIN is typically 626mV. Connect a  
resistor-divider network to the circuit as shown in Figure 1  
to establish an externally controlled threshold voltage,  
The normal watchdog timeout period (1.12s min)  
begins after the first transition on WDI before the con-  
clusion of the long initial watchdog period (Figure 2).  
During the normal operating mode, the supervisor will  
issue a reset pulse for the reset timeout period if the µP  
does not update the WDI with a valid transition (high-to-  
low or low-to-high) within the standard timeout period  
(1.12s min).  
V
.
EXT_TH  
V
= 626mV((R1 + R2)/R2)  
EXT_TH  
Power-Fail Comparator  
PFI is the noninverting input to a comparator. If PFI is  
less than V  
(626.5mV), PFO goes low. Common uses  
for the power-fail comparator include monitoring prereg-  
ulated input of the power supply (such as a battery) or  
PFI  
Low leakage current at RSTIN allows the use of large-  
valued resistors resulting in reduced power consump-  
tion of the system.  
Watchdog Input  
The watchdog monitors µP activity through the watch-  
dog input (WDI). To use the watchdog function, con-  
nect WDI to a bus line or µP I/O line. When WDI  
remains high or low for longer than the watchdog time-  
out period, the reset output asserts. Leave WDI floating  
to disable the watchdog function.  
V
TH  
V
CC  
t
WDI-NORMAL  
1.12s MAX  
t
WDI-STARTUP  
35s MAX  
WDI  
The MAX6721–MAX6729 include a dual-mode watch-  
dog timer to monitor µP activity. The flexible timeout  
architecture provides a long period initial watchdog  
mode, allowing complicated systems to complete  
lengthy boots, and a short period normal watchdog  
mode, allowing the supervisor to provide quick alerts  
1.12s MAX  
t
RP  
RESET  
Figure 2. Normal Watchdog Startup Sequence  
10 ______________________________________________________________________________________  
Dual/Triple Ultra-Low-Voltage SOT23 µP  
Supervisory Circuits  
A
RESET TO OTHER SYSTEM COMPONENTS  
V
1 V 2  
CC  
CC  
V
IN  
MAX6728/  
MAX6729  
R1  
R1 + R2  
R2  
MAX6715–  
MAX6729  
V
= V  
PFI  
TRIP  
(
)
PFI  
PFO  
µP  
4.7kΩ  
V
V
2
1
RESET  
R2  
RST  
CC  
CC  
GND  
GND  
GND  
B
V
CC  
MAX6728/  
MAX6729  
Figure 4. Interfacing to µPs with Bidirectional Reset I/O  
R1  
R2  
V
CC  
R1  
1
1
+
-
(V  
= R2  
)
PFI  
V
TRIP  
Applications Information  
Interfacing to µPs with Bidirectional  
Reset Pins  
(R1 )  
[
]
R2  
PFI  
PFO  
V
PFI  
= 626.5mV  
Most microprocessors with bidirectional reset pins can  
interface directly to open-drain RST output options.  
Systems simultaneously requiring a push-pull RST out-  
put and a bidirectional reset interface can be in logic  
contention. To prevent contention, connect a 4.7kΩ  
resistor between RST and the µP’s reset I/O port as  
shown in Figure 4.  
V
IN  
GND  
Figure 3. Using Power-Fail Input to Monitor an Additional  
Power-Supply a) V is Positive b) V is Negative  
IN  
IN  
providing an early power-fail warning so software can  
conduct an orderly system shutdown. It can also be  
Adding Hysteresis to the Power-Fail  
Comparator  
used to monitor supplies other than V 1 or V 2 by  
CC  
CC  
The power-fail comparator has a typical input hysteresis  
of 3mV. This is sufficient for most applications where a  
power-supply line is being monitored through an external  
voltage-divider (see the Power-Fail Comparator section).  
If additional noise margin is desired, connect a resistor  
between PFO and PFI as shown in Figure 5. Select the  
setting the power-fail threshold with a resistor-divider, as  
shown in Figure 3. PFI is the input to the power-fail com-  
parator. The typical comparator delay is 2µs from PFI to  
PFO. Connect PFI to ground of V 1 if unused.  
CC  
Ensuring a Valid Reset Output  
values of R1, R2, and R3 so PFI sees V  
(626mV) when  
PFI  
Down to V  
CC  
= 0  
V
falls to its power-fail trip point (V  
) and when VIN  
EXT  
FAIL  
The MAX6715–MAX6729 are guaranteed to operate  
properly down to V = 0.8V. In applications that  
rises to its power-good trip point (V  
). The hysteresis  
GOOD  
CC  
window extends between the specified V  
and V  
GOOD  
FAIL  
require valid reset levels down to V  
= 0 use a pull-  
CC  
thresholds. R3 adds the additional hysteresis by sinking  
current from the R1/R2 divider network when PFO is logic  
low and sourcing current into the network when PFO is  
logic high. R3 is typically an order of magnitude greater  
than R1 or R2.  
down resistor at RST to ground. The resistor value used  
is not critical, but it must be large enough not to load  
the reset output when V  
is above the reset threshold.  
CC  
For most applications, 100kΩ is adequate. This config-  
uration does not work for the open-drain outputs of the  
MAX6715/MAX6717/MAX6719/MAX6721/MAX6723/  
MAX6725/MAX6727/MAX6728. For push-pull, active-  
high RST output connect the external resistor as a  
The current through R2 should be at least 2.5µA to  
ensure that the 25nA (max) PFI input current does not  
significantly shift the trip points. Therefore, R2 <  
V
PFI  
/2.5µA < 248kΩ for most applications. R3 will provide  
pullup from RST to V 1.  
CC  
additional hysteresis for PFO push-pull (V  
= V 1) or  
CC  
OH  
open-drain (V  
= V  
) applications.  
OH  
PULLUP  
______________________________________________________________________________________ 11  
Dual/Triple Ultra-Low-Voltage SOT23 µP  
Supervisory Circuits  
R3  
START  
A
V
V
GOOD  
FAIL  
V
IN  
PFO  
V
MAX6728/  
MAX6729  
EXT  
SET WDI  
HIGH  
R1  
PROGRAM  
CODE  
PFI  
PFO  
V
V
V
= DESIRED V GOOD VOLTAGE THRESHOLD  
EXT  
GOOD  
R2  
= DESIRED V FAIL VOLTAGE THRESHOLD  
FAIL  
EXT  
= V 1 (FOR PUSH-PULL PFO) OR V  
OH  
CC  
PULLUP  
(FOR OPEN-DRAIN PFO)  
R2 = 200kΩ (FOR > 2.5µA R2 CURRENT)  
SUBROUTINE OR  
PROGRAM LOOP  
SET WDI LOW  
GND  
R1 = R2 ((V  
- V ) - (V )(V  
- V ) / V ) / V  
GOOD  
OH  
PFI  
PFI GOOD FAIL OH PFI  
R3 = (R1 x V ) / (V  
- V  
)
GOOD  
FAIL  
HANG IN  
SUBROUTINE  
Figure 5. Adding Hysteresis to Power-Fail for Push-Pull PFO  
SUBROUTINE  
COMPLETED  
Monitoring an Additional Power Supply  
These µP supervisors can monitor either positive or  
negative supplies using a resistor voltage-divider to  
PFI. PFO can be used to generate an interrupt to the µP  
or cause reset to assert (Figure 3).  
RETURN  
Figure 6. Watchdog Flow Diagram  
Monitoring a Negative Voltage  
The power-fail comparator can be used to monitor a  
negative supply voltage using the circuit shown in  
Figure 3. When the negative supply is valid, PFO is low.  
When the negative supply voltage drops, PFO goes  
high. The circuit’s accuracy is affected by the PFI  
watchdog timer to closely monitor software execution.  
This technique avoids a “stuck” loop where the watch-  
dog timer continues to be reset within the loop, keeping  
the watchdog from timing out. Figure 6 shows an exam-  
ple flow diagram where the I/O driving the watchdog  
input is set high at the beginning of the program, set low  
at the beginning of every subroutine or loop, then set  
high again when the program returns to the beginning. If  
the program should “hang” in any subroutine, the I/O is  
continually set low and the watchdog timer is allowed to  
time out, causing a reset or interrupt to be issued.  
threshold tolerance, V , R1, and R2.  
CC  
Negative-Going V  
Transients  
CC  
The MAX6715–MAX6729 supervisors are relatively  
immune to short-duration negative-going V  
transients  
CC  
(glitches). It is usually undesirable to reset the µP when  
experiences only small glitches. The Typical  
V
CC  
Operating Characteristics show Maximum Transient  
Duration vs. Reset Threshold Overdrive, for which reset  
pulses are not generated. The graph was produced  
Chip Information  
TRANSISTOR COUNT: 1072  
using negative-going V  
pulses, starting above V  
TH  
CC  
PROCESS: BiCMOS  
and ending below the reset threshold by the magnitude  
indicated (reset threshold overdrive). The graph shows  
the maximum pulse width that a negative-going V  
CC  
transient may typically have without causing a reset  
pulse to be issued. As the amplitude of the transient  
increases (i.e., goes farther below the reset threshold),  
the maximum allowable pulse width decreases. A 0.1µF  
bypass capacitor mounted close to the V  
vides additional transient immunity.  
pin pro-  
CC  
Watchdog Software Considerations  
Setting and resetting the watchdog input at different  
points in the program, rather than “pulsing” the watch-  
dog input high-low-high or low-high-low, helps the  
12 ______________________________________________________________________________________  
Dual/Triple Ultra-Low-Voltage SOT23 µP  
Supervisory Circuits  
Functional Diagram  
V
1
CC  
V
1
CC  
MR  
MR  
PULLUP  
V
1
CC  
V
1
V 2  
CC  
CC  
V
REF  
RST  
RST  
RESET  
TIMEOUT  
PERIOD  
RESET  
OUTPUT  
DRIVER  
V
2
CC  
RSTIN/PFI  
PFO  
V
1
CC  
V
V 1  
CC  
REF  
WATCHDOG  
TIMER WITH  
WDI  
FLOAT DISABLE  
V
REF/2  
______________________________________________________________________________________ 13  
Dual/Triple Ultra-Low-Voltage SOT23 µP  
Supervisory Circuits  
Selector Guide  
POWER-  
FAIL  
INPUT/  
OUTPUT  
NUMBER OF  
VOLTAGE  
MONITORS  
OPEN-  
DRAIN  
RESET  
OPEN-  
DRAIN  
RESET  
PUSH-  
PULL  
RESET  
PUSH-  
PULL  
RESET  
WATCH-  
DOG  
INPUT  
PART  
NUMBER  
MANUAL  
RESET  
MAX6715  
MAX6716  
MAX6717  
MAX6718  
MAX6719  
MAX6720  
MAX6721  
MAX6722  
MAX6723  
MAX6724  
MAX6725  
MAX6726  
MAX6727  
MAX6728  
MAX6729  
2
2
2
2
3
3
2
2
3
3
3
3
3
2
2
2
—
1
—
—
—
—
—
—
—
—
—
—
1
—
2
—
—
—
—
—
—
—
—
—
—
—
1
√
√
—
—
—
—
—
—
√
—
—
—
1
√
—
—
1
√
—
—
1
√
—
—
1
√
—
—
1
√
—
—
1
√
√
—
—
1
—
—
√
√
—
—
1
√
—
—
1
√
—
—
—
2
—
—
—
—
√
√
—
—
1
—
—
—
√
√
—
1
√
√
√ (open drain)  
√ (push-pull)  
—
√
√
Ordering Information (continued)  
PART  
TEMP RANGE  
-40°C to +85°C  
-40°C to +85°C  
-40°C to +85°C  
-40°C to +85°C  
-40°C to +85°C  
-40°C to +85°C  
-40°C to +85°C  
-40°C to +85°C  
-40°C to +85°C  
PIN-PACKAGE  
6 SOT23-6  
6 SOT23-6  
6 SOT23-6  
6 SOT23-6  
8 SOT23-8  
8 SOT23-8  
8 SOT23-8  
8 SOT23-8  
8 SOT23-8  
MAX6721UT_ _D_ -T  
MAX6722UT_ _D_ -T  
MAX6723UT_ _D_ -T  
MAX6724UT_ _D_ -T  
MAX6725KA_ _D_ -T  
MAX6726KA_ _D_ -T*  
MAX6727KA_ _D_ -T  
MAX6728KA_ _D_ -T*  
MAX6729KA_ _D_ -T*  
Note: The first “_ _” are placeholders for the threshold voltage  
levels of the devices. Desired threshold levels are set by the part  
number suffix found in the Reset Voltage Threshold Suffix Guide.  
The “_” after the D is a placeholder for the reset timeout delay  
time. Desired delay time is set using the timeout period suffix  
found in the Reset Timeout Period Suffix Guide. For example the  
MAX6716UTLTD3-T is a dual-voltage supervisor V 1 = 4.625V,  
TH  
V 2 = 3.075V, and 210ms (typ) timeout period.  
TH  
*Future product—contact factory for availability  
14 ______________________________________________________________________________________  
Dual/Triple Ultra-Low-Voltage SOT23 µP  
Supervisory Circuits  
Table 1. Reset Voltage Threshold Suffix  
Guide**  
Table 2. Reset Timeout Period Suffix  
Guide  
ACTIVE TIMEOUT PERIOD  
TIMEOUT  
PART NUMBER  
SUFFIX  
V
1 NOMINAL  
VOLTAGE  
V
2 NOMINAL  
CC  
VOLTAGE  
CC  
PERIOD SUFFIX  
MIN [ms]  
1.1  
MAX [ms]  
2.2  
(_ _)  
THRESHOLD (V)  
4.625  
4.375  
4.375  
3.075  
2.925  
2.625  
3.075  
2.925  
2.625  
3.075  
2.925  
2.625  
3.075  
2.925  
2.625  
3.075  
2.925  
2.625  
2.313  
2.188  
2.313  
2.188  
2.313  
2.188  
2.313  
2.188  
1.665  
1.575  
1.665  
1.575  
1.665  
1.575  
THRESHOLD (V)  
3.075  
2.925  
2.625  
2.313  
2.188  
2.188  
1.665  
1.575  
1.575  
1.388  
1.313  
1.313  
1.110  
1.050  
1.050  
0.833  
0.788  
0.788  
1.665  
1.575  
1.388  
1.313  
1.110  
1.050  
0.833  
0.788  
1.388  
1.313  
1.110  
1.050  
0.833  
0.788  
D1  
D2  
D3  
D5  
D6  
D4  
LT  
MS  
MR  
TZ  
8.8  
17.6  
140  
280  
280  
560  
560  
1120  
2240  
SY  
RY  
TW  
SV  
RV  
TI  
1120  
SH  
RH  
TG  
SF  
RF  
TE  
SD  
RD  
ZW  
YV  
ZI  
YH  
ZG  
YF  
ZE  
YD  
WI  
VH  
WG  
VF  
WE  
VD  
**Standard versions are shown in bold and are available in a D3  
timeout option only. Standard versions require 2,500 piece order  
increments and are typically held in sample stock. There is a  
10,000 order increment on nonstandard versions. Other thresh-  
old voltages may be available, contact factory for availability.  
______________________________________________________________________________________ 15  
Dual/Triple Ultra-Low-Voltage SOT23 µP  
Supervisory Circuits  
Pin Configurations  
TOP VIEW  
RST1  
1
2
3
6
5
4
V
1
RST  
GND  
MR  
1
2
3
5
4
V
V
V
1
2
1
RST  
GND  
MR  
1
2
3
6
5
4
V 1  
CC  
CC  
CC  
CC  
CC  
MAX6715/  
MAX6716  
MAX6717/  
MAX6718  
MAX6719/  
MAX6720  
GND  
MR  
RST2  
RSTIN  
V
2
V 2  
CC  
CC  
CC  
SOT23-6  
SOT23-5  
SOT23-6  
RST  
1
2
3
4
8
7
6
5
V 1  
CC  
RST  
GND  
MR  
1
2
3
6
5
4
V
1
RST  
GND  
WDI  
1
2
3
6
5
4
GND  
WDI  
RST  
RSTIN  
MAX6721/  
MAX6722  
MAX6723/  
MAX6724  
MAX6725/  
MAX6726  
WDI  
RSTIN  
V
2
CC  
MR  
V
2
V 2  
CC  
CC  
SOT23-8  
SOT23-6  
SOT23-6  
RST  
1
2
3
4
8
7
6
5
V
1
RST  
GND  
WDI  
PFO  
1
2
3
4
8
7
V
1
2
CC  
CC  
GND  
WDI  
RST  
RSTIN  
PFI  
MAX6727  
MAX6728/  
MAX6729  
V
2
6
5
V
CC  
CC  
MR  
MR  
SOT23-8  
SOT23-8  
16 ______________________________________________________________________________________  
Dual/Triple Ultra-Low-Voltage SOT23 µP  
Supervisory Circuits  
Package Information  
______________________________________________________________________________________ 17  
Dual/Triple Ultra-Low-Voltage SOT23 µP  
Supervisory Circuits  
Package Information (continued)  
18 ______________________________________________________________________________________  
Dual/Triple Ultra-Low-Voltage SOT23 µP  
Supervisory Circuits  
Package Information (continued)  
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are  
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.  
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 19  
© 2002 Maxim Integrated Products  
Printed USA  
is a registered trademark of Maxim Integrated Products.  

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