MAX7411EUA [MAXIM]
5th-Order, Lowpass, Elliptic, Switched-Capacitor Filters; 5阶，低通，椭圆，开关电容滤波器
| 型号： | MAX7411EUA |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | 5th-Order, Lowpass, Elliptic, Switched-Capacitor Filters |
| 文件： | 总12页 (文件大小：139K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
19-1378; Rev 1; 10/98
5 t h -Ord e r, Lo w p a s s , Ellip t ic ,
S w it c h e d -Ca p a c it o r Filt e rs
082/MAX7415
Ge n e ra l De s c rip t io n
Fe a t u re s
The MAX7408/MAX7411/MAX7412/MAX7415 5th-order,
lowpass, elliptic, switched-capacitor filters (SCFs) oper-
ate from a single +5V (MAX7408/MAX7411) or +3V
(MAX7412/MAX7415) supply. The devices draw only
1.2mA of supply current and allow corner frequencies
from 1Hz to 15kHz, making them ideal for low-power
post-DAC filtering and anti-aliasing applications. They
can be put into a low-power mode, reducing supply
current to 0.2µA.
♦ 5th-Order, Elliptic Lowpass Filters
♦ Low Noise and Distortion: -80dB THD + Noise
♦ Clock-Tunable Corner Frequency (1Hz to 15kHz)
♦ Single-Supply Operation
+5V (MAX7408/MAX7411)
+3V (MAX7412/MAX7415)
♦ Low Power
Two clocking options are available: self-clocking (through
the use of an external capacitor) or external clocking for
tighter cutoff-frequency control. An offset-adjust pin
allows for adjustment of the DC output level.
1.2mA (operating mode)
0.2µA (shutdown mode)
♦ Available in 8-Pin µMAX/DIP Packages
♦ Low Output Offset: ±4mV
The MAX7408/MAX7412 d e live r 53d B of s top b a nd
rejection and a sharp rolloff with a transition ratio of 1.6.
The MAX7411/MAX7415 achieve a sharper rolloff with a
transition ratio of 1.25 while still providing 37dB of stop-
band rejection. Their fixed response limits the design
task to selecting a clock frequency.
Ord e rin g In fo rm a t io n
PART
TEMP. RANGE
0°C to +70°C
0°C to +70°C
-40°C to +85°C
-40°C to +85°C
0°C to +70°C
0°C to +70°C
-40°C to +85°C
-40°C to +85°C
0°C to +70°C
0°C to +70°C
-40°C to +85°C
-40°C to +85°C
0°C to +70°C
0°C to +70°C
-40°C to +85°C
-40°C to +85°C
PIN-PACKAGE
8 Plastic DIP
8 µMAX
MAX7408CPA
MAX7408CUA
MAX7408EPA
MAX7408EUA
MAX7411CPA
MAX7411CUA
MAX7411EPA
MAX7411EUA
MAX7412CPA
MAX7412CUA
MAX7412EPA
MAX7412EUA
MAX7415CPA
MAX7415CUA
MAX7415EPA
MAX7415EUA
Ap p lic a t io n s
8 Plastic DIP
8 µMAX
ADC Anti-Aliasing
Post-DAC Filtering
CT2 Base Stations
Speech Processing
8 Plastic DIP
8 µMAX
S e le c t o r Gu id e
8 Plastic DIP
8 µMAX
OPERATING
VOLTAGE (V)
PART
TRANSITION RATIO
8 Plastic DIP
8 µMAX
MAX7408
MAX7411
MAX7412
MAX7415
r = 1.6
r = 1.25
r = 1.6
r = 1.25
+5
+5
+3
+3
8 Plastic DIP
8 µMAX
8 Plastic DIP
8 µMAX
8 Plastic DIP
8 µMAX
Typ ic a l Op e ra t in g Circ u it
V
SUPPLY
P in Co n fig u ra t io n
0.1µF
TOP VIEW
V
DD
SHDN
OUT
INPUT
IN
OUTPUT
COM
IN
1
2
3
4
8
7
6
5
CLK
SHDN
OS
MAX7408
MAX7411
MAX7412
MAX7415
MAX7408
MAX7411
MAX7412
MAX7415
GND
CLOCK
CLK
COM
OS
V
DD
OUT
0.1µF
GND
µMAX/DIP
________________________________________________________________ Maxim Integrated Products
1
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800.
For small orders, phone 1-800-835-8769.
5 t h -Ord e r, Lo w p a s s , Ellip t ic ,
S w it c h e d -Ca p a c it o r Filt e rs
ABSOLUTE MAXIMUM RATINGS
V
DD
to GND..............................................................-0.3V to +6V
Operating Temperature Ranges
IN, OUT, COM, OS, CLK, SHDN ................-0.3V to (V + 0.3V)
OUT Short-Circuit Duration...................................................1sec
MAX74_ _C_A .....................................................0°C to +70°C
MAX74_ _E_A ..................................................-40°C to +85°C
Storage Temperature Range .............................-65°C to +160°C
Lead Temperature (soldering, 10sec) .............................+300°C
DD
Continuous Power Dissipation (T = +70°C)
A
8-Pin DIP (derate 6.90mW/°C above +70°C)...............552mW
8-Pin µMAX (derate 4.1mW/°C above +70°C) .............330mW
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS—MAX7408/MAX7411
(V = +5V; filter output measured at OUT, 10kΩ || 50pF load to GND at OUT, SHDN = V , OS = COM, 0.1µF from COM to GND,
DD
DD
f
= 100kHz, T = T
to T , unless otherwise noted. Typical values are at T = +25°C.)
MAX A
CLK
A
MIN
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
FILTER
Corner-Frequency Range
Clock-to-Corner Ratio
Clock-to-Corner Tempco
Output Voltage Range
Output Offset Voltage
f
(Note 1)
0.001 to 15
100:1
kHz
C
f
/f
CLK C
10
ppm/°C
V
0.25
0
V
- 0.25
±25
DD
V
V
IN
= V
= V / 2
±4
mV
OFFSET
COM DD
DC Insertion Gain with Output
Offset Removed
V
COM
= V / 2 (Note 2)
0.2
0.4
dB
DD
Total Harmonic Distortion plus
Noise
f
= 200Hz, V = 4Vp-p,
IN IN
THD+N
-81
1
dB
measurement bandwidth = 22kHz
Offset Voltage Gain
A
OS
OS to OUT
V/V
V
2
V
V
DD
2
DD
DD
2
Input, COM externally driven
- 0.5
- 0.2
+ 0.5
+ 0.2
COM Voltage Range
V
COM
V
V
DD
2
V
DD
2
V
DD
2
Output, COM internally driven
Measured with respect to COM
Input Voltage Range at OS
Input Resistance at COM
Clock Feedthrough
V
±0.1
180
5
V
kΩ
OS
R
110
COM
T
A
= +25°C
mVp-p
kΩ
082/MAX7415
Resistive Output Load Drive
R
C
10
50
1
L
L
Maximum Capacitive Load
at OUT
500
pF
Input Leakage Current at COM
Input Leakage Current at OS
CLOCK
±0.2
±0.2
±10
µA
µA
SHDN = GND, V
= 0 to V
DD
COM
V
= 0 to V
±10
OS
DD
Internal Oscillator Frequency
f
C
= 1000pF (Note 3)
OSC
19
27
34
kHz
µA
OSC
Clock Output Current
(Internal Oscillator Mode)
I
±12
±20
CLK
Clock Input High
Clock Input Low
V
4.5
V
V
IH
V
IL
0.5
2
_______________________________________________________________________________________
5 t h -Ord e r, Lo w p a s s , Ellip t ic ,
S w it c h e d -Ca p a c it o r Filt e rs
082/MAX7415
ELECTRICAL CHARACTERISTICS—MAX7408/MAX7411 (continued)
(V = +5V; filter output measured at OUT, 10kΩ || 50pF load to GND at OUT, SHDN = V , OS = COM, 0.1µF from COM to GND,
DD
DD
f
= 100kHz, T = T
to T
, unless otherwise noted. Typical values are at T = +25°C.)
A
MAX
CLK
A
MIN
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
POWER REQUIREMENTS
Supply Voltage
V
4.5
5.5
1.5
1
V
DD
Supply Current
I
DD
Operating mode, no load
1.16
0.2
70
mA
µA
dB
Shutdown Current
I
SHDN
SHDN = GND
Power-Supply Rejection Ratio
SHUTDOWN
PSRR
Measured at DC
V
4.5
V
V
SHDN Input High
SDH
V
SDL
0.5
SHDN Input Low
V
= 0 to V
±0.2
±10
µA
SHDN Input Leakage Current
DD
SHDN
ELECTRICAL CHARACTERISTICS—MAX7412/MAX7415
(V = +3V, filter output measured at OUT pin, 10kΩ || 50pF load to GND at OUT, SHDN = V , OS = COM, 0.1µF from COM to
DD
DD
GND, f
= 100kHz; T = T
to T , unless otherwise noted. Typical values are at T = +25°C.)
MAX A
CLK
A
MIN
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
FILTER CHARACTERISTICS
Corner-Frequency Range
Clock-to-Corner Ratio
f
(Note 1)
0.001 to 15
100:1
kHz
C
f
/f
CLK C
Clock-to-Corner Tempco
Output Voltage Range
Output Offset Voltage
10
ppm/°C
V
0.25
0
V
DD
- 0.25
±25
V
V
= V
= V / 2
±4
mV
OFFSET
IN
COM DD
DC Insertion Gain with Output
Offset Removed
V
COM
= V / 2 (Note 2)
0.2
0.4
dB
DD
Total Harmonic Distortion plus
Noise
f
= 200Hz, V = 2.5Vp-p,
IN IN
THD+N
-79
1
dB
V/V
V
measurement bandwidth = 22kHz
Offset Voltage Gain
COM Voltage Range
A
OS
OS to OUT
V
2
V
DD
2
V
DD
2
DD
V
COM
- 0.1
+ 0.1
Input Voltage Range at OS
Input Resistance at COM
Clock Feedthrough
V
Measured with respect to COM
±0.1
180
3
V
kΩ
OS
R
110
COM
T
= +25°C
mVp-p
kΩ
A
Resistance Output Load Drive
R
C
10
50
1
L
L
Maximum Capacitive Load
at OUT
500
pF
Input Leakage Current at COM
Input Leakage Current at OS
±0.2
±0.2
±10
±10
µA
µA
SHDN = GND, V
= 0 to V
DD
COM
V
= 0 to V
DD
OS
_______________________________________________________________________________________
3
5 t h -Ord e r, Lo w p a s s , Ellip t ic ,
S w it c h e d -Ca p a c it o r Filt e rs
ELECTRICAL CHARACTERISTICS—MAX7412/MAX7415 (continued)
(V = +3V, filter output measured at OUT pin, 10kΩ || 50pF load to GND at OUT, SHDN = V , OS = COM, 0.1µF from COM to
DD
DD
GND, f
= 100kHz; T = T
to T , unless otherwise noted. Typical values are at T = +25°C.)
MAX A
CLK
A
MIN
PARAMETER
SYMBOL
CONDITIONS
= 1000pF (Note 3)
OSC
MIN
TYP
MAX
UNITS
CLOCK
Internal Oscillator Frequency
f
C
19
27
34
kHz
µA
OSC
Clock Output Current
(Internal Oscillator Mode)
I
V
= 0 or 3V
±12
±20
CLK
CLK
Clock Input High
V
2.5
2.7
V
V
IH
Clock Input Low
V
IL
0.5
POWER REQUIREMENTS
Supply Voltage
V
DD
3.6
1.5
1
V
Supply Current
I
DD
Operating mode, no load
SHDN = GND
1.13
0.2
70
mA
µA
dB
Shutdown Current
Power-Supply Rejection Ratio
SHUTDOWN
I
SHDN
PSRR
Measured at DC
V
2.5
V
V
SHDN Input High
SDH
V
SDL
0.5
SHDN Input Low
V
= 0 to V
±0.2
±10
µA
SHDN Input Leakage Current
SHDN
DD
ELLIPTIC FILTER (r = 1.6) CHARACTERISTICS—MAX7408/MAX7412
(V = +5V for MAX7408, V = +3V for MAX7412; filter output measured at OUT; 10kΩ || 50pF load to GND at OUT; SHDN = V ;
DD
DD
DD
V
COM
= V = V / 2; f
= 100kHz; T = T
to T
; unless otherwise noted. Typical values are at T = +25°C.) (Note 3)
OS
DD
CLK
A
MIN
MAX
A
PARAMETER
CONDITIONS
MIN
-0.4
-0.4
-0.4
-0.4
-0.7
TYP
-0.2
0.2
MAX
0.4
0.4
0.4
0.4
0.2
-50
-50
-50
UNITS
f
= 0.34f
IN
C
C
C
C
f
IN
= 0.63f
f
IN
= 0.84f
-0.2
0.2
Insertion Gain
with DC Gain Error Removed
(Note 4)
f
IN
= 0.96f
dB
f
IN
= f
-0.2
-53.4
-53.4
-53.4
C
082/MAX7415
f
IN
= 1.60f
C
C
C
f
IN
= 1.90f
f
IN
= 4.62f
4
_______________________________________________________________________________________
5 t h -Ord e r, Lo w p a s s , Ellip t ic ,
S w it c h e d -Ca p a c it o r Filt e rs
082/MAX7415
ELLIPTIC FILTER (r = 1.25) CHARACTERISTICS—MAX7411/MAX7415
(V = +5V for MAX7411, V
= +3V for MAX7415; filter output measured at OUT; 10kΩ || 50pF load to GND at OUT; SHDN = V
DD
DD
DD,
V
= V = V / 2; f
= 100kHz; T = T
to T
; unless otherwise noted. Typical values are at T = +25°C.) (Note 3)
COM
OS
DD
CLK
A
MIN
MAX
A
PARAMETER
CONDITIONS
MIN
-0.4
-0.4
-0.4
-0.4
-0.7
TYP
-0.2
0.2
MAX
0.4
0.4
0.4
0.4
0.2
-34
-35
-35
UNITS
f
= 0.38f
C
IN
f
IN
= 0.68f
C
f
IN
= 0.87f
-0.2
0.2
C
Insertion Gain
with DC Gain Error Removed
(Note 4)
f
IN
= 0.97f
C
dB
f
IN
= f
-0.2
-38.5
-37.2
-37.2
C
f
IN
= 1.25f
C
f
IN
= 1.43f
C
f
IN
= 3.25f
C
Note 1: The maximum f is defined as the clock frequency f
= 100 · f at which the peak SINAD drops to 68dB with a sinusoidal
C
C
CLK
input at 0.2f .
C
Note 2: DC insertion gain is defined as ∆V
/ ∆V .
IN
OUT
3
Note 3: f
(kHz) ≈ 27 · 10 / C
(C
in pF).
OSC
OSC
OSC
Note 4: The input frequencies, f , are selected at the peaks and troughs of the ideal elliptic frequency responses.
IN
Typ ic a l Op e ra t in g Ch a ra c t e ris t ic s
(V
DD
= +5V for MAX7408/MAX7411, V
= +3V for MAX7412/MAX7415; f
= 100kHz; SHDN = V ; V
= V = V / 2;
COM OS
DD
CLK
DD
DD
T
A
= +25°C; unless otherwise noted.)
MAX7408/MAX7412
PASSBAND FREQUENCY RESPONSE
MAX7408/MAX7412
FREQUENCY RESPONSE
MAX7411/MAX7415
FREQUENCY RESPONSE
0.2
0
20
20
0
f = 1kHz
C
r = 1.6
f = 1kHz
r = 1.25
C
0
-20
-0.2
-0.4
-0.6
-0.8
-1.0
-1.2
-20
-40
-60
-80
-100
-120
-40
-60
-80
f = 1kHz
C
r = 1.6
-100
-120
0
204
408
612
816
1.02k
0
1
2
3
4
5
0
1
2
3
4
5
INPUT FREQUENCY (Hz)
INPUT FREQUENCY (kHz)
INPUT FREQUENCY (kHz)
_______________________________________________________________________________________
5
5 t h -Ord e r, Lo w p a s s , Ellip t ic ,
S w it c h e d -Ca p a c it o r Filt e rs
Typ ic a l Op e ra t in g Ch a ra c t e ris t ic s (c o n t in u e d )
(V
DD
= +5V for MAX7408/MAX7411, V
= +3V for MAX7412/MAX7415; f
= 100kHz; SHDN = V ; V
= V = V / 2;
COM OS
DD
CLK
DD
DD
T
A
= +25°C; unless otherwise noted.)
MAX7411/MAX7415
PHASE RESPONSE
MAX7411/MAX7415
PASSBAND FREQUENCY RESPONSE
0.2
MAX7408/MAX7412
PHASE RESPONSE
0
-100
-200
-300
-400
-500
-600
0
-50
f = 1kHz
C
r = 1.25
f = 1kHz
C
r = 1.6
0
-0.2
-0.4
-0.6
-0.8
-1.0
-100
-150
-200
-250
-300
-350
-400
f = 1kHz
C
r = 1.25
-1.2
-1.4
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
INPUT FREQUENCY (kHz)
0
204
408
612
816
1.02k
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
INPUT FREQUENCY (kHz)
INPUT FREQUENCY (Hz)
MAX7408
SUPPLY CURRENT
vs. SUPPLY VOLTAGE
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. INPUT SIGNAL AMPLITUDE
SUPPLY CURRENT vs. TEMPERATURE
1.20
1.19
1.18
1.17
1.16
1.15
1.14
1.13
1.12
1.11
1.10
1.17
1.16
1.15
1.14
1.13
1.12
1.11
0
SEE TABLE A
-10
-20
-30
-40
-50
-60
-70
-80
-90
V
= +5V
= +3V
DD
V
DD
B
4
A
2.5
3.0
3.5
4.0
4.5
5.0
5.5
0
1
2
3
5
-60 -40 -20
0
20 40 60 80 100
SUPPLY VOLTAGE (V)
AMPLITUDE (Vp-p)
TEMPERATURE (°C)
MAX7411
082/MAX7415
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. INPUT SIGNAL AMPLITUDE
0
SEE TABLE A
-10
-20
-30
-40
-50
-60
-70
-80
-90
Table A. THD + Noise Test Conditions
f
f
f
CLK
(kHz)
MEASUREMENT
BANDWIDTH (kHz)
IN
C
LABEL
(Hz)
(kHz)
A
B
200
1k
1
5
100
500
22
80
B
B
A
A
4
0
1
2
3
5
AMPLITUDE (Vp-p)
6
_______________________________________________________________________________________
5 t h -Ord e r, Lo w p a s s ,
Ellip t ic , S w it c h e d -Ca p a c it o r
082/MAX7415
Typ ic a l Op e ra t in g Ch a ra c t e ris t ic s (c o n t in u e d )
(V
DD
= +5V for MAX7408/MAX7411, V
= +3V for MAX7412/MAX7415; f
= 100kHz; SHDN = V ; V
= V = V / 2;
COM OS
DD
CLK
DD
DD
T
A
= +25°C; unless otherwise noted.)
MAX7415
MAX7412
TOTAL HARMONIC DISTORTION PLUS NOISE
TOTAL HARMONIC DISTORTION PLUS NOISE
vs. INPUT SIGNAL AMPLITUDE
vs. INPUT SIGNAL AMPLITUDE
0
0
SEE TABLE A
SEE TABLE A
-10
-20
-30
-40
-50
-60
-70
-80
-90
-10
-20
-30
-40
-50
-60
-70
-80
-90
B
B
B
A
A
A
0
0.5
1.0
1.5
2.0
2.5
3.0
0
0.5
1.0
1.5
2.0
2.5
3.0
AMPLITUDE (Vp-p)
AMPLITUDE (Vp-p)
INTERNAL OSCILLATOR FREQUENCY
vs. SUPPLY VOLTAGE
INTERNAL OSCILLATOR PERIOD
vs. SMALL CAPACITANCE (in pF)
INTERNAL OSCILLATOR PERIOD
vs. LARGE CAPACITANCE (in nF)
27.4
27.3
27.2
27.1
27.0
26.9
26.8
26.7
26.6
120
100
80
60
40
20
0
12
10
8
V
DD
= +5V
V
DD
= +5V
V
DD
= +3V
V
DD
= +3V
6
4
2
C
OSC
= 1000pF
0
2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
SUPPLY VOLTAGE
0
500 1000 1500 2000 2500 3000 3500
CAPACITANCE (pF)
0
50 100 150 200 250 300 350
CAPACITANCE (nF)
DC OFFSET VOLTAGE
vs. SUPPLY VOLTAGE
INTERNAL OSCILLATOR FREQUENCY
vs. TEMPERATURE
DC OFFSET VOLTAGE
vs. TEMPERATURE
28.0
27.5
27.0
26.5
26.0
25.5
0
-0.5
-1.0
-1.5
-2.0
-2.5
-3.0
-3.5
0
-0.5
-1.0
-1.5
-2.0
-2.5
-3.0
-3.5
-4.0
V
= +3V
DD
V
= +3V
DD
V
DD
= +5V
V
DD
= +5V
C
OSC
= 1000pF
-50 -30 -10 10 30 50 70 90 110
TEMPERATURE (°C)
-40 -20
0
20
40
60
80 100
2.5
3.0
3.5
4.0
4.5
5.0
5.5
TEMPERATURE (°C)
SUPPLY VOLTAGE (V)
_______________________________________________________________________________________
7
5 t h -Ord e r, Lo w p a s s , Ellip t ic ,
S w it c h e d -Ca p a c it o r Filt e rs
P in De s c rip t io n
PIN
NAME
FUNCTION
Common Input Pin. Biased internally at mid-supply. Bypass externally to GND with 0.1µF capacitor. To
override internal biasing, drive with an external supply.
1
COM
2
3
4
5
IN
Filter Input
GND
Ground
V
DD
Positive Supply Input, +5V for MAX7408/MAX7411 or +3V for MAX7412/MAX7415
Filter Output
OUT
OS
Offset Adjust Input. To adjust output offset, bias OS with a resistive voltage-divider between an external
supply and ground. Connect OS to COM if no offset adjustment is needed.
6
7
8
Shutdown Input. Drive low to enable shutdown mode; drive high or connect to V for normal operation.
DD
SHDN
CLK
Clock Input. Connect an external capacitor (C
frequency. To override the internal oscillator, connect to an external clock.
) from CLK to GND to set the internal oscillator
OSC
because each component affects the entire filter shape
De t a ile d De s c rip t io n
rather than a single pole-zero pair. In other words, a
mismatched component in a biquadratic design has a
concentrated error on its respective poles, while the
same mismatch in a ladder filter design spreads its
error over all poles.
The MAX7408/MAX7411/MAX7412/MAX7415 family of
5th-order, elliptic, lowpass filters provides sharp rolloff
with good stopband rejection. All parts operate with a
100:1 clock-to-corner frequency ratio and a 15kHz
maximum corner frequency.
Ellip t ic Ch a ra c t e ris t ic s
Lowpass elliptic filters such as the MAX7408/MAX7411/
MAX7412/MAX7415 p rovid e the s te e p e s t p os s ib le
rolloff with frequency of the four most common filter
types (Butterworth, Bessel, Chebyshev, and elliptic).
The high Q value of the poles near the passband edge
combined with the stopband zeros allows for the sharp
attenuation characteristic of elliptic filters, making these
devices ideal for anti-aliasing and post-DAC filtering in
single-supply systems (see the Anti-Aliasing and Post-
DAC Filtering section).
Most switched-capacitor filters (SCFs) are designed
with biquadratic sections. Each section implements two
pole-zero pairs, and the sections can be cascaded to
produce higher order filters. The advantage to this
a p p roa c h is e a s e of d e s ig n. Howe ve r, this typ e of
d e s ig n is hig hly s e ns itive to c omp one nt va ria tions
if any section’s Q is high. The MAX7408/MAX7411/
MAX7412/MAX7415 use an alternative approach, which
is to emulate a passive network using switched-capaci-
tor integrators with summing and scaling. The passive
network may be synthesized using CAD programs, or
may be found in many filter books. Figure 1 shows a
basic 5th-order ladder elliptic filter structure.
In the frequency domain, the first transmission zero
causes the filter’s amplitude to drop to a minimum level.
Beyond this zero, the response rises as the frequency
increases until the next transmission zero. The stop-
082/MAX7415
A switched-capacitor filter that emulates a passive lad-
der filter retains many of the same advantages. The
component sensitivity of a passive ladder filter is low
when compared to a cascaded biquadratic design,
band begins at the stopband frequency, f . At frequen-
S
cies above f , the filter’s gain does not exceed the gain
S
at f . The corner frequency, f , is defined as the point
S
C
where the filter output attenuation falls just below the
passband ripple. The transition ratio (r) is defined as
the ratio of the stopband frequency to the corner fre-
quency:
C2
L2
C4
L4
R
S
r = f / f
S
C
+
-
The MAX7408/MAX7412 have a translation ratio of 1.6
a nd typ ic a lly 53d B of s top b a nd re je c tion. The
MAX7411/MAX7415 have a transition ratio of 1.25 (pro-
viding a steeper rolloff) and typically 37dB of stopband
rejection.
V
IN
C1
C3
C5
R
L
Figure 1. 5th-Order Ladder Elliptic Filter Network
8
_______________________________________________________________________________________
5 t h -Ord e r, Lo w p a s s , Ellip t ic ,
S w it c h e d -Ca p a c it o r Filt e rs
082/MAX7415
V
SUPPLY
RIPPLE
0.1µF
V
DD
f
C
SHDN
OUT
f
f
C
S
TRANSITION RATIO =
OUTPUT
INPUT
IN
COM
0.1µF
0.1µF
50k
f
S
MAX7408
MAX7411
MAX7412
MAX7415
50k
50k
CLOCK
CLK
OS
GND
PASSBAND
STOPBAND
FREQUENCY
f
C
f
S
Figure 2. Elliptic Filter Response
Figure 3. Offset Adjustment Circuit
Estimate the input impedance of the filter by using the
following formula:
Clo c k S ig n a l
External Clock
These SCFs are designed for use with external clocks
that have a 40% to 60% duty cycle. When using an
external clock, drive the CLK pin with a CMOS gate
1
Z
=
IN
(f
C )
IN
CLK
powered from 0 to V . Varying the rate of the external
clock adjusts the corner frequency of the filter:
DD
where f
= clock frequency and C = 1pF.
IN
CLK
Lo w -P o w e r S h u t d o w n Mo d e
f
CLK
The MAX7408/MAX7411/MAX7412/MAX7415 have a
shutdown mode that is activated by driving SHDN low.
In shutdown mode, the filter supply current reduces to
0.2µA, and the output of the filter becomes high imped-
ance. For normal operation, drive SHDN high or con-
f
=
C
100
Internal Clock
When using the internal oscillator, the capacitance
(C
) on CLK determines the oscillator frequency:
nect to V
.
OSC
DD
3
27 10
Ap p lic a t io n s In fo rm a t io n
Offs e t (OS ) a n d Co m m o n -Mo d e (COM)
In p u t Ad ju s t m e n t
f
(kHz) =
OSC
C
(pF)
OSC
Since C
is in the low picofarads, minimize the stray
OSC
COM s e ts the c ommon-mod e inp ut volta g e a nd is
biased at mid-supply with an internal resistor-divider. If
the application does not require offset adjustment, con-
nect OS to COM. For applications where offset adjust-
me nt is re q uire d , a p p ly a n e xte rna l b ia s volta g e
through a resistor-divider network to OS, as shown in
Figure 3. For applications that require DC level shifting,
adjust OS with respect to COM. (Note: Do not leave OS
unconnected.) The output voltage is represented by
these equations:
capacitance at CLK so that it does not affect the inter-
nal oscillator frequency. Varying the rate of the internal
osc illa tor a d justs the filte r’s c orne r fre q ue nc y by a
100:1 clock-to-corner frequency ratio. For example, an
internal oscillator frequency of 100kHz produces a
nominal corner frequency of 1kHz.
In p u t Im p e d a n c e vs . Clo c k Fre q u e n c ie s
The MAX7408/MAX7411/MAX7412/MAX7415’s input
impedance is effectively that of a switched-capacitor
resistor (see the following equation), and is inversely
proportional to frequency. The input impedance values
determined by the equation represent the average input
impedance, since the input current is not continuous. As
a rule, use a driver with an output resistance less than
10% of the filter’s input impedance.
V
= (V − V
) + V
OUT
IN
COM OS
V
DD
V
=
(typical)
) is lowpass filtered by the SCF and
COM
COM
2
where (V - V
IN
OS is added at the output stage. See the Electrical
_______________________________________________________________________________________
9
5 t h -Ord e r, Lo w p a s s , Ellip t ic ,
S w it c h e d -Ca p a c it o r Filt e rs
to the system ground and GND to the negative supply.
V+
Figure 4 shows an example of dual-supply operation.
Single-supply and dual-supply performance are equiv-
alent. For either single-supply or dual-supply operation,
drive CLK and SHDN from GND (V- in dual supply
*
V
DD
SHDN
OUT
op e ra tion) to V . Us e the MAX7408/MAX7411 for
DD
OUTPUT
±2.5, and use the MAX7412/MAX7415 for ±1.5V. For
± 5V d ua l-s up p ly a p p lic a tions , s e e the MAX291/
MAX292/MAX295/MAX296 a nd MAX293/MAX294/
MAX297 data sheets.
INPUT
IN
COM
MAX7408
MAX7411
MAX7412
MAX7415
V+
V-
In p u t S ig n a l Am p lit u d e Ra n g e
The optimal input signal range is determined by observ-
ing the voltage level at which the signal-to-noise plus
distortion (SINAD) ratio is maximized for a given corner
frequency. The Typical Operating Characteristics show
the THD+Noise response as the input signal’s peak-to-
peak amplitude is varied.
CLOCK
CLK
OS
0.1µF
0.1µF
GND
V-
An t i-Alia s in g a n d P o s t -DAC Filt e rin g
Whe n us ing the MAX7408/MAX7411/MAX7412/
MAX7415 for anti-aliasing or post-DAC filtering, syn-
chronize the DAC (or ADC) and the filter clocks. If the
clocks are not synchronized, beat frequencies may
alias into the desired passband.
*CONNECT SHDN TO V- FOR LOW-POWER SHUTDOWN MODE.
Figure 4. Dual-Supply Operation
Characteristics table for the input voltage range of COM
and OS. Changing the voltage on COM or OS signifi-
cantly from mid-supply reduces the dynamic range.
Ha rm o n ic Dis t o rt io n
Harmonic distortion arises from nonlinearities within the
filter. These nonlinearities generate harmonics when a
pure sine wave is applied to the filter input. Table 1 lists
typical harmonic distortion values with a 10kΩ load at
P o w e r S u p p lie s
The MAX7408/MAX7411 operate from a single +5V
supply and the MAX7412/MAX7415 operate from a sin-
g le +3V s up p ly. Byp a s s V
to GND with a 0.1µF
DD
capacitor. If dual supplies are required, connect COM
T = +25°C.
A
Table 1. Typical Harmonic Distortion
TYPICAL HARMONIC DISTORTION (dB)
f
f
V
CLK
IN
IN
FILTER
MAX7408
MAX7411
MAX7412
MAX7415
(kHz)
(Hz)
(Vp-p)
2nd
-85.5
-88.2
-90
3rd
-78.4
-83.1
-80
4th
-92.8
-93
5th
-86.9
-89.5
-88
500
100
500
100
500
100
500
100
1k
200
1k
082/MAX7415
4
4
2
2
-92
200
1k
-88
-86
-92
-88
-86.6
-88.2
-87
-93.1
-85.1
-86
-90
-85.6
-85.7
-90
200
1k
-88.9
-90
200
-90
-87
-90
-90
10 ______________________________________________________________________________________
5 t h -Ord e r, Lo w p a s s , Ellip t ic ,
S w it c h e d -Ca p a c it o r Filt e rs
082/MAX7415
Ch ip In fo rm a t io n
TRANSISTOR COUNT: 1457
________________________________________________________P a c k a g e In fo rm a t io n
______________________________________________________________________________________ 11
5 t h -Ord e r, Lo w p a s s , Ellip t ic ,
S w it c h e d -Ca p a c it o r Filt e rs
P a c k a g e In fo rm a t io n (c o n t in u e d )
082/MAX7415
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
12 ____________________Ma x im In t e g ra t e d P ro d u c t s , 1 2 0 S a n Ga b rie l Drive , S u n n yva le , CA 9 4 0 8 6 4 0 8 -7 3 7 -7 6 0 0
© 1998 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products.
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