MAX7490_09 [MAXIM]
Dual Universal Switched-Capacitor Filters; 双路，通用开关电容滤波器
| 型号： | MAX7490_09 |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | Dual Universal Switched-Capacitor Filters |
| 文件： | 总18页 (文件大小：240K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
19-1768; Rev 1; 4/09
Dual Universal Switched-Capacitor Filters
0/MAX7491
General Description
Features
The MAX7490/MAX7491 consist of two identical low-
power, low-voltage, wide dynamic range, rail-to-rail,
2nd-order switched-capacitor building blocks. Each of
the two filter sections, together with two to four external
resistors, can generate all standard 2nd-order func-
tions: bandpass, lowpass, highpass, and notch (band
reject). Three of these functions are simultaneously
available. Fourth-order filters can be obtained by cas-
cading the two 2nd-order filter sections. Similarly, high-
er order filters can easily be created by cascading
multiple MAX7490/MAX7491s.
o Dual 2nd-Order Filter in a 16-Pin QSOP Package
o High Accuracy
Q Accuracy: 0.2%
Clock-to-Center Frequency Error: 0.2%
o Rail-to-Rail Input and Output Operation
o Single-Supply Operation: +5V (MAX7490)
or +3V (MAX7491)
o Internal or External Clock
o Highpass, Lowpass, Bandpass, and Notch Filters
o Clock-to-Center Frequency Ratio of 100:1
Two clocking options are available: self-clocking
(through the use of an external capacitor) or external
clocking for tighter cutoff frequency control. The clock-
to-center frequency ratio is 100:1. Sampling is done at
twice the clock frequency, further separating the cutoff
frequency and Nyquist frequency.
o Internal Sampling-to-Center Frequency Ratio
of 200:1
o Center Frequency up to 40kHz
The MAX7490/MAX7491 have an internal rail splitter
that establishes a precise common voltage needed for
single-supply operation. The MAX7490 operates from a
single +5V supply and the MAX7491 operates from a
single +3V supply. Both devices feature a low-power
shutdown mode and come in a 16-pin QSOP package.
o Easily Cascaded for Multipole Filters
o Low-Power Shutdown: < 1µA Supply Current
Ordering Information
SUPPLY
VOLTAGE
(+V)
________________________Applications
PIN-
PACKAGE
PART
TEMP RANGE
Tunable Active Filters
Multipole Filters
MAX7490CEE+
MAX7490EEE+
MAX7491CEE+
MAX7491EEE+
0°C to +70°C 16 QSOP
-40°C to +85°C 16 QSOP
0°C to +70°C 16 QSOP
-40°C to +85°C 16 QSOP
5
5
3
3
ADC Anti-Aliasing
Post-DAC Filtering
Adaptive Filtering
Phase-Locked Loops (PLLs)
Set-Top Boxes
+Denotes a lead(Pb)-free/RoHS-compliant package.
Pin Configuration
TOP VIEW
+
LPA
BPA
1
2
3
4
5
6
7
8
16 LPB
15 BPB
NA/HPA
INVA
14 NB/HPB
Typical Application Circuit appears at end of data sheet.
MAX7490
MAX7491
13 INVB
12 SB
SA
SHDN
GND
11 COM
10 EXTCLK
V
9
CLK
DD
QSOP
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
Dual Universal Switched-Capacitor Filters
ABSOLUTE MAXIMUM RATINGS
V
DD
to GND..............................................................-0.3V to +6V
Operating Temperature Range
EXTCLK, SHDN to GND ...........................................-0.3V to +6V
MAX749_CEE .....................................................0°C to +70°C
MAX749_EEE...................................................-40°C to +85°C
Die Temperature ..............................................................+150°C
Storage Temperature.........................................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
INV_, LP_, BP_, N_/HP_, S_, COM,
CLK to GND............................................-0.3V to (V
+ 0.3V)
DD
Maximum Current into Any Pin ...........................................50mA
Continuous Power Dissipation (T = +70°C)
A
16-Pin QSOP (derate 8.30mW/°C above +70°C).........667mW
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS—MAX7490
(V
= V
= +5V; f
= 625kHz; 10kΩ || 50pF load to V /2 at LP_, BP_, and N_/HP_; V
= V ; 0.1µF from COM to
SHDN DD
EXTCLK
DD
CLK
DD
GND; 50% duty-cycle clock input; COM = V /2; T = T
to T
. Typical values are at T = +25°C, unless otherwise noted.)
MAX A
DD
A
MIN
(Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
FILTER
0/MAX7491
0.001 to
40
Center Frequency Range
f
Mode 1
kHz
%
O
Clock-to-Center Frequency
Accuracy
Mode 1, R1 = R3 = 50kΩ , R2 = 10kΩ,
Q = 5, deviation from 100:1
f
/f
0.2
0.7
2
CLK O
Q Accuracy
Mode 1, R1 = R3 = 50kΩ, R2 = 10kΩ, Q = 5
0.2
1
%
f
O
Temperature Coefficient
ppm/°C
ppm/°C
%
Q Temperature Coefficient
DC Lowpass Gain Accuracy
5
Mode 1, R1 = R2 = 10kΩ
DC offset of input inverter
DC offset of 1st integrator
DC offset of 2nd integrator
0.1
3
0.5
12.5
15
V
V
V
OS1
OS2
OS3
DC Offset Voltage (Figure 8)
Crosstalk (Note 2)
4
mV
dB
4
30
f
= 10kHz
-60
IN
V
- 0.5
/2
V
+ 0.5
/2
DD
DD
Input: COM externally driven
Output: COM internally driven
V
V
/2
DD
DD
COM Voltage Range
V
V
COM
V
- 0.2
/2
DD
V
+ 0.2
/2
DD
/2
Input Resistance at COM
Clock Feedthrough
R
140
250
200
325
kΩ
COM
Up to 5th harmonic of f
μV
CLK
RMS
RMS
V
Mode 1, R1 = R2 = R3 =10kΩ, LP output,
Q = 1
Noise (Note 3)
60
μV
Output Voltage Swing
Input Leakage Current at COM
CLOCK
0.2
V
- 0.2
DD
SHDN = GND, V
= 0 to V
0.1
10
μA
COM
DD
Maximum Clock Frequency
f
4
MHz
kHz
MHz
V
CLK
EXTCLK = GND, C
EXTCLK = GND, C
= 1000pF
= 100pF
95
135
1.35
175
OSC
Internal Oscillator Frequency
(Note 4)
f
OSC
OSC
Clock Input High
V
- 0.5
DD
2
_______________________________________________________________________________________
Dual Universal Switched-Capacitor Filters
0/MAX7491
ELECTRICAL CHARACTERISTICS—MAX7490 (continued)
(V
= V
= +5V; f
= 625kHz; 10kΩ || 50pF load to V /2 at LP_, BP_, and N_/HP_; V
= V ; 0.1µF from COM to
SHDN DD
EXTCLK
DD
CLK
DD
GND; 50% duty-cycle clock input; COM = V /2; T = T
to T
. Typical values are at T = +25°C, unless otherwise noted.)
MAX A
DD
A
MIN
(Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Clock Input Low
Clock Duty Cycle
SHDN AND EXTCLK
Input High
0.5
V
50
5
%
V
V
- 0.5
DD
V
V
IH
Input Low
V
0.5
10
IL
Input Leakage Current
POWER REQUIREMENTS
Supply Voltage
V
= 0 to V
0.4
3.5
μA
INPUT
DD
V
4.5
5.5
4.0
1
V
DD
No external load, mode 1, R1 = R3 = 50kΩ,
R2 = 10kΩ, Q = 5
Power-Supply Current
I
mA
μA
DD
Shutdown Current
I
SHDN = GND
SHDN
INTERNAL OP AMPS CHARACTERISTICS
Output Short-Circuit Current
18
130
7
mA
dB
DC Open-Loop Gain
R
L
R
L
R
L
≥ 10kΩ, C ≤ 50pF
L
Gain Bandwidth Product
Slew Rate
GBW
SR
≥ 10kΩ, C ≤ 50pF
MHz
V/μs
L
≥ 10kΩ, C ≤ 50pF
6.4
L
_______________________________________________________________________________________
3
Dual Universal Switched-Capacitor Filters
ELECTRICAL CHARACTERISTICS—MAX7491
(V
= V
= +3V; f
= 625kHz; 10kΩ || 50pF load to V /2 at LP_, BP_, and N_/HP_; V
= V ; 0.1µF from COM to
SHDN DD
EXTCLK
DD
CLK
DD
GND; 50% duty-cycle clock input; COM = V /2; T = T
to T
. Typical values are at T = +25°C, unless otherwise noted.)
MAX A
DD
A
MIN
(Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
FILTER
0.001 to
40
Center Frequency Range
f
Mode 1
kHz
%
O
Clock-to-Center Frequency
Accuracy
Mode 1, R1 = R3 = 50kΩ , R2 = 10kΩ,
Q = 5, deviation from 100:1
f
/f
0.2
0.2
0.7
2
CLK O
Mode 1, R1 = R3 = 50kΩ, R2 = 10kΩ,
Q = 5
Q Accuracy
%
f
Temperature Coefficient
1
5
ppm/°C
ppm/°C
%
O
Q Temperature Coefficient
DC Lowpass Gain Accuracy
Mode 1, R1 = R2 = 10kΩ
DC offset of input inverter
DC offset of 1st integrator
DC offset of 2nd integrator
0.1
3
0.5
12.5
15
0/MAX7491
V
V
V
OS1
OS2
OS3
DC Offset Voltage
(Figure 8)
4
mV
dB
4
25
Crosstalk (Note 2)
f
= 10kHz
-60
IN
V
- 0.1
/2
V
+ 0.1
/2
DD
DD
Input: COM externally driven
Output: COM internally driven
V
V
/2
DD
COM Voltage Range
V
V
COM
V
- 0.1
/2
DD
V
+ 0.1
/2
DD
/2
DD
80
Input Resistance at COM
Clock Feedthrough
R
60
0.2
95
120
kΩ
COM
Up to 5th harmonic of f
200
μV
RMS
CLK
Mode 1, R1= R2 = R3 = 10kΩ,
LP output, Q = 1
Noise (Note 3)
60
μV
RMS
V
Output Voltage Swing
Input Leakage Current at COM
CLOCK
V
DD
- 0.2
SHDN = GND, V
= 0 to V
0.1
10
μA
COM
DD
Maximum Clock Frequency
f
4
MHz
kHz
MHz
V
CLK
EXTCLK = GND, C
EXTCLK = GND, C
= 1000pF
= 100pF
135
1.35
175
0.5
OSC
Internal Oscillator Frequency
(Note 4)
f
OSC
OSC
Clock Input High
Clock Input Low
Clock Duty Cycle
SHDN AND EXTCLK
Input High
V
V
- 0.5
DD
V
50
5
%
V
- 0.5
V
V
IH
DD
Input Low
V
0.5
10
IL
Input Leakage Current
V
= 0 to V
0.4
μA
INPUT
DD
4
_______________________________________________________________________________________
Dual Universal Switched-Capacitor Filters
0/MAX7491
ELECTRICAL CHARACTERISTICS—MAX7491 (continued)
(V
= V
= +3V; f
= 625kHz; 10kΩ || 50pF load to V /2 at LP_, BP_, and N_/HP_; V
= V ; 0.1µF from COM to
SHDN DD
EXTCLK
DD
CLK
DD
GND; 50% duty-cycle clock input; COM = V /2; T = T
to T
. Typical values are at T = +25°C, unless otherwise noted.)
MAX A
DD
A
MIN
(Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
POWER REQUIREMENTS
Supply Voltage
V
2.7
3.6
4.0
1
V
DD
No load, mode 1, R1 = R3 = 50kΩ,
R2 = 10kΩ, Q = 5
Power-Supply Current
I
3.5
mA
μA
DD
Shutdown Current
I
SHDN = GND
SHDN
INTERNAL OP AMPS CHARACTERISTICS
Output Short-Circuit Current
11
130
7
mA
dB
DC Open-Loop Gain
R ≥ 10kΩ, C ≤ 50pF
L L
Gain Bandwidth Product
Slew Rate
GBW
SR
R ≥ 10kΩ, C ≤ 50pF
MHz
V/μs
L
L
L
R
≥ 10kΩ, C ≤ 50pF
6
L
Note 1: Resistive loading of the N_/HP_, LP_, BP_ outputs includes the resistors used for the filter implementation.
Note 2: Crosstalk between internal filter sections is measured by applying a 1V 10kHz signal to one bandpass filter section input
RMS
and grounding the input of the other bandpass filter section. The crosstalk is the ratio between the output of the grounded
filter section and the 1V input signal of the other section.
RMS
Note 3: Bandwidth of noise measurement is 80kHz.
3
Note 4: f
(kHz) = 135 x 10 / C
(C
in pF)
OSC
OSC
OSC
Typical Operating Characteristics
(V = +5V for MAX7490, V = +3V for MAX7491, f
= 625kHz, V
= V
= V , COM = V /2, Mode 1, R3 = R1 = 50kΩ,
DD
DD
CLK
SHDN
EXTCLK DD DD
R2 = 10kΩ, Q = 5, T = +25°C, unless otherwise noted.)
A
2ND-ORDER BANDPASS FILTER
FREQUENCY RESPONSE
2ND-ORDER BANDPASS FILTER
PHASE RESPONSE
CLOCK-TO-CENTER FREQUENCY
DEVIATION vs. CLOCK FREQUENCY
10
300
250
200
0
-0.1
-0.2
-0.3
-0.4
-0.5
-0.6
0
-10
-20
-30
-40
V
= 5V
DD
V
= 3V
DD
150
100
50
V
f
= +5V
DD
-50
-60
-0.7
-0.8
= 625kHz
CLK
Q = 5
0
1
10
100
1
10
100
100
1000
f (kHz)
CLK
10,000
FREQUENCY (kHz)
FREQUENCY (kHz)
_______________________________________________________________________________________
5
Dual Universal Switched-Capacitor Filters
Typical Operating Characteristics (continued)
(V = +5V for MAX7490, V = +3V for MAX7491, f
= 625kHz, V
= V
= V , COM = V /2, Mode 1, R3 = R1 = 50kΩ,
DD
DD
CLK
SHDN
EXTCLK DD DD
R2 = 10kΩ, Q = 5, T = +25°C, unless otherwise noted.)
A
CLOCK-TO-CENTER FREQUENCY
DEVIATION vs. Q
CLOCK-TO-CENTER FREQUENCY
DEVIATION vs. TEMPERATURE
Q DEVIATION vs. CLOCK FREQUENCY
1
0
0.2
0.1
0.7
0.6
0.5
0.4
0.3
V
= 5V
DD
V
= 5V
DD
0
-1
V
= 3V
DD
0.2
0.1
0
-0.1
-0.2
-0.3
-0.4
-0.5
-0.6
-0.1
-0.2
-0.3
-0.4
-0.5
-0.6
V
= 3V
DD
-2
-3
-4
-5
-6
-0.7
100
1000
(kHz)
10,000
0
20
40
60
80
100
-40
-15
10
35
60
85
0/MAX7491
f
CLK
Q
TEMPERATURE (°C)
Q DEVIATION vs. TEMPERATURE
NOISE vs. Q
SUPPLY CURRENT vs. TEMPERATURE
500
450
400
350
300
250
200
150
100
50
2.0
1.5
3.7
3.6
3.5
3.4
3.3
3.2
3.1
3.0
1.0
0.5
0
V
= 3V
DD
V
= 5V
DD
-0.5
-1.0
-1.5
-2.0
0
-40
-15
10
35
60
85
0
20
40
60
80
100
-40
-15
10
35
60
85
TEMPERATURE (°C)
Q
TEMPERATURE (°C)
MAX7491
THD + NOISE vs. FREQUENCY
SUPPLY CURRENT vs. SUPPLY VOLTAGE
SUPPLY CURRENT vs. SUPPLY VOLTAGE
4.0
3.9
3.8
3.7
3.6
3.5
3.4
3.3
3.2
3.1
3.0
-20
-30
3.41
3.40
3.39
3.38
3.37
3.36
3.35
3.34
3.33
3.32
A = MODE 1
B = MODE 3
-40
+85°C
-50
f
= 3MHz
CLK
-60
B
A
f
= 625kHz
-70
CLK
+25°C
-40°C
-80
-90
f
= 2kHz
CLK
-100
-110
-120
3.0
3.5
4.0
4.5
(V)
5.0
5.5
3.0
3.5
4.0
4.5
(V)
5.0
5.5
1k
10k
V
V
INPUT FREQUENCY (Hz)
DD
DD
6
_______________________________________________________________________________________
Dual Universal Switched-Capacitor Filters
0/MAX7491
Typical Operating Characteristics (continued)
(V = +5V for MAX7490, V = +3V for MAX7491, f
= 625kHz, V
= V
= V , COM = V /2, Mode 1, R3 = R1 = 50kΩ,
DD
DD
CLK
SHDN
EXTCLK DD DD
R2 = 10kΩ, Q = 5, T = +25°C, unless otherwise noted.)
A
MAX7490
MAX7491
MAX7490
THD + NOISE vs. FREQUENCY
THD + NOISE vs. INPUT VOLTAGE
THD + NOISE vs. INPUT VOLTAGE
-20
-30
-10
-20
-30
-40
-50
-60
-70
-80
-90
-10
-20
-30
-40
-50
-60
-70
-80
-90
A = MODE 1
B = MODE 3
A = MODE 1
B = MODE 3
A = MODE 1
B = MODE 3
-40
-50
-60
B
A
-70
-80
B
A
-90
B
-100
-110
-120
A
1k
10k
0
0.5
1.0
1.5
2.0
2.5
3.0
0
1
2
3
4
5
INPUT FREQUENCY (Hz)
INPUT VOLTAGE (Vp-p)
INPUT VOLTAGE (Vp-p)
OUTPUT VOLTAGE SWING
vs. LOAD RESISTANCE
INTERNAL OSCILLATOR PERIOD
vs. LARGE CAPACITANCE
INTERNAL OSCILLATOR PERIOD
vs. SMALL CAPACITANCE
5.0
160
140
120
100
80
2500
2000
1500
1000
500
4.5
4.0
3.5
3.0
2.5
2.0
V
= 5V
= 3V
DD
DD
V
V
= 3V
DD
60
V
= 3V
DD
40
V
= 5V
2
DD
20
V
= 5V
DD
0
0
0
4
8
12
16
20
1
3
4
5
6
7
0
200
400
600
800
1000
R
(kΩ) TO COM
CAPACITANCE (nF)
CAPACITANCE (pF)
LOAD
INTERNAL OSCILLATOR FREQUENCY
vs. TEMPERATURE
INTERNAL OSCILLATOR FREQUENCY
vs. SUPPLY VOLTAGE
144
142
140
138
136
134
132
130
128
126
124
133
132
131
130
129
128
127
126
C
= 1000pF
C
= 1000pF
OSC
OSC
V
= 3V
DD
V
= 5V
DD
-40
-15
10
35
60
85
3.0
3.5
4.0
4.5
(V)
5.0
5.5
TEMPERATURE (°C)
V
DD
_______________________________________________________________________________________
7
Dual Universal Switched-Capacitor Filters
Pin Description
NAME
PIN
FUNCTION
FILTER A
FILTER B
LP_
BP_
1
2
3
4
16
15
14
13
2nd-Order Lowpass Filter Output
2nd-Order Bandpass Filter Output
N_/HP_
INV_
2nd-Order Notch/Highpass Filter Output
Inverting Input of Filter Summing Op Amp
Summing Input. The connection of the summing input, along with the other
resistor connections, determine the circuit topology (mode) of each 2nd-
order section. S_ must never be left unconnected.
S_
5
12
Shutdown Input. Drive SHDN low to enable shutdown mode; drive SHDN
SHDN
6
7
high or connect to V
for normal operation.
DD
GND
Ground Pin
0/MAX7491
Positive Supply. Bypass V
supply is recommended. Input +5V for MAX7490 or +3V for MAX7491.
with a 0.1µF capacitor to GND. A low-noise
DD
V
8
9
DD
Clock Input. Connect CLK to an external capacitor (C ) between CLK and
OSC
ground to set the internal oscillator frequency. For external clock operation,
drive CLK with a CMOS-level clock. The duty cycle of the external clock
should be between 45% and 55% for best performance.
CLK
External/Internal Clock Select Input. Connect EXTCLK to V
CLK externally. Connect EXTCLK to GND when using the internal oscillator.
when driving
DD
EXTCLK
COM
10
11
Common Pin. Biased internally at V /2. Bypass externally to GND with
DD
0.1µF capacitor. To override the internal biasing, drive COM with an external
low-impedance source.
the external clock adjusts the center frequency of the
_______________Detailed Description
filter:
The MAX7490/MAX7491 are universal switched-capaci-
f
O
= f
/100
CLK
tor filters designed with a fixed internal f /f ratio of
CLK O
100:1. Operating modes use external resistors connect-
ed in different arrangements to realize different filter
functions (highpass, lowpass, bandpass, notch) in all of
the classical filter topologies (Butterworth, Bessel, ellip-
tic, Chebyshev). Figure 1 shows a block diagram.
Internal Clock
When using the internal oscillator, drive the EXTCLK pin
low or connect to GND and connect a capacitor (C
)
OSC
between CLK and GND. The value of the capacitor
(C
) determines the oscillator frequency as follows:
3
OSC
Clock Signal
f
(kHz) = 135 x 10 / C
(pF)
OSC
OSC
External Clock
The MAX7490/MAX7491 switched-capacitor filters are
designed for use with external clocks that have a 50%
5% duty cycle. When using an external clock, drive
Since C
is in the low picofarads, minimize the stray
OSC
capacitance at CLK so that it does not affect the inter-
nal oscillator frequency. Varying the frequency of the
internal oscillator adjusts the filter’s center frequency by
a 100:1 clock-to-center frequency ratio. For example,
an internal oscillator frequency of 135kHz produces a
nominal center frequency of 1.35kHz.
the EXTCLK pin high or connect to V . Drive CLK with
DD
CMOS logic levels (GND and V ). Varying the rate of
DD
8
_______________________________________________________________________________________
Dual Universal Switched-Capacitor Filters
0/MAX7491
(6)
SHDN
V
DD
(8)
BPA (2)
LPA (1)
NA/HPA (3)
INVA (4)
+
R
R
Σ
∫
∫
∫
∫
-
COM (11)
NB/HPB (14)
BPB (15)
LPB (16)
SA (5)
+
Σ
INVB (13)
-
GND (7)
CLK (9)
SB (12)
EXTCLK (10)
Figure 1. Block Diagram
notch (band-reject) functions. Three of these functions
are simultaneously available. The maximum signal
swing is limited by the power-supply voltages used.
The amplifiers’ outputs in the MAX7490/MAX7491 are
able to swing to within approximately 0.2V of either
supply.
2nd-Order Filter Stage
The MAX7490/MAX7491 are dual biquad filters. The
biquad topology allows the use of standard filter tables
and equations to implement simultaneous lowpass,
bandpass, and notch or highpass filters. Topologies
such as Butterworth, Chebyshev, Bessel, elliptic, as
well as custom algorithms are possible.
Driving coaxial cable, large capacitive loads, or total
resistive loads less than 10kΩ will degrade the total
harmonic distortion (THD) performance. Note that the
effective resistive load at the output must include both
the feedback resistors and any external load resistors.
Internal Common Voltage
The COM pin sets the common-mode input voltage and
is internally biased to V /2 with a resistor-divider. The
DD
resistors used are typically 250kΩ for the MAX7490,
and typically 80kΩ for the MAX7491. The common-
mode voltage is easily overdriven by an external volt-
age supply if desired. Bypass COM to the analog
ground with at least a 0.1µF capacitor.
Low-Power Shutdown Mode
The MAX7490/MAX7491 have a shutdown mode that is
activated by driving SHDN low. In shutdown mode, the
filter supply current reduces to < 1µA (max), and the fil-
ter outputs become high impedance. The COM input
also becomes high impedance during shutdown. For
Inverting Inputs
Locate resistors that are connected to INV_ as close as
possible to INV_ to reduce stray capacitance and noise
pickup. INV_ are inverting inputs to continuous-time op
amps, and behave like a virtual ground. There is no
sampling energy present on these inputs.
normal operation, drive SHDN high or connect to V
.
DD
__________Applications Information
Designing with the MAX7490/MAX7491 begins by
selecting the mode that best fits the desired circuit
requirements. Table 1 lists the available modes and
their relative advantages and disadvantages. Table 2
lists the different nomenclature used in the explanations
that follow.
Outputs
Each switched-capacitor section, together with two to
four external resistors, can generate all standard 2nd-
order functions: bandpass, lowpass, highpass, and
_______________________________________________________________________________________
9
Dual Universal Switched-Capacitor Filters
Table 1. Filter Operating Modes
MODE
LP
HP
BP
N
LP-N
*
HP-N
*
COMMENTS
/f ratio is the nominal value. Good for bandpass filters
f
CLK O
1
•
•
•
with identical sections cascaded, higher order Butterworth filters,
high-Q bandpass, low-Q notches.
Same as Mode 1 with f
value.
/f ratios greater than the nominal
CLK O
1B
2
•
•
•
•
•
•
Combination of Mode 1 and Mode 3; f
less than the nominal value. Less sensitivity to resistor tolerances
than Mode 3.
/f ratios always
CLK O
Extension of Mode 2 that allows higher frequencies. Highpass
and lowpass outputs are summed with external op amp and
two resistors. Good for lowpass elliptic filters.
2N
3
•
•
Adjustable f above and below the nominal frequency.
O
Commonly used for multiple-pole Chebyshev filters, all-pole
higher order bandpass, lowpass, and highpass filters.
•
•
•
•
•
•
0/MAX7491
Extension of Mode 3 that needs an external op amp and
two additional resistors. Commonly used for lowpass or higher
elliptic or Cauer filters.
3A
•
*LP-N = lowpass notch, HP-N = highpass notch. Both require an external op amp. See Definition of Terms (Table 2).
Table 2. Definition of Terms
TERM
DEFINITION
f
The clock frequency applied to the switched-capacitor filter.
CLK
The center frequency of the 2nd-order complex pole pair, f , is determined by measuring the peak response
O
frequency at the bandpass output.
f
O
f
The frequency of minimum amplitude response at the notch output.
NOTCH
Quality factor, or Q, is the ratio of f to the -3dB bandwidth of the 2nd-order bandpass filter. Q also determines
O
the amount of amplitude peaking at the lowpass and highpass outputs, but is not measured at these outputs.
Q
H
H
The gain in V/V of the bandpass output at f = f .
O
OBP
OLP
OHP
ON1
ON2
The gain in V/V of the lowpass output at f→0Hz.
H
H
H
The gain in V/V of the highpass output at f→f
/2.
CLK
The notch output gain as f→0Hz.
The notch output gain at f = f
/2.
CLK
LP-N
HP-N
A notch output with H
A notch output with H
> H
ON1
ON1
ON2.
ON2.
< H
10 ______________________________________________________________________________________
Dual Universal Switched-Capacitor Filters
0/MAX7491
C
C
C
C
R6
R5
R3
R2
R3
R2
COM
N
S
BP
LP
N
S
BP
LP
R1
R1
V
IN
-
V
IN
-
+
+
Σ
∫
∫
Σ
∫
∫
COM
COM
Figure 2. Mode 1, 2nd-Order Filter Providing Notch, Bandpass,
and Lowpass Outputs
Figure 3. Mode 1B, 2nd-Order Filter Providing Notch, Bandpass,
and Lowpass Outputs
Mode 1
Figure 2 shows the MAX7490/MAX7491s’ configuration
of Mode 1. This mode provides 2nd-order notch, low-
pass, and bandpass filter functions. The gain at all
three outputs is inversely proportional to the value of
Mode 1B
Figure 3 shows the configuration of Mode 1B. R5 and
R6 are added to lower the feedback voltage from the
lowpass output to the summing input. This allows the
clock-to-center frequency to be adjusted beyond the
nominal value. This mode essentially has the same
functions and speed as Mode 1 while providing a high-
R1. The center frequency, f , is fixed at f
/100. High-
O
CLK
Q bandpass filters can be built without exceeding the
bandpass amplifier’s output swing (i.e., H does not
OBP
Q with f
/f ratios greater than the nominal value.
CLK O
have to track Q). The notch and bandpass center fre-
quencies are identical. The notch output gain is the
same above and below the notch center frequency.
Mode 1 can also be used to make high-order Butter-
worth lowpass filters, low Q notches, and multiple-order
bandpass filters obtained by cascading identical
switched-capacitor sections.
Mode 1B Design Equations
f
R6
CLK
f
=
O
100 R6 + R5
f
= f
n
O
Mode 1 Design Equations
R3
R6
Q =
R2 R6 + R5
f
CLK
f
=
O
−R2 R6 + R5
100
= f
H
H
H
H
=
=
OLP
OBP
ON1
ON2
R1
R6
f
notch
O
−R3
R3
Q =
R1
R2
−R2
−R2
(as f → 0Hz) =
H
H
H
H
=
OLP
OBP
ON1
ON2
R1
−R2
R1
−R3
(at f = f
/2) =
CLK
=
R1
R1
−R2
Mode 2
(as f → 0Hz) =
R1
Figure 4 shows the configuration of Mode 2. Mode 2 is
a combination of Mode 1 and Mode 3. In this mode,
−R2
(at f = f
/2) =
CLK
f
/f is always less than the part’s nominal ratio.
CLK O
R1
However, it provides less sensitivity to resistor toler-
ances than does Mode 3. It has a highpass notch out-
put where the notch frequency depends solely on the
clock frequency.
______________________________________________________________________________________ 11
Dual Universal Switched-Capacitor Filters
Mode 2 Design Equations
C
C
f
R2
R4
R4
R3
R2
CLK
f
=
=
1+
O
100
f
CLK
100
f
n
HP/N
S
BP
LP
R1
V
IN
R3
R2
-
Q =
1+
+
R2
R4
Σ
∫
∫
⎛
⎞
−R2
R4
H
=
OLP
⎜
⎟
R1 R4 + R2
⎝
⎠
COM
−R3
H
H
=
OBP
Figure 4. Mode 2, 2nd-Order Filter Providing a Highpass
Notch, Bandpass, and Lowpass Outputs
R1
⎛
⎜
⎞
−R2
R4
(f → 0Hz) =
ON1
⎟
Mode 2N Design Equations
R1 R4 + R2
⎝
⎠
0/MAX7491
−R2
H
(at f = f
/2) =
ON2
CLK
f
R2
R4
CLK
R1
f
=
=
1+
1+
O
100
Mode 2N
f
R
H
CLK
100
Figure 5 shows the configuration of Mode 2N. This
mode extends the topology of Mode 3A to Mode 2,
where the highpass and lowpass outputs are summed
f
n
R
L
R3
R2
through two external resistors, R and R , to create a
H
L
Q =
1+
lowpass notch filter that has higher frequency than the
one in Mode 2. Mode 2 is most useful in lowpass elliptic
designs. When cascading the sections of the
MAX7490/MAX7491, the highpass and lowpass outputs
can be summed directly into the inverting input of the
next section. Only one external op amp is needed.
R2
R4
⎛
⎞
⎛
⎞ ⎛
⎟ ⎜
⎞
R
R
G
R2
R4
G
H
(f → 0Hz) =
+
⎜
⎟
ON1
⎜
⎟
R
R
R1 R4 + R2
⎝
⎠ ⎝
⎠
⎝
⎠
H
L
C
C
R4
R3
R2
HP/N
S
BP
LP
R1
V
IN
-
+
Σ
∫
∫
R
G
R
L
LOWPASS
NOTCH
COM
R
H
OUTPUT
COM
Figure 5. Mode 2N, 2nd-Order Filter Providing a Lowpass Notch Output
12 ______________________________________________________________________________________
Dual Universal Switched-Capacitor Filters
0/MAX7491
Mode 3
C
C
Figure 6 shows the configuration of Mode 3. This mode
is a sampled time (Z transform) equivalent of the classi-
cal 2nd-order state variable filter. In this versatile mode,
the ratio of resistors R2 and R4 can move the center
frequency both above and below the nominal ratio.
Mode 3 is commonly used to make multiple-pole
Chebyshev filters with a single clock frequency. This
mode can also be used to make high-order all-pole
bandpass, lowpass, and highpass filters.
R4
R3
R2
HP
S
BP
LP
COM
R1
V
IN
-
+
Σ
∫
∫
Mode 3 Design Equations
COM
f
R2
CLK
f
=
O
Figure 6. Mode 3, 2nd-Order Section Providing Highpass,
Bandpass, and Lowpass Outputs
100 R4
R3 R2
R2 R4
−R2
Q =
the highpass and lowpass outputs through two external
resistors, R and R . The ratio of resistors R and R
H
L
H
L
H
=
OHP
adjusts the notch frequency, while R2 and R4 adjust
the bandpass center frequency, since the notch (zero
pair) frequency can be adjusted to both above and
R1
−R4
R1
H
=
OLP
below f . Mode 3A is suitable for both lowpass and
O
−R3
R1
highpass elliptic or Cauer filters. In multipole elliptic fil-
ters, only one external op amp is needed. Use the
inverting input of the internal op amp as the summing
node for all but the final section of the filter.
H
=
OBP
Mode 3A
Figure 7 shows the configuration of Mode 3A. Similar to
Mode 2, this mode adds an external op amp. See
Table 3 for op amp selection ideas. This op amp cre-
ates a highpass notch and lowpass notch by summing
C
C
R4
R3
R2
S
N/HP
BP
LP
COM
R1
V
IN
-
+
Σ
R
G
R
L
LOWPASS
NOTCH
COM
R
H
OUTPUT
COM
Figure 7. Mode 3A, 2nd-Order Filter Providing Highpass Notch or Lowpass Notch Outputs
______________________________________________________________________________________ 13
Dual Universal Switched-Capacitor Filters
Table 3. Suggested External Op Amps
PART
GBW (MHz)
SLEW RATE (V/μs)
I
(mA)
PIN-PACKAGE
5 SOT23
SUPPLY/AMP
MAX4281
MAX4322
MAX4130
MAX4490
2
5
0.7
2.0
0.5
1.1
5 SOT23
10
10
4.0
1.15
2.0
5 SOT23
10.0
5 SOT23
Mode 3A Design Equations
Offset Voltage
Switched-capacitor integrators generally exhibit higher
input offsets than discrete RC integrators. The larger
offset is mainly due to the charge injection of the CMOS
switches into the integrating capacitors. The internal op
amp offset also adds to the overall offset value. Figure
8 shows the input offsets from a single 2nd-order sec-
tion. Table 4 lists the formula for the output offset volt-
age for various modes and output pins.
f
R2
CLK
f
=
=
O
100 R4
f
R
H
CLK
f
n
100
R
L
0/MAX7491
R3 R2
R2 R4
Q =
Power Supplies
The MAX7490 operates from a single +5V supply, and
the MAX7491 operates from a single +3V supply.
−R2
H
=
OHP
R1
Bypass V
DD
to GND with at least a 0.1µF capacitor.
DD
−R4
V
should be isolated from other digital or high-volt-
H
H
H
=
=
OLP
OBP
ON1
age analog supplies. If dual supplies are required, con-
nect the COM pin to the system ground and the GND
pin to the negative supply. Figure 9 shows an example
of dual-supply operation. Single-supply and dual-sup-
ply performances are equivalent. For dual-supply oper-
ation, drive CLK, SHDN, and EXTCLK from GND (which
R1
−R3
R1
⎛
⎞
R
R4
R1
R
G
(f → 0Hz) =
⎜
⎟
R
⎝
⎠
L
is now V-) to V . If using the internal oscillator in dual-
DD
⎛
⎞
R2
R1
supply mode, C
can be returned to either GND or
G
OSC
H
(at f = f
/2) =
ON2
CLK
⎜
⎟
the actual ground voltage. Use the MAX7490 for 2.5V
and use the MAX7491 for 1.5V.
R
⎝
⎠
H
Note: When the passband gain error exceeds 1dB, the
For most applications, a 0.1µF bypass capacitor from
use of capacitor C between the lowpass output and
C
COM to GND is sufficient. If the V
supply has signifi-
DD
the inverting input will reduce the gain error. The value
can best be determined experimentally. Typically, it
cant 60Hz energy, increase this capacitor to 1µF or
greater to provide better power-supply rejection.
should be about 5pF/dB (C
= 15pF).
C-MAX
BP
LP
N/HP
INV
V
OS1
+
V
OS2
V
OS3
Σ
∫
∫
COM
-
S
Figure 8. Block Diagram of a 2nd-Order Section Showing the Input Offsets
14 ______________________________________________________________________________________
Dual Universal Switched-Capacitor Filters
0/MAX7491
Table 4. Output DC Offsets for a 2nd-Order Section
MODE
V
V
V
OSLP
OSN/HP
OSBP
V
[1 + (R2 / R3) + (R2 / R1)] - (V
)
OS1
OS3
1
V
V
V
- V
OSN/HP OS2
OS3
OS3
(R2 / R3)
V
[1 + (R2 / R3) + (R2 / R1)] - (V
)
OS1
OS3
1b
2
(V
- V
)[1 + R5 / R6)]
OSN/HP
OS2
(R2 / R3)
V
(V
(V
[1 + (R2 / R3) + (R2 / R1) + (R2 / R4) -
OS1
)(R2 / R3)][R4 / R2 + R4] +
)[R2 / R2 + R4]
V
V
V
V
- V
OSN/HP
OS3
OS2
OS3
OS3
OS2
[1 + (R4 / R1) + (R4 / R2) + (R4 / R3)] - (V
)
OS1
OS2
3
V
OS2
(R4 / R2) - (V
)(R4 / R3)
OS3
Aliasing
V+
Aliasing is an inherent phenomenon of most switched-
capacitor filters. As with all sampled systems, frequen-
cy components of the input signal above one half the
sampling rate will be aliased. The MAX7490/MAX7491
sample at twice the clock frequency, yielding a 200:1
sampling to cutoff frequency ratio.
*
V
DD
SHDN
0.1μF
COM
In particular, input signal components (f ) near the
IN
sampling rate generate a difference frequency
SAMPLING IN
MAX7490
MAX7491
(f
- f ) that often falls within the passband of
V+
V-
CLOCK
CLK
the filter. Such aliased signals, when they appear at the
output, are indistinguishable from real input informa-
tion. For example, the aliased output signal generated
when a 99kHz waveform is applied to a filter sampling
0.1μF
GND
V-
at 100kHz, (f
= 50kHz) is 1kHz. This waveform is an
CLK
*DRIVE SHDN TO V- FOR LOW-POWER
SHUTDOWN MODE.
attenuated version of the output that would result from
a true 1kHz input. Since sampling is done at twice the
clock frequency, the Nyquist frequency is the same as
the clock frequency.
Figure 9. Dual-Supply Operation
A simple passive RC lowpass input filter is usually suffi-
cient to remove input frequencies that can be aliased.
In many cases, the input signal itself may be band limit-
ed and require no special anti-alias filtering. Selecting
Input Signal Amplitude Range
The optimal input signal range is determined by
observing the voltage level at which the signal-to-noise
plus distortion (SINAD) ratio is maximized for a given
corner frequency. The Typical Operating Character-
istics show the THD + Noise response as the input sig-
nal’s peak-to-peak amplitude is varied. In most
systems, the input signal should be kept as large as
possible to maximize the signal-to-noise ratio (SNR).
Allow sufficient headroom to ensure no signal clipping
under expected operating conditions.
a passive filter cutoff frequency equal to f /2 gives
C
12dB rejection at the Nyquist frequency.
Clock Feedthrough
Clock feedthrough is defined as the RMS value of the
clock frequency and its harmonics that are present at
the filter’s output pins, even without input signal. The
clock feedthrough can be greatly reduced by adding a
simple RC lowpass network at the final filter output.
Choose a cutoff frequency as low as possible to pro-
vide maximum noise attenuation. The attenuation and
phase shift of the external filter will limit the actual fre-
quency selected.
Anti-Aliasing and Post-DAC Filtering
When using the MAX7490/MAX7491 for anti-aliasing or
post-DAC filtering, synchronize the DAC (or ADC) and
the filter clocks. If the clocks are not synchronized,
beat frequencies may alias into the desired passband.
______________________________________________________________________________________ 15
Dual Universal Switched-Capacitor Filters
Multiple Filter Stages
In some designs, such as very narrow band filters, or in
Table 5. Cascading Identical Bandpass
Filter Sections
modes where f cannot be tuned with resistors, several
O
2nd-order sections with identical f may be cascaded
O
TOTAL SECTIONS
TOTAL BW
1.000 B
0.644 B
0.510 B
0.435 B
0.386 B
TOTAL Q
1.00 Q
1.55 Q
1.96 Q
2.30 Q
2.60 Q
without multiple feedback. The total Q of the resultant
1
2
3
4
5
filter (Q ) is:
T
1/N
1/2
Total Q = Q / 2
− 1
(
)
T
Q is the Q of each individual filter section, and N is the
number of 2nd-order sections. In Table 5, the total Q and
total bandwidth (BW) are listed for up to five identical
2nd-order sections. B is the bandwidth of each section.
Wideband Noise
The wideband noise of the filter is the total RMS value
of the device’s noise spectral density and is used to
determine the operating SNR. Most of its frequency
contents lie within the filter’s passband and cannot be
reduced with postfiltering. The total noise depends
mainly on the Q of each filter section and the cascade
sequence. Therefore, in multistage filters, place the
section with the highest Q first for lower output noise.
Chip Information
0/MAX7491
PROCESS: BiCMOS
16 ______________________________________________________________________________________
Dual Universal Switched-Capacitor Filters
0/MAX7491
Typical Application Circuit
4TH-ORDER 10kHz
R1B
BANDPASS FILTER
200k
4TH-ORDER 10kHz BANDPASS FILTER
FREQUENCY RESPONSE
OUT
LPB
BPB
LPA
BPA
R3A
R3B
5
0
200k
200k
R2A
10k
R2B
10k
MAX7490
MAX7491
-5
NB/HPB
INVB
NA/HPA
INVA
R1
200k
-10
-15
-20
-25
-30
-35
-40
V
IN
SB
COM
SA
SHDN
GND
C2
0.1μF
EXTCLK
CLK
8
9
10
11
12
f
= 1MHz
V
V
DD
CLK
DD
FREQUENCY (kHz)
C1
0.1μF
Package Information
For the latest package outline information and land patterns, go
to www.maxim-ic.com/packages.
PACKAGE TYPE PACKAGE CODE DOCUMENT NO.
16 QSOP
E16+4
21-0055
______________________________________________________________________________________ 17
Dual Universal Switched-Capacitor Filters
Revision History
REVISION REVISION
PAGES
CHANGED
DESCRIPTION
NUMBER
DATE
0
1
7/00
4/09
Initial release
Changes to add lead-free packages, style edits
—
1–10, 16, 17, 18
0/MAX7491
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
18 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2009 Maxim Integrated Products
Maxim is a registered trademark of Maxim Integrated Products, Inc.
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