MAX749 [MAXIM]

Digitally Adjustable LCD Bias Supply; 数字调节LCD偏置电源
MAX749
型号: MAX749
厂家: MAXIM INTEGRATED PRODUCTS    MAXIM INTEGRATED PRODUCTS
描述:

Digitally Adjustable LCD Bias Supply
数字调节LCD偏置电源

CD
文件: 总12页 (文件大小:107K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
19-0143; Rev 1; 2/95  
Dig it a lly Ad ju s t a b le LCD Bia s S u p p ly  
MAX749  
_______________Ge n e ra l De s c rip t io n  
____________________________Fe a t u re s  
The MAX749 generates negative LCD-bias contrast  
voltages from 2V to 6V inputs. Full-scale output voltage  
c a n b e s c a le d to -100V or g re a te r, a nd is d ig ita lly  
adjustable in 64 equal steps by an internal digital-to-  
analog converter (DAC). Only seven small surface-  
mount components are required to build a complete  
supply. The output voltage can also be adjusted using  
a PWM signal or a potentiometer.  
+2.0V to +6.0V Input Voltage Range  
Flexible Control of Output Voltage:  
Digital Control  
Potentiometer Adjustment  
PWM Control  
Output Voltage Range Set by One Resistor  
Low, 60µA Max Quiescent Current  
15µA Max Shutdown Mode  
A unique current-limited control scheme reduces supply  
current and maximizes efficiency, while a high switching  
frequency (up to 500kHz) minimizes the size of external  
components. Quiescent current is only 60µA max and is  
reduced to under 15µA in shutdown mode. While shut  
down, the MAX749 retains the voltage set point, simpli-  
fying software control. The MAX749 drives either an  
external P-channel MOSFET or a PNP transistor.  
Small Size – 8-Pin SO and Plastic DIP Packages  
________________________Ap p lic a t io n s  
Notebook Computers  
______________Ord e rin g In fo rm a t io n  
PART  
TEMP. RANGE  
0°C to +70°C  
PIN-PACKAGE  
8 Plastic DIP  
8 SO  
Laptop Computers  
MAX749CPA  
MAX749CSA  
MAX749C/D  
MAX749EPA  
MAX749ESA  
Palmtop Computers  
0°C to +70°C  
Personal Digital Assistants  
Communicating Computers  
Portable Data-Collection Terminals  
0°C to +70°C  
Dice*  
-40°C to +85°C  
-40°C to +85°C  
8 Plastic DIP  
8 SO  
* Contact factory for dice specifications.  
__________Typ ic a l Op e ra t in g Circ u it  
__________________P in Co n fig u ra t io n  
V
IN  
+5V  
TOP VIEW  
R
SENSE  
0.1µF  
1
2
8
7
V+  
CS  
1
2
3
4
8
7
6
5
V+  
ADJ  
CS  
ADJ  
DHI  
MAX749  
DIGITAL  
ADJUST  
DHI  
-V  
OUT  
MAX749  
6
5
3
4
CTRL  
FB  
DLOW  
GND  
DLOW  
CTRL  
FB  
ON/OFF  
GND  
R
FB  
DIP/SO  
C
COMP  
_______________________________________________________________ Maxim Integrated Products  
1
Ca ll t o ll fre e 1 -8 0 0 -9 9 8 -8 8 0 0 fo r fre e s a m p le s o r lit e ra t u re .  
Dig it a lly Ad ju s t a b le LCD Bia s S u p p ly  
ABSOLUTE MAXIMUM RATINGS  
V+ ................................................................................-0.3V, +7V  
CTRL, ADJ, FB, DLOW, DHI, CS.....................-0.3V, (V+ + 0.3V)  
Continuous Power Dissipation (T = +70°C)  
A
Plastic DIP (derate 9.09mW/°C above +70°C) ............727mW  
SO (derate 5.88mW/°C above +70°C).........................471mW  
Operating Temperature Ranges:  
MAX749C_A........................................................0°C to +70°C  
MAX749E_A.....................................................-40°C to +85°C  
Storage Temperature Range .............................-65°C to +160°C  
Lead Temperature (soldering, 10sec) .............................+300°C  
Stresses beyond those listed under Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional  
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to  
absolute maximum rating conditions for extended periods may affect device reliability.  
MAX749  
ELECTRICAL CHARACTERISTICS  
(2V < V+ < 6V, T = T  
A
to T , unless otherwise noted.)  
MAX  
MIN  
PARAMETER  
SYMBOL  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
V+ Voltage  
2
6
V
FB Source Current  
I
On power-up or reset, V = 0V (Note 1)  
12.80  
0.45  
1.43  
13.33  
13.86  
0.55  
1.53  
±15  
2.12  
±1  
µA  
FBS  
FB  
Zero-Count FB Current  
Full-Count FB Current  
FB Offset Voltage  
V
= 0V  
= 0V  
I
FBS  
FB  
V
FB  
I
FBS  
mV  
DAC Step Size (Note 2)  
DAC Linearity (Note 2)  
Supply Rejection  
Monotonicity guaranteed, V = 0V  
1.00  
1.56  
%I  
FB  
FBS  
FBS  
FBS  
V
FB  
= 0V  
%I  
%I  
V+ = 2V to 6V, full-count current  
1.5  
Switching Frequency  
Logic Input Current  
100 to 500  
kHz  
0V < V < V+, CTRL, ADJ  
IN  
±100  
nA  
V
Logic High Threshold (Note 3)  
Logic Low Threshold (Note 3)  
Quiescent Current  
V
CTRL, ADJ  
CTRL, ADJ  
1.6  
IH  
V
IL  
0.4  
60  
V
µA  
µA  
mV  
mA  
V
Shutdown Current  
15  
V+ to CS Voltage  
Current-limit trip voltage  
110  
24  
140  
50  
V+  
5
180  
DHI Source Current  
DHI Drive Level  
V+ = 2V, V  
= 1V  
DHI  
No load  
V+ - 50mV  
DLOW On Resistance  
V+ = 2V, V  
= 0.5V  
10  
DLOW  
Note 1: The device is in regulation when V = 0V (see Figures 3 - 6).  
FB  
Note 2: These tests performed at V+ = 3.3V. Operation over supply range is guaranteed by supply rejection test of full-count current.  
Note 3: V is guaranteed by design to be 1.8V min for V+ = 2V to 6V for T = T to T . V is guaranteed by design from  
IH  
A
MIN  
MAX IL  
T
A
= T  
to T  
.
MIN  
MAX  
TIMING CHARACTERISTICS  
T
= +25°C  
T
= T  
MIN  
to T  
MIN  
MAX  
A
A
PARAMETER  
SYMBOL  
CONDITIONS  
V+ = 2V  
UNITS  
MIN  
TYP  
MAX  
MAX  
125  
25  
300  
85  
400  
100  
Minimum Reset Pulse Width  
t
ns  
R
V+ = 5V  
Not tested  
Not tested  
V+ = 2V  
V+ = 5V  
V+ = 2V  
V+ = 5V  
V+ = 2V  
V+ = 5V  
Minimum Reset Setup  
Minimum Reset Hold  
t
RS  
0
0
0
0
ns  
ns  
t
RH  
15  
10  
85  
85  
100  
100  
500  
200  
250  
100  
Minimum ADJ High Pulse Width  
Minimum ADJ Low Pulse Width  
Minimum ADJ Low to CTRL Low  
t
ns  
ns  
ns  
SH  
170  
60  
400  
150  
200  
85  
t
SL  
70  
t
SD  
20  
2
______________________________________________________________________________________  
Dig it a lly Ad ju s t a b le LCD Bia s S u p p ly  
MAX749  
__________________________________________Typ ic a l Op e ra t in g Ch a ra c t e ris t ic s  
(T = +25°C, L = 47µH, unless otherwise noted.)  
A
EFFICIENCY vs. OUTPUT  
EFFICIENCY vs. OUTPUT  
CURRENT – PNP  
EFFICIENCY vs. OUTPUT  
CURRENT – MOSFET  
CURRENT – PNP  
85  
80  
78  
85  
80  
75  
70  
-24V  
-12V  
-12V  
80  
76  
74  
-12V  
-24V  
-5V  
-5V  
-5V  
-24V  
75  
72  
70  
68  
V+ = 5V  
= 0.25  
V+ = 3V  
V+ = 3V  
= 160Ω  
R
SENSE  
R
BASE  
= 470Ω  
= 0.25Ω  
SENSE  
TRANSISTOR: ZTX750  
R
R
BASE  
TRANSISTOR: SMD10P05L  
R
70  
65  
= 0.25Ω  
SENSE  
TRANSISTOR = ZTX750  
66  
64  
65  
0
10  
20  
30  
40  
50  
60  
0
10 20 30 40 50 60 70 80 90 100  
OUTPUT CURRENT (mA)  
0
5
10 15 20 25 30 35 40 45 50  
OUTPUT CURRENT (mA)  
OUTPUT CURRENT (mA)  
EFFICIENCY vs.  
OUTPUT VOLTAGE  
EFFICIENCY vs.  
OUTPUT VOLTAGE  
85  
80  
75  
70  
85  
80  
75  
-20mA  
-5mA  
-20mA  
-5mA  
-40mA  
-40mA  
V+ = 3V  
= 470Ω  
= 0.25Ω  
SENSE  
TRANSISTOR : ZTX750  
V+ = 5V  
70  
65  
R
R
BASE  
R
SENSE  
= 0.25Ω  
TRANSISTOR : SMD10P05L  
65  
-24 -22 -20 -18 -16 -14 -12 -10 -8 -6 -4  
OUTPUT VOLTAGE (V)  
-24 -22 -20 -18 -16 -14 -12 -10 -8 -6 -4  
OUTPUT VOLTAGE (V)  
LOAD CURRENT vs. INPUT VOLTAGE  
LOAD CURRENT vs. INPUT VOLTAGE  
400  
500  
450  
400  
350  
300  
250  
200  
350  
-5V  
R
= 160Ω  
= 0.25Ω  
R
= 470Ω  
= 0.25Ω  
BASE  
BASE  
R
SENSE  
-5V  
R
SENSE  
300  
250  
200  
150  
100  
50  
TRANSISTOR = ZTX750  
TRANSISTOR = ZTX750  
-12V  
-12V  
-24V  
150  
100  
-24V  
-48V  
-48V  
50  
0
0
2
3
4
5
6
2
3
4
5
6
INPUT VOLTAGE (V)  
INPUT VOLTAGE (V)  
_______________________________________________________________________________________  
3
Dig it a lly Ad ju s t a b le LCD Bia s S u p p ly  
____________________________Typ ic a l Op e ra t in g Ch a ra c t e ris t ic s (c o n t in u e d )  
(T = +25°C, L = 47µH, unless otherwise noted.)  
A
LINE-TRANSIENT RESPONSE  
LOAD-TRANSIENT RESPONSE  
MAX749  
OUTPUT  
VOLTAGE  
100mV /div  
AC  
OUTPUT  
VOLTAGE  
100mV /div  
AC  
1 V/div  
INPUT  
VOLTAGE  
LOAD  
CURRENT  
10mA/div  
0mA  
0V  
50ms/div  
50µs/div  
V
= -15V  
= 5mA  
V
= -15V  
OUT  
OUT  
I
TRANSISTOR = ZTX750  
LOAD  
TRANSISTOR = ZTX750  
______________________________________________________________P in De s c rip t io n  
PIN  
NAME  
FUNCTION  
+2V to +6V Input Voltage to power the MAX749 and external circuitry. When using an external  
P-channel MOSFET, V+ must exceed the MOSFETs gate threshold voltage.  
1
V+  
Logic Input. When CTRL is high, a rising edge on ADJ increments an internal counter. When CTRL is  
low, the counter is reset to mid-scale when ADJ is high. When ADJ is low, the counter does not  
change (regardless of activity on CTRL) as long as V+ is applied.  
2
3
ADJ  
Logic Input. When CTRL and ADJ are low, the MAX749 is shut down, but the counter is not reset.  
When CTRL is low, the counter is reset to mid-scale when ADJ is high. The device is always on when  
CTRL is high.  
CTRL  
Feedback Input for output full-scale voltage selection. -V  
= (R ) x (20µA) where R is  
FB  
FB  
OUT(MAX)  
4
5
FB  
connected from FB to -V . The device is in regulation when V = 0V.  
OUT FB  
GND  
Ground  
Output Driver Low. Connect to DHI when using an external P-channel MOSFET. When using an  
6
DLOW  
external PNP transistor, connect a resistor R from DLOW to the base of the PNP to set the maxi-  
BASE  
mum base-drive current.  
Output Driver High. Connect to the gate of the external P-channel transistor, or to the base of the  
external PNP transistor.  
7
8
DHI  
CS  
Current-Sense Input. The external transistor is turned off when current through the sense resistor,  
R
, brings CS below V+ by 140mV (typ).  
SENSE  
4
______________________________________________________________________________________  
Dig it a lly Ad ju s t a b le LCD Bia s S u p p ly  
MAX749  
+2V TO +6V  
INPUT  
0.1µF  
22µF  
6.2V  
V+  
RESET  
6.66µA TO 20µA  
6-BIT  
CURRENT-OUTPUT  
DAC  
R
SENSE  
6-BIT  
COUNTER  
POWER-ON  
RESET  
REF  
CTRL  
ADJ  
LOGIC  
INCREMENT  
CS  
DHI  
ON/OFF  
Q1  
ZTX750  
SWITCH-  
MODE  
POWER  
SUPPLY  
DLOW  
D1  
1N5819  
R
BASE  
BIAS  
470Ω  
L1  
47µH  
R
FB  
V
OUT  
FB  
(NEGATIVE)  
MAX749  
GND  
22µF  
30V  
C
COMP  
Figure 1. Block Diagram, Showing External Circuitry Using a PNP Transistor  
turns off, current flows from the output through the diode  
and the coil, driving the output negative. Feedback con-  
trol adjusts the external transistors timing to provide a  
regulated negative output voltage.  
_______________De t a ile d De s c rip t io n  
The MAX749 is a negative-output inverting power con-  
troller that can drive an external PNP transistor or P-  
channel MOSFET. An external resistor and an internal  
DAC control the output voltage (Figure 1).  
The MAX749s unique control scheme combines the  
ultra-low supply current of pulse-skipping, pulse-fre-  
quency modulation (PFM) converters with the high full-  
load efficiency characteristic of pulse-width modulation  
(PWM) c onve rte rs . This c ontrol s c he me a llows the  
device to achieve high efficiency over a wide range of  
loads. The current-sense function and high operating  
frequency allow the use of tiny external components.  
The MAX749 is designed to operate from 2V to 6V inputs,  
ideal for operation from low-voltage batteries. In systems  
with higher-voltage batteries, such as notebook comput-  
ers, the MAX749 may also be operated from the regulat-  
ed +5V supply. A high-efficiency +5V regulator, such as  
the MAX782, is an ideal source for the MAX749. In this  
example, the MAX749 efficiency (80%) is compounded  
with the MAX782 efficiency (95%): 80% x 95% = 76%,  
which is still high.  
Switching control is accomplished through the combi-  
nation of a current limit in the switch plus on- and off-  
time limits (Figure 2).  
Op e ra t in g P rin c ip le  
The MAX749 and the external components shown in the  
Typical Operating Circuit form a flyback converter.  
When the external transistor is on, current flows through  
the current-sense resistor, the transistor, and the coil.  
Energy is stored in the core of the coil during this phase,  
and the diode does not conduct. When the transistor  
Once turned on, the transistor stays on until either:  
- the maximum on-time one-shot turns it off  
(8µs later), or  
- the switch current reaches its limit (as determined  
by the current-sense resistor and the current  
comparator).  
_______________________________________________________________________________________  
5
Dig it a lly Ad ju s t a b le LCD Bia s S u p p ly  
+2V TO +6V  
INPUT  
0.1µF  
22µF  
V+  
MAX749  
140mV  
R
SENSE  
Q
TRIG  
CURRENT  
COMPARATOR  
MINIMUM  
OFF-TIME  
ONE-SHOT  
FLIP-FLOP  
R
DHI  
Q1  
ZTX750  
Q
S
DLOW  
MAXIMUM  
ON-TIME  
ONE-SHOT  
R
470Ω  
BASE  
D1  
1N5819  
L1  
47µH  
VOLTAGE  
COMPARATOR  
TRIG  
Q
V
OUT  
R
FB  
FB  
(NEGATIVE)  
6-BIT  
CURRENT-OUTPUT  
DAC  
22µF  
30V  
REF  
MAX749  
GND  
C
COMP  
Figure 2. Switch-Mode Power-Supply Section Block Diagram  
Once turned off, a one-shot holds the switch off for a  
minimum of 1µs, and the switch either stays off (if the  
output is in regulation), or turns on again (if the output  
is out of regulation).  
ments the DAC output. When incremented beyond full  
scale, the counter rolls over and sets the DAC to the  
minimum value. In this way, a single pulse applied to  
ADJ increases the DAC set point by one step, and 63  
pulses decrease the set point by one step.  
With light loads, the transistor switches for one or more  
cycles and then turns off, much like a traditional PFM  
converter. With heavy loads, the transistor stays on until  
the switch current reaches the current limit; it then  
shuts off for 1µs, and immediately turns on again until  
the next time the switch current reaches its limit. This  
cycle repeats until the output is in regulation.  
Table 1 is the logic table for the CTRL and ADJ inputs,  
which control the internal DAC and counter. Figures 3-7  
show various timing specifications and different ways of  
incrementing and resetting the DAC, and of placing it in  
the low-power standby mode. As long as the timing  
specifications for ADJ and CTRL are observed, any  
sequence of operations can be implemented.  
Ou t p u t Vo lt a g e Co n t ro l  
The output voltage is set using a single external resistor  
and the internal current-output DAC (Figure 1). The full-  
scale output voltage is set by selecting the feedback  
Table 1. Input Truth Table  
ADJ  
CTRL  
RESULT  
resistor, R . The output voltage is controlled from 33%  
Low  
Low  
Shut down  
FB  
to 100% of the full-scale output by an internal 64-step  
DAC/counter.  
Reset counter to mid-range. The  
device is not shut down.  
High  
X
Low  
On power-up or after a reset, the counter sets the DAC  
output to mid-range. Each rising edge of ADJ incre-  
High  
High  
On  
Increment the counter  
6
______________________________________________________________________________________  
Dig it a lly Ad ju s t a b le LCD Bia s S u p p ly  
MAX749  
In Figure 3, the MAX749 is reset when it is taken out of  
shutdown, which sets the output at mid-scale. Figure 4  
shows how to increment the counter. Figure 5 illustrates  
a reset without shutting the device down.  
ADJ  
CTRL  
Figure 7 provides an example of a sequence of opera-  
tions: Starting from shutdown, the device is turned on,  
t
t
SD  
R
incremented, reset to mid-scale without being shut  
down, incremented again, and finally shut down.  
ON  
SHUTDOWN RESET  
SHUTDOWN  
S h u t d o w n Mo d e  
When CTRL and ADJ are both low, the MAX749 is shut  
down (Table 1): The internal reference and biasing cir-  
cuitry turn off, the output voltage drops to zero, and the  
supply current drops to 15µA. The MAX749 retains its  
DAC setting, simplifying software control.  
Figure 3. Shutdown-Reset-On-Shutdown Sequence of Operation.  
The device is not shut down during reset.  
Re s e t Mo d e  
If ADJ is high when CTRL is low, the DAC set point is  
reset to mid-scale and the MAX749 is not shut down.  
Mid-scale is 32 steps from the minimum, 31 steps from  
the maximum.  
ADJ  
CTRL  
HIGH  
t
SH  
t
SL  
De s ig n P ro c e d u re  
_________a n d Co m p o n e n t S e le c t io n  
Figure 4. Count-Up Operation  
S e t t in g t h e Ou t p u t Vo lt a g e  
The MAX749s output voltage is set using an external  
resistor and the internal current-output DAC. The full-  
scale output voltage is set by selecting the feedback  
ADJ  
resistor R according to the formula:  
FB  
CTRL  
-V  
= R x 20µA (Figure 1).  
FB  
OUT(MAX)  
The device is in regulation when V = 0V.  
FB  
t
RS  
t
RH  
t
R
DAC Adjustment  
On power-up or after a reset, the counter sets the DAC  
output to mid-range, and -V = R x 13.33µA. Each  
ON  
RESET  
ON  
OUT  
FB  
rising edge of ADJ increments the counter (and there-  
fore the DAC output) in the direction of -V by  
Figure 5. Reset Sequence without Shutdown. The device is not  
shut down during reset.  
OUT(MAX)  
one count. When incremented beyond -V  
, the  
OUT(MAX)  
INCREMENT  
RESET  
INCREMENT  
ADJ  
ADJ  
CTRL  
CTRL  
t
RH  
t
R
SHUTDOWN  
ON  
SHUTDOWN  
SHUTDOWN  
RESET  
ON  
Figure 6. Reset Sequence with Shutdown  
Figure 7. Control Sequence Example (see Output Voltage  
Control section)  
_______________________________________________________________________________________  
7
Dig it a lly Ad ju s t a b le LCD Bia s S u p p ly  
Cu rre n t -S e n s e Re s is t o r  
The current-sense resistor limits the peak switch cur-  
rent to 140mV/R , where R is the value of the  
current-sense resistor, and 140mV is the typical cur-  
rent-sense comparator threshold (see V+ to CS Voltage  
in the Electrical Characteristics).  
+4.5V to +6V  
INPUT  
0.1µF  
22µF  
SENSE  
SENSE  
R
SENSE  
V+  
CS  
To maximize efficiency and reduce the size and cost of  
the external components, minimize the peak current.  
However, since the output current is a function of the peak  
current (Figures 9a-9e), the limit should not be set too low.  
MAX749  
Q1  
DHI  
MAX749  
SMD10P05L  
CTRL  
DLOW  
No calculations are required to choose the proper cur-  
rent-sense resistor; simply follow this two-step procedure:  
L1  
47µH  
D1  
1N5819  
ADJ  
1. Determine:  
V
OUT  
- the minimum input voltage, V  
IN(MIN),  
(NEGATIVE)  
R2  
R1  
- the maximum output voltage, V  
, and  
OUT(MAX)  
GND  
- the maximum output current, I  
.
OUT(MAX)  
22µF  
30V  
For example, assume that the output voltage must be  
adjustable to -24V (V = -24V) at up to 30mA  
OUT(MAX)  
C
COMP  
(I  
= 30mA). The supply voltage ranges from  
V
= -R1(13.33µA)  
= -(R1+R2)(13.33µA)  
OUT(MIN)  
OUT(MAX)  
V
OUT(MAX)  
4.75V to 6V (V  
= 4.75V).  
IN(MIN)  
2. In Figures 9a-9e, locate the graph drawn for the  
a p p rop ria te outp ut volta g e (whic h is e ithe r the  
desired output voltage or, if that is not shown, the  
graph for the nearest voltage more negative than the  
desired output). On this graph find the curve for the  
Figure 8. Using a Potentiometer to Adjust the Output Voltage  
c ounte r rolls ove r a nd s e ts the DAC to -V  
,
OUT(MIN)  
where -V  
= R x 6.66µA. In other words, a sin-  
highest R  
(the lowest current limit) with an out-  
OUT(MIN)  
FB  
SENSE  
gle rising edge of ADJ increments the DAC output by  
one, and 63 rising edges of ADJ decrement the DAC  
output by one.  
put current that is adequate at the lowest input  
voltage.  
In this example, select the -24V output graph, Figure 9d.  
We then want a curve where I  
is 30mA with a 4.75V  
Potentiometer Adjustment  
It is also possible to adjust the output voltage using a  
potentiometer instead of the internal DAC (Figure 8). On  
power-up (V+ applied), the internal current source is set  
to mid-scale, or 13.33µA. Choose R1 and R2 with the fol-  
lowing equations:  
OUT  
input. The 0.3R  
graph shows 25mA of output cur-  
SENSE  
rent with a 4.75V input, so we look next at the 0.25Ω  
graph. It shows I = 30mA for V = 4.75V and  
R
SENSE  
OUT  
IN  
V
= -24V. Therefore select R  
= 0.25. This pro-  
OUT  
SENSE  
vides a current limit in the range 440mA to 720mA.  
Alternatively, a 0.2sense resistor can be used. This  
gives a current limit in the range 550mA to 900mA, but  
enables over 40mA to be generated at -24V with input  
voltages down to 4.5V. A 0.2resistor may be easier to  
obtain than an 0.25resistor.  
R1 = -V  
R2 = -V  
/13.33µA  
OUT(MIN)  
OUT(MAX)  
/13.33µA - R1.  
Where the potentiometer can be varied from 0 (producing  
) to R2(producing V ). Notice that ADJ  
is connected to ground, allowing the device to be shut  
down.  
V
OUT(MIN)  
OUT(MAX)  
The theoretical design curves shown in Figures 9a-9e  
assume the minimum (worst-case) value for the current-  
limit comparator threshold. Having selected the cur-  
rent-sense resistor, the maximum current limit is given  
PWM Adjustment  
A positive pulse-width modulated (PWM) logic signal  
(e.g., from a microcontroller) can control the MAX749s  
output voltage. Use the PWM signal to pull up the FB  
pin through a suitable resistor. An RC network on the  
PWM output would also be required. In this configura-  
tion, the longer the PWM signal remains high, the more  
negative the MAX749s output will be driven.  
by 180mV/R  
. Use the maximum current-limit fig-  
SENSE  
ure when choosing the transistor, coil, and diode.  
IRC (see Table 2) makes surface-mount resistors with pre-  
ferred values including: 0.1, 0.2, 0.3, 0.5, and 1.0.  
8
______________________________________________________________________________________  
Dig it a lly Ad ju s t a b le LCD Bia s S u p p ly  
MAX749  
Ch o o s in g a n In d u c t o r  
Practical inductor values range from 22µH to 100µH,  
0.2  
100  
80  
and 47µH is normally a good choice. Inductors with a  
ferrite core or equivalent are recommended. The induc-  
tors saturation current rating – the current at which the  
core begins to saturate and the inductance falls to 80%  
or 90% of its nominal value – should ideally equal the  
c urre nt limit (s e e Curre nt-Se ns e Re s is tor s e c tion).  
Howe ve r, b e c a us e the c urre nt is limite d b y the  
MAX749, the inductor can safely be driven into satura-  
tion with only a slight impact on efficiency.  
V
= -15V  
OUT  
L = 47µH  
0.25  
0.3  
60  
40  
0.5  
1.0  
20  
0
For highest efficiency, use a coil with low resistance,  
preferably under 300m. To minimize radiated noise,  
use a toroid, pot-core, or shielded inductor.  
2
3
4
5
6
INPUT VOLTAGE (V)  
Figure 9c. Maximum Output Current vs. Input Voltage,  
V
OUT  
= -15V  
0.2  
250  
200  
150  
100  
50  
60  
50  
0.2  
V
OUT  
= -24V  
V
= -5V  
OUT  
L = 47µH  
L = 47µH  
0.25  
0.3  
40  
30  
20  
10  
0
0.25  
0.3  
0.5  
1.0  
0.5  
1.0  
0
2
3
4
5
6
2
3
4
5
6
INPUT VOLTAGE (V)  
INPUT VOLTAGE (V)  
Figure 9d. Maximum Output Current vs. Input Voltage,  
Figure 9a. Maximum Output Current vs. Input Voltage,  
V
OUT  
= -24V  
V
OUT  
= -5V  
0.2  
140  
25  
0.2  
V
= -12V  
OUT  
120  
100  
V
= -48V  
OUT  
L = 47µH  
20  
15  
10  
5
0.25  
0.3  
L = 47µH  
0.25  
0.3  
80  
60  
40  
20  
0
0.5  
1.0  
0.5  
1.0  
0
2
3
4
5
6
2
3
4
5
6
INPUT VOLTAGE (V)  
INPUT VOLTAGE (V)  
Figure 9b. Maximum Output Current vs. Input Voltage,  
= -12V  
Figure 9e. Maximum Output Current vs. Input Voltage,  
= -48V  
V
OUT  
V
OUT  
_______________________________________________________________________________________  
9
Dig it a lly Ad ju s t a b le LCD Bia s S u p p ly  
The Sumida CD54-470N (47µH, 720mA, 370m) is suit-  
able for a wide range of applications, and the larger  
CD105-470N (47µH, 1.17A, 170m) permits higher cur-  
rent levels and efficiencies.  
Table 2. Component Suppliers  
SUPPLIER  
INDUCTORS  
Coiltronics  
Gowanda  
PHONE  
FAX  
(305) 781-8900  
(716) 532-2234  
(708) 956-0666  
81-3-3607-511  
(305) 782-4163  
(716) 532-2702  
(708) 956-0702  
81-3-3607-5428  
Dio d e S e le c t io n  
The MAX749s high switching frequency demands a high-  
speed rectifier. Schottky diodes such as the 1N5817-  
1N5822 family are recommended. Choose a diode with an  
average current rating approximately equal to the peak  
Sumida USA  
Sumida Japan  
CAPACITORS  
Kemet  
MAX749  
current, as determined by 180mV/R  
and a break-  
SENSE  
+
down voltage greater than V + -V  
.
I
OUTMAXI  
(803) 963-6300  
(714) 969-2491  
(708) 843-7500  
(603) 224-1961  
(619) 661-6322  
81-3-3837-6242  
(803) 963-6322  
(714) 960-6492  
(708) 843-2798  
(603) 224-1430  
Matsuo  
Ex t e rn a l S w it c h in g Tra n s is t o r  
The MAX749 can drive a PNP transistor or a P-channel  
logic-level MOSFET. The choice of a power switch is  
dictated by the input voltage range, cost, and efficiency.  
Nichicon  
Sprague  
Sanyo USA  
Sanyo Japan  
MOSFETs provide the highest efficiency because they  
do not draw any DC gate-drive current (see Typical  
Operating Characteristics graphs). However, a gate-  
source voltage of several volts is needed to turn on a  
MOSFET, so a 5V or greater input supply is required  
(although this restriction may change as lower-thresh-  
old P-channel MOSFETs become available). PNP tran-  
sistors, meanwhile, may be used over the entire 2V to  
6V operating voltage range of the MAX749.  
United Chemi-Con (714) 255-9500  
(714) 255-9400  
DIODES  
Motorola  
(800) 521-6274  
(805) 867-2555  
81-3-3494-7411  
Nihon USA  
Nihon Japan  
(805) 867-2698  
81-3-3494-7414  
POWER TRANSISTORS - MOSFETS  
When using a MOSFET, connect DHI and DLOW to its  
gate (see Typical Operating Circuit). When using a PNP  
transistor, connect DHI to its base, and connect a resis-  
Harris  
(407) 724-3739  
(213) 772-2000  
(408) 988-8000  
(407) 724-3937  
(213) 772-9028  
(408) 727-5414  
International  
Rectifier  
tor between the base and DLOW (R  
) (Figure 1). The  
BASE  
PNP transistor is turned off quickly by the direct pull-up  
of DHI, and turned on by the base current provided  
Siliconix  
POWER TRANSISTORS - PNP TRANSISTORS  
through R  
. This resistor limits the transistors base-  
BASE  
Zetex USA  
Zetex UK  
(516) 543-7100  
(516) 864-7630  
drive current to (V - 140mV - V )/R  
, where V is  
IN  
BE  
BASE  
IN  
the input voltage, 140mV is the drop across R  
, V  
44 (61) 727 5105  
44 (61) 627 5467  
SENSE BE  
is the transistors base-emitter voltage, and R  
is the  
BASE  
CURRENT-SENSE RESISTORS  
current-limiting resistor. For maximum efficiency, make  
as large as possible, but small enough so that the  
IRC  
(512) 992-7900  
(512) 992-3377  
R
BASE  
transistor is always driven into saturation.  
Ba s e Re s is t o r  
in Figure 1, controls the amount of  
Highest efficiency with a PNP transistor comes from  
using a device with a low collector-emitter saturation  
voltage and a high current gain. Use a fast-switching  
type. For example the Zetex ZTX792A has switching  
The base resistor, R  
BASE  
base current in the PNP transistor. A low value for R  
BASE  
increases base drive, which provides higher output cur-  
rents and compensates for lower input voltages, but  
speeds of 40ns (t ) and 500ns (t  
).  
ON  
OFF  
decreases efficiency. Conversely, a high R  
value  
BASE  
increases efficiency but reduces the output capability,  
especially at low voltages. When using high-gain transis-  
tors, e.g. the Zetex ZTX750 or ZTX792, typical values for  
The transistor must have a collector-to-emitter (PNP) or  
drain-to-source (MOSFET) voltage rating greater than the  
input-to-output voltage differential (V - V ). In either  
IN  
OUT  
R
are in the 150to 510range, but will depend on  
case the transistor must have a current rating that exceeds  
the peak current set by the current-sense resistor.  
BASE  
the required input voltage range and output current (see  
Typical Operating Characteristics). Lower-gain transistors  
PNP transistors are generally less expensive than P-  
c ha nne l MOSFETs. Ta b le 2 lists some sup p lie rs of  
switching transistors suitable for use with the MAX749.  
require lower values for R  
and are less efficient. Larger  
BASE  
R
values are suitable if less output power is required.  
BASE  
10 _____________________________________________________________________________________  
Dig it a lly Ad ju s t a b le LCD Bia s S u p p ly  
MAX749  
Compensation Capacitor  
The high value of the feedback resistor makes the feed-  
back loop susceptible to phase lag if parasitic capaci-  
tance is present at the FB pin. To compensate for this, it  
Ca p a c it o rs  
Output Filter Capacitor  
A 22µF, 30V surface-mount (SMT) tantalum output filter  
capacitor typically maintains 100mVp-p output ripple  
when generating -24V at 40mA from a 5V input. Smaller  
capacitors, down to 10µF, may be used for light loads  
in applications that can tolerate higher output ripple.  
Surfa c e -mount c a p a c itors a re g e ne ra lly p re fe rre d  
because they lack the inductance and resistance of the  
leads of their through-hole equivalents.  
may be necessary to connect a capacitor, C  
, in  
COMP  
p a ra lle l with R . Althoug h C  
is norma lly not  
FB  
COMP  
required, the value of C  
depends upon the value  
COMP  
of R and on the individual circuit layout—typical val-  
FB  
ues range from 0pF to 220pF.  
P C La yo u t a n d Gro u n d in g  
Due to high current levels and fast switching wave-  
forms, proper PC board layout is essential. In particular,  
keep all leads short, especially the lead connected to  
the FB p in a nd thos e c onne c ting Q1, L1, a nd D1  
Input Bypass Capacitor  
A 22µF ta nta lum c a p a c itor in p a ra lle l with a 0.1µF  
ceramic normally provides sufficient bypassing. Mount  
the 0.1µF capacitor very close to the IC. La rg e r  
capacitors may be needed if the incoming supply has  
high impedance. Less bypass capacitance is accept-  
able if the circuit is run off a low-impedance supply.  
Begin prototyping with a large bypass capacitor; when  
the circuit is working, reduce the bypass to the smallest  
value that gives good results. Although bench power  
supplies have low impedance at DC, they often have  
high impedance at the frequencies used by switching  
DC-DC converters.  
together. Mount the R resistor very close to the IC.  
FB  
Use a star ground configuration: Connect the ground  
lead of the input bypass capacitor, the output capaci-  
tor, and the inductor at a common point next to the  
GND pin of the MAX749. Additionally, connect the posi-  
tive lead of the input bypass capacitor as close as pos-  
sible to the V+ pin of the IC.  
The e ffe c tive s e rie s re s is ta nc e (ESR) of b oth the  
bypass and filter capacitors affects efficiency. Best per-  
forma nc e is ob ta ine d b y d oub ling up on the filte r  
capacitors or using low-ESR types.  
___________________Ch ip To p o g ra p h y  
The smallest low-ESR SMT capacitors currently avail-  
able are Sprague 595D series, which are about half the  
size of competing products. Sanyo OS-CON organic  
semiconductor through-hole capacitors also exhibit low  
ESR, and are especially useful when operation below  
0°C is required. Table 2 lists the phone numbers of  
these and other manufacturers.  
0. 070"  
(0. 1178mm)  
V+ CS  
V+  
ADJ  
CTRL  
DHI  
0. 808"  
(0. 2032mm)  
DLOW  
FB  
GND  
TRANSISTOR COUNT: 521;  
SUBSTRATE CONNECTED TO GND.  
______________________________________________________________________________________ 11  
Dig it a lly Ad ju s t a b le LCD Bia s S u p p ly  
_______________________________________________________P a c k a g e In fo rm a t io n  
INCHES  
MILLIMETERS  
DIM  
E
MIN  
MAX  
0.200  
MIN  
MAX  
5.08  
A
E1  
D
A1 0.015  
A2 0.125  
A3 0.055  
0.38  
3.18  
1.40  
0.41  
1.14  
0.20  
0.13  
7.62  
6.10  
2.54  
7.62  
0.175  
0.080  
0.022  
0.065  
0.012  
0.080  
0.325  
0.310  
4.45  
2.03  
0.56  
1.65  
0.30  
2.03  
8.26  
7.87  
A3  
A2  
A1  
MAX749  
A
L
B
0.016  
B1 0.045  
0.008  
D1 0.005  
0.300  
E1 0.240  
0.100  
eA 0.300  
C
0° - 15°  
E
C
e
e
B1  
eA  
eB  
B
eB  
L
0.400  
0.150  
10.16  
3.81  
0.115  
2.92  
D1  
INCHES  
MILLIMETERS  
PKG. DIM  
PINS  
Plastic DIP  
PLASTIC  
DUAL-IN-LINE  
PACKAGE  
(0.300 in.)  
MIN  
MAX MIN  
MAX  
8
P
P
P
P
P
N
D
D
D
D
D
D
0.348 0.390 8.84  
9.91  
14  
16  
18  
20  
24  
0.735 0.765 18.67 19.43  
0.745 0.765 18.92 19.43  
0.885 0.915 22.48 23.24  
1.015 1.045 25.78 26.54  
1.14 1.265 28.96 32.13  
21-0043A  
INCHES  
MILLIMETERS  
DIM  
MIN  
0.053  
MAX  
0.069  
0.010  
0.019  
0.010  
0.157  
MIN  
1.35  
0.10  
0.35  
0.19  
3.80  
MAX  
1.75  
0.25  
0.49  
0.25  
4.00  
A
D
A1 0.004  
B
C
E
e
0.014  
0.007  
0.150  
0°-8°  
A
0.101mm  
0.004in.  
0.050  
1.27  
e
H
L
0.228  
0.016  
0.244  
0.050  
5.80  
0.40  
6.20  
1.27  
A1  
C
B
L
INCHES  
MILLIMETERS  
DIM PINS  
Narrow SO  
SMALL-OUTLINE  
PACKAGE  
MIN MAX  
MIN  
MAX  
5.00  
8.75  
8
0.189 0.197 4.80  
D
D
D
E
H
14 0.337 0.344 8.55  
16 0.386 0.394 9.80 10.00  
21-0041A  
(0.150 in.)  
12 ______________________________________________________________________________________  

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