MAX8663ETL [MAXIM]
Power-Management ICs for Single-Cell, Li+ Battery-Operated Devices; 用于单节的电源管理IC ， Li +电池供电设备
| 型号： | MAX8663ETL |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | Power-Management ICs for Single-Cell, Li+ Battery-Operated Devices |
| 文件： | 总36页 (文件大小：874K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
19-0732; Rev 0; 2/07
Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
2/MAX863
General Description
Features
♦
♦
♦
♦
♦
The MAX8662/MAX8663 power-management ICs
(PMICs) are efficient, compact devices suitable for
smart cellular phones, PDAs, Internet appliances, and
other portable devices. They integrate two synchronous
buck regulators, a boost regulator driving two to seven
white LEDs, four low-dropout linear regulators (LDOs),
and a linear charger for a single-cell Li-ion (Li+) battery.
Two 95%-Efficient 1MHz Buck Regulators
Main Regulator: 0.98V to V at 1200mA
IN
Core Regulator: 0.98V to V at 900mA
IN
1MHz Boost WLED Driver
Drives Up to 7 White LEDs at 30mA (max)
PWM and Analog Dimming Control
Four Low-Dropout Linear Regulators
1.7V to 5.5V Input Range
Maxim’s Smart Power Selector™ (SPS) safely distrib-
utes power between an external power source (AC
adapter, auto adapter, or USB source), battery, and the
system load. When system load peaks exceed the
external source capability, the battery supplies supple-
mental current. When system load requirements are
small, residual power from the external power source
charges the battery. A thermal-limiting circuit limits bat-
tery-charge rate and external power-source current to
prevent overheating. The PMIC also allows the system
to operate with no battery or a discharged battery.
15µA Quiescent Current
Single-Cell Li+ Charger
Adapter or USB Input
Thermal-Overload Protection
Smart Power Selector (SPS)
AC Adapter/USB or Battery Source
Charger-Current and System-Load Sharing
Ordering Information
TEMP
RANGE
PKG
CODE
PART
PIN-PACKAGE
The MAX8662 is available in a 6mm x 6mm, 48-pin thin
QFN package, while the MAX8663, without the LED driver,
is available in a 5mm x 5mm, 40-pin thin QFN package.
-40°C to 48 Thin QFN-EP*
+85°C 6mm x 6mm x 0.8mm
-40°C to 40 Thin QFN-EP*
+85°C 5mm x 5mm x 0.8mm
MAX8662ETM+
MAX8663ETL+
T4866-1
T4055-1
Applications
Smart Phones and PDAs
+Denotes a lead-free package.
*EP = Exposed paddle.
MP3 and Portable Media Players
Palmtop and Wireless Handhelds
Pin Configurations
Typical Operating Circuit
TOP VIEW
DC/USB
INPUT
TO SYSTEM
POWER
DC
SYS
35 34 33 32 31 30 29 28 27
36
26
25
BAT
Li+
BATTERY
PWR OK
POK
FB1
EN6
EN7
LX3
24
23
22
37
38
39
CHARGE
STATUS
CHG
MAX8662
PWM
EN5
OUT1
0.98V TO V / 1.2A
IN
MAX8663 LX1
CHARGE
ENABLE
CEN
EN1
EN2
OUT2
0.98V TO V / 0.9A
IN
21 EN4
20 OUT5
19 IN45
PG3 40
LX2
LX3
OUT6 41
TO SYS
IN67
42
43
MAX8662
OUT3
30mA
WLED
18
OUT4
OUT7
EN3
EN4
EN5
(MAX8662 ONLY)
CS
17 GND
16 REF
VL 44
SL1 45
CT
14 ISET
13
SL2
PSET
POK
15
46
47
48
EN6
EN7
SL1
500mA
150mA
300mA
150mA
OUT4
OUT5
OUT6
OUT7
THM
OUT4–OUT7
VOLTAGE
2
3
4
5
6
7
8
9
10
1
11
12
SELECT
SL2
THIN QFN
(6mm x 6mm)
Smart Power Selector is a trademark of Maxim Integrated
Products, Inc.
Pin Configurations continued at end of data sheet.
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
ABSOLUTE MAXIMUM RATINGS
LX3 to GND ............................................................-0.3V to +33V
DC_ to GND..............................................................-0.3V to +9V
BAT_ CEN, CHG, EN_, PEN_, POK, PV_, PWM,
SYS1 + SYS2 Continuous Current (2 pins) ..............................3A
LX_ Continuous Current........................................................1.5A
Continuous Power Dissipation (T = +70°C)
A
SYS_, LX1, CS, LX2 to GND.................................-0.3V to +6V
VL to GND ................................................................-0.3V to +4V
BRT, CC3, FB_, IN45, IN67, OVP, REF,
40-Pin 5mm x 5mm Thin QFN
(derate 35.7mW/°C above +70°C)
(multilayer board).......................................................2857mW
48-Pin 6mm x 6mm Thin QFN
SL_ to GND ...........................................-0.3V to (V
+ 0.3V)
YS
S
CT, ISET, PSET, THM to GND .....................-0.3V to (V + 0.3V)
(derate 37mW/°C above +70°C) (multilayer board)...2963mW
Operating Temperature Range ..........................-40°C to +85°C
Junction Temperature Range............................-40°C to +125°C
Storage Temperature Range.............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
VL
OUT4, OUT5 to GND................................-0.3V to (V
OUT6, OUT7 to GND................................-0.3V to (V
+ 0.3V)
+ 0.3V)
IN45
IN67
PG_ to GND...........................................................-0.3V to +0.3V
BAT1 + BAT2 Continuous Current...........................................3A
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS (Input Limiter and Battery Charger)
(V
= 5V, V
= 4V, V
= 0V, V
= 5V, R
= 3kΩ, R
= 3.15kΩ, C = 0.068µF, T = -40°C to +85°C, unless otherwise
ISET CT A
BAT
CEN
PEN_
PSET
DC
noted.) (Note 1)
PARAMETER
INPUT LIMITER
DC Operating Range
2/MAX863
SYMBOL
CONDITIONS
MIN
TYP
MAX UNITS
V
(Note 2)
4.1
3.9
6.6
8.0
4.1
7.2
V
V
V
DC
DC Undervoltage Threshold
DC Overvoltage Threshold
V
V
V
rising, 500mV hysteresis
rising, 100mV hysteresis
4.0
6.9
1.5
0.9
DC_L
DC_H
DC
DC
V
I
= I
BAT
= I
BAT
= 0mA, V
= 0mA, V
= 0V
= 5V
SYS
SYS
CEN
CEN
DC Supply Current
mA
µA
Ω
I
V
= 5V, V
= 5V, V
= V
= 0V (USB
PEN2
DC
CEN
PEN1
DC Shutdown Current
110
0.1
50
180
0.2
85
suspend mode)
DC-to-SYS Dropout
On-Resistance
R
V
= 5V, I = 400mA, V
= 5V
CEN
DC_SYS
DC
SYS
DC-to-BAT Dropout
Threshold
When V
regulation and charging stops, V
SYS DC
falling, 150mV hysteresis
V
20
mV
DR_DC_BAT
VL Voltage
V
I
= 0 to 10mA
3.1
5.2
3.3
5.3
3.5
5.4
V
V
VL
VL
SYS Regulation Voltage
V
V
= 5.8V, I
= 1mA, V
= 5V
SYS_REG
DC
SYS
CEN
V
R
= 5V, V
= 5V,
= 5V,
= 5V,
= 5V
PEN1
PEN2
1800
900
450
450
2000
1000
500
475
90
2200
1100
550
1.5kΩ
PSET =
V
R
= 5V, V
= 3kΩ
PEN1
PEN2
PEN2
PEN2
PSET
V
R
= 5V, V
= 6kΩ
PEN1
DC Input Current Limit
I
V
= 5V, V
= 4.0V
SYS
mA
DC_LIM
DC
PSET
V
= 0V, V
PEN1
500
(500mA USB mode)
V
= V = 0V
PEN1
PEN2
80
100
6.0
(100mA USB mode)
PSET Resistance Range
R
Guaranteed by SYS current limit
Current-limit ramp time
1.5
kΩ
PSET
Input Limiter Soft-Start Time
T
1.5
ms
SS_DC_SYS
2
_______________________________________________________________________________________
Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
2/MAX863
ELECTRICAL CHARACTERISTICS (Input Limiter and Battery Charger) (continued)
(V
= 5V, V
= 4V, V
= 0V, V
= 5V, R
= 3kΩ, R
= 3.15kΩ, C = 0.068µF, T = -40°C to +85°C, unless otherwise
ISET CT A
BAT
CEN
PEN_
PSET
DC
noted.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
40
MAX UNITS
BATTERY CHARGER
BAT-to-SYS On-Resistance
R
V
= 0V, V
= 4.2V, I = 1A
SYS
80
mΩ
BAT_REG
BAT_REG
DC
BAT
V
I
= 5V, V
= V
= 0V (USB 100mA mode),
PEN2
DC
PEN1
BAT-to-SYS Reverse
Regulation Voltage
= 200mA (BAT to SYS voltage drop during SYS
50
100
150
mV
SYS
overload)
T
T
= +25°C
4.179 4.200 4.221
4.158 4.200 4.242
A
BAT Regulation Voltage
BAT Recharge Threshold
V
I
= 0mA
V
BAT
= -40°C to +85°C
A
BAT voltage drop to restart charging
-140
-100
1250
750
-60
mV
R
ISET
R
ISET
R
ISET
= 1.89kΩ
= 3.15kΩ
= 7.87kΩ
I
= 0mA,
SYS
BAT Fast-Charge Current
R
V
= 1.5kΩ,
675
825
mA
PSET
= V
= 5V
PEN2
PEN1
300
V
= 2.5V, R
= 3.15kΩ (prequalification
BAT
ISET
BAT Prequalification Current
ISET Resistance Range
75
mA
current is 10% of fast-charge current)
Guaranteed by BAT charging current
(1.5A to 300mA)
R
1.57
2.9
7.87
kΩ
ISET
R
= 3.15kΩ (ISET output voltage to actual
ISET
V
-to-I
Ratio
2
V/A
ms
V
ISET
BAT
charge-current ratio)
Charger Soft-Start Time
t
Charge-current ramp time
1.5
3.0
SS_CHG
BAT Prequalification
Threshold
V
rising, 180mV hysteresis
3.1
BAT
V
V
= 0V
0.01
0.01
5
5
DC
DC
V
= 4.2V,
BAT
BAT Leakage Current
µA
outputs disabled
= V
= 5V
CEN
I
where CHG goes
BAT
high, and top-off timer;
falling (7.5% of
fast-charge current)
CHG and Top-Off Threshold
R
ISET
= 3.15kΩ
56.25
300
mA
I
BAT
Timer-Suspend Threshold
Timer Accuracy
I
falling (Note 3)
= 0.068µF
250
-20
350
+20
mV
%
BAT
C
CT
From CEN high to end of prequalification charge,
= 2.5V, C = 0.068µF
Prequalification Time
Charge Time
t
30
300
30
Min
Min
Min
PREQUAL
V
BAT
CT
From CEN high to end of fast charge,
= 0.068µF
t
FST-CHG
C
CT
From CHG high to end of fast charge,
= 0.068µF
Top-Off Time
t
TOP-OFF
C
CT
Charger Thermal-Limit
Temperature
(Note 4)
= 3kΩ
100
50
°C
Charger Thermal-Limit Gain
R
mA/°C
PSET
_______________________________________________________________________________________
3
Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
ELECTRICAL CHARACTERISTICS (Input Limiter and Battery Charger) (continued)
(V
= 5V, V
= 4V, V
= 0V, V
= 5V, R
= 3kΩ, R
= 3.15kΩ, C = 0.068µF, T = -40°C to +85°C, unless otherwise
ISET CT A
BAT
CEN
PEN_
PSET
DC
noted.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX UNITS
THERMISTOR INPUT (THM)
THM Internal Pullup
Resistance
10
kΩ
THM Resistance Threshold,
Hot
Resistance falling (1% hysteresis)
Resistance rising (1% hysteresis)
Resistance falling
3.73
26.98
270
3.97
28.7
300
4.21
30.42
330
kΩ
kΩ
Ω
THM Resistance Threshold,
Cold
THM Resistance Threshold,
Disabled
LOGIC I/O (POK, CHG, PEN_, EN_, PWM, CEN)
Input Logic-High Level
1.3
-1
V
V
2/MAX863
Input Logic-Low Level
0.4
+1
V
V
= 0V to 5.5V, T = +25°C
+0.001
0.01
10
LOGIC
LOGIC
A
Logic Input-Leakage Current
µA
mV
µA
= 5.5V, T = +85°C
A
Logic Output-Voltage Low
I
= 1mA
100
1
SINK
T
= +25°C
= +85°C
0.001
0.01
A
Logic Output-High Leakage
Current
V
= 5.5V
T
LOGIC
A
ELECTRICAL CHARACTERISTICS (Output Regulator)
(V
= V
= V
= V
= 4.0V, V
= 1.25V, circuit of Figure 1, T = -40°C to +85°C, unless otherwise noted.) (Note 1)
BRT A
SYS_
PV_
IN45
IN67
PARAMETER
SYSTEM
SYS Operating Range
SYMBOL
CONDITIONS
MIN
TYP
MAX UNITS
V
2.6
2.4
5.5
2.6
70
35
35
2
V
V
SYS
SYS Undervoltage Threshold
V
V
rising, 100mV hysteresis
2.5
35
16
16
1
UVLO_SYS
SYS
Extra supply current when at least one output is on
OUT1 on, V
OUT2 on, V
OUT3 on
= 0V
= 0V
µA
PWM
PWM
mA
SYS Bias Current Additional
Regulator Supply Current
Not including
SYS bias current
OUT4 on (current into IN45)
OUT5 on (current into IN45)
OUT6 on (current into IN67)
OUT7 on (current in IN67)
20
16
17
16
1.0
30
25
27
25
1.1
µA
Internal Oscillator Frequency
PWM frequency of OUT1, OUT2, and OUT3
0.9
MHz
BUCK REGULATOR 1
I
+ I
, no load,
SYS
PV1
V
V
= 0V
= 5V
16
35
µA
PWM
PWM
Supply Current
not including SYS
bias current
2.9
mA
Output Voltage Range
V
Guaranteed by FB accuracy
0.98
3.30
V
OUT1
Maximum Output Current
I
1200
mA
OUT1
4
_______________________________________________________________________________________
Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
2/MAX863
ELECTRICAL CHARACTERISTICS (Output Regulator) (continued)
(V
= V
= V
= V
= 4.0V, V
= 1.25V, circuit of Figure 1, T = -40°C to +85°C, unless otherwise noted.) (Note 1)
BRT A
SYS_
PV_
IN45
IN67
PARAMETER
FB Regulation Accuracy
SYMBOL
CONDITIONS
= 0.98V, I = 0 to 1200mA,
= 0.98V to 3.3V
MIN
TYP
MAX UNITS
From V
FB1
OUT1
-3
+3
%
µA
Ω
V
OUT1
FB1 Input Leakage Current
pMOS On-Resistance
0.01
0.12
0.15
0.2
0.10
0.24
V
V
V
V
= 3.3V
= 2.6V
= 3.3V
= 2.6V
PV1
PV1
PV1
PV1
I
I
= 100mA
LX1
LX1
0.4
2.2
nMOS On-Resistance
= 100mA
Ω
0.3
pMOS Current Limit
1.4
1.8
A
Skip Mode Transition Current
nMOS Zero-Cross Current
90
mA
mA
25
V
= V
= 5.5V
PV1
0.01
1.00
LX1
LX1
V
= 0V, V
= +25°C
= 5.5V,
SYS
EN1
LX Leakage
µA
T
A
V
= 0V, V
= 5.5V
-5.00 -0.01
PV1
BUCK REGULATOR 2
Supply Current
V
V
= 0V
= 5V
16
2.1
35
µA
mA
V
PWM
PWM
I
+ I
, no load, not
SYS
PV2
including SYS bias current
Output Voltage Range
Guaranteed by FB accuracy
0.98
3.30
Maximum Output Current
900
mA
From V
= 0.98V, I
= 0 to 600mA,
FB2
OUT2
FB Regulation Accuracy
FB2 Input Leakage Current
pMOS On-Resistance
-3
+3
%
µA
Ω
V
= 0.98V to 3.3V
OUT2
0.01
0.2
0.3
0.2
0.3
0.10
0.4
V
V
V
V
= 3.3V
= 2.6V
= 3.3V
= 2.6V
PV2
PV2
PV2
PV2
I
I
= 100mA
LX2
LX2
0.4
nMOS On- Resistance
= 100mA
Ω
pMOS Current Limit
1.07
1.30
90
1.55
A
Skip Mode Transition Current
nMOS Zero-Cross Current
mA
mA
25
V
V
= V
= 5.5V
0.01
1.00
LX2
LX2
PV2
V
= 0V, V
= +25°C
= 5.5V,
SYS
EN2
LX Leakage
µA
T
A
= 0V, V
= 5.5V
-5.00 -0.01
PV2
BOOST REGULATOR FOR LED DRIVER
At SYS, no load, not
including SYS bias current
Supply Current
Switching
1
mA
Output Range
V
V
30
V
%
%
V
OUT3
SYS
Minimum Duty Cycle
Maximum Duty Cycle
CS Regulation Voltage
OVP Regulation Voltage
OVP Sink Current
D
10
92
MIN
D
90
MAX
V
0.29
0.32
0.35
CS
Duty = 90%, I
= 0mA
1.225 1.250 1.275
V
LX3
19.2
20.0
1.25
20.8
µA
ms
OVP Soft-Start Period
Time for I
to ramp from 0 to 20µA
OVP
_______________________________________________________________________________________
5
Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
ELECTRICAL CHARACTERISTICS (Output Regulator) (continued)
(V
= V
= V
= V
= 4.0V, V
= 1.25V, circuit of Figure 1, T = -40°C to +85°C, unless otherwise noted.) (Note 1)
BRT A
SYS_
PV_
IN45
IN67
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
0.01
0.1
MAX UNITS
T
A
T
A
= +25°C
= +85°C
1
V
V
= 0V,
EN3
OVP
OVP Leakage Current
nMOS On-Resistance
µA
= V
= 5.5V
SYS
I
= 100mA
0.6
1.2
Ω
LX3
T
T
= +25°C
= +85°C
0.01
0.1
5.00
A
nMOS Off-Leakage Current
V
= 30V
µA
mA
LX3
A
nMOS Current Limit
LED DRIVER
500
620
900
BRT Input Range
REF Voltage
V
V
I
I
= 0 to 30mA
0
1.45
-1
1.5
1.55
+1
V
V
BRT
CS
= 0mA
1.50
-0.01
0.1
REF
REF
T
T
= +25°C
= +85°C
A
BRT Input Current
CS Sink Current
V
V
V
= 0 to 1.5V
µA
mA
%/V
BRT
A
V
V
= 1.5V
28
30
32
BRT
BRT
= 0.2V
8
CS
= 50mV
0.4
0.8
1.2
CS Current-Source
Line Regulation
= 2.7V to 5.5V
0.1
SYS
PWM DIMMING
EN3 DC Turn-On Delay
EN3 Shutdown Delay
From V
From V
= high to LED on
= low to LED off
1.5
1.5
2.0
2.0
2.5
2.5
ms
ms
EN3
EN3
Time between rising edges
on EN3 for PWM dimming to
become active
Maximum
Minimum
1.5
2.0
8
ms
µs
PWM Dimming Capture
Period
10
PWM Dimming Pulse-Width
Resolution
Resolution of high or low-pulse width on EN3 for
dimming change
0.5
µs
LINEAR REGULATORS
IN45, IN67 Operating Range
V
1.7
1.5
5.5
1.7
V
V
IN45
IN45, IN67 Undervoltage
Threshold
V
V
rising, 100mV hysteresis
IN45
1.6
UVLO-IN45
Output Noise
f = 100Hz to 100kHz
f = 100kHz
200
30
µV
RMS
PSRR
dB
µA
Shutdown Supply Current
Soft-Start Ramp Time
V
V
= V
= 0V, T = +25°C
0.001
10
1
EN4
EN5
A
to 90% of final value
V/ms
OUT4
Output Discharge
Resistance in Shutdown
V
= 0V
0.5
1.0
2.0
kΩ
EN4
LINEAR REGULATOR 4 (LDO4)
Supply Current
At IN45, V
= 0V
I
= 0A
OUT4
20
30
µA
%
EN5
I
= 0 to 500mA,
OUT4
Voltage Accuracy
-1.5
+1.5
V
= V
+ 0.3V to 5.5V with 1.7V (min)
OUT4
IN45
Minimum Output Capacitor
Dropout Resistance
Current Limit
C
Guaranteed stability, ESR < 0.05Ω
3.76
µF
Ω
OUT4
IN45 to OUT4
0.2
0.4
V
= 0V
500
700
mA
OUT4
6
_______________________________________________________________________________________
Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
2/MAX863
ELECTRICAL CHARACTERISTICS (OUTPUT REGULATOR) (continued)
(V
= V
= V
= V
= 4.0V, V
= 1.25V, circuit of Figure 1, T = -40°C to +85°C, unless otherwise noted.) (Note 1)
BRT A
SYS_
PV_
IN45
IN67
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
LINEAR REGULATOR 5 (LDO5)
Supply Current
At IN45, V
= 0V
I
= 0A
OUT5
16
25
µA
%
EN4
I
= 0 to 150mA,
OUT5
Voltage Accuracy
-1.5
0.8
+1.5
V
= V
+ 0.3V to 5.5V with 1.7V (min)
OUT5
IN45
Minimum Output Capacitor
Dropout Resistance
Current Limit
C
Guaranteed stability, ESR < 0.05Ω
µF
Ω
OUT5
IN45 to OUT5
0.6
1.2
V
= 0V
150
210
mA
OUT5
LINEAR REGULATOR 6 (LDO6)
Supply Current
At IN67, V
= V
, V
= 0V
I = 0A
OUT6
17
27
µA
%
EN6
SYS EN7
Voltage Accuracy
I
= 0 to 300mA, V
= V + 0.3V to 5.5V
OUT6
-1.5
+1.5
OUT6
IN67
Minimum Output Capacitor
Dropout Resistance
Current Limit
C
Guaranteed stability, ESR < 0.05Ω
1.76
µF
Ω
OUT6
IN67 to OUT6
0.35
420
0.60
V
= 0V
300
mA
OUT6
LINEAR REGULATOR 7 (LDO7)
Supply Current
At IN67, V
= 0V, V
= V
I = 0A
OUT7
16
25
µA
%
EN6
EN7
SYS
I
= 0 to 150mA,
OUT7
Voltage Accuracy
-1.5
0.8
+1.5
V
= V
+ 0.3V to 5.5V with 1.7V (min)
OUT7
IN67
Minimum Output Capacitor
Dropout Resistance
Current Limit
C
Guaranteed stability, ESR < 0.05Ω
µF
Ω
OUT7
IN67 to OUT6
0.6
1.2
V
= 0V
150
210
mA
OUT7
THERMAL SHUTDOWN
Thermal-Shutdown
Temperature
T rising
J
165
15
°C
°C
Thermal-Shutdown
Hysteresis
Note 1: Limits are 100% production tested at T = +25°C. Limits over the operating temperature range are guaranteed through
A
correlation using statistical quality control (SQC) methods.
Note 2: Input withstand voltage. Not designed to operate above V
= 6.5V due to thermal-dissipation issues.
DC
Note 3: ISET voltage when CT timer stops. Occurs only when in constant-current mode. Translates to 20% of fast-charge current.
Note 4: Temperature at which the input current limit begins to reduce.
_______________________________________________________________________________________
7
Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
Typical Operating Characteristics
(Circuit of Figure 1, V
= 5V, R
= 1.5kΩ, R
= 3kΩ, V
= 3.3V, V
= 1.3V, SL1 = SL2 = open, V
= 0V, V
=
DC
PSET
OUT2
ISET
OUT1
= 0.1µF, C
OUT2
CEN
PEN1
V
PEN2
= 5V, C
= 2 x 10µF, C
= 2 x 10µF, C
= 4.7µF, C
= 1µF, C
= 2.2µF, C
= 1µF, CT =
OUT1
OUT3
OUT4
OUT5
OUT6
OUT7
0.068µF, C
otherwise noted.)
= C = 0.1µF, R
= 10kΩ, L1 = 3.3µH, L2 = 4.7µH, L3 = 22µH, GND = PG1 = PG2 = PG3 = 0, T = +25°C, unless
THM A
REF
VL
INPUT QUIESCENT CURRENT
vs. INPUT VOLTAGE (CHARGER ENABLED)
INPUT QUIESCENT CURRENT
vs. INPUT VOLTAGE (CHARGER DISABLED)
INPUT QUIESCENT CURRENT
vs. INPUT VOLTAGE (SUSPEND)
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
0.20
0.18
0.16
0.14
0.12
0.10
0.08
0.06
0.04
0.02
0
V
= 4.2V
= 0
V
= 4.2V
BAT
= 0mA
V
= 3.6V
BAT
BAT
I
I
SYS
SYS
V
V
RISING
FALLING
BAT
BAT
CHARGER IN
DONE MODE
PEN1 = PEN2 = 0
CEN = 1
V
V
RISING
FALLING
BAT
BAT
2/MAX863
0
1
2
3
4
5
6
7
8
0
1
2
3
4
5
6
7
8
0
1
2
3
4
5
6
7
8
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
INPUT VOLTAGE (V)
BATTERY-LEAKAGE CURRENT
vs. BATTERY VOLTAGE
BATTERY-LEAKAGE CURRENT
vs. TEMPERATURE (INPUT DISCONNECTED)
BATTERY-REGULATION VOLTAGE
vs. TEMPERATURE
4.200
0.5
0.8
V
= 4.0V
EN_ = 0
BAT
EN_ = 0, CEN = 1
EN_ = 0
V
V
OPEN
= 5V
DC
DC
4.195
4.190
0.7
0.6
0.5
0.4
0.4
0.3
0.2
0.1
0
4.185
4.180
4.175
4.170
0.3
0.2
-40
-15
10
35
60
85
0
1
2
3
4
5
-40
-15
10
35
60
85
AMBIENT TEMPERATURE (°C)
BATTERY VOLTAGE (V)
AMBIENT TEMPERATURE (°C)
CHARGE CURRENT
vs. BATTERY VOLTAGE (100mA USB)
CHARGE CURRENT
vs. BATTERY VOLTAGE (500mA USB)
CHARGE CURRENT
vs. BATTERY VOLTAGE (AC ADAPTER)
100
90
80
70
60
50
40
30
20
10
0
550
500
450
400
350
800
700
600
500
400
300
200
100
0
V
R
= 5V
V
R
= 5V
DC
DC
= 3kΩ
= 3kΩ
ISET
ISET
PEN1 = 0
PEN2 = 1
PEN1 = PEN2 = 1
V
V
RISING
BAT
BAT
V
V
RISING
BAT
BAT
FALLING
FALLING
300
250
200
150
100
50
V
V
RISING
BAT
BAT
FALLING
V
R
= 5V
= 3kΩ
PEN1 = PEN2 = 0
DC
ISET
0
0
1
2
3
4
5
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
BATTERY VOLTAGE (V)
0
1
2
3
4
5
BATTERY VOLTAGE (V)
BATTERY VOLTAGE (V)
8
_______________________________________________________________________________________
Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
2/MAX863
Typical Operating Characteristics (continued)
(Circuit of Figure 1, V
= 5V, R
= 1.5kΩ, R
= 3kΩ, V
= 3.3V, V
= 1.3V, SL1 = SL2 = open, V
= 0V, V
=
DC
PSET
OUT2
ISET
OUT1
OUT2
CEN
PEN1
V
PEN2
= 5V, C
= 2 x 10µF, C
= 2 x 10µF, C
= 0.1µF, C
= 4.7µF, C
= 1µF, C
= 2.2µF, C
= 1µF, CT =
OUT1
OUT3
OUT4
OUT5
OUT6
OUT7
0.068µF, C
otherwise noted.)
= C = 0.1µF, R
= 10kΩ, L1 = 3.3µH, L2 = 4.7µH, L3 = 22µH, GND = PG1 = PG2 = PG3 = 0, T = +25°C, unless
THM A
REF
VL
CHARGE CURRENT vs. AMBIENT TEMPERATURE
CHARGE CURRENT vs. AMBIENT TEMPERATURE
(HIGH IC POWER DISSIPATION)
SYS OUTPUT VOLTAGE
vs. INPUT VOLTAGE
(LOW IC POWER DISSIPATION)
900
900
5.6
PEN1 = PEN2 = 1
800
V
= 4.0V
= 0mA
BAT
PEN1 = PEN2 = 1
5.4
5.2
5.0
4.8
800
I
SYS
PEN1 = 0
PEN2 = 1
700
600
700
600
CHARGER
DISABLED
PEN1 = 0, PEN2 = 1
500
PEN1 = 0, PEN2 = 1
500
4.6
4.4
4.2
4.0
3.8
3.6
400
400
CHARGER
ENABLED
V
R
= 5.0V, V = 4.0V
V
R
= 6.5V, V = 3.1V
DC BAT
DC
BAT
300
200
100
0
300
200
100
0
= 3kΩ, CEN = 0, EN_ = 0
= 3kΩ, CEN = 0, EN_ = 0
ISET
ISET
PEN1 = PEN2 = 0
PEN1 = PEN2 = 0
-40
-15
10
35
60
85
-40
-15
10
35
60
85
0
1
2
3
4
5
6
7
8
AMBIENT TEMPERATURE (°C)
AMBIENT TEMPERATURE (°C)
INPUT VOLTAGE (V)
SYS OUTPUT VOLTAGE
vs. SYS OUTPUT CURRENT (DC DISCONNECTED)
SYS OUTPUT VOLTAGE
vs. SYS OUTPUT CURRENT (500mA USB)
SYS OUTPUT VOLTAGE
vs. SYS OUTPUT CURRENT (AC ADAPTER)
5.6
5.6
5.4
5.2
5.0
4.8
4.6
4.4
4.2
4.0
3.8
3.6
5.6
5.4
5.2
5.0
4.8
4.6
4.4
4.2
4.0
3.8
3.6
THE SLOPE OF THIS LINE SHOWS THAT THE
BAT-TO-SYS RESISTANCE IS 49mΩ.
V
V
= 5.0V
= 4.0V
V
V
= 5.0V
= 4.0V
DC
BAT
DC
BAT
5.4
PEN1 = 0, PEN2 = 1
CEN = 1
PEN1 = PEN2 = 1
CEN = 1
5.2
V
V
= 0V
DC
5.0
4.8
4.6
4.4
4.2
4.0
3.8
3.6
= 4.0V
BAT
0
0.5
1.0
1.5
(A)
2.0
2.5
3.0
0
0.5
1.0
1.5
(A)
2.0
2.5
3.0
0
0.5
1.0
1.5
(A)
2.0
2.5
3.0
I
I
I
SYS
SYS
SYS
USB CONNECT (I
= 0mA)
USB CONNECT (I
= 50mA)
MAX8662/63 toc17
SYS
SYS
MAX8662/63 toc16
5V/div
5V/div
5V
5V
0V
V
0V
V
DC
DC
+95mA
4.4V
+95mA
4.4V
200mA/div
2V/div
200mA/div
2V/div
I
I
IN
IN
5V
0mA
0mA
4.0V
4.0V
V
SYS
V
5V
SYS
V
V
POK
5V/div
5V/div
V
V
POK
0V
0V
5V/div
5V/div
0V
CHG
CHG
0mA
+95mA
I
50mA
BAT
200mA/div
I
NEGATIVE BATTERY
CURRENT FLOWS INTO
THE BATTERY
BAT
200mA/div
NEGATIVE BATTERY
CURRENT FLOWS
-45mA
(CHARGING).
INTO THE BATTERY (CHARGING).
200μs/div
PEN1 = PEN2 = 0, CEN = 0,
= 4.0V, I = 0mA, EN_ = 1
200μs/div
PEN1 = PEN2 = 0, CEN = 0,
V = 4.0V, I = 50mA, EN_ = 1
BAT
V
BAT
SYS
SYS
_______________________________________________________________________________________
9
Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
Typical Operating Characteristics (continued)
(Circuit of Figure 1, V
= 5V, R
= 1.5kΩ, R
= 3kΩ, V
= 3.3V, V
= 1.3V, SL1 = SL2 = open, V
= 0V, V
=
DC
PSET
OUT2
ISET
OUT1
OUT2
CEN
PEN1
V
PEN2
= 5V, C
= 2 x 10µF, C
= 2 x 10µF, C
= 0.1µF, C
= 4.7µF, C
= 1µF, C
= 2.2µF, C
= 1µF, CT =
OUT1
OUT3
OUT4
OUT5
OUT6
OUT7
0.068µF, C
otherwise noted.)
= C = 0.1µF, R
= 10kΩ, L1 = 3.3µH, L2 = 4.7µH, L3 = 22µH, GND = PG1 = PG2 = PG3 = 0, T = +25°C, unless
REF
VL
THM
A
AC ADAPTER CONNECT (I
= 500mA)
USB DISCONNECTED (500mA USB)
MAX8662/63 toc19
SYS
MAX8662/63 toc18
5V/div
V
DC
5V/div
5V
5V
0V
V
DC
475mA
+1280mA
4.4V
I
IN
1A/div
2V/div
5V/div
5V/div
0mA
I
IN
500mA/div
1V/div
V
SYS
POK
5V
4.4V
V
V
SYS
4.0V
V
CHG
5V/div
V
0V
CHG
0V
0mA
500mA
1A/div
-780mA
I
500mA/div
BAT
-475mA
I
BAT
NEGATIVE BATTERY CURRENT FLOWS
INTO THE BATTERY (CHARGING).
2/MAX863
400μs/div
200μs/div
PEN1 = 0, PEN2 = 1, CEN = 0,
= 4.0V, I = 0mA
PEN1 = PEN2 = 1, CEN = 0,
V
= 4.0V, I = 500mA, EN_ = 1
V
BAT
BAT
SYS
SYS
OUT1 REGULATOR EFFICIENCY
vs. LOAD CURRENT
CHARGER ENABLE (I
= 0mA)
SYS
MAX8662/63 toc20
100
V
V
CEN
0V
5V/div
1A/div
2.8V
90
80
70
60
50
40
30
20
10
0
475mA
4.4V
I
IN
0mA
V
= 3.6V
BAT
V
= 3.6V
= 4.2V
BAT
5V
SYS
2V/div
5V/div
V
BAT
V
= 4.2V
BAT
V
CHG
0V
0mA
I
BAT
PWM = 0
PWM = 1
= 3.3V
-475mA
500mA/div
V
OUT1
0.1
1
10
100
1000 10,000
200μs/div
LOAD CURRENT (mA)
PEN1 = 0, PEN2 = 1, V = 4.0V, I = 0mA, EN_ = 1
BAT
SYS
OUT1 REGULATOR LOAD REGULATION
OUT1 REGULATOR LINE REGULATION
OUT1 VOLTAGE vs. TEMPERATURE
3.40
3.36
3.32
3.28
3.24
3.20
3.4
3.3
3.2
3.1
3.0
2.9
2.8
2.7
2.6
2.5
3.310
3.306
3.302
3.298
3.294
3.290
V
R
= 4.0V
BAT
= 330Ω
LOAD
V
= 4.2V
BAT
V
= 3.6V
BAT
R
= 330Ω
LOAD
0.1
1
10
100
1000 10,000
2.7 3.1 3.5 3.9 4.3 4.7 5.1 5.5
(V)
-40
-15
10
35
60
85
LOAD CURRENT (mA)
V
AMBIENT TEMPERATURE (°C)
SYS
10 ______________________________________________________________________________________
Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
2/MAX863
Typical Operating Characteristics (continued)
(Circuit of Figure 1, V
= 5V, R
= 1.5kΩ, R
= 3kΩ, V
= 3.3V, V
= 1.3V, SL1 = SL2 = open, V
= 0V, V
=
DC
PSET
OUT2
ISET
OUT1
OUT2
CEN
PEN1
V
PEN2
= 5V, C
= 2 x 10µF, C
= 2 x 10µF, C
= 0.1µF, C
= 4.7µF, C
= 1µF, C
= 2.2µF, C
= 1µF, CT =
OUT1
OUT3
OUT4
OUT5
OUT6
OUT7
0.068µF, C
otherwise noted.)
= C = 0.1µF, R
= 10kΩ, L1 = 3.3µH, L2 = 4.7µH, L3 = 22µH, GND = PG1 = PG2 = PG3 = 0, T = +25°C, unless
THM A
REF
VL
OUT1 REGULATOR LIGHT-LOAD
SWITCHING WAVEFORMS
OUT1 REGULATOR HEAVY-LOAD
SWITCHING WAVEFORMS
MAX8662/63 toc25
MAX8662/63 toc26
V
= 4.0V
= 10mA
BAT
OUT1
I
V
10mV/div
2V/div
OUT1
V
OUT1
AC-COUPLED
50mV/div
2V/div
AC-COUPLED
V
LX
V
LX
I
L
200mA/div
I
L
500mA/div
V
= 4.2V
= 1200mA
BAT
OUT1
PWM = 0
I
20μs/div
1μs/div
OUT1 REGULATOR LOAD-
TRANSIENT RESPONSE
OUT1 REGULATOR LINE-
TRANSIENT RESPONSE
MAX8662/63 toc27
MAX8662/63 toc28
5V
V
LX
5V/div
1V/div
V
SYS
I
= 10mA
OUT1
4V
PWM = 0
V
OUT1
I
OUT1
1A/div
1A/div
50mV/div
5V/div
I
L
V
LX
I
V
= 4.0V
BAT
OUT1
I
= 10mA TO 1200mA TO 10mA
PWM = 0
V
OUT1
100mV/div
L
200mA/div
40μs/div
100μs/div
OUT2 REGULATOR EFFICIENCY
vs. LOAD CURRENT
OUT2 REGULATOR LOAD REGULATION
OUT1 ENABLE AND DISABLE RESPONSE
MAX8662/63 toc29
1.32
100
90
80
70
60
50
40
30
20
10
0
V
= 4.2V
BAT
1.31
V
EN1
2V/div
2V/div
1.30
1.29
1.28
1.27
1.26
V
= 4.2V
BAT
V
= 4.2V
= 3.6V
BAT
V
= 3.6V
BAT
V
BAT
V
= 3.6V
BAT
V
OUT1
PWM = 0
PWM = 1
I
= 10mA
OUT1
V
= 3.3V
OUT1
0.1
1
10
100
1000 10,000
0.1
1
10
100
1000
1ms/div
LOAD CURRENT (mA)
LOAD CURRENT (mA)
______________________________________________________________________________________ 11
Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
Typical Operating Characteristics (continued)
(Circuit of Figure 1, V
= 5V, R
= 1.5kΩ, R
= 3kΩ, V
= 3.3V, V
= 1.3V, SL1 = SL2 = open, V
= 0V, V
=
DC
PSET
OUT2
ISET
OUT1
OUT2
CEN
PEN1
V
PEN2
= 5V, C
= 2 x 10µF, C
= 2 x 10µF, C
= 0.1µF, C
= 4.7µF, C
= 1µF, C
= 2.2µF, C
= 1µF, CT =
OUT1
OUT3
OUT4
OUT5
OUT6
OUT7
0.068µF, C
otherwise noted.)
= C = 0.1µF, R
= 10kΩ, L1 = 3.3µH, L2 = 4.7µH, L3 = 22µH, GND = PG1 = PG2 = PG3 = 0, T = +25°C, unless
THM A
REF
VL
OUT2 REGULATOR LINE REGULATION
OUT2 VOLTAGE vs. TEMPERATURE
1.310
1.308
1.306
1.304
1.302
1.300
1.3050
1.3045
1.3040
1.3035
1.3030
R
= 130Ω
V
R
= 4.0V
BAT
LOAD
= 130Ω
LOAD
2/MAX863
2.7 3.1 3.5
3.9 4.3
(V)
4.7
5.1 5.5
-40
-15
10
35
60
85
V
AMBIENT TEMPERATURE (°C)
SYS
OUT2 REGULATOR HEAVY-LOAD
SWITCHING WAVEFORMS
OUT2 REGULATOR LIGHT-LOAD
SWITCHING WAVEFORMS
MAX8662/63 toc35
MAX8662/63 toc34
PWM = 0
V
= 4.0V
= 10mA
BAT
V
OUT2
10mV/div
2V/div
I
OUT2
V
OUT2
20mV/div
2V/div
AC-COUPLED
AC-COUPLED
V
L
V
LX
I
L
500mA/div
I
L
100mA/div
V
= 4.0V
BAT
I
= 900mA
OUT2
1μs/div
10μs/div
OUT2 REGULATOR LINE-
TRANSIENT RESPONSE
OUT2 REGULATOR LOAD-
TRANSIENT RESPONSE
MAX8662/63 toc37
MAX8662/63 toc36
5V
V
LX
5V/div
1A/div
V
1V/div
SYS
I
= 10mA
PWM = 0
4V
OUT1
I
OUT2
V
OUT1
20mV/div
I
L
V
5V/div
500mA/div
50mV/div
LX
200mA/div
V
OUT2
AC-COUPLED
I
L
V
= 4.0V
BAT
I
= 10mA TO 900mA TO 10mA PWM = 0
OUT2
100μs/div
40μs/div
12 ______________________________________________________________________________________
Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
2/MAX863
Typical Operating Characteristics (continued)
(Circuit of Figure 1, V
= 5V, R
= 1.5kΩ, R
= 3kΩ, V
= 3.3V, V
= 1.3V, SL1 = SL2 = open, V
= 0V, V
=
DC
PSET
OUT2
ISET
OUT1
OUT2
CEN
PEN1
V
PEN2
= 5V, C
= 2 x 10µF, C
= 2 x 10µF, C
= 0.1µF, C
= 4.7µF, C
= 1µF, C
= 2.2µF, C
= 1µF, CT =
OUT1
OUT3
OUT4
OUT5
OUT6
OUT7
0.068µF, C
otherwise noted.)
= C = 0.1µF, R
= 10kΩ, L1 = 3.3µH, L2 = 4.7µH, L3 = 22µH, GND = PG1 = PG2 = PG3 = 0, T = +25°C, unless
REF
VL
THM
A
LED CURRENT
vs. PWM DIMMING DUTY CYCLE
OUT2 ENABLE AND DISABLE RESPONSE
LED CURRENT vs. BRT VOLTAGE
MAX8662/63 toc38
30
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
V
= 3.6V
V
V
= 3.6V
BAT
BAT
= 0.25V
BRT
25
20
15
10
5
f = 1kHz
V
EN2
2V/div
1V/div
0V
0V
V
OUT2
I
= 10mA
OUT2
0
1μs/div
0
0.3
0.6
0.9
1.2
1.5
0
10 20 30 40 50 60 70 80 90 100
DUTY CYCLE (%)
BRT VOLTAGE (V)
OUT3 REGULATOR EFFICIENCY
vs. LOAD CURRENT
OUT3 ENABLE AND DISABLE RESPONSE
OUT3 SWITCHING WAVEFORMS
MAX8662/63 toc42
MAX8662/63 toc41
100
90
80
70
60
50
40
30
20
10
0
V
= 5.5V
SYS
I
V
= 4.2V
SYS
L
100mA/div
V
EN3
2V/div
0V
0V
V
= 3.6V
SYS
V
LX
10V/div
10V/div
V
OUT3
V
OUT3
AC-COUPLED
200mV/div
I
= 1mA
OUT3
40ms/div
0.1
1
10
100
1μs/div
LOAD CURRENT (mA)
OUT4 VOLTAGE vs. TEMPERATURE
OUT4 REGULATOR LOAD REGULATION
OUT4 REGULATOR LINE REGULATION
3.315
3.313
3.315
3.4
3.0
2.6
2.2
1.8
1.4
V
R
= 4.0V
BAT
R
= 330Ω
LOAD
= 330Ω
LOAD
3.310
3.305
3.300
3.295
3.290
3.285
3.280
V
= 3.6V
IN
3.311
3.309
3.307
3.305
V
= 5.5V
IN
-40
-15
10
35
60
85
0
100
200
300
400
500
1
2
3
4
5
6
AMBIENT TEMPERATURE (°C)
LOAD CURRENT (mA)
V
(V)
IN_OUT4
_____________________________________________________________________________________ 13
Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
Typical Operating Characteristics (continued)
(Circuit of Figure 1, V
= 5V, R
= 1.5kΩ, R
= 3kΩ, V
= 3.3V, V
= 1.3V, SL1 = SL2 = open, V
= 0V, V
=
DC
PSET
OUT2
ISET
OUT1
OUT2
CEN
PEN1
V
PEN2
= 5V, C
= 2 x 10µF, C
= 2 x 10µF, C
= 0.1µF, C
= 4.7µF, C
= 1µF, C
= 2.2µF, C
= 1µF, CT =
OUT1
OUT3
OUT4
OUT5
OUT6
OUT7
0.068µF, C
otherwise noted.)
= C = 0.1µF, R
= 10kΩ, L1 = 3.3µH, L2 = 4.7µH, L3 = 22µH, GND = PG1 = PG2 = PG3 = 0, T = +25°C, unless
THM A
REF
VL
OUT4 REGULATOR LINE-
TRANSIENT RESPONSE
OUT4 REGULATOR LOAD-
TRANSIENT RESPONSE
MAX8662/63 toc48
MAX8662/63 toc47
5V
3.6V
V
IN45
2V/div
I
500mA/div
50mV/div
OUT4
OUT4
20mV/div
V
OUT4
V
AC-COUPLED
AC-COUPLED
V
= 4.0V
BAT
I
= 10mA TO 500mA TO 10mA
OUT4
I
= 10mA
OUT4
2/MAX863
100μs/div
40μs/div
OUT4 REGULATOR DROPOUT VOLTAGE
vs. LOAD CURRENT
OUT5 REGULATOR LOAD REGULATION
OUT4 ENABLE AND DISABLE RESPONSE
MAX8662/63 toc49
3.310
3.308
3.306
3.304
3.302
3.300
100
90
THE SLOPE OF THIS LINE SHOWS THAT
THE DROPOUT RESISTANCE OF AN
AVERAGE PART AND BOARD
80
70
60
COMBINATION IS 181mΩ.
V
2V/div
2V/div
EN4
0V
V
= 3.6V
IN
50
40
30
20
V
OUT4
V
= 5.5V
IN
0V
10
0
0
30
60
90
120
150
200μs/div
0
100
200
300
400
500
LOAD CURRENT (mA)
LOAD CURRENT (mA)
OUT5 REGULATOR LINE REGULATION
OUT5 VOLTAGE vs. TEMPERATURE
3.4
3.0
2.6
2.2
1.8
1.4
3.310
R
= 330Ω
V
R
= 4.0V
BAT
LOAD
= 330Ω
LOAD
3.309
3.308
3.307
3.306
3.305
3.304
1
2
3
4
5
6
-40
-15
10
35
60
85
V
(V)
AMBIENT TEMPERATURE (°C)
IN_OUT5
14 ______________________________________________________________________________________
Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
2/MAX863
Typical Operating Characteristics (continued)
(Circuit of Figure 1, V
= 5V, R
= 1.5kΩ, R
= 3kΩ, V
= 3.3V, V
= 1.3V, SL1 = SL2 = open, V
= 0V, V
=
DC
PSET
OUT2
ISET
OUT1
OUT2
CEN
PEN1
V
PEN2
= 5V, C
= 2 x 10µF, C
= 2 x 10µF, C
= 0.1µF, C
= 4.7µF, C
= 1µF, C
= 2.2µF, C
= 1µF, CT =
OUT1
OUT3
OUT4
OUT5
OUT6
OUT7
0.068µF, C
otherwise noted.)
= C = 0.1µF, R
= 10kΩ, L1 = 3.3µH, L2 = 4.7µH, L3 = 22µH, GND = PG1 = PG2 = PG3 = 0, T = +25°C, unless
THM A
REF
VL
OUT5 REGULATOR LOAD-
TRANSIENT RESPONSE
OUT5 REGULATOR LINE-
TRANSIENT RESPONSE
MAX8662/63 toc55
MAX8662/63 toc54
5V
V
IN45
3.6V
2V/div
I
OUT5
OUT5
100mA/div
50mV/div
V
OUT5
20mV/div
AC-COUPLED
V
AC-COUPLED
I
= 10mA
OUT5
V
= 4.0V
BAT
I
= 10mA TO 150mA TO 10mA
OUT5
100μs/div
40μs/div
OUT5 REGULATOR DROPOUT VOLTAGE
vs. LOAD CURRENT
OUT5 ENABLE AND DISABLE RESPONSE
MAX8662/63 toc56
70
THE SLOPE OF THIS LINE SHOWS THAT
THE DROPOUT RESISTANCE OF AN
AVERAGE PART AND BOARD
60
50
40
30
20
10
COMBINATION IS 384mΩ.
V
EN5
2V/div
2V/div
0V
V
OUT5
0V
0
0
30
60
90
(mA)
120
150
200μs/div
I
OUT
OUT6 REGULATOR LOAD REGULATION
OUT6 REGULATOR LINE REGULATION
OUT6 VOLTAGE vs. TEMPERATURE
3.310
3.306
3.4
3.2
3.0
2.8
2.6
2.4
2.2
3.309
R
= 330Ω
V
R
= 4.0V
BAT
LOAD
= 330Ω
LOAD
3.307
3.305
3.303
3.301
3.302
3.298
3.294
3.290
V
= 5.5V
IN
V
= 3.6V
150
IN
2.0
1.8
1.6
1.4
0
50
100
200
250
300
1
2
3
4
5
6
-40
-15
10
35
60
85
LOAD CURRENT (mA)
V
(V)
AMBIENT TEMPERATURE (°C)
IN_OUT6
______________________________________________________________________________________ 15
Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
Typical Operating Characteristics (continued)
(Circuit of Figure 1, V
= 5V, R
= 1.5kΩ, R
= 3kΩ, V
= 3.3V, V
= 1.3V, SL1 = SL2 = open, V
= 0V, V
=
DC
PSET
OUT2
ISET
OUT1
OUT2
CEN
PEN1
V
PEN2
= 5V, C
= 2 x 10µF, C
= 2 x 10µF, C
= 0.1µF, C
= 4.7µF, C
= 1µF, C
= 2.2µF, C
= 1µF, CT =
OUT1
OUT3
OUT4
OUT5
OUT6
OUT7
0.068µF, C
otherwise noted.)
= C = 0.1µF, R
= 10kΩ, L1 = 3.3µH, L2 = 4.7µH, L3 = 22µH, GND = PG1 = PG2 = PG3 = 0, T = +25°C, unless
THM A
REF
VL
OUT6 REGULATOR LOAD-
TRANSIENT RESPONSE
OUT6 REGULATOR LINE-
TRANSIENT RESPONSE
MAX8662/63 toc61
MAX8662/63 toc62
5V
3.6V
V
2V/div
IN67
I
OUT6
OUT6
200mA/div
50mV/div
20mV/div
V
V
OUT6
AC-COUPLED
AC-COUPLED
I
= 10mA
OUT6
V
= 4.0V
BAT
I
= 10mA TO 300mA TO 10mA
OUT6
2/MAX863
40μs/div
100μs/div
OUT6 REGULATOR DROPOUT VOLTAGE
vs. LOAD CURRENT
OUT6 ENABLE AND DISABLE RESPONSE
MAX8662/63 toc63
80
70
THE SLOPE OF THIS LINE SHOWS THAT
THE DROPOUT RESISTANCE OF AN
AVERAGE PART AND BOARD
COMBINATION IS 238mΩ.
60
50
40
V
EN6
2V/div
2V/div
0V
30
20
V
0V
OUT6
10
0
200μs/div
0
50
100
150
(mA)
200
250
300
I
OUT
OUT7 REGULATOR LOAD REGULATION
OUT7 REGULATOR LINE REGULATION
OUT7 VOLTAGE vs. TEMPERATURE
3.304
3.4
3.2
3.0
2.8
2.6
2.4
2.2
3.303
3.302
3.301
3.300
3.299
3.298
R
= 330Ω
V
R
= 4.0V
BAT
LOAD
= 330Ω
LOAD
3.302
3.300
3.298
3.296
V
= 5.5V
IN
V
= 3.6V
2.0
1.8
IN
1.6
1.4
3.294
0
30
60
90
120
150
1
2
3
4
5
6
-40
-15
10
35
60
85
LOAD CURRENT (mA)
V
(V)
AMBIENT TEMPERATURE (°C)
IN_OUT7
16 ______________________________________________________________________________________
Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
2/MAX863
Typical Operating Characteristics (continued)
(Circuit of Figure 1, V
= 5V, R
= 1.5kΩ, R
= 3kΩ, V
= 3.3V, V
= 1.3V, SL1 = SL2 = open, V
= 0V, V
=
DC
PSET
OUT2
ISET
OUT1
OUT2
CEN
PEN1
V
PEN2
= 5V, C
= 2 x 10µF, C
= 2 x 10µF, C
= 0.1µF, C
= 4.7µF, C
= 1µF, C
= 2.2µF, C
= 1µF, CT =
OUT1
OUT3
OUT4
OUT5
OUT6
OUT7
0.068µF, C
otherwise noted.)
= C = 0.1µF, R
= 10kΩ, L1 = 3.3µH, L2 = 4.7µH, L3 = 22µH, GND = PG1 = PG2 = PG3 = 0, T = +25°C, unless
THM A
REF
VL
OUT7 REGULATOR LOAD-
TRANSIENT RESPONSE
OUT7 REGULATOR LINE-
TRANSIENT RESPONSE
MAX8662/63 toc68
MAX8662/63 toc69
5V
3.6V
V
2V/div
IN67
I
OUT7
OUT7
100mA/div
50mV/div
20mV/div
V
V
OUT7
AC-COUPLED
AC-COUPLED
I
= 10mA
OUT7
V
= 4.0V
BAT
I
= 10mA TO 150mA TO 10mA
OUT7
40μs/div
100μs/div
OUT7 REGULATOR DROPOUT VOLTAGE
vs. LOAD CURRENT
VL REGULATOR LOAD REGULATION
OUT7 ENABLE AND DISABLE RESPONSE
MAX8662/63 toc70
70
3.31
3.30
3.29
3.28
3.27
3.26
3.25
3.24
THE SLOPE OF THIS LINE SHOWS THAT
THE DROPOUT RESISTANCE OF AN
AVERAGE PART AND BOARD
60
50
40
30
20
10
COMBINATION IS 391mΩ.
V
EN7
2V/div
2V/div
0V
V
= 5.5V
IN
V
OUT7
0V
V
= 4.35V
IN
0
0
25
50
75
(mA)
100
125
150
0
1
2
3
4
5
6
7
8
9
10
200μs/div
I
LOAD CURRENT (mA)
OUT
OPEN-DRAIN OUTPUT VOLTAGE LOW
vs. SINK CURRENT
VL REGULATOR LINE REGULATION
3.50
3.45
3.40
3.35
0.5
0.4
0.3
0.2
0.1
0
R
= 3.3kΩ
THE SLOPE OF THIS LINE SHOWS THAT
THE PULLDOWN RESISTANCE IS 11Ω.
LOAD
V
V
= 5.0V
IN
= 4.0V
BAT
3.30
3.25
3.20
3.15
3.10
3.05
3.00
PULLDOWN DEVICE HAS A
20mA STEADY-STATE RATING
3
4
5
6
7
8
0
5
10 15 20 25 30 35 40
(mA)
V
(V)
I
IN
SINK
______________________________________________________________________________________ 17
Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
Pin Description
PIN
NAME
FUNCTION
MAX8662
MAX8663
Input Limiter-Control Input 1. Used with CE N and PEN2 to set the DC current limit to 95mA,
475mA, a resistor programmable level up to 2A, or to turn off the input limiter (see Table 1).
1
1
PEN1
Input Limiter-Control Input 2. Used with CE N and PEN1 to set the DC current limit to 95mA,
475mA, a resistor programmable level up to 2A, or to turn off the input limiter (see Table 1).
2
3
2
PEN2
EN3
Enable Input and PWM Dimming Input for Regulator 3 White LED Boost. Drive high to
enable. Drive low for more than 2ms to turn off. For PWM-controlled dimming, drive EN3
with a PWM switching input with a frequency of 1kHz to 100kHz.
—
DC1,
DC2
DC Input Source. Connect to an AC adapter or USB source. DC1 and DC2 are internally
connected.
4, 5
3, 4
System Supply Voltage. The SYS output supplies power to all regulators. With no external
power, SYS1 and SYS2 connect to BAT through an internal 40mΩ switch. When a valid
voltage is present at DC_, SYS_ connects to DC_ but is limited to 5.3V. SYS1 and SYS2 are
internally connected.
SYS1,
SYS2
6, 7
5, 6
2/MAX863
Battery Connections. Connect to a single-cell Li+ battery. The battery is charged from SYS_
when a valid source is present at DC. BAT_ drives SYS_ when DC is not valid. BAT1 and
BAT2 are internally connected.
BAT1,
BAT2
8, 9
10
7, 8
—
LED Analog Brightness Control Input. Connect BRT to a voltage from 50mV to 1.5V to set
I
from 1mA to 30mA. Connect BRT to the center of a resistor-divider connected between
BRT
CS
REF and GND to set a fixed brightness when analog dimming is not required.
Charger Status Output. CHG is an open-drain nMOS that pulls low when the charger is in
fast charge or prequalification modes. CHG goes high impedance when the charger is in
top-off mode or disabled.
11
12
13
14
9
CHG
CEN
THM
ISET
Charger Enable Input. Drive CEN low to enable the charger when a valid source is
connected at DC. Drive CEN high to disable charging. Drive CEN high and PEN2 low to
enter USB suspend mode.
10
11
12
Thermistor Input. Connect a 10kΩ negative temperature coefficient (NTC) thermistor from
THM to GND. Charging is suspended when the temperature is beyond the hot or cold
limits. Connect THM to GND to disable the thermistor functionality.
Charge Rate-Set Input. Connect a resistor from ISET to GND to set the fast-charge current
from 300mA to 1.25A. The prequalification charge current and top-off threshold are set to
10% and 7.5% of fast-charge current, respectively.
Charge Timer-Programming Pin. Connect a capacitor from CT to GND to set the length of
time required to trigger a fault condition in fast-charge or prequalification mode and to
determine the time the charger remains in top-off mode. Connect CT to GND to disable
timers.
15
13
CT
Reference Voltage. Provides 1.5V output when EN3 is high. An internal discharge
resistance pulls REF to 0V when EN3 is low.
16
17
—
REF
14
GND
Ground. Low-noise ground connection.
Linear Regulator 4 Output. Delivers up to 500mA at an output voltage determined by SL1
and SL2. Connect a 4.7µF ceramic capacitor from OUT4 to GND. Increase the value to
18
15
OUT4
10µF if V
< 1.5V.
OUT4
18 ______________________________________________________________________________________
Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
2/MAX863
Pin Description (continued)
PIN
NAME
FUNCTION
MAX8662
MAX8663
Input Supply for Linear Regulators 4 and 5. Connect IN45 to a supply voltage between 1.7V
19
16
IN45
and V
. Connect at least a 1µF ceramic capacitor from IN45 to GND.
SYS
Linear Regulator 5 Output. Delivers up to 150mA at an output voltage determined by SL1
and SL2. Connect a 1µF ceramic capacitor from OUT5 to GND. Increase the value to 2.2µF
20
17
OUT5
if V
< 1.5V.
OUT5
21
22
18
19
EN4
EN5
Enable Input for Linear Regulator 4. Drive high to enable.
Enable Input for Linear Regulator 5. Drive high to enable.
PWM/Skip-Mode Selector. Drive PWM high to force step-down regulators 1 and 2 to
operate in 1MHz forced-PWM mode. Drive PWM low, or connect to GND to allow regulators
1 and 2 to enter skip mode at light loads.
23
20
PWM
Feedback Input for Buck Regulator 1. Connect FB1 to the center of a resistor-divider
connected between OUT1 and GND to set the output voltage between 0.98V and 3.3V.
24
25
26
21
22
23
FB1
EN1
PG1
Enable Input for Buck Regulator 1. Drive high to enable.
Power Ground for Buck Regulator 1. GND, PG1, PG2, and PG3 must be connected
together externally.
Buck Regulator 1 Inductor Connection Node. Connect an inductor from LX1 to the output of
regulator 1.
27
28
24
25
LX1
PV1
Power Input for Buck Regulator 1. Connect PV1 to SYS and decouple with a 10µF or greater low-
ESR capacitor to GND. PV1, PV2, and SYS must be connected together externally.
LED Boost Overvoltage Input. Connect a resistor from OVP to the boost output to set the
maximum output voltage and to initiate soft-start when EN3 goes high. An internal 20µA
pulldown current from OVP to GND determines the maximum boost voltage. The internal
current is disconnected when EN3 is low. OVP is diode clamped to SYS_.
29
30
—
—
OVP
CS
LED Current Source. Sinks from 1mA to 30mA depending on the voltage at BRT and the
PWM signal at EN3. Driving EN3 low for more than 2ms turns off the current source. V is
CS
regulated to 0.32V.
Compensation Input for LED Boost Regulator 3. See the Boost Converter with White LED Driver
(OUT3, MAX8662 Only) section.
31
32
—
CC3
FB2
Feedback Input for Buck Regulator 2. Connect FB2 to the center of a resistor-divider
connected between OUT2 and GND to set the output voltage between 0.98V and 3.3V.
26
Power Input for Buck Regulator 2. Connect PV2 to SYS and decouple with a 10µF or
greater low-ESR capacitor to GND. PV1, PV2, and SYS must be connected together
externally.
33
27
PV2
Buck Regulator 2 Inductor Connection Node. Connect an inductor from LX2 to the output of
regulator 2.
34
35
28
29
LX2
Power Ground for Buck Regulator 2. GND, PG1, PG2, and PG3 must be connected together
externally.
PG2
36
37
38
39
30
31
32
—
EN2
EN6
EN7
LX3
Enable Input for Buck Regulator 2. Drive high to enable.
Enable Input for Linear Regulator 6. Drive high to enable.
Enable Input for Linear Regulator 7. Drive high to enable.
Boost Regulator 3 Inductor Connection Node. Connect an inductor from LX3 to SYS_.
______________________________________________________________________________________ 19
Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
Pin Description (continued)
PIN
NAME
FUNCTION
MAX8662
MAX8663
Power Ground for Boost Regulator 3. GND, PG1, PG2, and PG3 must be connected
together externally.
40
—
PG3
Linear Regulator 6 Output. Delivers up to 300mA at an output voltage determined by SL1
and SL2. Connect a 2.2µF ceramic capacitor from OUT6 to GND. Increase the value to
41
42
43
33
34
35
OUT6
IN67
4.7µF if V
< 1.5V.
OUT6
Input Supply for Linear Regulators 6 and 7. Connect IN67 to a supply voltage of 1.7V to
. Connect at least a 1µF ceramic capacitor from IN67 to GND.
V
SYS
Linear Regulator 7 Output. Delivers up to 150mA at an output voltage determined by SL1
and SL2. Connect a 1µF ceramic capacitor from OUT7 to GND. Increase the value to 2.2µF
OUT7
if V
< 1.5V.
OUT7
Input Limiter and Charger Logic Supply. Provides 3.3V when a valid input voltage is
present at DC. Connect a 0.1µF capacitor from VL to GND. VL is capable of providing up to
10mA to an external load when DC is valid.
44
36
VL
2/MAX863
Output-Voltage Select Inputs 1 and 2 for Linear Regulators. Leave disconnected, or
connect to GND or SYS to set to one of three states. SL1 and SL2 set the output voltage of
OUT4, OUT5, OUT6, and OUT7 to one of nine combinations. See Table 3.
45
46
37
38
SL1
SL2
Input Current-Limit Set Input. Connect a resistor (R
the DC input current limit from 500mA to 2A.
) from PSET to ground to program
PSET
47
48
39
40
PSET
Power-Ok Output. POK is an open-drain nMOS output that pulls low when a valid input is
detected at DC. This output is not affected by the states of PEN1, PEN2, or CEN.
POK
Exposed Paddle. Connect the exposed paddle to ground. Connecting the exposed paddle
to ground does not remove the requirement for proper ground connections to GND, PG1,
PG2, and PG3. The exposed paddle is attached with epoxy to the substrate of the die,
making it an excellent path to remove heat from the IC.
—
—
EP
20 ______________________________________________________________________________________
Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
2/MAX863
INPUT FROM AC
ADAPTER/USB
4.1V TO 8V
SYS1
SYS2
DC1
DC2
SYS
C10
C1
VLOGIC
+
-
INPUT-
VOLTAGE
MONITOR
R1
POK
GND
+
-
INPUT-TO-SYS
CURRENT-
LIMITING
100mV
BAT1
BAT2
THM
SWITCH
MAIN
BATTERY
C11
BATTERY-TO-SYS
SWITCH (ALLOWS
BAT AND DC TO SUPPLY
CURRENT TO SYS)
VL
3.3V
C2
R6
BATTERY
INPUT LIMITER
AND
CHARGER
BATTERY THERMISTOR
VLOGIC
OK
R7
THERMAL
PROTECTION
PV1
LX1
TIMEOUT
CHARGING
SYS
CHG
PEN2
PEN1
CEN
DONE
500mA
ADAPTER
OFF
C4
R2
OUT1
L1
100mA
USB
0.98V TO 3.3V AT 1.2A
MAIN
STEP-DOWN
REGULATOR
C5
ON
MAIN
C12
CT
PG1
FB1
R8
R9
PSET
ISET
R3
MAX8662
MAX8663
ON
EN1
OFF
LX3
PG3
PWM
PWM
PV2
SYS
L3
D1
SKIP
C13
OUT3 AT 30mA
D2
SYS
C6
R4
C14
OUT2
D3
D4
D5
D6
D7
D8
L2
0.98V TO 3.3V AT 0.9A
LX2
STEP-UP
LED
DRIVER
R10
CORE
STEP-DOWN
REGULATOR
ONLY AVAILABLE
FOR THE MAX8662
OVP
CC3
C7
CORE
PG2
FB2
C15
R5
CS
D9 TO SYS
ANALOG DIMMING
(0 TO 1.5V)
PWM BRIGHTNESS
CONTROL AND ENABLE
BRT
EN3
ON
EN2
OFF
REF
1.5V
C3
OUT4
EN4
OUT4
500mA
C16
C17
ON
IN45
OFF
SYS
C8
OUT5
EN5
OUT5
150mA
ON
OFF
SL1
SL2
LDO OUTPUT-
VOLTAGE
SETTING
TRI-STATE MODE
INPUTS; SEE TABLE 2
{
OUT6
EN6
OUT6
300mA
C18
C19
ON
IN67
OFF
SYS
C9
OUT7
EN7
OUT7
150mA
ON
OFF
E P
Figure 1. Block Diagram and Application Circuit
______________________________________________________________________________________ 21
Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
Detailed Description
The MAX8662/MAX8663 highly integrated PMICs are
AC ADAPTER
OR
Q1 INPUT-TO-SYS
SWITCH
designed for use in smart cellular phones, PDAs,
Internet appliances, and other portable devices. They
integrate two synchronous buck regulators, a boost
regulator driving two to seven white LEDs (MAX8662
only), four low dropout (LDO) linear regulators, and a
linear charger for a single-cell Li+ battery. Figure 1 is
the block diagram and application circuit.
USB INPUT
SYS
DC
SYSTEM
LOAD
Q3
Q2
(CHARGE
PATH)
BATTERY-TO-SYS
SWITCH
(DISCHARGE PATH)
SPS circuitry offers flexible power distribution between
an AC adapter or USB source, battery, and system
load, and makes the best use of available power from
the AC adapter/USB input. The battery is charged with
any available power not used by the system load. If a
system load peak exceeds the current limit, supple-
mental current is taken from the battery. Thermal limit-
ing prevents overheating by reducing power drawn
from the input source.
BAT
BATTERY
GND
MAX8662
MAX8663
2/MAX863
Two step-down DC-DC converters achieve excellent
light-load efficiency and have on-chip soft-start circuit-
ry; 1MHz switching frequency allows for small external
components. Four LDO linear regulators feature low
quiescent current and operate from inputs as low as
1.7V. This allows the LDOs to operate from the step-
down output voltage to improve efficiency. The white
LED driver features easy adjustment of LED brightness
and open-LED overvoltage protection. A 1-cell Li+
charger has programmable charge current up to 1.25A
and a charge timer.
R
THM
THM
Figure 2. Smart Power Selector Block Diagram
Input Limiter
All regulated outputs (OUT1–OUT7) derive their power
from the SYS output. With an AC adapter or USB source
connected at DC, the input limiter distributes power
from the external power source to the system load and
battery charger. In addition to the input limiter’s primary
function of passing the DC power source to the system
and charger loads at SYS, it performs several additional
functions to optimize use of available power:
Smart Power Selector (SPS)
SPS seamlessly distributes power between the external
input, the battery, and the system load (Figure 2). The
basic functions of SPS are:
•
Input Voltage Limiting: If the voltage at DC rises,
SYS limits to 5.3V, preventing an overvoltage of the
system load. A DC voltage greater than 6.9V is con-
sidered invalid and the input limiter disconnects the
DC input entirely. The withstand voltage at DC is
guaranteed to be at least 9V. A DC input is also
invalid if it is less than BAT, or less than the DC
undervoltage threshold of 3.5V (falling). With an
invalid DC input voltage, SYS connects to BAT
through a 30mΩ switch.
Input Overcurrent Protection: The current at DC is
limited to prevent input overload. This current limit
is automatically adjusted to match the capabilities
of source, whether it is a 100mA or 500mA USB
source, or an AC adapter. When the load exceeds
the input current limit, SYS drops to 100mV below
BAT and supplemental load current is provided by
the battery.
•
With both the external power supply and battery
connected:
a) When the system load requirements exceed the
capacity of the external power input, the battery
supplies supplemental current to the load.
b) When the system load requirements are less than
the capacity of the external power input, the bat-
tery is charged with residual power from the input.
•
•
•
When the battery is connected and there is no
external power input, the system is powered from
the battery.
When an external power input is connected and
there is no battery, the system is powered from the
external power input.
A thermal-limiting circuit reduces battery-charge rate and
external power-source current to prevent overheating.
22 ______________________________________________________________________________________
Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
2/MAX863
•
•
Thermal Limiting: The input limiter includes a ther-
mal-limiting circuit that reduces the current drawn
from DC when the IC junction temperature increases
beyond +100°C in an attempt to prevent further
heating. The current limit is be reduced by 5%/°C for
temperatures above +100°C, dropping to 0mA at
+120°C. Due to the adaptive nature of the charging
circuitry, the charger current reduces to 0mA before
the system load is affected by thermal limiting.
Figure 3 shows the SYS voltage and its relationship to
DC and BAT under three conditions:
a) Charger is off and SYS is driven from DC.
b) Charger is on and adaptive charger control is limiting
charge current.
c) The load at SYS is greater than the available input current.
The adaptive battery-charger circuit reduces charging
current when the SYS voltage drops 550mV below DC.
For example, if DC is at 5V, the charge current reduces
to prevent SYS from dropping below 4.45V. When DC is
greater than 5.55V, the adaptive charging circuitry
reduces charging current when SYS drops 300mV
below the 5.3V SYS regulation point (5.0V). Finally, the
circuit prevents itself from pulling SYS down to within
100mV of BAT.
Adaptive Battery Charging: While the system is
powered from DC, the charger can also draw
power from SYS to charge the battery. If the charg-
er load plus system load exceeds the current capa-
bility of the input source, an adaptive charger
control loop reduces charge current to prevent the
SYS voltage from collapsing. Maintaining a higher
SYS voltage improves efficiency and reduces
power dissipation in the input limiter by running the
switching regulators at lower current.
INPUT: 500mA USB
CHARGER: RISET = 4Ω (750mA)
DC
5.3V
5.0V
SYS
(CHARGER OFF)
SYS
I(SYS) x 150mAΩ
(CHARGER ON)
550mV
I(SYS) x 30mΩ
4.0V
3.9V
100mV
BAT
100mV
SYS
(SYS OVERLOAD)
475mA
BAT CHARGE
CURRENT
(CHARGE ON)
0mA
Figure 3. SYS Voltage and Charge Current vs. DC and BAT Voltage
______________________________________________________________________________________ 23
Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
DC Input Current-Limit Selection
(PEN1/PEN2)
The input current limit can be set to a variety of values
as shown in Table 1. When the PEN1 input is low, a
USB source is expected at DC and the current limit is
set to either 95mA or 475mA by PEN2.
Power-OK Output (POK)
POK is an active-low open-drain output indicating DC
status. When the voltage at DC is between the under-
voltage and the overvoltage thresholds, and is greater
than the BAT voltage, POK pulls low to indicate that
input power is OK. Otherwise, POK is high impedance.
POK is not affected by the states of PEN1, PEN2, or
CEN. POK remains active in thermal overload.
When PEN1 is high, an AC adapter is expected at DC
and the current limit is set based on a programming resis-
tor at PSET. The DC input current limit is calculated from:
Battery Charger
The battery charger state diagram is illustrated in
Figure 4.
I
= 2000 x (1.5 / R
)
DC_LIM
PSET
An exception is when the battery charger is disabled
(CEN high) with PEN2 low, where the MAX8662/
MAX8663 enter USB suspend mode.
With a valid AC adapter/USB voltage present, the bat-
tery charger initiates a charge cycle when the charger
Table 1. DC Input Current and Charger Current-Limit Select
CEN
PEN1
PEN2
DC INPUT CURRENT LIMIT
95mA
EXPECTED INPUT TYPE
100mA USB
CHARGER CURRENT LIMIT**
0
0
0
1
1
1
0
0
0
1
1556(1.5V / R
1556(1.5V / R
1556(1.5V / R
Off
)
ISET
2/MAX863
475mA
500mA USB
)
ISET
1
X*
0
2000(1.5V / R
Off
)
AC adapter
)
ISET
PSET
PSET
X*
0
USB suspend
500mA USB
1
475mA
Off
1
1
2000(1.5V / R
)
AC adapter
Off
*X = Don’t care.
**The maximum charge will not exceed the DC Input current.
CEN = 1 OR REMOVE AND
RECONNECT AC
CHARGER OFF
CHG = HIGH-Z
ADAPTER/USB
ANY STATE
I
= 0mA
BAT
TOGGLE CEN OR
REMOVE AND
RECONNECT AC
ADAPTER/USB
CEN = 0
SET TIMER = 0
PREQUALIFICATION
CHG = 0V
TIMER > t
PREQUAL
I
= I
/ 10
BAT CHG-MAX
TIMER > t
FST-CHG
(TIMER SUSPENDED IF I < I
x
V
< 2.88V
V
< 3V
BAT
BAT CHG-MAX
BAT
20% WHILE V < 4.2V)
SET TIMER = 0
FAST CHARGE
CHG = 0V
SET TIMER = 0
BAT
FAULT
POK = 0V
CHG = BLINK AT 1Hz
= 0mA
I
= I
BAT CHG-MAX
I
BAT
I
> I
x 12%
SET TIMER = 0
BAT CHG-MAX
ANY CHARGING STATE
THERMISTOR
TOO HOT OR TOO COLD
TIMER = RESUMED
THERMISTOR
TEMPERATURE OK
TIMER = RESUMED
TOP - OFF
CHG = HIGH - Z
V
= < 4.1V
BAT
SET TIMER = 0
I
< I
BAT
x 7.5%
TEMPERATURE
SUSPEND
= 0mA
BAT CHG-MAX
AND V = 4.2V
TIMER = t
TOP-OFF
I
BAT
CHG = PREVIOUS STATE
DONE
CHG = HIGH-Z
= 0mA
I
BAT
Figure 4. Charger State Diagram
24 ______________________________________________________________________________________
Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
2/MAX863
is enabled. It first detects the battery voltage. If the bat-
MONITORING THE BATTERY CHARGE CURRENT WITH V
ISET
tery voltage is less than the BAT prequalification thresh-
old (3.0V), the charger enters prequalification mode in
which the battery charges at 10% of the maximum fast-
charge current. This slow charge ensures that the bat-
tery is not damaged by fast-charge current while
deeply discharged. Once the battery voltage rises to
3.0V, the charger transitions to fast-charge mode and
applies the maximum charge current. As charging con-
tinues, the battery voltage rises until it reaches the bat-
tery regulation voltage (4.2V) where charge current
starts tapering down. When charge current decreases
to 7.5% of fast-charge current, the charger enters top-
off mode. Top-off charging continues for 30min, then all
charging stops. If the battery voltage subsequently
drops below the 4.1V recharge threshold, charging
restarts and the timers reset.
R
ISET
V
=
x I
BAT
ISET
1556
1.5
0
DISCHARGING
BATTERY-CHARGING CURRENT (A)
0
1556 x (1.5V/R
)
ISET
Charge Current
ISET adjusts the MAX8662/MAX8663 charging current
to match the capacity of the battery. A resistor from
ISET to ground sets the maximum fast-charge current,
the charge current in prequal, and the charge-current
threshold below which the battery is considered com-
pletely charged. Calculate these thresholds as follows:
Figure 5. Monitoring the Battery Charge Current with ISET
Output Voltage
Charge Timer
As shown in Figure 3, the MAX8662/MAX8663 feature a
fault timer for safe charging. If prequalification charging
or fast charging does not complete within the time limits,
which are programmed by the timer capacitor at CT, the
charger stops charging and issues a timeout fault.
Charging can be resumed by either toggling CEN or
cycling the DC input voltage.
I
= 1556 x 1.5V / R
CHG-MAX
ISET
CHG-MAX
CHG-MAX
I
= 10% x I
= 7.5% x I
PRE-QUAL
I
TOP-OFF
Determine the I
value by considering the char-
CHG-MAX
acteristics of the battery, and not the capabilities of the
expected AC adapter/USB charging input, the system
load, or thermal limitations of the PCB. The MAX8662/
MAX8663 automatically adjust the charging algorithm
to accommodate these factors.
The MAX8662/MAX8663 support values of C
0.01µF to 1µF:
from
CT
C
CT
t
= 30min×
PREQUAL
0.068μF
C
In addition to setting the charge current, ISET also pro-
vides a means to monitor battery-charge current. The
output voltage of the ISET pin tracks the charge current
delivered to the battery, and can be used to monitor the
charge rate, as shown in Figure 5. A 1.5V output indi-
cates the battery is being charged at the maximum set
fast-charge current; 0V indicates no charging. This volt-
age is also used by the charger control circuitry to set
and monitor the battery current. Avoid adding more
than 10pF capacitance directly to the ISET pin. If filter-
ing of the charge-current monitor is necessary, add a
resistor of 100kΩ or more between ISET and the filter
capacitor to preserve charger stability.
CT
t
= 300min×
FST−CHG
0.068μF
When the charger exits fast-charge mode, CHG goes
high impedance and top-off mode is entered. Top-off
time is also determined by the capacitance at CT:
C
CT
t
= 300min×
TOP−OFF
0.068μF
In fast-charge mode, the fault timer is suspended when
the charge current is limited, by input or thermal limit-
ing, to less than 20% of I
CHG-MAX.
______________________________________________________________________________________ 25
Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
Connect CT to GND to disable the prequalification and
fast-charge timers, allowing the battery to charge indef-
initely in top-off mode, or if other system timers are to
be used to control charging.
a beta of 3500. The relation of thermistor resistance to
temperature is defined by the following equation:
⎧
⎨
⎩
⎫
⎬
⎭
1
1
⎛
⎞
β
−
⎜
⎝
⎟
⎠
RT =R25× e
T+273 298
Charge-Enable Input (CEN)
Driving CEN high disables the battery charger. Driving
CEN low enables the charger when a valid source is
connected at DC. CEN does not affect the input limit
current, except that driving CEN high and PEN2 low
activates USB suspend mode.
where:
The resistance in ohms of the thermistor at tem-
R
T =
perature T in Celsius
R
The resistance in ohms of the thermistor at +25°C
25 =
ß = The material constant of the thermistor, which typi-
cally ranges from 3000K to 5000K
In many systems, there is no need for the system con-
troller (typically a microprocessor) to disable the charg-
er because the SPS circuitry independently manages
charging and adapter/battery power hand-off. In these
situations, CEN can be connected to ground.
T = The temperature of the thermistor in °C
Table 2 shows temperature limits for different thermistor
material constants.
Some designs may prefer other trip temperatures. This
can usually be accommodated by connecting a resistor
in series and/or in parallel with the thermistor and/or
using a thermistor with different ß. For example, a
+45°C hot threshold and 0°C cold threshold can be
realized by using a thermistor with a ß of 4250 and con-
necting 120kΩ in parallel. Since the thermistor resis-
tance near 0°C is much higher than it is near +50°C, a
large parallel resistance lowers the cold threshold,
while only slightly lowering the hot threshold.
Conversely, a small series resistance raises the cold
threshold, while only slightly raising the hot threshold.
Charge Status Output (CHG)
CHG is an open-drain output that indicates charger sta-
tus. CHG is low when the battery charger is in prequali-
fication or fast-charge mode. It is high impedance
when the charger is done, in top-off, or disabled.
2/MAX863
The charger faults if the charging timer expires in pre-
qualification or fast charge. In this state, CHG pulses at
1Hz to indicate that a fault occurred.
Battery Charger Thermistor Input (THM)
Battery or ambient temperature can be monitored with
a negative temperature coefficient (NTC) thermistor.
Charging is allowed when the thermistor temperature is
within the allowable range.
The charger timer pauses when the thermistor resis-
tance goes out of range: charging stops and the timer
counters hold their state. When the temperature comes
back into range, charging resumes and the counters
continue from where they left off. Connecting THM to
GND disables the thermistor function.
The charger enters a temperature suspend state when
the thermistor resistance falls below 3.97kΩ (too hot) or
rises above 28.7kΩ (too cold). This corresponds to a 0
to +50°C range when using a 10kΩ NTC thermistor with
Table 2. Fault Temperatures for Different Thermistors
THERMISTOR ß (K)
Resistance at +25°C (kΩ)
3000 (K)
10
3250 (K)
10
3500 (K)
10
3750 (K)
10
4250 (K)
10
Resistance at +50°C (kΩ)
4.59
25.14
55
4.30
27.15
53
4.03
29.32
50
3.78
31.66
49
3316
36.91
46
Resistance at 0°C (kΩ)
Nominal Hot Trip Temperature (°C)
Nominal Cold Trip Temperature (°C)
-3
-1
0
2
4.5
26 ______________________________________________________________________________________
Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
2/MAX863
VL
SWITCH OPEN
WHEN CHARGER
DISABLED
MAX8662
MAX8663
55.71kΩ
10kΩ
V
= 2.4V RISING (TYP)
THM_C
-
COLD
60mV HYST
+
BAD TEMP
97.71kΩ
-
HOT
60mV HYST
V
= 0.9V FALLING (TYP)
= 0.1V FALLING (TYP)
THM
THM_H
+
DISABLE CHARGER
54.43kΩ
-
ENABLE THM
60mV HYST
ESD
DIODE
V
THM_D
+
6.43kΩ
GND
GND
Figure 6. Thermistor Input
Figure 6 shows a simplified version of the THM input.
Ensure that the physical size of the thermistor is such
that the circuit of Figure 6 does not cause self-heating.
Step-Down Converter Operating Modes
OUT1 and OUT2 can operate in either auto-PWM mode
(PWM low) or forced-PWM mode (PWM high). In auto-
PWM mode, OUT1 and OUT2 enter skip mode when
the load current drops below a predetermined level. In
skip mode, the regulator skips cycles when they are not
needed, which greatly decreases quiescent current
and improves efficiency at light loads. In forced-PWM
mode, the converters operate with a constant 1MHz
switching frequency regardless of output load. Output
voltage is regulated by modulating the switching duty
cycle. Forced-PWM mode is preferred for low-noise
systems, where switching harmonics can occur only at
multiples of the constant-switching frequency and are
easily filtered; however, regulator operating current is
greater and light-load efficiency is reduced.
Step-Down DC-DC Converters
(OUT1 and OUT2)
OUT1 and OUT2 are high-efficiency, 1MHz, current-mode
step-down converters with adjustable output voltage.
The OUT1 regulator outputs 0.98V to V at up to 1200mA
IN
while OUT2 outputs 0.98V to V at up to 900mA.
IN
OUT1 and OUT2 have individual enable inputs. When
enabled, the OUT1 and OUT2 gradually ramp the out-
put voltage over a 1.6ms soft-start time. This soft-start
eliminates input inrush current spikes.
OUT1 and OUT2 can operate at a 100% duty cycle,
which allows the regulators to maintain regulation at the
lowest possible battery voltage. The OUT1 dropout volt-
age is 72mV with a 600mA load and the OUT2 dropout
voltage is 90mV with a 450mA load (does not include
inductor resistance). During 100% duty-cycle operation,
the high-side p-channel MOSFET turns on continuously,
connecting the input to the output through the inductor.
Synchronous Rectification
Internal n-channel synchronous rectifiers eliminate the
need for external Schottky diodes and improve efficiency.
The synchronous rectifier turns on during the second
half of each switching cycle. During this time, the volt-
age across the inductor is reversed, and the inductor
current ramps down. In PWM mode, the synchronous
rectifier turns off at the end of the switching cycle. In
______________________________________________________________________________________ 27
Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
skip mode, the synchronous rectifier turns off when the
inductor current falls below the n-channel zero-crossing
threshold or at the end of the switching cycle, whichev-
er occurs first.
For example, with R
= 1.2MΩ, the OUT3 maximum
OVP
voltage is set at 25.25V. The OVP circuit also provides
soft-start to reduce inrush current by ramping the inter-
nal pulldown current from 0 to 20µA over 1.25ms at
startup. The 20µA internal current is disconnected
when EN3 goes low.
Setting OUT1 and OUT2 Output Voltage
Select an output voltage for OUT1 between 0.98V and
OUT3 can also be used as a voltage-output boost by
V
IN
by connecting FB1 to the center of a resistive volt-
setting R
for the desired output voltage. When doing
OVP
age-divider between OUT1 and GND. Choose R3
(Figure 1) for a reasonable bias current in the resistive
divider; choose R3 to be between 100kΩ and 200kΩ.
Then, R2 (Figure 1) is given by:
this, the output filter capacitor must be at least 1µF, and
the compensation network should be a 0.01µF capaci-
tor in series with a 10kΩ resistor from CC3 to ground.
R2 = R3 ((V
/V ) - 1)
Brightness Control (Voltage or PWM)
OUT1 FB
LED current is set by the voltage at BRT. The V
BRT
where V = 0.98V. For OUT2, R4 and R5 are calculat-
FB
range for adjusting output current from 1mA to 30mA is
50mV to 1.5V. Connecting BRT to a 1.5V reference volt-
age (such as REF) sets LED current to 30mA.
ed using:
R4 = R5 ((V
/V ) - 1)
OUT2 FB
The EN3 input can also be driven by a logic-level PWM
brightness control signal, such as that supplied by a
microcontroller. The allowed PWM frequency range is
from 1kHz to 100kHz. A 100% duty cycle corresponds
to full current set by the BRT pin. The MAX8662 digitally
decodes the PWM brightness signal and eliminates
PWM ripple found in more common PWM brightness
controls. As a result, no external filtering is needed to
prevent intensity ripple at the PWM rate.
OUT1 and OUT2 Inductors
2/MAX863
3.3µH and 4.7µH inductors are recommended for the
OUT1 and OUT2 step-down converters. Ensure that the
inductor saturation current rating exceeds the peak
inductor current, and the rated maximum DC inductor
current exceeds the maximum output current. For lower
load currents, the inductor current rating may be
reduced. For most applications, use an inductor with a
current rating 1.25 times the maximum required output
current. For maximum efficiency, the inductor’s DC
resistance should be as low as possible. See Table 4
for component examples.
In order to properly distinguish between a DC or PWM
control signal, the MAX8662 delays turn-on from the ris-
ing edge of EN3, and turn-off from the falling edge of
EN3, by 2ms. If there are no more transitions in the EN3
signal after 2ms, EN3 assumes the control signal is DC
and sets LED brightness based on the DC level. If two ris-
ing edges occur within 2ms, the circuit assumes the con-
trol is PWM and sets brightness based on the duty cycle.
Boost Converter with White LED Driver
(OUT3, MAX8662 Only)
The MAX8662 contains a boost converter, OUT3, which
drives up to seven white LEDs in series at up to 30mA.
The boost converter regulates its output voltage to
maintain the bottom of the LED stack at 320mV. A 1MHz
switching rate allows for a small inductor and small
input and output capacitors, while also minimizing input
and output ripple.
OUT3 Inductor
For the white LED driver, OUT3, a 22µH inductor is rec-
ommended for most applications. For best efficiency,
the inductor’s DC resistance should also be as low as
possible. See Table 4 for component examples.
Reference Voltage
REF is a 1.5V regulated output that is available to drive
the BRT input when the boost converter is enabled.
This voltage can be used to control LED brightness by
driving BRT through a resistor-divider.
OUT3 Compensation Capacitor
A compensation capacitor from CC3 to GND ensures
boost converter control stability. For white LED applica-
tions, connect a 0.22µF ceramic capacitor from CC3 to
ground when using 0.1µF at OUT3. For OLED applica-
tions, connect a 0.01µF capacitor in series with 10kΩ
from CC3 to ground, and a 1µF OUT3 capacitor to
improve boost output load-transient response.
Boost Overvoltage Protection (OVP)
OVP limits the maximum voltage of the boost output for
protection against overvoltage due to open or discon-
nected LEDs. An external resistor between OUT3 and
OVP, with an internal 20µA pulldown current from OVP
to GND, sets the maximum boost output to:
OUT3 Diode Selection
The MAX8662 boost converter’s high-switching fre-
quency demands a high-speed rectification diode (D1)
V
= (R
x 20µA) + 1.25V
OVP
BOOST_MAX
28 ______________________________________________________________________________________
Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
2/MAX863
for optimum efficiency. A Schottky diode is recom-
Soft-Start/Inrush Current
The MAX8662/MAX8663 implement soft-start on many
levels to control inrush current and avoid collapsing
source supply voltages. The input-voltage limit and bat-
tery charger have a 1.5ms soft-start time. All regulators
also implement soft-start. White LED driver soft-start is
accomplished by ramping the OVP current from 0 to
20µA in 1.25ms. During soft-start, the PWM controller
forces 0% switching duty cycle to avoid an input cur-
rent surge at turn-on.
mended due to its fast recovery time and low forward-
voltage drop. Ensure the diode’s peak current rating
exceeds the peak inductor current. In addition, the
diode’s reverse breakdown voltage must exceed
VOUT3. See Table 4 for component examples.
Linear Regulators (OUT4, OUT5, OUT6,
and OUT7)
The MAX8662/MAX8663 contain four low-dropout, low-
quiescent current, low-operating voltage linear regula-
tors. The maximum output currents for OUT4, OUT5,
OUT6, and OUT7 are 500mA, 150mA, 300mA, and
150mA, respectively. Each regulator has its own enable
input. When enabled, a linear regulator soft-starts by
ramping the outputs at 10V/ms. This limits inrush cur-
rent when the regulators are enabled.
Undervoltage and Overvoltage Lockout
DC UVLO
When the DC voltage is below the DC undervoltage
threshold (V
, typically 3.5V falling), the
UVLO_DC
MAX8662/MAX8663 enter DC undervoltage lockout (DC
UVLO). DC UVLO forces the power management cir-
cuits to a known dormant state until the DC voltage is
high enough to allow the device to make accurate deci-
sions. In DC UVLO, Q1 is open (Figure 2), the charger is
disabled, POK is high-Z, and CHG is high-Z. The sys-
tem load switch, Q2 (Figure 2) is closed in DC UVLO,
allowing the battery to power the SYS node. All regula-
tors are allowed to operate from the battery in DC UVLO.
The LDO output voltages, OUT4, OUT5, OUT6, and
OUT7 are pin programmable by SL1 and SL2 (Table 3).
SL1 and SL2 are intended to be hardwired and cannot
be driven by active logic. Changes to SL1 and SL2
after power-up are ignored.
VL Linear Regulator
VL is the output of a 3.3V linear regulator that powers
the on-chip input limiter and charger control circuitry.
VL is powered from DC and can provide up to 10mA
when a DC source is present. Bypass VL to GND with a
0.1µF capacitor.
DC OVLO
When the DC voltage is above the DC overvoltage
threshold (V
, typically 6.9V), the MAX8662/
OVLO_DC
MAX8663 enter DC overvoltage lockout (DC OVLO).
DC OVLO mode protects the MAX8662/MAX8663 and
downstream circuitry from high-voltage stress up to 9V.
In DC OVLO, VL is on, Q1 (Figure 2) is open, the charg-
er is disabled, POK is high-Z, and CHG is high-Z. The
system load switch Q2 (Figure 2) is closed in DC
OVLO, allowing the battery to power SYS. All regulators
are allowed to operate from the battery in DC UVLO.
Regulator Enable Inputs (EN_)
The OUT1–OUT7 regulators have individual enable
inputs. Drive EN_ high to initiate soft-start and enable
OUT_. Drive EN_ low to disable OUT_. When disabled,
each regulator (OUT1–OUT7) switches in an active
pulldown resistor to discharge the output.
Table 3. SL1 and SL2, Output Voltage Selection
CONNECT SL_ TO:
SL1
LINEAR REGULATOR OUTPUT VOLTAGES
SL2
Open circuit
Open circuit
Open circuit
Ground
Ground
Ground
SYS
OUT4 (V)
3.3
OUT5 (V)
3.3
OUT6 (V)
3.3
OUT7 (V)
3.3
Open circuit
Ground
SYS
3.3
2.85
2.85
2.85
3.3
1.85
1.85
2.85
1.5
1.85
1.85
1.85
1.5
2.85
3.3
Open circuit
Ground
SYS
2.5
2.5
3.3
1.5
1.3
Open circuit
Ground
SYS
1.2
1.8
1.1
1.3
SYS
3.3
2.85
2.5
1.5
1.5
SYS
1.8
3.3
2.85
______________________________________________________________________________________ 29
Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
SYS UVLO
is not related to, and operates independently from, the
When the SYS voltage falls below the SYS undervoltage
thermistor input. Also note that thermal-overload shut-
down is a fail-safe mechanism. Proper thermal design
should ensure that the junction temperature of the
MAX8662/MAX8663 never exceeds the absolute maxi-
mum rating of +150°C.
threshold (V
, typically 2.4V falling), the
UVLO_SYS
MAX8662/MAX8663 enter SYS undervoltage lockout
(SYS UVLO). SYS UVLO forces all regulators off. All
regulators assume the states determined by the corre-
sponding enable input (EN_) when the SYS voltage
Applications Information
rises above V
.
UVLO_SYS
Step-Down Converters (OUT1 and OUT2)
Input-Limiter Thermal Limiting
The MAX8662/MAX8663 reduce input-limiter current by
5%/°C when its die temperature exceeds +100°C. The
system load (SYS) has priority over charger current, so
input current is first reduced by lowering charge cur-
rent. If the junction temperature still reaches +120°C in
spite of charge-current reduction, no current is drawn
from DC, the battery supplies the entire system load,
and SYS is regulated at 100mV below BAT. Note that
this on-chip thermal-limiting circuitry is not related to,
and operates independently from, the thermistor input.
Capacitor Selection
The input capacitor in a DC-DC converter reduces cur-
rent peaks drawn from the battery or other input power
source and reduces switching noise in the controller.
The impedance of the input capacitor at the switching
frequency should be less than the input source’s output
impedance so that high-frequency switching currents
do not pass through the input source. The DC-DC con-
verter output capacitor keeps output ripple small and
ensures control-loop stability. The output capacitor must
also have low impedance at the switching frequency.
Ceramic capacitors with X5R or X7R dielectrics are
highly recommended for both input and output capaci-
tors due to their small size, low ESR, and small tempera-
ture coefficients.
2/MAX863
Regulator Thermal-Overload Shutdown
The MAX8662/MAX8663 disable all charger, SYS, and
regulator outputs (except VL) if the junction tempera-
ture rises above +165°C, allowing the device to cool.
When the junction temperature cools by approximately
15°C, resume the state they held prior to thermal over-
load. Note that this on-chip thermal-protection circuitry
See Table 4 for example OUT1/OUT2 input and output
capacitors and manufacturers.
Table 4. External Components List (See Figure 1)
COMPONENT
FUNCTION
PART
4.7µF 10%, 16V X5R ceramic capacitor
Murata GRM188R61C105KA93B or Taiyo Yuden EMK107 BJ105KA
C1
Input filter capacitor
0.1µF 10%, 10V X5R ceramic capacitor (0402)
Murata GRM 155R61A104KA01 or TDK C1005X5R1A104K
C2, C3
C4, C6
C5, C7
C8, C9
VL filter capacitor
4.7µF 10%, 6.3V X5R ceramic capacitors (0603)
Mutara GRM188R60J475KE
Buck input bypass capacitors
Step-down output filter
capacitors
2 x 10µF 10%, 6.3V X5R ceramic capacitors (0805)
Murata GRM219R60J106KE19
Linear regulator input filter
capacitors
1.0µF 10%, 16V X5R ceramic capacitors (0603)
Murata GRM188R61C105KA93B or Taiyo Yuden EMK107 BJ105KA
C10
C11
SYS output bypass capacitor
Battery bypass capacitor
10µF 10%, 6.3V X5R ceramic capacitor
4.7µF 10%, 6.3V X5R ceramic capacitor
0.068µF 10%, 10V X5R ceramic capacitor (0402)
TDK C1005X5R1A683K
C12
C13
C14
C15
Charger timing capacitor
1.0µF 10%, 16V X5R ceramic capacitor (0603)
Murata GRM188R61C105KA93B or Taiyo Yuden EMK107BJ105KA
Boost input bypass capacitor
Step-up output filter capacitor
0.1µF 10%, 50V X7R ceramic capacitor (0603)
Murata GRM188R71H104KA93 or Taiyo Yuden UMK107BJ104KA
Step-up compensation
capacitor
0.22µF 10%, 10V X5R ceramic capacitor (0402)
Murata GRM155R61A224KE19
30 ______________________________________________________________________________________
Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
2/MAX863
Table 4. External Components List (See Figure 1) (continued)
COMPONENT
FUNCTION
PART
4.7µF 10%, 6.3V X5R ceramic capacitor (0603)
Murata GRM188R60J475KE19
Linear regulator output filter
capacitor
C16
Linear regulator output filter
capacitors
1.0µF 10%, 6.3V X5R ceramic capacitors (0603)
Murata GRM188R60J105KA01
C17, C19
C18
D1
2.2µF 10%, 6.3V X5R ceramic capacitor (0603)
Murata GRM185R60J225KE26
Linear regulator output filter
capacitor
200mA, 30V Schottky diode (SOD-323)
Central CMDSH2-3
Boost rectifier
30mA surface-mount white LEDs
Nichia NSCW215T
D2–D8
D9
Display backlighting
CS clamp
100mA silicon signal diode
Central CMOD4448
3.3µH inductor
TOKO DE2818C 1072AS-3R3M, 1.6A, 50mΩ
L1
OUT1 step-down inductor
OUT2 step-down inductor
4.7µH inductor
TOKO DE2818C 1072AS-4R7M, 1.3A, 70mΩ
L2
22µH inductor
L3
OUT3 step-up inductor
Murata LQH32CN220K53, 250mA, 0.71Ω DCR (3.2mm x 2.5mm x 1.55mm)
or TDK VLF3012AT-220MR33, 330mA, 0.76Ω DCR (2.8mm x 2.6mm x 1.2mm)
R1, R7
R2–R5
Logic output pullup resistors
Step-down feedback resistors
100kΩ
R3 and R5 are 200kΩ 0.1%; R2 and R4 depend on output voltage ( 0.1%)
Phillips NTC thermistor
P/N 2322-640-63103
10kΩ 5% at +25°C
R6
Negative TC thermistor
Input current-limit
programming resistor
R8
R9
1.5kΩ 1%, for 2A limit
Fast charge-current
programming resistor
3kΩ 1%, for 777mA charging
1.2MΩ 1%, for 25V max output
Step-up overvoltage feedback
resistor
R10
______________________________________________________________________________________ 31
Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
Table 5. MAX8662/MAX8663 Package Thermal Characteristics
48-PIN THIN QFN (6mm x 6mm)
40-PIN THIN QFN (5mm x 5mm)
SINGLE-LAYER PCB MULTILAYER PCB
SINGLE-LAYER PCB MULTILAYER PCB
2105.3mW
2963.0mW
1777.8mW
2857.1mW
CONTINUOUS
POWER
DISSIPATION
Derate 26.3mW/°C above
+70°C
Derate 37.0mW/°C above
+70°C
Derate 22.2mW/°C above
+70°C
Derate 35.7mW/°C above
+70°C
θ
θ
38°C/W
1.4°C/W
27°C/W
1.4°C/W
45°C/W
1.7°C/W
28°C/W
1.7°C/W
JA
JC
Position input capacitors from DC, SYS, BAT, PV1, and
PV2 to the power-ground plane as close as possible to
the IC. Connect input capacitors and output capacitors
from inputs of linear regulators to low-noise analog
ground as close as possible to the IC. Connect the
inductors, output capacitors, and feedback resistors as
close to the IC as possible and keep the traces short,
direct, and wide.
Power Dissipation
The MAX8662/MAX8663 have a thermal-limiting circuitry,
as well as a shutdown feature to protect the IC from
damage when the die temperature rises. To allow the
maximum charging current and load current on each
regulator, and to prevent thermal overload, it is important
to ensure that the heat generated by the
MAX8662/MAX8663 is dissipated into the PCB. The
package’s exposed paddle must be soldered to the
PCB, with multiple vias tightly packed under the exposed
paddle to ensure optimum thermal contact to the ground
plane.
2/MAX863
Refer to the MAX8662/MAX8663 evaluation kit for a
suitable PCB layout example.
Table 5 shows the thermal characteristics of the
MAX8662/MAX8663 packages. For example, the junc-
Pin Configurations (continued)
tion-to-case thermal resistance (θ ) of the MAX8663 is
JC
TOP VIEW
2.7°C/W. When properly mounted on a multilayer PCB,
the junction-to-ambient thermal resistance (θ ) is typi-
30 29 28 27 26 25 24 23 22 21
JA
cally 28°C/W.
20
31
32
33
PWM
EN6
EN7
19 EN5
18 EN4
PCB Layout and Routing
High switching frequencies and relatively large peak
currents make the PCB layout a very important aspect of
design. Good design minimizes ground bounce, exces-
sive EMI on the feedback paths, and voltage gradients
in the ground plane, which can result in instability or
regulation errors.
OUT6
17
16
OUT5
IN45
IN67 34
35
36
37
38
39
40
OUT7
VL
MAX8663
15 OUT4
14
GND
13 CT
12
SL1
SL2
A separate low-noise analog ground plane containing
the reference, linear regulator, signal ground, and GND
must connect to the power-ground plane at only one
point to minimize the effects of power-ground currents.
PGND_, DC power, and battery grounds must connect
directly to the power-ground plane. Connect GND to
the exposed paddle directly under the IC. Use multiple
tightly spaced vias to the ground plane under the
exposed paddle to help cool the IC.
ISET
11 THM
PSET
POK
1
2
3
4
5
6
7
8
9
10
THIN QFN
(5mm x 5mm)
32 ______________________________________________________________________________________
Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
2/MAX863
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
______________________________________________________________________________________ 33
Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
2/MAX863
34 ______________________________________________________________________________________
Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
2/MAX863
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
______________________________________________________________________________________ 35
Power-Management ICs for
Single-Cell, Li+ Battery-Operated Devices
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
2/MAX863
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
36 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2007 Maxim Integrated Products
is a registered trademark of Maxim Integrated Products. Inc.
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