MAX8667ETEHR+_技术文档

19-0784; Rev 1; 7/07

1.5MHz Dual Step-Down DC-DC Converters

with Dual LDOs and Individual Enables

7/MAX68

General Description

Features

o Tiny, Thin QFN 3mm x 3mm Package

o Individual Enables

o Step-Down Converters

The MAX8667/MAX8668 dual step-down converters

with dual low-dropout (LDO) linear regulators are

intended to power low-voltage microprocessors or

DSPs in portable devices. They feature high efficiency

with small external component size. The step-down

converters are adjustable from 0.6V to 3.3V (MAX8668)

or factory preset (MAX8667) with guaranteed output

current of 600mA for OUT1 and 1200mA for OUT2. The

1.5MHz hysteretic-PWM control scheme allows for tiny

external components and reduces no-load operating

current to 100µA with all outputs enabled. Dual low-qui-

escent-current, low-noise LDOs operate down to 1.7V

supply voltage. The MAX8667/MAX8668 have individ-

ual enables for each output, maximizing flexibility.

600mA Guaranteed Output Current on OUT1

1200mA Guaranteed Output Current on OUT2

Tiny Size 2.2µH Chip Inductor (0805)

Output Voltage from 0.6V to 3.3V (MAX8668)

Ultra-Fast Line and Load Transients

Low 25µA Supply Current Each

o LDOs

300mA Guaranteed

Low 1.7V Minimum Supply Voltage

Low Output Noise

Ordering Information

The MAX8667/MAX8668 are available in the space-

saving, 3mm x 3mm, 16-pin thin QFN package.

PART

PKG CODE

T1633-4

TOP MARK

AEQ

MAX8667ETEAA+

MAX8667ETEAB+

MAX8667ETEAC+

MAX8667ETECQ+

Applications

AFI

Cell Phones/Smartphones

AFM

PDA and Palmtop Computers

Portable MP3 and DVD Players

Digital Cameras, Camcorders

PCMCIA Cards

AFN

Note: All MAX8667/MAX8668 parts are in a 16-pin, thin QFN,

3mm x 3mm package and operate in the -40°C to +85°C

extended temperature range.

+Denotes a lead-free package.

Handheld Instruments

Ordering Information continued at the end of data sheet.

Selector Guide appears at the end of data sheet.

Pin Configuration

Typical Operating Circuit

2.6V TO 5.5V

TOP VIEW

10µF

4.7µF

IN12 IN34

12

11

10

9

EN3

EN1

EN4

EN2

REF

OUT2 (FB2)

REF

300mA

4.7µF

13

14

PGND1

8

7

6

5

OUT3

OUT1 (FB1)

0.01µF

OUT4

GND

MAX8667

MAX8668

4.7µF

GND

EN1 15

16

EN4

EN2

MAX8667

2.2µH

1.2A

600mA

1

2

3

4

LX2

LX1

OUT2

OUT1

2.2µF

PGND1 PGND2

THIN QFN

(3mm x 3mm)

( ) ARE FOR THE MAX8668

________________________________________________________________ Maxim Integrated Products

1

For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at

1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

1.5MHz Dual Step-Down DC-DC Converters

with Dual LDOs and Individual Enables

ABSOLUTE MAXIMUM RATINGS

IN12, IN34, FB1, FB2, EN1, EN2, EN3, EN4, OUT1,

OUT2, REF to GND............................................-0.3V to +6.0V

OUT3,

OUT4 to GND.....-0.3V to the lesser of + 6V or (V

PGND1, PGND2 to GND .......................................-0.3V to +0.3V

LX1, LX2 Current ..........................................................1.5A RMS

Continuous Power Dissipation (T = +70°C)

A

16-Pin, 3mm x 3mm Thin QFN

(derate 20.8mW/°C above +70°C).............................1667mW

Operating Temperature Range ...........................-40°C to +85°C

Junction Temperature..................................................... +150°C

Storage Temperature Range.............................-65°C to +150°C

Lead Temperature (soldering, 10s) .................................+300°C

+ 0.3V)

IN34

LX1, LX2 to GND (Note 1).......................-0.3V to (V

+ 0.3V)

IN12

Note 1: LX_ has internal clamp diodes to GND and IN12. Applications that forward bias these diodes should take care not to exceed

the IC’s package-dissipation limits.

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional

operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to

absolute maximum rating conditions for extended periods may affect device reliability.

ELECTRICAL CHARACTERISTICS

(V

= V

= 3.6V, T = -40°C to +85°C, unless otherwise noted. Typical values are at T = +25°C.) (Note 1)

IN12 A A

IN34

PARAMETER

CONDITIONS

MIN

1.7

2.6

2.8

TYP

MAX

5.5

1

UNITS

7/MAX68

IN34 Supply Range

IN12 Supply Range

IN12 Suppy Range

V

≥ V

V

IN12

IN34

MAX8668, V

≥ V

IN12

IN34

MAX8667, V

V

IN34

T

= +25°C

= +85°C

µA

A

Shutdown Supply Current,

V

= V

= 4.2V V

= 0V

EN_

IN12

IN34

I

+ I

IN34

IN12

0.05

100

A

No Load Supply Current,

+ I

MAX8667ETEJS+, all regulators enabled

150

µA

I

IN12

IN34

UNDERVOLTAGE LOCKOUT

V

rising

2.4

1.5

2.5

0.1

1.6

0.1

2.6

1.7

V

IN12

IN34

IN12 UVLO

hysteresis

rising

IN34 UVLO

hysteresis

THERMAL SHUTDOWN

Threshold

T

rising

+160

15

°C

A

Hysteresis

REFERENCE

Reference Bypass Output

Voltage

0.591

0.600

0.15

0.609

V

REF Supply Rejection

2.6V ≤ (V

= V

) ≤ 5.5V

IN34

mV/V

IN12

LOGIC AND CONTROL INPUTS

1.7V ≤ V

2.6V ≤ V

≤ 5.5V

IN34

IN12

EN_ Input Low Level

EN_ Input High Level

0.4

+1

V

1.7V ≤ V

2.6V ≤ V

≤ 5.5V

IN34

IN12

1.44

-1

T

= +25°C

= +85°C

A

EN_ Input Leakage Current

V

= V

= 5.5V

IN34

µA

IN12

0.001

0.6

A

STEP-DOWN CONVERTERS

Minimum Adjustable Output

Voltage

MAX8668

V

2

_______________________________________________________________________________________

1.5MHz Dual Step-Down DC-DC Converters

with Dual LDOs and Individual Enables

7/MAX68

ELECTRICAL CHARACTERISTICS (continued)

(V

= V

= 3.6V, T = -40°C to +85°C, unless otherwise noted. Typical values are at T = +25°C.) (Note 1)

IN12 A A

IN34

PARAMETER

CONDITIONS

MIN

TYP

MAX

UNITS

Maximum Adjustable Output

Voltage

MAX8668

3.3

V

T

A

T

A

T

A

T

A

= +25°C

0.588

0.582

1.274

1.261

0.600

1.300

0.01

0.05

0.1

0.612

0.618

1.326

1.339

MAX8668, no load,

FB1, FB2 Regulation Voltage

V

falling

= -40°C to +85°C

= +25°C

FB_

MAX8667ETEJS+, no load, V

falling

OUT_

OUT1, OUT2 Regulation Voltage

= -40°C to +85°C

FB1, FB2 Line Regulation

MAX8668, V

MAX8667, V

= 2.6V to 5.5V

%/V

IN12

OUT1, OUT2 Line Regulation

= 2.8V to 5.5V

IN12

MAX8668, shutdown mode

MAX8668, V = 0.5V

FB1, FB2 Bias Current

OUT1 Current Limit

OUT2 Current Limit

OUT1 On-Resistance

µA

mA

Ω

0.01

900

FB1

pMOSFET switch (I

)

700

500

1100

1000

2000

1800

0.6

LIMP1

nMOSFET rectifier (valley current)

pMOSFET switch (I

750

)

1333

1200

1667

1500

0.3

LIMP2

nMOSFET rectifier (valley current)

pMOSFET switch, I = -400mA

LX1

nMOSFET rectifier, I

= 400mA

0.3

0.6

LX1

pMOSFET switch, I

= -400mA

0.12

0.27

LX2

OUT2 On-Resistance

Ω

nMOSFET rectifier, I

= 400mA

LX2

Rectifier-Off Current Threshold

60

120

+1

mA

µA

(I

)

LXOFF

T

= +25°C

= +85°C

-1

A

LX Leakage Current

LX_ = 5.5V

0.1

100

50

A

Minimum On-Time

Minimum Off-Time

LDO REGULATORS

Supply Current

ns

Each LDO

20

µA

%

1mA load, T = +25°C

A

-1.5

-3.0

+1.5

+3.0

Output-Voltage Accuracy

1mA to 300mA load

Line Regulation

V

= 3.6V to 5.5V, 1mA load

= 1.8V, 300mA load

0.003

130

420

0.1

75

%/V

mV

mA

ms

IN34

Dropout Voltage

250

465

Current Limit

, V

90% of nominal value

375

OUT3 OUT4

Soft-Start Ramp Time

Output Noise

To 90% of final value

100Hz to 100kHz, 30mA load, V

f < 1kHz, 30mA load

and V

= 2.8V

µV

RMS

OUT3

OUT4

Power-Supply Rejection Ratio

Shutdown Output Resistance

TIMING (See Figure 2)

57

dB

1

kΩ

OUT1, OUT2

OUT3, OUT4

OUT1, OUT2

OUT3, OUT4

25

45

15

35

Power-On Time (t

)

µs

PWRON

Enable Time (t

)

EN

Note 1: All devices are 100% production tested at T = +25°C. Limits over the operating temperature range are guaranteed by design.

A

_______________________________________________________________________________________

3

1.5MHz Dual Step-Down DC-DC Converters

with Dual LDOs and Individual Enables

Typical Operating Characteristics

(V

IN12

= V

= 3.6V, circuit of Figure 4, V

= 1.2V, V

= 1.8V, V

= 2.8V, V = 2.8V, T = +25°C, unless otherwise noted.)

OUT4 A

IN34

OUT1

OUT2

OUT3

OUT1 EFFICIENCY vs. LOAD CURRENT

OUT2 EFFICIENCY vs. LOAD CURRENT

OUT1 LOAD REGULATION

(V

= 1.2V)

(V

= 1.8V)

OUT1

OUT2

1.25

90

80

70

60

50

40

30

20

10

0

90

80

70

60

50

40

30

20

10

0

1.20

1.15

1.10

1.05

1.00

0.95

0.90

0.85

0.80

ONLY OUT2 ENABLED

ONLY OUT1 ENABLED

0

100

200

300

400

500

600

0.1

1

10

100

1000

0.1

1

10

100

1000

10000

7/MAX68

LOAD CURRENT (mA)

OUT1 OUTPUT VOLTAGE

vs. INPUT VOLTAGE (600mA LOAD)

OUT2 OUTPUT VOLTAGE

vs. INPUT VOLTAGE (1200mA LOAD)

OUT2 LOAD REGULATION

1.90

1.80

1.70

1.60

1.50

1.40

1.30

1.20

1.40

1.35

1.30

1.25

1.20

1.15

1.10

1.05

1.00

2.00

1.95

1.90

1.85

1.80

1.75

1.70

1.65

1.60

0

200

400

600

800 1000 1200

2.5

3.0

3.5

4.0

4.5

5.0

5.5

2.5

3.0

3.5

4.0

4.5

5.0

5.5

LOAD CURRENT (mA)

INPUT VOLTAGE (V)

SWITCHING FREQUENCY

vs. LOAD CURRENT

NO-LOAD SUPPLY CURRENT vs. SUPPLY

VOLTAGE ALL REGULATOR ENABLED

NO-LOAD SUPPLY CURRENT

vs. SUPPLY VOLTAGE OUT1 AND OUT2 ONLY

3500

3000

2500

2000

1500

1000

500

120

100

80

60

40

20

0

120

100

80

60

40

20

0

SUPPLY VOLTAGE

FALLING

SUPPLY VOLTAGE

RISING

OUT2

SUPPLY VOLTAGE

RISING

SUPPLY VOLTAGE

FALLING

OUT1

0

300

600

900 1200 1500 1800

1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5

SUPPLY VOLTAGE (V)

1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5

SUPPLY VOLTAGE (V)

LOAD CURRENT (mA)

4

_______________________________________________________________________________________

1.5MHz Dual Step-Down DC-DC Converters

with Dual LDOs and Individual Enables

7/MAX68

Typical Operating Characteristics (continued)

(V

IN12

= V

= 3.6V, circuit of Figure 4, V

= 1.2V, V

= 1.8V, V

= 2.8V, V

= 2.8V, T = +25°C, unless otherwise noted.)

A

IN34

OUT1

OUT2

OUT3

OUT4

NO-LOAD SUPPLY CURRENT vs. SUPPLY

VOLTAGE OUT3 AND OUT4 ONLY

OUT3 OUTPUT VOLTAGE

vs. INPUT VOLTAGE (300mA LOAD)

OUT3 DROPOUT VOLTAGE

vs. LOAD CURRENT

3.00

2.95

2.90

2.85

2.80

2.75

2.70

2.65

2.60

2.55

2.50

120

100

80

60

40

20

0

80

V

= 5.5V

IN12

70

60

50

40

30

20

10

0

V

VOLTAGE

IN34

FALLING

V

VOLTAGE

IN34

RISING

0

100

200

300

0

1

2

3

4

5

2.5

3.0

3.5

4.0

4.5

5.0

5.5

LOAD CURRENT (mA)

SUPPLY VOLTAGE (V)

INPUT VOLTAGE (V)

ENABLE WAVEFORMS

SUPPLY CURRENT vs. SUPPLY VOLTAGE

MAX8667/88 toc14

1000

900

800

700

600

500

400

300

200

100

0

IN12 = IN34

5V/div

2V/div

EN1/EN2/

EN3/EN4

2.4Ω LOAD ON OUT1

3.6Ω LOAD ON OUT2

NO LOAD ON OUT3

NO LOAD ON OUT4

V

OUT1

2V/div

V

OUT2

2V/div

OUT3

OUT4

2A/div

I

L1

2A/div

I

L2

I

+ I

IN12 IN34

2.5

3.0

3.5

4.0

4.5

5.0

5.5

40µs/div

SUPPLY VOLTAGE (V)

OUT1 LOAD TRANSIENT

SHUTDOWN WAVEFORMS

MAX8667/88 toc16

MAX8667/88 toc15

EN1/EN2/

EN3/EN4

5V/div

100mV/div

(AC-COUPLED)

V

OUT1

V

OUT1

300mA

V

OUT2

1V/div

V

OUT3

OUT4

10mA

I

OUT1

200mA/div

V

1V/div

I

L1

10µs/div

40µs/div

_______________________________________________________________________________________

5

1.5MHz Dual Step-Down DC-DC Converters

with Dual LDOs and Individual Enables

Typical Operating Characteristics (continued)

(V

IN12

= V

= 3.6V, circuit of Figure 4, V

= 1.2V, V

= 1.8V, V

= 2.8V, V

= 2.8V, T = +25°C, unless otherwise noted.)

IN34

OUT1

OUT2

OUT3

OUT4 A

OUT3 LOAD TRANSIENT

OUT2 LOAD TRANSIENT

MAX8667/88 toc18

MAX8667/88 toc17

50mV/div

(AC-COUPLED)

200mV/div

(AC-COUPLED)

V

OUT2

V

OUT3

600mA

500mA/div

10mA

I

OUT2

300mA

I

200mA/div

500mA/div

I

L2

0mA

10µs/div

7/MAX68

OUT1 LIGHT-LOAD SWITCHING

WAVEFORMS

OUT4 LOAD TRANSIENT

MAX8667/88 toc20

MAX8667/88 toc19

50mV/div

(AC-COUPLED)

V

20mV/div

2V/div

V

OUT1

OUT4

V

LX1

300mA

I

OUT4

200mA/div

0mA

I

0mA

L1

100mA/div

500µA LOAD

10µs/div

OUT2 LIGHT-LOAD SWITCHING

WAVEFORMS

OUT1 HEAVY-LOAD SWITCHING

WAVEFORMS

MAX8667/88 toc21

MAX8667/88 toc22

V

OUT1

20mV/div

2V/div

20mV/div

2V/div

OUT2

V

LX2

LX1

500mA/div

I

L1

L2

500mA/div

500µA LOAD

40µs/div

400ns/div

6

_______________________________________________________________________________________

1.5MHz Dual Step-Down DC-DC Converters

with Dual LDOs and Individual Enables

7/MAX68

Typical Operating Characteristics (continued)

(V

IN12

= V

= 3.6V, circuit of Figure 4, V

= 1.2V, V

= 1.8V, V

= 2.8V, V

= 2.8V, T = +25°C, unless otherwise noted.)

IN34

OUT1

OUT2

OUT3

OUT4 A

OUT2 HEAVY-LOAD SWITCHING

WAVEFORMS

POWER-SUPPLY REJECTION RATIO

vs. FREQUENCY

MAX8667/88 toc23

70

60

50

40

30

20

10

V

I

= 2.80V

= 100Ω

= 4.7µF

OUT3

LOAD

C

OUT3

V

20mV/div

2V/div

OUT2

V

LX2

500mA/div

I

L2

500mA LOAD

0

400ns/div

0.01

0.1

1

10

100

1000

FREQUENCY (kHz)

OUT3 NOISE

OUT4 NOISE

MAX8667/88 toc25

MAX8667/88 toc26

100µV/div

V

I

= 2.80V

= 100Ω

V

I

= 3.30V

= 100Ω

OUT3

LOAD

OUT4

LOAD

1ms/div

_______________________________________________________________________________________

7

1.5MHz Dual Step-Down DC-DC Converters

with Dual LDOs and Individual Enables

Pin Description

NAME

1

FUNCTION

MAX8667 MAX8668

Enable Input for Regulator 3. Drive EN3 high or connect to IN34 to turn on regulator 3. Drive low

to turn off regulator 3 and reduce input quiescent current.

EN3

Output of Regulator 3. Bypass OUT3 with a 4.7µF ceramic capacitor to GND. OUT3 is

discharged to GND through an internal 1kΩ in shutdown.

2

OUT3

Input Voltage for LDO Regulators 3 and 4. Supply voltage range is from 1.7V to 5.5V. This

3

IN34

supply voltage must not exceed V . Connect a 4.7µF or larger ceramic capacitor from IN34

IN12

to ground.

Output of Regulator 4. Bypass OUT4 with a 4.7µF ceramic capacitor to GND. OUT4 is

discharged to GND through an internal 1kΩ in shutdown.

4

5

OUT4

EN4

OUT4

EN4

Enable Input for Regulator 4. Drive EN4 high or connect to IN34 to turn on regulator 4. Drive low

to turn off regulator 4 and reduce input quiescent current.

6

7

8

GND

REF

GND

REF

—

Ground

7/MAX68

Reference Output. Bypass REF with a 0.01µF ceramic capacitor to GND.

Feedback Input for Regulator 2. Connect OUT2 directly to the output of step-down regulator 2.

OUT2

Feedback Input for Regulator 2. Connect FB2 to the center of a resistor feedback divider

between the output of regulator 2 and ground to set the output voltage. See the Setting the

Output Voltages and Voltage Positioning section.

—

FB2

9

PGND2

LX2

PGND2 Power Ground for Step-Down Regulator 2

10

LX2

IN12

LX1

Inductor Connection for Regulator 2

Input Voltage for Step-Down Regulators 1 and 2. Supply voltage range is from 2.6V to 5.5V. This

supply voltage must not be less than V

IN12 to ground.

11

IN12

. Connect a 10µF or larger ceramic capacitor from

IN34

12

13

14

LX1

Inductor Connection for Regulator 1

PGND1

OUT1

PGND1 Power Ground for Step-Down Regulator 1

—

Feedback Input for Regulator 1. Connect OUT1 directly to the output of step-down regulator 1.

Feedback Input for Regulator 1. Connect FB1 to the center of a resistor feedback divider

between the output of regulator 1 and ground to set the output voltage. See the Setting the

Output Voltages and Voltage Positioning section.

—

FB1

Enable Input for Regulator 1. Drive EN1 high or connect to IN12 to turn on step-down regulator 1.

Drive low to turn off the regulator and reduce input quiescent current.

15

EN1

Enable Input for Regulator 2. Drive EN2 high or connect to IN12 to turn on step-down regulator 2.

Drive low to turn off the regulator and reduce input quiescent current.

16

—

EN2

EP

EN2

EP

Exposed Paddle. Connect to GND, PGND1, PGND2, and circuit ground.

8

_______________________________________________________________________________________

1.5MHz Dual Step-Down DC-DC Converters

with Dual LDOs and Individual Enables

7/MAX68

IN34

1.7V TO 5.5V

IN12

2.8V TO 5.5V

(2.6V TO 5.5V)

STEP-DOWN

IN

OUT1

GND

LX1

EN

UVLO

OUT1

(FB1)

FB

EN

PGND1

STEP-DOWN

OUT2

REF

REF AND BIAS

IN

REF

LX2

EN

GND

OUT2

(FB2)

FB

GND

PGND2

EN1

EN2

LDO

IN

OUT

OUT3

PWRON LOGIC

AND ENABLES

OUT3

GND

EN

EN3

EN4

LDO

OUT4

GND

OUT

IN

OUT4

EN

() ARE FOR THE MAX8668

Figure 1. Functional Diagram

_______________________________________________________________________________________

9

1.5MHz Dual Step-Down DC-DC Converters

with Dual LDOs and Individual Enables

A UVLO circuit prevents step-down regulators OUT1

Detailed Description

The MAX8667/MAX8668 dual step-down converters

and OUT2 from switching when the supply voltage is

too low to guarantee proper operation. When V

falls

IN12

with dual low-dropout (LDO) linear regulators are

intended to power low-voltage microprocessors or

DSPs in portable devices. They feature high efficiency

with small external component size. The step-down out-

puts are adjustable from 0.6V to 3.3V (MAX8668) or

factory preset (MAX8667) with guaranteed output cur-

rent of 600mA for OUT1 and 1200mA for OUT2. The

1.5MHz hysteretic-PWM control scheme allows for tiny

external components and reduces no-load operating

current to 100µA (typ) with all regulators enabled. Dual,

low-quiescent-current, low-noise LDOs operate down to

1.7V supply voltage. The MAX8667/MAX8668 have

individual enable inputs for each output to facilitate any

supply sequencing.

below 2.4V (typ), OUT1 and OUT2 are shut down.

OUT1 and OUT2 turn on and begin soft-start when

IN12

V

rises above 2.5V (typ).

Soft-Start

When initially powered up, or enabled with EN_, the

step-down regulators soft-start by gradually ramping

up the output voltage. This reduces inrush current dur-

ing startup. See the startup waveforms in the Typical

Operating Characteristics section.

Current Limit

The MAX8667/MAX8668 limit the peak inductor current

of the p-channel MOSFET (I

). A valley current limit

LIMP_

is used to protect the step-down regulators during

severe overload and output short-circuit conditions.

When the peak current limit is reached, the internal

p-channel MOSFET turns off and remains off until the

output drops below regulation, the inductor current falls

below the valley current-limit threshold, and the mini-

mum off-time has expired.

Step-Down DC-DC Regulators

(OUT1, OUT2)

7/MAX68

Step-Down Regulator Architecture

The MAX8667/MAX8668 step-down regulators are opti-

mized for high-efficiency voltage conversion over a

wide load range, while maintaining excellent transient

response, minimizing external component size, and

minimizing output voltage ripple. The DC-DC convert-

ers (OUT1, OUT2) also feature an optimized on-resis-

tance internal MOSFET switch and synchronous

rectifier to maximize efficiency. The MAX8667/

MAX8668 utilize a proprietary hysteretic-PWM control

scheme that switches with nearly fixed frequency at up

to 1.5MHz allowing for ultra-small external components.

The step-down converter output current is guaranteed

up to 600mA for OUT1 and 1200mA for OUT2.

Voltage Positioning

The OUT1 and OUT2 output voltages and voltage posi-

tioning of the MAX8668 are set by a resistor network

connected to FB_. With this configuration, a portion of

the feedback signal is sensed on the switched side of

the inductor, and the output voltage droops slightly as

the load current is increased due to the DC resistance

of the inductor. This output voltage droop is known as

voltage positioning. Voltage positioning allows the load

regulation to be set to match the voltage droop during

a load transient, reducing the peak-to-peak output volt-

age deviation during a load transient, and reducing the

output capacitance requirements.

When the step-down converter output voltage falls below

the regulation threshold, the error comparator begins a

switching cycle by turning the high-side p-channel

MOSFET switch on. This switch remains on until the mini-

Dropout

As the input voltage approaches the output voltage, the

duty cycle of the p-channel MOSFET reaches 100%. In

this state, the p-channel MOSFET is turned on con-

stantly (not switching), and the dropout voltage is the

voltage drop due to the output current across the on-

mum on-time (t ) expires and the output voltage is in

ON

regulation or the current-limit threshold (I

) is

LIMP_

exceeded. Once off, the high-side switch remains off

until the minimum off-time (t ) expires and the output

OFF

voltage again falls below the regulation threshold.

During this off period, the low-side synchronous rectifi-

er turns on and remains on until either the high-side

switch turns on or the inductor current reduces to the

resistance of the internal p-channel MOSFET (R

)

PCH

and the inductor’s DC resistance (R ):

L

rectifier-off current threshold (I

= 60mA typ). The

LXOFF

V

= I

R

+R

internal synchronous rectifier eliminates the need for an

external Schottky diode.

(

)

DO

LOAD PCH L

LDO Linear Regulators (OUT3, OUT4)

The MAX8667/MAX8668 contain two low-dropout linear

regulators (LDOs), OUT3 and OUT4. The LDO output

voltages are factory preset, and each LDO supplies

Input Supply and Undervoltage Lockout

The input voltage range of step-down regulators OUT1

and OUT2 is 2.6V to 5.5V. This supply voltage must be

greater than or equal to the LDO supply voltage (V

).

IN34

10 ______________________________________________________________________________________

1.5MHz Dual Step-Down DC-DC Converters

with Dual LDOs and Individual Enables

7/MAX68

loads up to 300mA. The LDOs include an internal refer-

ence, error amplifier, p-channel pass transistor, and

internal voltage-dividers. Each error amplifier compares

the reference voltage to the output voltage (divided by

the internal voltage-divider) and amplifies the differ-

ence. If the divided feedback voltage is lower than the

reference voltage, the pass-transistor gate is pulled

lower, allowing more current to pass to the outputs and

increasing the output voltage. If the divided feedback

voltage is too high, the pass-transistor gate is pulled

up, allowing less current to pass to the output.

soft-start ramp time is typically 100µs from the start of

the soft-start ramp to the output reaching its nominal

regulation voltage.

Current Limit

The OUT3 and OUT4 output current is limited to 375mA

(min). If the output current exceeds the current limit, the

corresponding LDO output voltage drops.

Dropout

The maximum dropout voltage for the linear regulators

is 250mV at 300mA load. To avoid dropout, make sure

the IN34 supply voltage is at least 250mV higher than

the highest LDO output voltage.

Input Supply and Undervoltage Lockout

The input voltage range of LDO regulators OUT3 and

OUT4 is 1.7V to 5.5V. This supply voltage must be less

Thermal-Overload Protection

Thermal-overload protection limits the total power dissi-

pation in the MAX8667/MAX8668. Thermal-protection

circuits monitor the die temperature. If the die tempera-

ture exceeds +160°C, the IC is shut down, allowing the

IC to cool. Once the IC has cooled by 15°C, the IC is

enabled again. This results in a pulsed output during

continuous thermal-overload conditions. The thermal-

overload protection protects the MAX8667/MAX8668 in

the event of fault conditions. For continuous operation,

do not exceed the absolute maximum junction temper-

ature of +150°C. See the Thermal Considerations sec-

tion for more information.

than or equal to the voltage applied to IN12 (V

IN12

≤

IN34

V

).

An undervoltage lockout circuit turns off the LDO regula-

tors when the input supply voltage is too low to guarantee

proper operation. When V

falls below 1.5V (typ),

IN34

OUT3 and OUT4 are shut down. OUT3 and OUT4 turn

on and begin soft-start when V

rises above 1.6V (typ).

IN34

Soft-Start

When initially powered up, or enabled with EN_, the

LDOs soft-start by gradually ramping up the output

voltage. This reduces inrush current during startup. The

t

IS THE PERIOD REQUIRED TO ENABLE FROM SHUTDOWN

PWRON

IN12

t

PWRON

ENx

OUTx

t

EN

IS THE ENABLE TIME FOR SUBSEQUENT ENABLE

SIGNALS FOLLOWING THE FIRST ENABLE

ENy

t

EN

OUTy

ENx, ENy ARE ANY COMBINATION OF EN1–EN4.

Figure 2. Timing Diagram

______________________________________________________________________________________ 11

1.5MHz Dual Step-Down DC-DC Converters

with Dual LDOs and Individual Enables

C3

4.7µF

INPUT

2.8V TO 5.5V

1.7V TO 5.5V

IN12 IN34

C2

10µF

EN3

EN1

EN2

REF

EN4

300mA

OUT3

C1

0.01µF

OUT4

C8

4.7µF

C9

4.7µF

GND

MAX8667

L2

L1

2.2µH

OUT1

600mA

OUT2

1.2A

LX1

LX2

OUT1

OUT2

C6

2.2µF

C7

2.2µF

7/MAX68

PGND2 PGND1

Figure 3. MAX8667 Typical Application Circuit

INPUT

2.6V TO 5.5V

C2

IN12 IN34

10µF

EN3

EN1

EN2

EN4

OUT3, 300mA

OUT4, 300mA

OUT3

OUT4

REF

C1

0.01µF

C8

4.7µF

C9

4.7µF

GND

MAX8668

L2

L1

2.2µH

OUT1

0.6V TO 3.3V, 600mA

OUT2

0.6V TO 3.3V, 1.2A

LX1

FB1

LX2

R3

R4

R1

R2

R5*

R6*

C4

C6

2.2µF

C7

≤ 1.8V

> 1.8V

2.2µF for V

OUT2

FB2

4.7µF for V

OUT2

C5

C10*

PGND1 PGND2

*C10, R5, AND R6 ARE OPTIONAL

Figure 4. MAX8668 Typical Application Circuit

12 ______________________________________________________________________________________

1.5MHz Dual Step-Down DC-DC Converters

with Dual LDOs and Individual Enables

7/MAX68

Applications Information

Setting the Output Voltages

L1

DCR

LX_

OUT

and Voltage Positioning

The LDO output voltages of the MAX8667/MAX8668,

and the step-down outputs of the MAX8667 are factory

preset. See the Selector Guide to find the part number

corresponding to the desired output voltages.

ESR

C6

R1

R2

R

LOAD

R6

(OPTIONAL)

C4

The OUT1 and OUT2 output voltages of the MAX8668

are set by a resistor network connected to FB_ as

shown in Figure 5. With this configuration, a portion of

the feedback signal is sensed on the switched side of

the inductor (LX), and the output voltage droops slightly

as the load current is increased due to the DC resis-

tance of the inductor (DCR). This allows the load regu-

lation to be set to match the voltage droop during a

load transient (voltage positioning), reducing the peak-

to-peak output-voltage deviation during a load tran-

sient, and reducing the output capacitance

requirements.

FB_

Figure 5. MAX8668 Feedback Network

Calculate the factor m based on the desired load-regu-

lation improvement:

I

×DCR

OUT(MAX)

m=

For the simplest method of setting the output voltage,

R6 is not installed. Choose the value of R2 (a good

starting value is 100kΩ), and then calculate the value of

R1 as follows:

∆V

OUT(DESIRED)

where I

is the maximum output current, DCR is

OUT(MAX)

the inductor series resistance, and ∆V

is the

OUT(DESIRED)

maximum allowable droop in the output voltage at full

load. The calculated value for m must be between 1.1 and

2; m = 2 results in a 2x improvement in load regulation.

⎛ V

⎞

OUT

R1=R2×

−1

⎟

⎜

⎝

⎠

V

FB

Now calculate the values of R1 and R6 as follows:

where V is the feedback regulation voltage (0.6V).

FB

R1=R ×m

EQ

With the voltage set in this manner, the voltage posi-

tioning depends only on the DCR, and the maximum

output voltage droop is:

m

m−1

R6 =R

×

EQ

The value of R1 should always be lower than the value

of R6.

∆V

=DCR×I

OUT(MAX)

Power-Supply Sequencing

The MAX8667/MAX8668 have individual enable inputs

for each regulator to allow complete control over the

power sequencing. When all EN_ inputs are low, the IC

is in low-power shutdown mode, reducing the supply

current to less than 1µA. After one of the EN_ inputs

asserts high, the corresponding regulator begins soft-

Setting the Output Voltages with

Reduced Voltage Positioning

To obtain less voltage positioning than described in the

previous section, use the following procedure for set-

ting the output voltages. The OUT1 and OUT2 output

voltages and voltage positioning of the MAX8668 are

set by a resistor network connected to FB_ as shown in

Figure 5.

start after a delay of t (see Figure 2). The first output

EN

enabled from shutdown mode or initially powering up

To set the output voltage (V

), first select a value for

OUT

the IC has a longer delay (t

low-power shutdown mode.

) as the IC exits the

PWRON

R2 (a good starting value is 100kΩ). Then calculate the

value of R (the equivalent parallel resistance of R1

EQ

Inductor Selection

and R6) as follows:

The MAX8667/MAX8668 step-down converters operate

with inductors between 2.2µH and 4.7µH. Low induc-

tance values are physically smaller, but require faster

switching, resulting in some efficiency loss. The induc-

tor’s DC current rating must be high enough to account

⎛ V

⎞

OUT

R

EQ

=

−1 ×R2

⎜

⎟

⎝

⎠

V

FB

where V is the feedback-regulation voltage (0.6V).

FB

______________________________________________________________________________________ 13

1.5MHz Dual Step-Down DC-DC Converters

with Dual LDOs and Individual Enables

Table 1. Recommended Inductors

MANUFACTURER

INDUCTOR

L (µH)

2.2

4.7

2.2

R (mΩ)

CURRENT RATING (A)

L x W x H (mm)

2.0 x 1.6 x 1.0

2.5 x 2.0 x 1.0

3.2 x 2.5 x 1.55

3.2 x 1.6 x 0.95

3.2 x 3.2 x 1.0

2.5 x 1.8 x 1.35

2.8 x 2.8 x 1.2

2.5 x 2.0 x 1.0

4.0 x 4.0 x 1.1

2.5 x 1.8 x 2.0

L

FDK

MIPF2016

110

80

1.1

1.3

MIPF2520D

LQH32CN2R2M5

LQM31P

97

0.79

0.9

Murata

220

120

200

140

80

Sumida

TDK

CDRH2D09

GLF251812T

D2812C

0.44

0.6

TOKO

0.77

0.7

MDT2520-CR

TPC Series

CB2518T

55

1.8

Wurth

124

90

1.35

0.51

Taiyo Yuden

7/MAX68

for peak ripple current and load transients. The step-

down converter’s unique architecture has minimal cur-

rent overshoot during startup and load transients and in

most cases, an inductor capable of 1.3x the maximum

load current is acceptable.

small and to ensure regulation loop stability. These

capacitors must have low impedance at the switching

frequency. Surface-mount ceramic capacitors are a

good choice due to their small size and low ESR. Make

sure the capacitor maintains its capacitance over tem-

perature and DC bias. Ceramic capacitors with X5R or

X7R temperature characteristics generally perform well.

The output capacitance can be very low. For most appli-

cations, a 2.2µF ceramic capacitor is sufficient. For C7 of

For output voltages above 2V, when light-load efficiency

is important, the minimum recommended inductor is

2.2µH. For optimum voltage-positioning load transients,

choose an inductor with DC series resistance in the

50mΩ to 150mΩ range. For higher efficiency at heavy

loads (above 200mA) and minimal load regulation,

keep the inductor resistance as small as possible. For

light-load applications (up to 200mA), higher resistance

is acceptable with very little impact on performance.

the MAX8668, a 2.2µF (V

≤ 1.8V) or a 4.7µF (V

OUT2

> 1.8V) ceramic capacitor is recommended. For opti-

mum load-transient performance and very low output rip-

ple, the output capacitor value in µF should be equal to

or greater than the inductor value in µH.

Feed-Forward Capacitor

The feed-forward capacitors on the MAX8668 (C4 and

C5 in Figure 4) set the feedback loop response, control

the switching frequency, and are critical in obtaining

the best efficiency possible. Small X7R and C0G

ceramic capacitors are recommended.

Capacitor Selection

Input Capacitors

The input capacitor for the step-down converters (C2 in

Figures 3 and 4) reduces the current peaks drawn from

the battery or input power source and reduces switch-

ing noise in the IC. The impedance of C2 at the switch-

ing frequency should be very low. Surface-mount

ceramic capacitors are a good choice due to their

small size and low ESR. Make sure the capacitor main-

tains its capacitance over temperature and DC bias.

Ceramic capacitors with X5R or X7R temperature char-

acteristics generally perform well. A 10µF ceramic

capacitor is recommended.

For OUT1, calculate the value of C4 as follows:

C4 = 1.2 x 10^-5(s/V) x (V

/ R1)

OUT

For OUT2, calculate the value of C5 and C10 as fol-

lows:

C = 1.2 x 10^-5(s/V) x (V

/ R3)

OUT

ff

C = C5 + (C10 / 2)

ff

(C10 / C5) + 1 = (V

/ V ), where V is 0.6V.

FB FB

OUT

A 4.7µF ceramic capacitor is recommended for the

LDO input capacitor (C3 in Figure 3).

Rearranging the formulas:

C10 = 2 x C x (V

- V )/(V

+ V

)

ff

OUT

FB

OUT

FB

Step-Down Output Capacitors

The step-down output capacitors (C6 and C7 in Figures

3 and 4) are required to keep the output-voltage ripple

C5 = C – (C10 / 2)

ff

14 ______________________________________________________________________________________

1.5MHz Dual Step-Down DC-DC Converters

with Dual LDOs and Individual Enables

7/MAX68

C10 is needed if V

> 1.5V or V

can be less than

IN12

OUT

P

=I

× V

− V

(

)

D3 OUT3

IN34 OUT3

V

OUT

/ 0.65.

=I

× V

− V

(

)

D4 OUT4

IN34 OUT4

LDO Output Capacitor and Stability

The maximum junction temperature of the MAX8667/

MAX8668 is +150°C. The junction-to-case thermal

Connect a 4.7µF ceramic capacitor between OUT3 and

GND, and a second 4.7µF ceramic capacitor from

OUT4 to GND. For a constant loading above 10mA, the

output capacitors can be reduced to 2.2µF. The equiv-

alent series resistance (ESR) of the LDO output capaci-

tors affects stability and output noise. Use output

capacitors with an ESR of 0.1Ω or less to ensure stable

operation and optimum transient response. Surface-

mount ceramic capacitors have very low ESR and are

commonly available. Connect these capacitors as

close as possible to the IC’s pins to minimize PCB trace

inductance.

resistance (θ ) of the MAX8667/MAX8668 is 6.9°C/W.

JC

When mounted on a single-layer PCB, the junction to

ambient thermal resistance (θ ) is about 64°C/W.

JA

Mounted on a multilayer PCB, θ

is about 48°C/W.

Calculate the junction temperature of the

MAX8667/MAX8668 as follows:

T = T +P × θ

JA

J

A

D

where T is the maximum ambient temperature. Make

A

sure the calculated value of T does not exceed the

J

+150°C maximum.

Thermal Considerations

The maximum package power dissipation of the

MAX8667/MAX8668 is 1667mW. Make sure the power

dissipated by the MAX8667/MAX8668 does not exceed

this rating. The total IC power dissipation is the sum of

the power dissipation of the four regulators:

PCB Layout

High switching frequencies and relatively large peak

currents make PCB layout a very important aspect of

design. Good design minimizes excessive EMI on the

feedback paths and voltage gradients in the ground

plane, both of which can result in instability or regula-

tion errors. Connect the input capacitors as close as

possible to the IN_ and PGND_ pins. Connect the

inductor and output capacitors as close as possible to

the IC and keep the traces short, direct, and wide.

P

D

=P +P +P +P

D1 D2 D3 D4

Estimate the OUT1 and OUT2 power dissipations as

follows:

1− η

η

P

=I

× V

×

The feedback network traces are sensitive to inductor

magnetic field interference. Route these traces away

from the inductors and noisy traces such as LX. Keep

the feedback components close to the FB_ pin.

D1 OUT1

OUT1

1− η

η

P

=I

× V

×

D2 OUT2

OUT2

Connect GND and PGND_ to the ground plane.

Connect the exposed paddle to the ground plane with

one or more vias to help conduct heat away from the

IC.

where R is the inductor’s DC resistance, and η is the

L

efficiency (see the Typical Operating Characteristics

section).

Refer to the MAX8668 evaluation kit for a PCB layout

example.

Calculate the OUT3 and OUT4 power dissipations as

follows:

______________________________________________________________________________________ 15

1.5MHz Dual Step-Down DC-DC Converters

with Dual LDOs and Individual Enables

Ordering Information (continued)

Selector Guide

PART

PKG CODE

T1633-4

TOP MARK

AFJ

OUT1

(V)

OUT2

(V)

OUT3

(V)

OUT4

(V)

PART

MAX8667ETEHR+

MAX8667ETEJS+

MAX8668ETEA+

MAX8668ETEP+

MAX8668ETEQ+

MAX8668ETET+

MAX8668ETEU+

MAX8668ETEV+

MAX8668ETEW+

MAX8668ETEX+

MAX8667ETEAA+

MAX8667ETEAB+

MAX8667ETEAC+

MAX8667ETECQ+

MAX8667ETEHR+

MAX8667ETEJS+

MAX8668ETEA+

MAX8668ETEP+

MAX8668ETEQ+

MAX8668ETET+

MAX8668ETEU+

MAX8668ETEV+

MAX8668ETEW+

MAX8668ETEX+

1.20

1.60

1.80

1.30

ADJ

1.80

1.20

1.30

ADJ

2.80

2.85

1.20

2.80

2.60

3.30

2.80

3.30

2.80

3.30

2.80

2.85

1.20

2.80

2.70

2.80

1.80

1.20

3.30

2.80

2.50

3.00

1.80

AFQ

AER

AFK

AFR

AFS

AFL

AFT

AFU

AFV

All MAX8667/MAX8668 parts are in a 16-pin, thin QFN, 3mm x

3mm package and operate in the -40°C to = +85°C extended

temperature range.

7/MAX68

+Denotes a lead-free package.

Chip Information

PROCESS: BiCMOS

16 ______________________________________________________________________________________

1.5MHz Dual Step-Down DC-DC Converters

with Dual LDOs and Individual Enables

7/MAX68

Package Information

(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information

go to www.maxim-ic.com/packages.)

(NE - 1)

X e

MARKING

E

E/2

D2/2

(ND - 1)

e

X e

D/2

D

AAAA

C

D2

L

k

b

0.10 M

C A B

C

L

E2/2

L

E2

C

L

C

L

0.10

C

0.08

A

C

A2

A1

L

e

PACKAGE OUTLINE

8, 12, 16L THIN QFN, 3x3x0.8mm

1

21-0136

I

2

______________________________________________________________________________________ 17

1.5MHz Dual Step-Down DC-DC Converters

with Dual LDOs and Individual Enables

Package Information (continued)

(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information

go to www.maxim-ic.com/packages.)

PKG

8L 3x3

12L 3x3

16L 3x3

EXPOSED PAD VARIATIONS

REF. MIN. NOM. MAX. MIN. NOM. MAX. MIN. NOM. MAX.

D2

E2

PKG.

PIN ID

JEDEC

CODES

A

b

0.70 0.75 0.80 0.70 0.75 0.80

0.25 0.30 0.35 0.20 0.25 0.30

0.70 0.75 0.80

0.20 0.25 0.30

MIN.

0.25

0.95

0.65

0.95

NOM. MAX.

MIN.

0.25

0.95

NOM. MAX.

TQ833-1

T1233-1

T1233-3

0.70

1.10

1.25

0.70

1.10

0.80

1.10

1.25

0.95

0.35 x 45°

0.225 x 45°

0.35 x 45°

WEEC

D

2.90 3.00 3.10 2.90 3.00 3.10 2.90 3.00 3.10

WEED-1

WEED-2

E

e

0.65 BSC.

0.50 BSC.

T1233-4

T1633-2

1.25

0.95

1.25

L

0.35 0.55 0.75 0.45 0.55 0.65 0.30 0.40 0.50

1.10

0.80

1.10

0.95

0.65

0.95

N

ND

NE

A1

A2

k

8

12

16

T1633F-3

T1633FH-3

T1633-4

2

3

4

2

3

4

1.25

0

0.02 0.05

0

0.02 0.05

0

0.02 0.05

T1633-5

1.10

0.95

0.20 REF

-

0.25

7/MAX68

NOTES:

1. DIMENSIONING & TOLERANCING CONFORM TO ASME Y14.5M-1994.

2. ALL DIMENSIONS ARE IN MILLIMETERS. ANGLES ARE IN DEGREES.

3. N IS THE TOTAL NUMBER OF TERMINALS.

4. THE TERMINAL #1 IDENTIFIER AND TERMINAL NUMBERING CONVENTION SHALL CONFORM TO

JESD 95-1 SPP-012. DETAILS OF TERMINAL #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED

WITHIN THE ZONE INDICATED. THE TERMINAL #1 IDENTIFIER MAY BE EITHER A MOLD OR

MARKED FEATURE.

5. DIMENSION b APPLIES TO METALLIZED TERMINAL AND IS MEASURED BETWEEN 0.20 mm AND 0.25 mm

FROM TERMINAL TIP.

6. ND AND NE REFER TO THE NUMBER OF TERMINALS ON EACH D AND E SIDE RESPECTIVELY.

7. DEPOPULATION IS POSSIBLE IN A SYMMETRICAL FASHION.

8. COPLANARITY APPLIES TO THE EXPOSED HEAT SINK SLUG AS WELL AS THE TERMINALS.

9. DRAWING CONFORMS TO JEDEC MO220 REVISION C.

10. MARKING IS FOR PACKAGE ORIENTATION REFERENCE ONLY.

11. NUMBER OF LEADS SHOWN ARE FOR REFERENCE ONLY.

12. WARPAGE NOT TO EXCEED 0.10mm.

PACKAGE OUTLINE

8, 12, 16L THIN QFN, 3x3x0.8mm

2

21-0136

I

2

Revision History

Pages changed at Rev 1: 1, 12, 14, 18

Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are

implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.

18 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600

is a registered trademark of Maxim Integrated Products. Inc.


型号：	MAX8667ETEHR+
厂家：	MAXIM INTEGRATED PRODUCTS
描述：	Dual Switching Controller, Voltage-mode, 2A, 1500kHz Switching Freq-Max, BICMOS, 3 X 3 MM, 0.80 MM HEIGHT, LEAD FREE, MO-220WEED-2, QFN-16 转换器
文件：	总18页 (文件大小：387K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

MAX8667ETEHR+ [MAXIM]

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