MAX8702 [MAXIM]
Dual-Phase MOSFET Drivers with Temperature Sensor;
| 型号： | MAX8702 |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | Dual-Phase MOSFET Drivers with Temperature Sensor |
| 文件： | 总14页 (文件大小：486K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
19-3357; Rev 0; 8/04
Dual-Phase MOSFET Drivers
with Temperature Sensor
General Description
Features
The MAX8702/MAX8703 dual-phase noninverting
MOSFET drivers are designed to work with PWM con-
troller ICs, such as the MAX8705/MAX8707, in note-
book CPU core and other multiphase regulators.
Applications can either step down directly from the bat-
tery voltage to create the core voltage, or step down
from a low-voltage system supply. The single-stage con-
version method allows the highest possible efficiency,
while the 2-stage conversion at higher switching frequen-
cy provides the minimum possible physical size.
ꢀ Dual-Phase MOSFET Driver
ꢀ 0.35Ω (typ) On-Resistance and 5A (typ)
Drive Current
ꢀ Drives Large Synchronous-Rectifier MOSFETs
ꢀ Integrated Temperature Sensor (MAX8702 Only)
Resistor Programmable
Open-Drain Driver Hot Indicator (DRHOT)
ꢀ Adaptive Dead Time Prevents Shoot-Through
ꢀ Selectable Pulse-Skipping Mode
Each MOSFET driver is capable of driving 3nF capaci-
tive loads with only 19ns propagation delay and 8ns
typical rise and fall times. Larger capacitive loads are
allowable but result in longer propagation and transition
times. Adaptive dead-time control helps prevent shoot-
through currents and maximizes converter efficiency.
ꢀ 4.5V to 28V Input Voltage Range
ꢀ Thermally Enhanced Low-Profile Thin QFN Package
Ordering Information
The MAX8702/MAX8703 feature zero-crossing com-
parators on each channel. When enabled, these com-
parators permit the drivers to be used in pulse-skipping
operation, thereby saving power at light loads. A sepa-
rate shutdown control is also included that disables all
functions, drops quiescent current to 2µA, and sets DH
low and DL high.
PIN-
PACKAGE
PART
TEMP RANGE
DESCRIPTION
Dual-Phase
Driver with
Temp. Sensor
20 Thin QFN
4mm x 4mm
MAX8702ETP -40°C to +100°C
MAX8703ETP -40°C to +100°C
Dual-Phase
Driver without
Temp. Sensor
The MAX8702 integrates a resistor-programmable tem-
perature sensor. An open-drain output (DRHOT) signals
to the system when the local die temperature exceeds
the set temperature. The MAX8702/MAX8703 are avail-
able in a thermally-enhanced 20-pin thin QFN package.
20 Thin QFN
4mm x 4mm
Minimal Operating Circuit
+5V
Applications
V
IN
V
+5V
BST1
DH1
DD
4.5V TO 28V
Multiphase High-Current Power Supplies
2- to 4-Cell Li+ Battery to CPU Core Supplies
Notebook and Desktop Computers
Servers and Workstations
V
CC
V
LX1
DL1
OUT
AGND
TSET
PGND1
+5V
MAX8702
V
IN
BST2
4.5V TO 28V
DH2
DRHOT
SHDN
V
LX2
DL2
OUT
SKIP
PWM1
PWM2
PGND2
Pin Configuration appears at end of data sheet.
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Dual-Phase MOSFET Drivers
with Temperature Sensor
ABSOLUTE MAXIMUM RATINGS
V
V
to AGND............................................................-0.3V to +6V
to AGND............................................................-0.3V to +6V
BST_ to LX_ ..............................................................-0.3V to +6V
CC
DD
Continuous Power Dissipation (T = +70°C)
A
PGND_ to AGND ...................................................-0.3V to +0.3V
SKIP, SHDN, DRHOT, TSET to AGND......................-0.3V to +6V
PWM_ to AGND........................................................-0.3V to +6V
20-Pin 4mm x 4mm Thin QFN
(derate 16.9mW/°C above +70°C).............................1349mW
Operating Temperature Range .........................-40°C to +100°C
Junction Temperature......................................................+150°C
Storage Temperature Range.............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
DL_ to PGND_ ............................................-0.3V to (V + 0.3V)
DD
LX_ to AGND .............................................................-2V to +30V
DH_ to LX_...............................................-0.3V to (V
+ 0.3V)
BST_
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(Circuit of Figure 2. V = V = V
= V
= 5V, T = 0°C to +85°C. Typical values are at T = +25°C, unless otherwise noted.)
CC
DD
SHDN
SKIP
A
A
PARAMETER
SYMBOL
CONDITIONS
MIN
4.5
3.4
3.3
TYP
MAX
5.5
4.1
4.0
400
3
UNITS
Input Voltage Range
V
V
CC
V
V
rising
falling
3.85
3.75
200
2
CC
CC
V
Undervoltage-Lockout
Threshold
85mV typical
hysteresis
CC
V
V
UVLO
SKIP = AGND, PWM_ = AGND
SKIP = AGND, PWM_ = V
µA
mA
µA
µA
µA
V
Quiescent Current
CC
I
I
CC
DD
(Note 1)
CC
V
V
V
Quiescent Current
Shutdown Current
Shutdown Current
SKIP = AGND, PWM_ = AGND
SHDN = SKIP = AGND
1
5
DD
CC
DD
2
5
SHDN = SKIP = AGND
1
5
GATE DRIVERS AND DEAD-TIME CONTROL (Figure 1)
t
PWM_ high to DL_ low
DH_ low to DL_ high
DL_ low to DH_ high
PWM_ low to DH_ low
DL_ falling, 3nF load
DL_ rising, 3nF load
DH_ falling, 3nF load
DH_ rising, 3nF load
19
36
25
23
11
8
PWM-DL
DL_ Propagation Delay
DH_ Propagation Delay
DL_ Transition Time
ns
ns
ns
t
t
DH-DL
DL-DH
t
PWM-DH
t _
F DL
t _
R DL
t _
F DH
14
16
1.0
1.0
0.35
1.5
1.5
5
DH_ Transition Time
ns
Ω
t _
R DH
DH_ On-Resistance (Note 2)
DL_ On-Resistance (Note 2)
R
V
_ - V _ = 5V
4.5
4.5
2.0
DH
BST
LX
R
_
High state (pullup)
DL HIGH
Ω
R
_
Low state (pulldown)
DL LOW
DH_ Source/Sink Current
DL_ Source Current
I
V
V
V
V
_ = 2.5V, V
_ - V _ = 5V
A
A
DH
DH
BST
LX
I
_
_ = 2.5V
_ = 5V
DL SOURCE
DL
DL_ Sink Current
I
_
A
DL SINK
DL
Zero-Crossing Threshold
TEMPERATURE SENSOR
_ - V _, SKIP = AGND
2.5
mV
PGND
LX
Temperature Threshold
Accuracy
T
A
= +85°C to +125°C, 10°C falling hysteresis
-5
+5
°C
DRHOT Output Low Voltage
DRHOT Leakage Current
I
= 3mA
0.4
1
V
SINK
High state, V
= 5.5V
µA
DRHOT
2
_______________________________________________________________________________________
Dual-Phase MOSFET Drivers
with Temperature Sensor
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 2. V = V = V
= V
= 5V, T = 0°C to +85°C. Typical values are at T = +25°C, unless otherwise noted.)
CC
DD
SHDN
SKIP
A
A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Thermal-Shutdown Threshold
LOGIC CONTROL SIGNALS
Logic Input High Voltage
Logic Input Low Voltage
Logic Input Current
10°C hysteresis
+160
°C
SHDN, SKIP, PWM1, PWM2
SHDN, SKIP, PWM1, PWM2
SHDN, SKIP, PWM1, PWM2
2.4
-1
V
V
0.8
+1
µA
ELECTRICAL CHARACTERISTICS
(Circuit of Figure 2. V
= V
= V
= V
= 5V, T = -40°C to +100°C, unless otherwise noted.) (Note 3)
SKIP A
CC
DD
SHDN
PARAMETER
SYMBOL
CONDITIONS
MIN
4.5
3.4
3.3
TYP
MAX
5.5
4.1
4.0
450
3
UNITS
Input Voltage Range
V
V
CC
V
V
rising
falling
CC
CC
V
Undervoltage-Lockout
Threshold
85mV typical
hysteresis
CC
V
V
UVLO
SKIP = AGND, PWM_ = PGND_
SKIP = AGND, PWM_ = V
µA
V
V
Quiescent Current
Quiescent Current
I
I
CC
DD
CC
DD
mA
CC
SKIP = AGND, PWM_ = PGND_,
= -40°C to +85°C
5
µA
T
A
V
V
Shutdown Current
Shutdown Current
SHDN = SKIP = AGND, T = -40°C to +85°C
5
5
µA
µA
CC
DD
A
SHDN = SKIP = AGND, T = -40°C to +85°C
A
GATE DRIVERS AND DEAD-TIME CONTROL
DH_ On-Resistance (Note 2)
R
V
_ - V _ = 5V
1.0
1.0
4.5
4.5
2.0
Ω
Ω
DH
BST
LX
R
_
High state (pullup)
DL HIGH
DL_ On-Resistance (Note 2)
R
_
Low state (pulldown)
0.35
DL LOW
TEMPERATURE SENSOR
DRHOT Output Low Voltage
LOGIC CONTROL SIGNALS
Logic Input High Voltage
Logic Input Low Voltage
I
= 3mA
0.4
0.8
V
SINK
SHDN, SKIP, PWM1, PWM2
SHDN, SKIP, PWM1, PWM2
2.4
V
V
Note 1: Static drivers instead of pulsed-level translators.
Note 2: Production testing limitations due to package handling require relaxed maximum on-resistance specifications for the
thin QFN package.
Note 3: Specifications from -40°C to +100°C are guaranteed by design, not production tested.
_______________________________________________________________________________________
3
Dual-Phase MOSFET Drivers
with Temperature Sensor
PWM_
90%
90%
DH_
DL_
10%
10%
t
t
t
t
t
t
PWM-DH
t
t
R_DL
PWM-DL
F_DL
DL-DH
R_DH
F_DH
DH-DL
90%
90%
10%
10%
Figure 1. Timing Definitions Used in the Electrical Characteristics
Typical Operating Characteristics
(Circuit of Figure 2. V = 12V, V
= V
= V
= V
= 5V, T = +25°C unless otherwise noted.)
SKIP A
IN
DD
CC
SHDN
POWER DISSIPATION vs. FREQUENCY
(SINGLE PHASE, BOTH DRIVERS SWITCHING)
POWER DISSIPATION vs. CAPACITIVE LOAD
(SINGLE PHASE, BOTH DRIVERS SWITCHING)
350
300
250
200
150
100
50
400
FREQ = 1.2MHz
C
= 6nF, C = 3nF
DH
DL
300
200
100
0
C
= 3nF, C = 3nF
DH
FREQ = 0.6MHz
DL
C
C
= 3nF,
DL
DH
= 1.5nF
V
= 5.5V,
DL
CC
FREQ = 0.3MHz
V
= 5.5V
C
= C
CC
DH
0
0
0.2
0.4
0.6
0.8
1.0
1.2
1
2
3
4
5
6
FREQUENCY (MHz)
CAPACITANCE (nF)
DL RISE/FALL TIME vs. CAPACITIVE LOAD
DH RISE/FALL TIME vs. CAPACITIVE LOAD
20
15
10
5
30
25
20
15
10
5
DL RISE
DH RISE
DH FALL
DL FALL
0
0
1
2
3
4
5
6
1
2
3
4
5
6
CAPACITANCE (nF)
CAPACITANCE (nF)
4
_______________________________________________________________________________________
Dual-Phase MOSFET Drivers
with Temperature Sensor
Typical Operating Characteristics (continued)
(Circuit of Figure 2. V = 12V, V
= V
= V
= V
= 5V, T = +25°C unless otherwise noted.)
SKIP A
IN
DD
CC
SHDN
DH/DL RISE/FALL TIMES
vs. TEMPERATURE
PROPAGATION DELAY vs. TEMPERATURE
50
40
30
20
10
0
20
15
10
5
DH RISE
DH FALL
DL FALL TO DH RISE
PWM FALL TO DH FALL
DL RISE
PWM RISE TO DL FALL
DL FALL
60
C = C = 3nF
DH DL
C
= C = 3nF
DH
DL
0
0
30
60
90
120
150
0
20
40
80
100
120
TEMPERATURE (°C)
TEMPERATURE (°C)
TYPICAL SWITCHING WAVEFORMS
R
TSET
vs. TEMPERATURE
MAX8702 toc08
70
60
50
40
30
20
10
0
5V
0
A
B
5V
0
10V
0
0
C
D
125ns/div
C. DH, 10V/div
D. LX, 10V/div
50
70
90
110
130
150
A. PWM, 5V/div
B. DL, 5V/div
TEMPERATURE (°C)
DH FALL AND DL RISE WAVEFORMS
DH RISE AND DL FALL WAVEFORMS
MAX8702 toc10
MAX8702 toc09
5V
0
5V
0
A
B
A
B
5V
5V
0
0
10V
10V
C
D
C
D
0
0
0
0
20ns/div
20ns/div
A. PWM, 5V/div
B. DL, 5V/div
C. DH, 10V/div
D. LX, 10V/div
A. PWM, 5V/div
B. DL, 5V/div
C. DH, 10V/div
D. LX, 10V/div
_______________________________________________________________________________________
5
Dual-Phase MOSFET Drivers
with Temperature Sensor
Pin Description
PIN
NAME
FUNCTION
MAX8702 MAX8703
1
2
1
2
PWM1 Phase 1 PWM Logic Input. DH1 is high when PWM1 is high; DL1 is high when PWM1 is low.
PWM2 Phase 2 PWM Logic Input. DH2 is high when PWM2 is high; DL2 is high when PWM2 is low.
Analog Ground. The AGND and PGND_ pins must be connected externally at one point close to
the IC. Connect the device’s exposed backside pad to AGND.
3
3
AGND
Temperature-Set Input. Connect an external 1% resistor from TSET to AGND to set the trip point.
2
4
—
TSET
R
TSET
= 85,210 / T - 745,200 / T - 195, where R
is the temperature-setting resistor in kΩ
TSET
and T is the trip temperature in Kelvin.
Driver-Hot-Indicator Output. DRHOT is an open-drain output. Pull up with an external resistor.
When the device’s temperature exceeds the programmed set point, DRHOT is pulled low.
5
6
—
—
DRHOT
I.C.
Internally Connected. Connect to AGND.
Internal Control Circuitry Supply Input. The input voltage range is from 4.5V to 5.5V. Bypass V
CC
7
7
V
to AGND with a 1µF ceramic capacitor. The maximum resistance between V and V
CC
should
DD
CC
be 10Ω.
Phase 2 Bootstrap Flying-Capacitor Connection. An optional resistor in series with BST2 allows
the DH2 pullup current to be adjusted.
8
8
BST2
DH2
LX2
9
9
Phase 2 High-Side Gate-Driver Output. DH2 swings between LX2 and BST2.
Phase 2 Inductor Switching Node Connection. LX2 is the internal lower supply rail for the DH2
high-side gate driver. LX2 is also the input to the skip-mode zero-crossing comparator.
10
11
12
10
11
12
PGND2 Phase 2 Power Ground. PGND2 is the internal lower supply rail for the DL2 low-side gate driver.
Phase 2 Low-Side Gate-Driver Output. DL2 swings between PGND2 and V . DL2 is high in
DD
shutdown.
DL2
DL_ Gate-Driver Supply Input. The input voltage range is from 4.5V to 5.5V. Bypass V to the
DD
power ground with a 2.2µF ceramic capacitor.
13
13
V
DD
Phase 1 Low-Side Gate-Driver Output. DL1 swings between PGND1 and V . DL1 is high in
DD
shutdown.
14
15
16
17
18
14
15
16
17
18
DL1
PGND1 Phase 1 Power Ground. PGND1 is the internal lower supply rail for the DL1 low-side gate driver.
Phase 1 Inductor Switching Node Connection. LX1 is the internal lower supply rail for the DH1
high-side gate driver. LX1 is also the input to the skip-mode zero-crossing comparator.
LX1
DH1
Phase 1 High-Side Gate-Driver Output. DH1 swings between LX1 and BST1.
Phase 1 Bootstrap Flying-Capacitor Connection. An optional resistor in series with BST1 allows
the DH1 pullup current to be adjusted.
BST1
Pulse-Skipping-Mode Control Input. The pulse-skipping mode is enabled when SKIP is low.
When SKIP is high, both drivers operate in PWM mode (i.e., except during dead times, DL_ is the
complement of DH_).
19
19
SKIP
Shutdown Control Input. When SH D N and SK IP are low, DH_ is forced low, DL_ forced high, and
the device enters into a low-power shutdown state. Temperature sensing is disabled in shutdown.
20
20
SHDN
—
4, 5, 6
N. C.
No Connection. Not internally connected.
6
_______________________________________________________________________________________
Dual-Phase MOSFET Drivers
with Temperature Sensor
regulators. Each MOSFET driver is capable of driving
Typical Operating Circuit
3nF capacitive loads with only 19ns propagation delay
and 8ns typical rise and fall times. Larger capacitive
loads are allowable but result in longer propagation
and transition times. Adaptive dead-time control pre-
vents shoot-through currents and maximizes converter
The typical operating circuit of the MAX8702 (Figure 2)
shows the power-stage and gate-driver circuitry of a dual-
phase CPU core supply operating at 300kHz, with each
phase capable of supplying 20A of load current. Table 1
lists recommended component options, and Table 2 lists
the component suppliers’ contact information.
D
BST1
Detailed Description
The MAX8702/MAX8703 dual-phase noninverting
MOSFET drivers are intended to work with PWM con-
troller ICs in CPU core and other multiphase switching
+5V
2.2µF
V
V
BST1
DH1
DD
CC
V
IN
7V TO 20V
C
IN1
10Ω
1µF
NH1
NL1
0.22µF
L1
Table 1. Component List
V
LX1
DL1
OUT
AGND
TSET
D1
C
OUT1
DESIGNATION
DESCRIPTION
R
TSET
PGND1
(4) 10µF, 25V
Taiyo Yuden TMK432BJ106KM or
TDK C4532X5R1E106M
Total Input
Capacitance (C
D
BST2
+5V
100kΩ
MAX8702
)
IN
+5V
BST2
DH2
V
IN
7V TO 20V
(4) 330µF, 2.5V, 9mΩ low-ESR polymer
capacitor (D case)
Sanyo 2R5TPE330M9
DRHOT
C
Total Output
Capacitance (C
IN2
NH2
NL2
SHDN
SKIP
)
OUT
DRSKP
PWM1
PWM2
0.22µF
L2
FROM
CONTROLLER
IC
V
OUT
LX2
DL2
PWM1
PWM2
3A Schottky diode
Central Semiconductor
CMSH3-40
Schottky Diode
(per phase)
D2
C
OUT2
PGND2
0.6µH
Panasonic ETQP1H0R6BFA or
Sumida CDEP134H-0R6
Inductor (per phase)
Figure 2. MAX8702 Typical Operating Circuit
High-Side MOSFET
(NH, per phase)
Siliconix (1) Si7892DP or
International Rectifier (2) IRF6604
TSET*
TEMP
Low-Side MOSFET
(NL, per phase)
Siliconix (2) Si7442DP or
International Rectifier (2) IRF6603
SENSOR +
BST_
DH_
LX_
DRHOT*
PWM BLOCK (x2)
TSDN
V
CC
Table 2. Component Suppliers
AGND
UVLO
SUPPLIER
Central Semiconductor
Fairchild Semiconductor
International Rectifier
Panasonic
WEBSITE
CONTROL
AND ADAPTIVE
DEAD-TIME
CIRCUIT
PWM_
SHDN
www.centralsemi.com
www.fairchildsemi.com
www.irf.com
MAX8702
MAX8703
V
DD
www.panasonic.com
www.secc.co.jp
DL_
PGND_
LX_
Sanyo
Siliconix (Vishay)
Sumida
www.vishay.com
ZX
PGND_
www.sumida.com
www.t-yuden.com
www.component.tdk.com
SKIP
Taiyo Yuden
*MAX8702 ONLY
TDK
Figure 3. MAX8702 Functional Diagram
_______________________________________________________________________________________
7
Dual-Phase MOSFET Drivers
with Temperature Sensor
efficiency while allowing operation with a variety of
MOSFETs and PWM controllers. A UVLO circuit allows
proper power-on sequencing. The PWM control inputs
are both TTL and CMOS compatible.
INPUT
IN
C
VDD
(V )
V
DD
The MAX8702 integrates a resistor-programmable tem-
perature sensor. An open-drain output (DRHOT) signals
to the system when the die temperature of the driver
exceeds the set temperature. See the Temperature
Sensor section.
D
BST
(R )*
BST
BST
C
BST
DH
LX
N
H
MOSFET Gate Drivers (DH, DL)
The DH and DL drivers are optimized for driving mod-
erately sized high-side and larger low-side power
MOSFETs. This is consistent with the low duty factor
seen in the notebook CPU environment, where a large
L
MAX8702
MAX8703
V
- V
differential exists. Two adaptive dead-time
OUT
IN
circuits monitor the DH and DL outputs and prevent the
opposite-side FET from turning on until DH or DL is fully
off. There must be a low-resistance, low-inductance
path from the DH and DL drivers to the MOSFET gates
for the adaptive dead-time circuits to work properly.
Otherwise, the sense circuitry interprets the MOSFET
gate as “off” while there is actually still charge left on
the gate. Use very short, wide traces measuring 10 to
20 squares (50 to 100 mils wide if the MOSFET is 1in
from the device).
( )* OPTIONAL—THE RESISTOR REDUCES THE SWITCHING-NODE RISE TIME.
Figure 4. High-Side Gate-Driver Boost Circuitry
side MOSFETs. If the turn-off delay time of the low-side
MOSFETs is too long, the high-side MOSFETs can turn
on before the low-side MOSFETs have actually turned
off. Adding a resistor of less than 5Ω in series with BST
slows down the high-side MOSFET turn-on time, elimi-
nating the shoot-through currents without degrading
The internal pulldown transistor that drives DL low is
robust, with a 0.35Ω (typ) on-resistance. This helps pre-
vent DL from being pulled up due to capacitive coupling
from the drain-to-gate capacitance of the low-side syn-
chronous-rectifier MOSFETs when LX switches from
the turn-off time (R
in Figure 4). Slowing down the
BST
high-side MOSFETs also reduces the LX node rise
time, thereby reducing the EMI and high-frequency
coupling responsible for switching noise.
ground to V . Applications with high input voltages and
IN
long, inductive DL traces may require additional gate-to-
source capacitance to ensure fast-rising LX edges do
not pull up the low-side MOSFET’s gate voltage, caus-
ing shoot-through currents. The capacitive coupling
between LX and DL created by the MOSFET’s gate-to-
Boost Capacitor Selection
The MAX8702/MAX8703 use a bootstrap circuit to gen-
erate the floating supply voltages for the high-side dri-
vers (DH). The boost capacitors (C
) selected must
BST
be large enough to handle the gate-charging require-
ments of the high-side MOSFETs. Typically, 0.1µF
ceramic capacitors work well for low-power applica-
tions driving medium-sized MOSFETs. However, high-
current applications driving large, high-side MOSFETs
require boost capacitors larger than 0.1µF. For these
applications, select the boost capacitors to avoid dis-
charging the capacitor more than 200mV while charg-
ing the high-side MOSFET’s gates:
drain capacitance (C
), gate-to-source capacitance
RSS
(C
- C
), and additional board parasitics should
not exceed the minimum threshold voltage:
ISS
RSS
C
CISS
RSS
VGS(TH) < V
IN
Lot-to-lot variation of the threshold voltage can cause
problems in marginal designs. Typically, adding a
4700pF capacitor between DL and power ground,
close to the low-side MOSFETs, greatly reduces cou-
pling. To prevent excessive turn-off delays, do not
exceed 22nF of total gate capacitance.
N x QGATE
200mV
CBST
=
where N is the number of high-side MOSFETs used for
one phase and Q is the total gate charge speci-
Alternatively, shoot-through currents may be caused by
a combination of fast high-side MOSFETs and slow low-
GATE
fied in the MOSFET’s data sheet. For example, assume
8
_______________________________________________________________________________________
Dual-Phase MOSFET Drivers
with Temperature Sensor
(2) IRF7811W n-channel MOSFETs are used on the
system power is removed without going through the
proper shutdown sequence.
high side. According to the manufacturer’s data sheet,
a single IRF7811W has a maximum gate charge of 24nC
Low-Power Pulse Skipping
The MAX8702/MAX8703 enter into low-power pulse-
skipping mode when SKIP is pulled low. In skip mode,
an inherent automatic switchover to pulse frequency
modulation (PFM) takes place at light loads. A zero-
crossing comparator truncates the low-side switch on-
time at the inductor current’s zero-crossing. The
comparator senses the voltage across LX and PGND.
(V
= 5V). Using the above equation, the required
GS
boost capacitance is:
2 x 24nC
200mV
CBST
=
= 0.24µF
Selecting the closest standard value, this example
requires a 0.22µF ceramic capacitor.
Once V - V
drops below the zero-crossing com-
PGND
LX
parator threshold (see the Electrical Characteristics),
the comparator forces DL low. This mechanism causes
the threshold between pulse-skipping PFM and non-
skipping PWM operation to coincide with the boundary
between continuous and discontinuous inductor-cur-
rent operation. The PFM/PWM crossover occurs when
the load current of each phase is equal to 1/2 the peak-
to-peak ripple current, which is a function of the induc-
tor value. For a battery input range of 7V to 20V, this
threshold is relatively constant, with only a minor
dependence on the input voltage due to the typically
low duty cycles. The switching waveforms may appear
noisy and asynchronous when light loading activates
the pulse-skipping operation, but this is a normal oper-
ating condition that results in high light-load efficiency.
5V Bias Supply (V
and V
)
CC
DD
V
provides the supply voltages for the low-side dri-
DD
vers (DL). The decoupling capacitor at V
also
DD
charges the BST capacitors during the time period
when DL is high. Therefore, the V capacitor should
DD
be large enough to minimize the ripple voltage during
switching transitions. C should be chosen accord-
VDD
ing to the following equation:
C
= 10 x C
VDD
BST
In the example above, a 0.22µF capacitor is used for
C
, so the V
BST
capacitor should be 2.2µF.
DD
V
provides the supply voltage for the internal logic
circuit and temperature sensor. To avoid switching
noise from coupling into the sensitive internal circuit, an
CC
RC filter is recommended for the V
pin. Place a 10Ω
CC
Shutdown
resistor from the supply voltage to the V
pin and a
CC
The MAX8702/MAX8703 feature a low-power shutdown
1µF capacitor from the V
pin to AGND.
CC
mode that reduces the V
quiescent current drawn to
CC
The total bias current I
from the 5V supply can be
2µA (typ). Driving SHDN and SKIP low sets DH low and
BIAS
calculated using the following equation:
DL high. Temperature sensing is disabled in shutdown.
I
= I + I
BIAS
x (n
DD
x Q
CC
Temperature Sensor (MAX8702 Only)
The MAX8702 includes a fully integrated resistor-pro-
grammable temperature sensor. The sensor incorpo-
rates two temperature-dependent reference signals
and one comparator. One signal exhibits a characteris-
tic that is proportional to temperature, and the other is
complementary to temperature. The temperature at
which the two signals are equal determines the thermal
trip point. When the temperature of the device exceeds
the trip point, the open-drain output DRHOT pulls low.
I
= n
x f
+ n x Q
)
G(NL)
NH
G(NH)
NL
DD
SW
PHASE
where n
is the number of phases, f
switching frequency, Q
MOSFET data sheet’s total gate-charge specification
= 5V, n
MOSFETs in parallel, n
side MOSFETs in parallel, and I
current.
is the
SW
are the
G(NL)
PHASE
and Q
G(NH)
limits at V
is the total number of high-side
is the total number of low-
NL
GS
NH
is the V
supply
CC
CC
Undervoltage Lockout (UVLO)
is below the UVLO threshold (3.85V typ) and
When V
CC
Table 3. Modes of Operation
SHDN and SKIP are low, DL is kept high and DH is
held low. This provides output overvoltage protection
SHDN
SKIP
MODE OF OPERATION
as soon as the supply voltage is applied. Once V
is
CC
Low-power shutdown state;
temperature sensing disabled
above the UVLO threshold and SHDN is high, DL and
DH levels depend on the PWM signal applied. If V
L
L
CC
falls below the UVLO threshold while SHDN is high,
both DL and DH are immediately forced low. This pre-
vents negative undershoots on the output when the
L
H
H
H
L
PWM operation
Pulse-skipping operation
PWM operation
H
_______________________________________________________________________________________
9
Dual-Phase MOSFET Drivers
with Temperature Sensor
A 10°C hysteresis keeps the output from oscillating
when the temperature is close to the threshold. The
thermal trip point is programmable up to +160°C
through an external resistor between TSET and AGND.
Use the following equation to determine the value of
the resistor:
case power dissipation due to resistance occurs at the
minimum input voltage:
V
ILOAD
OUT
2
PD(NHRESISTIVE) =
RDS(ON)
VIN
nTOTAL
2
R
= (85,210 / T) – (745,200 / T ) – 195
where n
is the total number of phases.
TSET
TOTAL
where R
is the value of the set-point resistor in kΩ
Generally, a small high-side MOSFET is desired to
reduce switching losses at high input voltages.
TSET
and T is the trip-point temperature in Kelvin.
However, the R
required to stay within package
DS(ON)
The MAX8702 and MAX8703 include a thermal-shut-
down circuit that is independent of the temperature
sensor. The thermal shutdown has a fixed threshold of
+160°C (typ) with 10°C of thermal hysteresis. When the
die temperature exceeds +160°C, DH is pulled low and
DL is pulled high. The driver automatically resets when
the die temperature drops by +10°C.
power dissipation often limits how small the MOSFETs
can be. Again, the optimum occurs when the switching
losses equal the conduction (R
) losses. High-
DS(ON)
side switching losses do not usually become an issue
until the input is greater than approximately 15V.
Calculating the power dissipation in high-side
MOSFETs (N ) due to switching losses is difficult since
H
Applications Information
it must allow for difficult quantifying factors that influ-
ence the turn-on and turn-off times. These factors
include the internal gate resistance, gate charge,
threshold voltage, source inductance, and PC board
layout characteristics. The following switching-loss cal-
culation provides only a very rough estimate and is no
substitute for breadboard evaluation, preferably includ-
Power MOSFET Selection
Most of the following MOSFET guidelines focus on the
challenge of obtaining high load-current capability
when using high-voltage (>20V) AC adapters. Low-cur-
rent applications usually require less attention.
The high-side MOSFET (N ) must be able to dissipate
H
ing verification using a thermocouple mounted on N :
H
the resistive losses plus the switching losses at both
V
and V
. Calculate both of these sums.
IN(MAX)
IN(MIN)
C
IGATE
RSSfSW
ILOAD
nTOTAL
2
PD(N SWITCHING) = V
(
)
Ideally, the losses at V
to losses at V
should be roughly equal
IN(MIN)
H
IN(MAX)
, with lower losses in between. If
IN(MAX)
the losses at V
losses at V
(reducing R
if the losses at V
losses at V
(increasing R
not vary over a wide range, the minimum power dissi-
pation occurs where the resistive losses equal the
switching losses.
are significantly higher than the
IN(MIN)
where C
GATE
(5A typ).
is the reverse transfer capacitance of N
H
RSS
, consider increasing the size of N
IN(MAX)
DS(ON)
H
and I
is the peak gate-drive source/sink current
but increasing C
IN(MAX)
). Conversely,
GATE
are significantly higher than the
Switching losses in the high-side MOSFET can
become an insidious heat problem when maximum AC
, consider reducing the size of N
IN(MIN)
DS(ON)
H
but reducing C
). If V does
GATE IN
adapter voltages are applied, due to the squared term
2
in the C × V
× f
switching-loss equation. If the
SW
IN
high-side MOSFET chosen for adequate R
at
DS(ON)
low battery voltages becomes extraordinarily hot when
Choose a low-side MOSFET that has the lowest possi-
ble on-resistance (R
biased from V
, consider choosing another
IN(MAX)
), comes in a moderate-
DS(ON)
MOSFET with lower parasitic capacitance.
sized package (i.e., one or two SO-8s, DPAK, or
D2PAK), and is reasonably priced. Ensure that the DL
gate driver can supply sufficient current to support the
gate charge and the current injected into the parasitic
gate-to-drain capacitor caused by the high-side MOS-
FET turning on; otherwise, cross-conduction problems
can occur.
For the low-side MOSFET (N ), the worst-case power
L
dissipation always occurs at the maximum input voltage:
VOUT
VIN(MAX)
ILOAD
nTOTAL
2
PD(N RESISTIVE) = 1−
RDS(ON)
L
The worst case for MOSFET power dissipation occurs
under heavy overloads that are greater than
LOAD(MAX)
MOSFET Power Dissipation
Worst-case conduction losses occur at the duty factor
I
but are not quite high enough to exceed
extremes. For the high-side MOSFET (N ), the worst-
H
10 ______________________________________________________________________________________
Dual-Phase MOSFET Drivers
with Temperature Sensor
the current limit and cause the fault latch to trip. The
2) Minimize the high-current loops from the input capaci-
tor, upper-switching MOSFET, and low-side MOSFET
back to the input capacitor negative terminal.
MOSFETs must have a good-sized heatsink to handle
the overload power dissipation. The heat sink can be a
large copper field on the PC board or an externally
mounted device.
3) Provide enough copper area at and around the
switching MOSFETs and inductors to aid in thermal
dissipation.
The Schottky diode only conducts during the dead time
when both the high-side and low-side MOSFETs are off.
Choose a Schottky diode with a forward voltage low
enough to prevent the low-side MOSFET body diode
from turning on during the dead time, and a peak cur-
rent rating higher than the peak inductor current. The
Schottky diode must be rated to handle the average
power dissipation per switching cycle. This diode is
optional and can be removed if efficiency is not critical.
4) Connect the PGND1 and PGND2 pins as close as
possible to the source of the low-side MOSFETs.
5) Keep LX traces away from sensitive analog compo-
nents and nodes. Place the IC and analog compo-
nents on the opposite side of the board from the
power-switching node if possible.
6) Use two or more vias for DL and DH traces when
changing layers to reduce via inductance.
IC Power Dissipation and
Thermal Considerations
Figure 5 shows a PC board layout example.
Power dissipation in the IC package comes mainly from
driving the MOSFETs. Therefore, it is a function of both
switching frequency and the total gate charge of the
selected MOSFETs. The total power dissipation when
both drivers are switching is given by:
CONNECT AGND AND
VIA TO POWER
PGND_ BENEATH THE
PD(IC) = I
x 5V
BIAS
GROUND
CONTROLLER AT ONE
POINT ONLY AS SHOWN
where I
is the bias current of the 5V supply calcu-
BIAS
USE DOUBLE
VIAS FOR DL_
lated in the 5V Bias Supply (V
and V ) section .
CC
DD
The rise in die temperature due to self-heating is given
by the following formula:
INPUT
∆T = PD(IC) x θ
J
JA
C
C
C
C
IN
IN
where PD(IC) is the power dissipated by the device, and
is the package’s thermal resistance. The typical ther-
mal resistance is 59.3°C/W for the 4mm x 4mm thin QFN
package. For example, if the MAX8702 dissipates
500mW of power within the IC, this corresponds to a 30°C
shift in the die temperature in the thin QFN package.
θ
JA
IN
IN
POWER
GROUND
PC Board Layout Considerations
The MAX8702/MAX8703 MOSFET drivers source and
sink large currents to drive MOSFETs at high switching
speeds. The high di/dt can cause unacceptable ringing
if the trace lengths and impedances are not well con-
trolled. The following PC board layout guidelines are
recommended when designing with the device:
INDUCTOR
INDUCTOR
OUTPUT
1) Place V
and V
decoupling capacitors as close
DD
CC
Figure 5. PC Board Layout Example
to their respective pins as possible.
______________________________________________________________________________________ 11
Dual-Phase MOSFET Drivers
with Temperature Sensor
Pin Configuration
Chip Information
TRANSISTOR COUNT: 1100
PROCESS: BiCMOS
TOP VIEW
PWM1
1
2
3
4
5
15 PGND1
14 DL1
PWM2
AGND
13
V
DD
MAX8702
MAX8703
TSET*
12 DL2
DRHOT*
11 PGND2
THIN QFN
(4mm x 4mm)
*THESE PINS ARE N.C. ON THE MAX8703
12 ______________________________________________________________________________________
Dual-Phase MOSFET Drivers
with Temperature Sensor
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
PACKAGE OUTLINE
12, 16, 20, 24L THIN QFN, 4x4x0.8mm
1
C
21-0139
2
______________________________________________________________________________________ 13
Dual-Phase MOSFET Drivers
with Temperature Sensor
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
PACKAGE OUTLINE
12, 16, 20, 24L THIN QFN, 4x4x0.8mm
2
C
21-0139
2
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
14 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2004 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products.
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