MAX9110_V01 [MAXIM]
Single/Dual LVDS Line Drivers with Ultra-Low Pulse Skew in SOT23;
| 型号： | MAX9110_V01 |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | Single/Dual LVDS Line Drivers with Ultra-Low Pulse Skew in SOT23 |
| 文件： | 总9页 (文件大小：1502K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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MAX9110/MAX9112
Single/Dual LVDS Line Drivers with
Ultra-Low Pulse Skew in SOT23
General Description
Features
The MAX9110/MAX9112 single/dual-low-voltage differential
signaling (LVDS) transmitters are designed for high-
speed applications requiring minimum power consumption,
space, and noise. Both devices support switching rates
exceeding 500Mbps while operating from a single +3.3V
supply, and feature ultra-low 250ps (max) pulse skew
required for high-resolution imaging applications, such as
laser printers and digital copiers.
● Low 250ps (max) Pulse Skew for High-Resolution
Imaging and High-Speed Interconnect
● Space-Saving 8-Pin SOT23 and SO Packages
● Pin-Compatible Upgrades to DS90LV017/017A
and DS90LV027/027A (SO Packages)
● Guaranteed 500Mbps Data Rate
● Low 22mW Power Dissipation at 3.3V
(31mW for MAX9112)
The MAX9110 is a single LVDS transmitter, and the
MAX9112 is a dual LVDS transmitter.
● Conform to EIA/TIA-644 Standard
● Single +3.3V Supply
Both devices conform to the EIA/TIA-644 LVDS standard.
They accept LVTTL/CMOS inputs and translate them
to low-voltage (350mV) differential outputs, minimizing
electromagnetic interference (EMI) and power dissipation.
These devices use a current-steering output stage,
minimizing power consumption, even at high data rates.
The MAX9110/MAX9112 are available in space-saving
8-pin SOT23 and SO packages. Refer to the MAX9111/
MAX9113 data sheet for single/dual LVDS line receivers.
● Flow-Through Pinout Simplifies PC Board Layout
● Driver Outputs High Impedance When Powered Off
Ordering Information
TEMP.
RANGE
PIN-
PACKAGE
TOP
MARK
PART
MAX9110EKA-T -40°C to +85°C 8 SOT23-8
MAX9110ESA -40°C to +85°C 8 SO
MAX9112EKA-T -40°C to +85°C 8 SOT23-8
MAX9112ESA -40°C to +85°C 8 SO
AADN
—
Applications
AADO
—
● Laser Printers
● Digital Copiers
● Network Switches/Routers
● LCD Displays
MAX9110EKA+T -40°C to +85°C 8 SOT23-8
MAX9110ESA+T -40°C to +85°C 8 SO
MAX9112EKA+T -40°C to +85°C 8 SOT23-8
MAX9112ESA+T -40°C to +85°C 8 SO
AADN
● Cellular Phone Base ● Backplane Interconnect
MAX9110
ESA
Stations
● Clock Distribution
● Telecom Switching
AADO
Equipment
MAX9112
ESA
Typical Operating Circuit appears at end of data sheet.
Pin Configurations/Functional Diagrams/Truth Table
TOP VIEW
MAX9112
MAX9110
MAX9110
MAX9112
DIN1
GND
DIN2
1
2
3
4
8
7
6
5
DO1-
DO1+
DO2+
DO2-
V
1
2
3
4
8
7
6
5
DO1-
DO1+
DO2+
DO2-
V
1
2
3
4
8
7
6
5
DO-
DIN
1
2
3
4
8
7
6
5
DO-
DO+
N.C.
N.C.
CC
CC
DIN1
DIN2
GND
DIN
N.C.
GND
DO+ GND
N.C.
N.C.
N.C.
V
CC
V
CC
SOT23
SO
SO
SOT23
DO_+
DO_-
DIN_
H = LOGIC LEVEL HIGH
L = LOGIC LEVEL LOW
X = UNDETERMINED
L
L
H
X
H
L
H
0.8V < V _ < 2.0V
X
DIN
19-1771; Rev 1; 9/19
MAX9110/MAX9112
Single/Dual LVDS Line Drivers with
Ultra-Low Pulse Skew in SOT23
Absolute Maximum Ratings
Supply Voltage (V
to GND).................................-0.3V to +4V
Continuous Power Dissipation (T = +70°C)
A
CC
Input Voltage (V
to GND).................. -0.3V to (V
+ 0.3V)
8-Pin SOT23 (derate 7.52mW/°C above +70°C) ........602mW
8-Pin SO (derate 5.88mW/°C above +70°C)...............471mW
Operating Temperature Range........................... -40°C to +85°C
Storage Temperature Range............................ -65°C to +150°C
Lead Temperature (soldering,10s) ..................................+300°C
DIN_
CC
Output Voltage (V
+, V
Output Short-Circuit Duration
(DO_+, DO_- to V or GND)...............................Continuous
- to GND or V ).... -0.3V to +3.9V
DO_
DO_ CC
CC
ESD Protection (Human Body Model, DO_+, DO_-) ........ ±11kV
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Electrical Characteristics
(V
= +3.0V to +3.6V, R = 100Ω ±1%, T = -40°C to +85°C, unless otherwise noted. Typical values are at V
= +3.3V, T = +25°C.)
CC A
CC
L
A
(Notes 1, 2)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
350
MAX UNITS
Differential Output Voltage
V
Figure 1
Figure 1
Figure 1
Figure 1
250
450
mV
mV
V
OD
Change in Magnitude of Output
Voltage for Complementary
Output States
ΔV
0
1.125
0
2
1.25
2
35
OD
OS
Offset Voltage
V
1.375
25
Change in Magnitude of Offset
Voltage for Complementary
Output States
ΔV
mV
OS
Power-Off Leakage Current
I
V
= 0 or V , V = 0 or open
CC CC
-10
+10
-20
µA
O(OFF)
DO_ _
DIN_ = V , V
DIN_ = GND, V
+ = 0 or
CC DO_
Short-Circuit Output Current
I
mA
O(SHORT)
- = 0
DO_
Input High Voltage
Input Low Voltage
Input Current High
Input Current Low
No-Load Supply Current
V
2.0
GND
0
V
V
V
IH
CC
V
0.8
20
0
IL
I
DIN_ = V
or 2V
10
-3
µA
µA
mA
IH
CC
I
DIN_ = GND or 0.8V
No load, DIN_ = V
-20
IL
I
I
or 0
CC
4.5
6.7
9.4
6
CC
MAX9110
MAX9112
8
Supply Current
DIN_ = V
or 0
mA
CC
CC
13
AC Characteristics
(V
= +3.0V to +3.6V, R = 100Ω ±1%, C = 5pF, T = -40°C to +85°C, unless otherwise noted. Typical values are at V = +3.3V,
CC
L
L
A
CC
T
= +25°C.) (Notes 3, 4, 5; Figures 2, 3)
A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX UNITS
Differential High-to-Low
Propagation Delay
t
1
1.54
2.5
2.5
ns
ns
PHLD
PLHD
Differential Low-to-High
Propagation Delay
t
1
1.58
Differential Pulse Skew
t
t
40
70
250
400
ps
ps
SKD1
|t
- t
| (Note 6)
PHLD PLHD
Channel-to-Channel Skew (Note 7)
SKD2
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MAX9110/MAX9112
Single/Dual LVDS Line Drivers with
Ultra-Low Pulse Skew in SOT23
AC Characteristics (continued)
(V
= +3.0V to +3.6V, R = 100Ω ±1%, C = 5pF, T = -40°C to +85°C, unless otherwise noted. Typical values are at V
= +3.3V,
CC
CC
L
L
A
T
= +25°C.) (Notes 3, 4, 5; Figures 2, 3)
A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX UNITS
t
(Note 8)
(Note 9)
1
SKD3
SKD4
Part-to-Part Skew
ns
1.5
t
High-to-Low Transition Time
Low-to-High Transition Time
Maximum Operating Frequency
t
0.25
0.25
250
0.6
0.6
1
1
ns
ns
THL
t
TLH
f
(Note 10)
MHz
MAX
Note 1: Maximum and minimum limits over temperature are guaranteed by design. Devices are production tested at T = +25°C.
A
Note 2: By definition, current into the device is positive and current out of the device is negative. Voltages are referred to device
ground except V
.
OD
Note 3: AC parameters are guaranteed by design and characterization.
Note 4: C includes probe and fixture capacitance.
L
Note 5: Signal generator conditions for dynamic tests: V = 0, V
= 3V, f = 20MHz, 50% duty cycle, R = 50Ω, t ≤ 1ns, and t
O R F
OL
OH
≤ 1ns (0 to 100%).
Note 6:
Note 7:
t
t
is the magnitude difference of differential propagation delays in a channel; t
= | t
- t
|.
SKD1
SKD2
SKD1
PLHD
PHLD PLHD
is the magnitude difference of the t
or t
of one channel and the t
or t
of the other channel on
PLHD
PHLD
PHLD
the same device (MAX9112).
Note 8:
Note 9:
Note 10:
t
is the magnitude difference of any differential propagation delays between devices at the same V
and within 5°C
CC
SKD3
of each other.
t
is the magnitude difference of any differential propagation delays between devices operating over the rated supply
SKD4
and temperature ranges.
f
signal generator conditions: V = 0, V
= +3V, frequency = 250MHz, t ≤ 1ns, t ≤ 1ns (0 to 100%) 50% duty
R F
MAX
OL
OH
cycle. Transmitter output criteria: duty cycle = 45% to 55%, V
≥ 250mV.
OD
Typical Operating Characteristics
(V
= +3.3V, R = 100Ω, C = 5pF, V = +3V, V = GND, f = 20MHz, T = +25°C, unless otherwise noted.) (Figures 2, 3)
CC
L
L
IH
IL
IN
A
MAX9110
SUPPLY CURRENT
vs. INPUT FREQUENCY
DIFFERENTIAL PROPAGATION DELAY
vs. SUPPLY VOLTAGE
SUPPLY CURRENT vs. TEMPERATURE
7.4
7.3
7.2
7.1
7.0
6.9
6.8
6.7
6.6
6.5
6.4
9.5
2.0
1.8
1.6
1.4
1.2
1.0
0.8
A: V = +3.0V
B: V = +3.3V
C: V = +3.6V
CC
CC
9.0
8.5
8.0
7.5
7.0
6.5
CC
t
PLHD
t
PHLD
B
C
A
1
100
1M
100M
1G
10k
-40
-15
10
35
60
85
3.0
3.1
3.2
3.3
3.4
3.5
3.6
INPUT FREQUENCY (Hz)
TEMPERATURE (°C)
SUPPLY VOLTAGE (V)
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MAX9110/MAX9112
Single/Dual LVDS Line Drivers with
Ultra-Low Pulse Skew in SOT23
Typical Operating Characteristics (continued)
(V
= +3.3V, R = 100Ω, C = 5pF, V = +3V, V = GND, f = 20MHz, T = +25°C, unless otherwise noted.) (Figures 2, 3)
CC
L
L
IH
IL
IN
A
DIFFERENTIAL PROPAGATION DELAY
vs. TEMPERATURE
DIFFERENTIAL PULSE SKEW
vs. SUPPLY VOLTAGE
DIFFERENTIAL PULSE SKEW
vs. TEMPERATURE
2.0
100
80
60
40
20
0
100
80
60
40
20
0
1.8
1.6
1.4
1.2
1.0
0.8
t
PLHD
t
PHLD
-40
-15
10
35
60
85
3.0
3.1
3.2
3.3
3.4
3.5
3.6
-40
-15
10
35
60
85
TEMPERATURE (°C)
SUPPLY VOLTAGE (V)
TEMPERATURE (°C)
TRANSITION TIME vs. SUPPLY VOLTAGE
TRANSITION TIME vs. TEMPERATURE
OUTPUT VOLTAGE vs. SUPPLY VOLTAGE
600
580
560
540
520
500
480
460
440
420
400
1.50
1.45
1.40
1.35
1.30
1.25
1.20
1.15
1.10
1.05
1.00
700
650
600
550
500
450
400
350
300
OUTPUT HIGH
t
TLH
t
TLH
t
THL
t
THL
OUTPUT LOW
3.0
3.1
3.2
3.3
3.4
3.5
3.6
-40
-15
10
35
60
85
3.0
3.1
3.2
3.3
3.4
3.5
3.6
SUPPLY VOLTAGE (V)
TEMPERATURE (°C)
SUPPLY VOLTAGE (V)
DIFFERENTIAL OUTPUT VOLTAGE
vs. SUPPLY VOLTAGE
DIFFERENTIAL OUTPUT VOLTAGE
vs. LOAD RESISTANCE
450
425
400
375
350
325
300
275
250
450
425
400
375
350
325
300
275
250
V
= +3.3V
CC
V
CC
= +3V
V
= +3.6V
CC
3.0
3.1
3.2
3.3
3.4
3.5
3.6
75.0 87.5 100.0 112.5 125.0 137.5 150.0
SUPPLY VOLTAGE (V)
LOAD RESISTANCE (Ω)
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MAX9110/MAX9112
Single/Dual LVDS Line Drivers with
Ultra-Low Pulse Skew in SOT23
Typical Operating Characteristics (continued)
(V
= +3.3V, R = 100Ω, C = 5pF, V = +3V, V = GND, f = 20MHz, T = +25°C, unless otherwise noted.) (Figures 2, 3)
CC
L
L
IH
IL
IN
A
OUTPUT HIGH VOLTAGE
vs. LOAD RESISTANCE
OUTPUT LOW VOLTAGE
vs. LOAD RESISTANCE
1.45
1.44
1.43
1.42
1.41
1.40
1.39
1.38
1.37
1.36
1.35
1.10
1.09
1.08
1.07
1.06
1.05
1.04
1.03
1.02
1.01
1.00
V
CC
= +3.6V
V
CC
= +3.6V
V
CC
= +3V
V
CC
= +3V
V
CC
= +3.3V
V
CC
= +3.3V
75.0 87.5 100.0 112.5 125.0 137.5 150.0
75.0 87.5 100.0 112.5 125.0 137.5 150.0
LOAD RESISTANCE (Ω)
LOAD RESISTANCE (Ω)
Pin Description
PIN
MAX9110
MAX9112
NAME
FUNCTION
SOT23
SO
SOT23
4
SO
1
4
1
1
2
V
Positive Supply
CC
—
—
DIN
DIN1, DIN2
N.C.
Transmitter Input
—
3, 5, 6
2
—
3, 5, 6
4
1, 3
—
2, 3
—
No Connection. Not internally connected.
Ground
2
4
GND
7
7
—
—
DO+
Noninverting Transmitter Output
Inverting Transmitter Output
—
8
—
8
6, 7
—
6, 7
—
DO2+, DO1+
DO-
—
—
5, 8
5, 8
DO2-, DO1-
these signals to a differential voltage in the 250mV to
450mV range across a 100Ω load while drawing only
9.4mA of supply current for the dualchannel MAX9112.
Detailed Description
The MAX9110/MAX9112 single/dual LVDS transmitters
are intended for high-speed, point-to-point, low-power
applications. These devices accept CMOS/LVTTL inputs
with data rates exceeding 500Mbps. The MAX9110/
MAX9112 reduce power consumption and EMI by translating
A current-steering approach induces less ground
bounce and no shoot-through current, enhancing noise
margin and system speed performance. The output
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MAX9110/MAX9112
Single/Dual LVDS Line Drivers with
Ultra-Low Pulse Skew in SOT23
DO_+
C
L
DO_ +
DO_ -
R /2
L
V
DIN_
CC
DIN_
V
OS
V
OD
R
L
GENERATOR
GND
R /2
L
50Ω
C
L
DO_-
Figure 1. LVDS Transmitter V
and V
Test Circuit
OS
Figure 2. Transmitter Propagation Delay and Transition Time
Test Circuit
OD
3V
1.5V
1.5V
DIN_
0
t
t
PHLD
PLHD
DO_ -
DO_+
V
OH
OL
0V DIFFERENTIAL
0
V
80%
80%
0
V
= V + - V
-
DIFF
DO_
DO_
0
V
DIFF
20%
20%
t
t
THL
TLH
Figure 3. Transmitter Propagation Delay and Transition Time Waveforms
stage presents a symmetrical, high-impedance output,
reducing differential reflection and timing distortion. The
driver outputs are short circuit current limited and enter
a high-impedance state when the device is not powered.
sion loop. Because the device switches the direction of
current flow and not voltage levels, the actual output voltage
swing is determined by the value of the termination
resistor at the input of an LVDS receiver. Logic states are
determined by the direction of current flow through the
termination resistor. With a typical 3.5mA output current,
the MAX9110/MAX9112 produce an output voltage of
350mV when driving a 100Ω load. The steady-state-
voltage peak-to-peak swing is twice the differential
voltage, or 700mV (typ).
LVDS Operation
The LVDS interface standard is a signaling method
intended for point-to-point communication over a controlled
impedance medium as defined by the EIA/TIA-644 LVDS
standard. The LVDS standard uses a lower voltage swing
than other common communication standards, achieving
higher data rates with reduced power consumption while
reducing EMI emissions and system susceptibility to
noise.
Applications Information
Supply Bypassing
Bypass V
with high-frequency surface-mount ceramic
CC
LVDS transmitters such as the MAX9110/MAX9112
convert CMOS/LVTTL signals to low-voltage differential
signals at rates in excess of 500Mbps. The MAX9110/
MAX9112 current-steering architecture requires a resistive
load to terminate the signal and complete the transmis-
0.1μF and 0.001μF capacitors in parallel, as close to the
device as possible, with the smaller valued capacitor the
closest. For additional supply bypassing, place a 10μF
tantalum or ceramic capacitor at the point where power
enters the circuit board.
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MAX9110/MAX9112
Single/Dual LVDS Line Drivers with
Ultra-Low Pulse Skew in SOT23
Differential Traces
Board Layout
Output trace characteristics affect the performance of the
MAX9110/MAX9112. Use controlled impedance traces
to match trace impedance to both transmission medium
impedance and termination resistor. Eliminate reflections
and ensure that noise couples as common mode by
running the differential traces close together. Reduce skew
by matching the electrical length of the traces. Excessive skew
can result in a degradation of magnetic field cancellation.
For LVDS applications, a four-layer PC board that
provides separate power, ground, LVDS signals, and
input signals is recommended. Isolate the input and LVDS
signals from each other to prevent coupling. Separate the
input and LVDS signal planes with the power and ground
planes for best results.
Maintain the distance between the differential traces to
avoid discontinuities in impedance. Avoid 90° turns and
minimize the number of vias to further prevent impedance
discontinuities.
Typical Operating Circuit
+3.3V
+3.3V
Cables and Connectors
0.001µF
0.1µF
0.001µF
0.1µF
Transmission media should have a differential characteristic
impedance of about 100Ω. Use cables and connectors
that have matched impedance to minimize impedance
discontinuities.
DIN_
DRIVER
R
= 100Ω
RECEIVER
OUT_
T
Avoid the use of unbalanced cables, such as ribbon or
simple coaxial cable. Balanced cables, such as twisted
pair, offer superior signal quality and tend to generate
less EMI due to canceling effects. Balanced cables tend
to pick up noise as common mode, which is rejected by
the LVDS receiver.
LVDS
MAX9111
MAX9113
MAX9110
MAX9112
Termination
Termination resistors should match the differential
characteristic impedance of the transmission line.
Because the MAX9110/MAX9112 are current-steering
devices, an output voltage will not be generated without a
termination resistor. Output voltage levels are dependent
upon the termination resistor value. Resistance values
may range between 75Ω and 150Ω.
Chip Information
MAX9110 TRANSISTOR COUNT: 765
MAX9112 TRANSISTOR COUNT: 765
PROCESS: CMOS
Minimize the distance between the termination resistor
and receiver inputs. Use a single 1% to 2% surface-mount
resistor across the receiver inputs.
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MAX9110/MAX9112
Single/Dual LVDS Line Drivers with
Ultra-Low Pulse Skew in SOT23
Package Information
For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”,
“#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing
pertains to the package regardless of RoHS status.
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MAX9110/MAX9112
Single/Dual LVDS Line Drivers with
Ultra-Low Pulse Skew in SOT23
Revision History
REVISION REVISION
PAGES
CHANGED
DESCRIPTION
NUMBER
DATE
0
1
9/00
Initial release
—
1
9/19
Updated Ordering Information
For pricing, delivery, and ordering information, please visit Maxim Integrated’s online storefront at https://www.maximintegrated.com/en/storefront/storefront.html.
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
©
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
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