MAX9320_V01 [MAXIM]
1:2 Differential LVPECL/LVECL/HSTL Clock and Data Drivers;
| 型号： | MAX9320_V01 |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | 1:2 Differential LVPECL/LVECL/HSTL Clock and Data Drivers |
| 文件： | 总10页 (文件大小：620K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
19-2201; Rev 3; 11/04
1:2 Differential LVPECL/LVECL/HSTL
Clock and Data Drivers
General Description
Features
The MAX9320/MAX9320A are low-skew, 1-to-2 differen-
tial drivers designed for clock and data distribution. The
input is reproduced at two differential outputs. The dif-
ferential input can be adapted to accept single-ended
inputs by applying an external reference voltage.
♦ Improved Second Source of the MC10LVEP11
(MAX9320)
♦ +2.25V to +3.8V Differential HSTL/LVPECL
Operation
♦ -2.25V to -3.8V LVECL Operation
♦ Low 22mA (typ) Supply Current
♦ 20ps (typ) Part-to-Part Skew
♦ 6ps (typ) Output-to-Output Skew
♦ 208ps (typ) Propagation Delay
♦ Minimum 300mV Output at 3GHz
♦ Outputs Low for Open Input
The MAX9320/MAX9320A feature ultra-low propagation
delay (208ps), part-to-part skew (20ps), and output-to-
output skew (6ps) with 30mA maximum supply current,
making these devices ideal for clock distribution. For
interfacing to differential HSTL and LVPECL signals,
these devices operate over a +2.25V to +3.8V supply
range, allowing high-performance clock or data distrib-
ution in systems with a nominal +2.5V or +3.3V supply.
For differential LVECL operation, these devices operate
from a -2.25V to -3.8V supply.
♦ ESD Protection >2kV (Human Body Model)
The pinout is the only difference between the MAX9320
and MAX9320A. Multiple pinouts are provided to simplify
routing across a backplane to either side of a double-
sided board.
♦ Available in Thermally Enhanced Exposed-Pad
SO Package
These devices are offered in space-saving 8-pin SOT23,
µMAX, and SO packages.
Applications
Ordering Information
Precision Clock Distribution
Low-Jitter Data Repeater
Protection Switching
TEMP
RANGE
PIN-
PACKAGE
TOP
MARK
PART
MAX9320EKA-T
MAX9320ESA
MAX9320XESA
MAX9320EUA
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
8 SOT23-8
8 SO
AALJ
—
8 SO-EP*
8 µMAX
—
—
MAX9320AEKA-T -40°C to +85°C
*Contact factory for availability.
8 SOT23-8
AAIW
Pin Configurations
Q0
Q0
Q1
Q1
V
V
Q0
Q0
V
CC
Q0
Q0
1
2
3
4
8
7
1
2
3
4
8
7
1
2
3
4
8
7
CC
CC
MAX9320
MAX9320A
MAX9320
V
CC
V
CC
60kΩ
D
V
V
EE
D
EE
D
60kΩ
100kΩ
60kΩ
100kΩ
100kΩ
D
V
Q1
Q1
Q1
Q1
6
5
6
5
6
5
100kΩ
100kΩ
100kΩ
D
D
EE
V
EE
V
EE
µMAX/SO
SOT23
SOT23
________________________________________________________________ Maxim Integrated Products
1
For pricing delivery, and ordering information please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
1:2 Differential LVPECL/LVECL/HSTL
Clock and Data Drivers
ABSOLUTE MAXIMUM RATINGS
V
CC
to V ..........................................................................+4.1V
Junction-to-Case Thermal Resistance
EE
D or D .................................................. V - 0.3V to V
+ 0.3V
8-Pin SOT23...............................................................+80°C/W
8-Pin µMAX ................................................................+39°C/W
8-Pin SO.....................................................................+40°C/W
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range.............................-65°C to +150°C
ESD Protection
EE
CC
D to D ................................................................................. 3.0V
Continuous Output Current.................................................50mA
Surge Output Current........................................................100mA
Junction-to-Ambient Thermal Resistance in Still Air
8-Pin SOT23.............................................................+112°C/W
8-Pin µMAX ..............................................................+221°C/W
8-Pin SO...................................................................+170°C/W
Junction-to-Ambient Thermal Resistance with 500
Human Body Model (D, D, Q_, Q_) .................................>2kV
Soldering Temperature (10s)...........................................+300°C
LFPM Airflow
8-Pin SOT23...............................................................+78°C/W
8-Pin µMAX ..............................................................+155°C/W
8-Pin SO.....................................................................+99°C/W
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
(V
CC
- V = +2.25V to +3.8V, outputs loaded with 50Ω 1ꢀ to V
- 2V. Typical values are at V
- V = +3.3V, V
EE
= V
-
EE
CC
CC
IHD
CC
1.0V, V
= V
- 1.5V, unless otherwise noted.) (Notes 1, 2, 3)
ILD
CC
-40°C
+25°C
+85°C
PARAMETER
SYMBOL
CONDITIONS
UNITS
MIN
TYP
MAX
MIN
TYP
MAX
MIN
TYP
MAX
DIFFERENTIAL INPUT (D, D)
High Voltage of
Differential
Input
V
+ 1.2
V
+ 1.2
V
EE
+ 1.2
EE
EE
V
V
V
V
V
V
V
V
IHD
CC
CC
CC
Low Voltage of
Differential
Input
V
- 0.1
CC
CC
CC
V
V
V
V
EE
ILD
EE
EE
- 0.1
- 0.1
For V
< +3.0V
- V
- V
V
- V
V
- V
V
CC
- V
EE
CC
EE
CC
CC
0.1
0.1
0.1
0.1
0.1
0.1
EE
EE
Differential
Input Voltage
V
IHD
- V
ILD
V
For V
≥ +3.0V
CC
EE
3.0
3.0
3.0
Input High
Current
I
150
100
150
100
150
100
µA
µA
µA
IH
D Input Low
Current
I
-10
-10
-10
ILD
D Input Low
Current
I
-150
+150
-150
+150 -150
+150
ILD
DIFFERENTIAL OUTPUTS (Q_, Q_)
Single-Ended
Output High
Voltage
V
V
V
V
V
V
CC
- 0.76
CC
CC
CC
CC
CC
V
Figure 1
V
OH
- 1.135
- 0.885 - 1.07
- 0.82 - 1.01
2
_______________________________________________________________________________________
1:2 Differential LVPECL/LVECL/HSTL
Clock and Data Drivers
DC ELECTRICAL CHARACTERISTICS (continued)
(V
CC
- V = +2.25V to +3.8V, outputs loaded with 50Ω 1ꢀ to V
- 2V. Typical values are at V
- V = +3.3V, V
EE
= V
-
EE
CC
CC
IHD
CC
1.0V, V
= V
- 1.5V, unless otherwise noted.) (Notes 1, 2, 3)
ILD
CC
-40°C
+25°C
+85°C
PARAMETER
SYMBOL
CONDITIONS
Figure 1
UNITS
V
MIN
TYP
MAX
MIN
TYP
MAX
MIN
TYP
MAX
Single-Ended
Output Low
Voltage
V
V
V
V
V
V
CC
- 1.56
CC
CC
CC
CC
CC
V
OL
- 1.935
- 1.685 - 1.87
- 1.62 - 1.81
Differential
Output Voltage
V
OH
- V
OL
Figure 1
550
550
550
mV
POWER SUPPLY
Supply Current
I
(Note 4)
20
28
22
28
23
30
mA
EE
AC ELECTRICAL CHARACTERISTICS
(V
CC
- V = +2.25V to +3.8V, outputs loaded with 50Ω 1ꢀ to V
- 2V, input frequency = 1.5GHz, input transition time = 125ps
CC
EE
(20ꢀ to 80ꢀ), V
values are at V
= V + 1.2V to V , V
- 0.15V, V
- V
= 0.15V to the smaller of 3V or V - V . Typical
IHD
CC
EE
CC ILD
EE
CC
CC
IHD
ILD
CC EE
- V = +3.3V, V
= V
- 1.5V, unless otherwise noted.) (Note 5)
EE
IHD
CC
-40°C
+25°C
+85°C
TYP MAX
PARAMETER SYMBOL
CONDITIONS
UNITS
MIN
TYP
MAX MIN
TYP
MAX MIN
Differential
Input-to-
Output Delay
t
t
,
PLHD
Figure 1
145
203
265
155
208
265
160
220
270
ps
PHLD
Output-to-
Output Skew
t
(Note 6)
(Note 7)
6
30
120
2.8
1.5
6
30
110
2.8
1.5
6
30
110
2.8
1.5
ps
ps
SKOO
Part-to-Part
Skew
t
20
1.7
0.6
20
1.7
0.6
20
1.7
0.6
SKPP
f
= 1.5GHz, clock
IN
Added
Random Jitter
(Note 8)
pattern
ps
(RMS)
t
RJ
f
= 3.0GHz, clock
IN
pattern
Added
Deterministic
Jitter
3.0Gbps
ps
(p-p)
t
DJ
223-1 PRBS pattern
(Note 8)
57
80
57
80
57
80
_______________________________________________________________________________________
3
1:2 Differential LVPECL/LVECL/HSTL
Clock and Data Drivers
AC ELECTRICAL CHARACTERISTICS (continued)
(V
- V = +2.25V to +3.8V, outputs loaded with 50Ω 1ꢀ to V
- 2V, input frequency = 1.5GHz, input transition time = 125ps
CC
CC
EE
(20ꢀ to 80ꢀ), V
values are at V
= V + 1.2V to V , V
= V to V
- 0.15V, V
- V
= 0.15V to the smaller of 3V or V - V . Typical
IHD
EE
CC ILD
EE
CC
IHD
ILD
CC EE
- V = +3.3V, V
= V
- 1V, V
= V
- 1.5V, unless otherwise noted.) (Note 5)
EE
IHD
CC
ILD
CC
CC
-40°C
+25°C
+85°C
TYP MAX
PARAMETER SYMBOL
CONDITIONS
- V ≥ 300mV,
UNITS
MIN
TYP
MAX MIN
TYP
MAX MIN
V
OH
OL
clock pattern,
3.0
3.0
3.0
Figure 1
Switching
Frequency
f
GHz
ps
MAX
V
- V ≥ 550mV,
OL
OH
clock pattern,
Figure 1
2.0
50
2.0
2.0
Output
Rise/Fall Time
(20ꢀ to 80ꢀ)
t , t
R
Figure 1
88
120
50
89
120
50
90
120
F
Note 1: Measurements are made with the device in thermal equilibrium.
Note 2: Current into a pin is defined as positive. Current out of a pin is defined as negative.
Note 3: DC parameters production tested at T = +25°C. Guaranteed by design and characterization over the full operating temper-
A
ature range.
Note 4: All pins open except V
and V
.
EE
CC
Note 5: Guaranteed by design and characterization. Limits are set at 6 sigma.
Note 6: Measured between outputs of the same part at the signal crossing points for a same-edge transition.
Note 7: Measured between outputs of different parts at the signal crossing points under identical conditions for a same-edge
transition.
Note 8: Device jitter added to the input signal.
4
_______________________________________________________________________________________
1:2 Differential LVPECL/LVECL/HSTL
Clock and Data Drivers
Typical Operating Characteristics
(V
CC
= +3.3V, V = 0, input transition time = 125ps (20ꢀ to 80ꢀ), V
= V
- 1V, V
= V
- 1.5V, f = 1.5GHz, outputs loaded
IN
EE
IHD
CC
ILD
CC
with 50Ω to V - 2V, T = +25°C, unless otherwise noted.)
CC
A
OUTPUT AMPLITUDE, V - V
OH
OL
SUPPLY CURRENT, I vs. TEMPERATURE
vs. FREQUENCY
TRANSITION TIME vs. TEMPERATURE
EE
25
24
23
22
21
20
19
18
17
16
15
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
91
90
89
88
87
86
85
t
F
t
R
-40
-15
10
35
60
85
0
500 1000 1500 2000 2500 3000 3500
FREQUENCY (MHz)
-40
-15
10
35
60
85
TEMPERATURE (°C)
TEMPERATURE (°C)
PROPAGATION DELAY vs.
HIGH VOLTAGE OF DIFFERENTIAL INPUT, V
PROPAGATION DELAY vs. TEMPERATURE
IHD
240
230
220
210
200
190
180
170
160
225
220
215
210
205
200
195
V
IHD
- V = 0.5V
ILD
t
PLHD
t
PLHD
t
PHLD
t
PHLD
-40
-15
10
35
60
85
1.0 1.4 1.8 2.2 2.6 3.0 3.4 3.8
(V)
TEMPERATURE (°C)
V
IHD
_______________________________________________________________________________________
5
1:2 Differential LVPECL/LVECL/HSTL
Clock and Data Drivers
Pin Description (MAX9320)
PIN
µMAX/SO
NAME
FUNCTION
SOT23
1
2
3
4
5
6
7
8
7
6
5
2
4
3
Q0
Q0
Q1
Q1
Noninverting Q0 Output. Typically terminate with 50Ω resistor to V
- 2V.
CC
Inverting Q0 Output. Typically terminate with 50Ω resistor to V
- 2V.
CC
Noninverting Q1 Output. Typically terminate with 50Ω resistor to V
- 2V.
CC
Inverting Q1 Output. Typically terminate with 50Ω resistor to V
- 2V.
CC
V
Negative Supply Voltage
EE
D
Inverting Differential Input. 60kΩ pullup to V
and 100kΩ pulldown to V
.
CC
EE
D
Noninverting Differential Input. 100kΩ pulldown to V
.
EE
Positive Supply Voltage. Bypass from V
to V with 0.1µF and 0.01µF ceramic
EE
CC
8
1
V
capacitors. Place the capacitors as close to the device as possible with the smaller
value capacitor closest to the device.
CC
Pin Description (MAX9320A)
PIN
NAME
FUNCTION
SOT23
Positive Supply Voltage. Bypass from V
to V with 0.1µF and 0.01µF ceramic
EE
CC
capacitors. Place the capacitors as close to the device as possible with the smaller value
capacitor closest to the device.
1
V
CC
2
3
4
5
6
7
8
V
Negative Supply Voltage
EE
D
Inverting Differential Input. 60kΩ pullup to V
and 100kΩ pulldown to V
.
CC
EE
D
Noninverting Differential Input. 100kΩ pulldown to V
.
EE
Q1
Q1
Q0
Q0
Inverting Q1 Output. Typically terminate with 50Ω resistor to V
- 2V.
CC
Noninverting Q1 Output. Typically terminate with 50Ω resistor to V
- 2V.
CC
Inverting Q0 Output. Typically terminate with 50Ω resistor to V
- 2V.
CC
Noninverting Q0 Output. Typically terminate with 50Ω resistor to V
- 2V.
CC
6
_______________________________________________________________________________________
1:2 Differential LVPECL/LVECL/HSTL
Clock and Data Drivers
A single-ended input of 100mV around a reference
voltage or a differential input of at least 100mV switch-
D
D
V
IHD
es the outputs to the V
and V
levels specified in
OL
OH
V
V
IHD - ILD
the DC Electrical Characteristics table.
V
ILD
Applications Information
t
t
PHLD
PLHD
Supply Bypassing
Q_
Q
V
OH
V
V
Bypass V
to V with high-frequency surface-mount
EE
OH - OL
CC
V
OL
ceramic 0.1µF and 0.01µF capacitors in parallel as
close to the device as possible, with the 0.01µF value
capacitor closest to the device. Use multiple parallel
vias for low inductance.
80%
0 (DIFFERENTIAL)
80%
0 (DIFFERENTIAL)
20%
Traces
Input and output trace characteristics affect the perfor-
mance of the MAX9320/MAX9320A. Connect each
signal of a differential input or output to a 50Ω charac-
teristic impedance trace. Minimize the number of vias
to prevent impedance discontinuities. Reduce reflec-
tions by maintaining the 50Ω characteristic impedance
through connectors and across cables. Reduce skew
within a differential pair by matching the electrical
length of the traces.
20%
(Q_) - (Q_)
t
R
t
F
Figure 1. Differential Transition Time and Propagation Delay
Timing Diagram
Detailed Description
The MAX9320/MAX9320A low-skew, 1-to-2 differential
drivers are designed for clock and data distribution. For
interfacing to differential HSTL and LVPECL signals,
these devices operate over a +2.25V to +3.8V supply
range, allowing high-performance clock and data distri-
bution in systems with a nominal +2.5V or +3.3V sup-
ply. For differential LVECL operation, these devices
operate from a -2.25V to -3.8V supply.
The exposed-pad (EP) SO package can be soldered to
the PC board for enhanced thermal performance. If the
EP is not soldered to the PC board, the thermal resis-
tance is the same as the regular SO package. The EP
is connected to the chip V supply. Be sure that the
EE
pad does not touch signal lines or other supplies.
Contact the Maxim Packaging department for guide-
lines on the use of EP packages.
Inputs
The maximum magnitude of the differential input from D
to D is V
also applies to the difference between any reference
voltage input and a single-ended input.
Output Termination
- V or 3.0V, whichever is less. This limit
EE
CC
Terminate outputs through 50Ω to V
- 2V or use an
CC
equivalent Thevenin termination. Terminate both out-
puts and use the same termination on each for the low-
est output-to-output skew. When a single-ended signal
is taken from a differential output, terminate both out-
puts. For example, if Q0 is used as a single-ended out-
put, terminate both Q0 and Q0.
The differential inputs have bias resistors that drive the
outputs to a differential low when the inputs are open.
The inverting input, D, is biased with a 60kΩ pullup to
V
and a 100kΩ pulldown to V . The noninverting
EE
CC
input, D, is biased with a 100kΩ pulldown to V
.
EE
Specifications for the high and low voltages of the dif-
ferential input (V and V ) and the differential input
Chip Information
IHD
ILD
voltage (V
- V ) apply simultaneously (V
cannot
IHD
ILD
ILD
TRANSISTOR COUNT: 182
be higher than V
).
IHD
Outputs
Output levels are referenced to V
and are consid-
CC
ered LVPECL or LVECL, depending on the level of the
V
supply. With V
connected to a positive supply
CC
CC
and V connected to GND, the outputs are LVPECL.
EE
The outputs are LVECL when V
is connected to GND
CC
and V is connected to a negative supply.
EE
_______________________________________________________________________________________
7
1:2 Differential LVPECL/LVECL/HSTL
Clock and Data Drivers
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
SEE DETAIL "A"
SYMBOL
MIN
MAX
e
b
A
0.90
0.00
0.90
0.28
0.09
2.80
2.60
1.50
0.30
1.45
0.15
1.30
0.45
0.20
3.00
3.00
1.75
0.60
C
L
A1
A2
b
C
D
E
C
C
L
E1
L
E
E1
L
0.25 BSC.
L2
e
PIN 1
I.D. DOT
(SEE NOTE 6)
0.65 BSC.
1.95 REF.
0∞
e1
0
8∞
e1
D
C
C
L
L2
A2
A
GAUGE PLANE
A1
SEATING PLANE
C
0
L
NOTE:
1. ALL DIMENSIONS ARE IN MILLIMETERS.
2. FOOT LENGTH MEASURED FROM LEAD TIP TO UPPER RADIUS OF
HEEL OF THE LEAD PARALLEL TO SEATING PLANE C.
DETAIL "A"
3. PACKAGE OUTLINE EXCLUSIVE OF MOLD FLASH & METAL BURR.
4. PACKAGE OUTLINE INCLUSIVE OF SOLDER PLATING.
5. COPLANARITY 4 MILS. MAX.
6. PIN 1 I.D. DOT IS 0.3 MM ÿ MIN. LOCATED ABOVE PIN 1.
PROPRIETARY INFORMATION
TITLE:
7. SOLDER THICKNESS MEASURED AT FLAT SECTION OF LEAD
BETWEEN 0.08mm AND 0.15mm FROM LEAD TIP.
PACKAGE OUTLINE, SOT-23, 8L BODY
8. MEETS JEDEC MO178.
APPROVAL
DOCUMENT CONTROL NO.
REV.
1
21-0078
D
1
8
_______________________________________________________________________________________
1:2 Differential LVPECL/LVECL/HSTL
Clock and Data Drivers
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
PACKAGE OUTLINE
8L SOIC, .150" EXPOSED PAD
1
21-0111
B
1
_______________________________________________________________________________________
9
1:2 Differential LVPECL/LVECL/HSTL
Clock and Data Drivers
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
INCHES
MILLIMETERS
DIM
A
MIN
MAX
0.069
0.010
0.019
0.010
MIN
1.35
0.10
0.35
0.19
MAX
1.75
0.25
0.49
0.25
0.053
0.004
0.014
0.007
N
A1
B
C
e
0.050 BSC
1.27 BSC
E
0.150
0.228
0.016
0.157
0.244
0.050
3.80
5.80
0.40
4.00
6.20
1.27
E
H
H
L
VARIATIONS:
INCHES
1
MILLIMETERS
DIM
D
MIN
MAX
0.197
0.344
0.394
MIN
4.80
8.55
9.80
MAX
5.00
N
8
MS012
AA
TOP VIEW
0.189
0.337
0.386
D
8.75 14
10.00 16
AB
D
AC
D
C
A
B
0∞-8∞
e
A1
L
FRONT VIEW
SIDE VIEW
PROPRIETARY INFORMATION
TITLE:
PACKAGE OUTLINE, .150" SOIC
APPROVAL
DOCUMENT CONTROL NO.
REV.
1
21-0041
B
1
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
10 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2004 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products.
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SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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SI9135LG-T1-E3
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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SI9135_11
SMBus Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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SI9136_11
Multi-Output Power-Supply ControllerWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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SI9130CG-T1-E3
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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SI9130LG-T1-E3
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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SI9130_11
Pin-Programmable Dual Controller - Portable PCsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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SI9137
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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SI9137DB
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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SI9137LG
Multi-Output, Sequence Selectable Power-Supply Controller for Mobile ApplicationsWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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VISHAY
SI9122E
500-kHz Half-Bridge DC/DC Controller with Integrated Secondary Synchronous Rectification DriversWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
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