MAX9768BETG/V+ [MAXIM]
10W Mono Class D Speaker Amplifier with Volume Control;型号: | MAX9768BETG/V+ |
厂家: | MAXIM INTEGRATED PRODUCTS |
描述: | 10W Mono Class D Speaker Amplifier with Volume Control 商用集成电路 |
文件: | 总23页 (文件大小:1587K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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MAX9768
10W Mono Class D Speaker
Amplifier with Volume Control
General Description
The MAX9768 mono 10W Class D speaker amplifier pro-
vides high-quality, efficient audio power with an integrated
volume control function.
Features
● 10W Output (8Ω, PV
= 14V, THD+N = 10%)
DD
● Spread-Spectrum Modulation
● Meets EN55022B EMC with Ferrite Bead Filters
● Amplifier Operation from 4.5V to 14V Supply
The MAX9768 features a 64-step dual-mode (analog or
digitally programmable) volume control and mute function.
The audio amplifier operates from a 4.5V to 14V single
supply and can deliver up to 10W into an 8Ω speaker with
a 14V supply.
2
● 64-Step Integrated Volume Control (I C or Analog)
● Low 0.08% THD+N (R = 8Ω, P
= 6W)
OUT
L
● High 77dB PSRR
A selectable spread-spectrum mode reduces EMI-
radiated emissions, allowing the device to pass EMC
testing with ferrite bead filters and cable lengths up to 1m.
The MAX9768 can be synchronized to an external clock,
allowing synchronization of multiple Class D amplifiers.
● Two t
Times Offered
ON
• MAX9768—220ms
• MAX9768B—15ms
● Low-Power Shutdown Mode (0.5μA)
● Short-Circuit and Thermal-Overload Protection
The MAX9768 features high 77dB PSRR, low 0.08%
THD+N, and SNR up to 97dB. Robust short-circuit and
thermal-overload protection prevent device damage during
a fault condition. The MAX9768 is available in a 24-pin thin
QFN-EP (4mm x 4mm x 0.8mm) package and is specified
over the extended -40°C to +85°C temperature range.
Pin Configuration located toward end of data sheet.
Ordering Information located at end of data sheet.
Applications
● Notebook Computers
● Flat-Panel Displays
● Multimedia Monitors
● GPS Navigation Systems
● Security/Personal Mobile Radio
Simplified Block Diagram
MAX9768 EMI WITH FERRITE BEAD FILTERS
3.3V
4.5V TO 14V
(V = 12V, 1m CABLE, 8Ω LOAD)
DD
40
35
30
25
20
15
10
5
SPEAKER
AUDIO
INPUT
FILTERLESS
CLASS D
SPEAKER
OUTPUT
OVER 20dB MARGIN
TO EN55022B LIMIT
SHDN
MUTE
ANALOG OR
I C VOLUME
CONTROL
2
0
MAX9768
0
100 200 300 400 500 600 700 800 900 1000
FREQUENCY (MHz)
19-0854; Rev 5; 11/20
MAX9768
10W Mono Class D Speaker
Amplifier with Volume Control
Absolute Maximum Ratings
PV
to PGND......................................................-0.3V to +16V
Continuous Power Dissipation (T = +70°C)
A
DD
V
to GND ............................................................-0.3V to +4V
Single-Layer Board:
DD
SCLK, SDA/VOL to GND ........................................-0.3V to +4V
FB, SYNCOUT ......................................... -0.3V to (V + 0.3V)
24-Pin Thin QFN 4mm x 4mm,
(derate 20.8mW/°C above +70°C) ................................1.67W
Multilayer Board:
DD
BOOT_ to OUT_......................................................-0.3V to +4V
OUT_ to GND.........................................-0.3V to (PV + 0.3V)
24-Pin Thin QFN 4mm x 4mm,
DD
PGND to GND......................................................-0.3V to +0.3V
Any Other Pin to GND.............................................-0.3V to +4V
OUT_ Short-Circuit Duration.....................................Continuous
(derate 27.8mW/°C above +70°C) ................................2.22W
θ
θ
, Single-Layer Board..................................................48°C/W
, Multilayer Board.......................................................36°C/W
JA
JA
Continuous Current (PV , PGND, OUT_) .........................2.2A
Continuous Input Current (Any Other Pin).......................±20mA
Continuous Input Current (FB_).......................................±60mA
Operating Temperature Range........................... -40°C to +85°C
Storage Temperature Range............................ -65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
DD
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Electrical Characteristics
(PV
= 12V, V
= 3.3V, V
= V
= 0, V
= V , V
= 0; Max volume setting; speaker load resistor connected
DD
DD
GND
PGND
SHDN
DD
MUTE
between OUT+ and OUT-, R = ∞, unless otherwise noted. C
= 2.2μF, C1 = C2 = 0.1μF, C = 0.47μF, R = 20kΩ, R = 30kΩ,
L
BIAS
IN
IN
F
SSM mode. Filterless modulation mode (see the Functional Diagram/Typical Application Circuit). T = T
to T , unless otherwise
A
MIN
MAX
noted. Typical values are at T = +25°C.) (Note 1)
A
PARAMETER
GENERAL
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Speaker Supply Voltage
Range
PV
Inferred from PSRR test
4.5
2.7
14.0
V
V
DD
Supply Voltage Range
V
Inferred from PSRR and UVLO test
3.6
14.2
7.6
7.6
50
DD
I
7
4
VDD
Quiescent Current
Filterless modulation
mA
I
I
PVDD
Classic PWM modulation
4
Shutdown Current
I
= I
+ I , SHDN = GND, T = +25°C
0.5
±2
±2
220
15
1.5
µA
SHDN
SHDN
PVDD
DD
A
Filterless modulation, V
Filterless modulation, V
MAX9768
= V , T = +25°C
±12.5
±14
MUTE
MUTE
DD
A
Output Offset
V
mV
OS
= 0V, T = +25°C
A
Turn-On Time
t
ms
ON
MAX9768B
Common-Mode Bias Voltage
V
V
BIAS
Input Amplifier Output-
Voltage Swing High
Specified as
V
R = 2kΩ connect to 1.5V
3.6
6
100
50
mV
OH
L
V
- V
DD OH
Input Amplifier Output-
Voltage Swing Low
Specified as
V - GND
OL
V
R = 2kΩ connect to 1.5V
mV
mA
OL
L
Input Amplifier Output
Short-Circuit Current Limit
±60
1.8
Input Amplifier Gain-
Bandwidth Product
GBW
MHz
SPEAKER AMPLIFIERS
Max volume setting; from FB to amplifier outputs
|(OUT+) - (OUT-)|; excludes external gain resistors
Internal Gain
A
29.27
30.1
31.00
dB
VMAX
Maxim Integrated
│ 2
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MAX9768
10W Mono Class D Speaker
Amplifier with Volume Control
Electrical Characteristics (continued)
((PV
= 12V, V
= 3.3V, V
= V
= 0, V
= V , V = 0; Max volume setting; speaker load resistor connected
DD MUTE
DD
DD
GND
PGND
SHDN
between OUT+ and OUT-, R = ∞, unless otherwise noted. C
= 2.2μF, C1 = C2 = 0.1μF, C = 0.47μF, R = 20kΩ, R = 30kΩ,
L
BIAS
IN
IN
F
SSM mode. Filterless modulation mode (see the Functional Diagram/Typical Application Circuit). T = T
to T , unless otherwise
A
MIN
MAX
noted. Typical values are at T = +25°C.) (Note 1)
A
PARAMETER
Efficiency (Note 2)
SYMBOL
CONDITIONS
MIN
TYP
87
MAX
UNITS
Filterless modulation
Classic PWM modulation
P
= 8W, f
=
OUT
IN
η
%
1kHz, R = 8Ω
85
L
R = 8Ω, THD+N = 1%,
filterless modulation
L
1.3
1.7
9
PV
PV
PV
= 5V
DD
DD
DD
R = 8Ω, THD+N = 10%,
L
filterless modulation
R = 8Ω, THD+N = 10%,
L
classic PWM modulation
Output Power (Note 2)
P
= 12V
= 14V
W
OUT
R = 8Ω, THD+N = 10%,
filterless modulation
L
9
R = 8Ω, THD+N = 10%,
L
10
10
classic PWM modulation
R = 8Ω, THD+N = 10%,
L
filterless modulation
Soft Output Current Limit
Hard Output Current Limit
I
1.75
2
2.5
0.09
0.08
94
A
A
LIM
I
SC
Filterless modulation
Total Harmonic Distortion
Plus Noise (Note 2)
f = 1kHz, R = 8Ω,
L
THD+N
%
P
= 5W
Classic PWM modulation
OUT
FFM
Unweighted
SSM
0dB = 8W, R =
L
93
8Ω, BW = 22Hz to
22kHz, filterless
modulation mode
FFM
A-weighted
SSM
97
97
Signal-to-Noise Ratio
(Note 2)
SNR
dB
FFM
Unweighted
SSM
93
0dB = 8W, R =
L
89
8Ω, BW = 22Hz
to 22kHz, classic
PWM modulation
FFM
A-weighted
SSM
97
91
MUTE Attenuation (Note 3)
0dB = 8W, f = 1kHz
115
dB
dB
V
= 2.7V to 3.6V, filterless modulation,
DD
52
67
68
84
T
= +25°C
A
PV
= 4.5V to 14V, filterless modulation,
Power-Supply Rejection
Ratio
DD
PSRR
T
A
= +25°C
f = 1kHz, V
= 200mV
= 100mV
on PV
DD
77
60
RIPPLE
RIPPLE
P-P
P-P
f = 1kHz, V
on V
DD
SYNC = GND
SYNC = unconnected
1060
1296
1200
1440
1320
1584
Oscillator Frequency
f
kHz
OCS
SYNC = V
mode)
(spread-spectrum modulation
1200
±30
DD
Maxim Integrated
│ 3
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MAX9768
10W Mono Class D Speaker
Amplifier with Volume Control
Electrical Characteristics (continued)
((PV
= 12V, V
= 3.3V, V
= V
= 0, V
= V , V = 0; Max volume setting; speaker load resistor connected
DD MUTE
DD
DD
GND
PGND
SHDN
between OUT+ and OUT-, R = ∞, unless otherwise noted. C
= 2.2μF, C1 = C2 = 0.1μF, C = 0.47μF, R = 20kΩ, R = 30kΩ,
L
BIAS
IN
IN
F
SSM mode. Filterless modulation mode (see the Functional Diagram/Typical Application Circuit). T = T
to T
, unless otherwise
A
MIN
MAX
noted. Typical values are at T = +25°C.) (Note 1)
A
PARAMETER
SYMBOL
CONDITIONS
MIN
265
324
TYP
300
360
MAX
330
UNITS
SYNC = GND
SYNC = unconnected
396
Class D Switching Frequency
kHz
SYNC = V
mode)
(spread-spectrum modulation
300
±7.5
DD
SYNC Frequency Lock
Range
1000
1600
kHz
%
Minimum SYNC Frequency
Lock Duty Cycle
40
60
Maximum SYNC Frequency
Lock Duty Cycle
%
%
Gain Matching
Full volume (ideal matching for R and R )
2
52.6
48
IN
F
Into shutdown
Out of shutdown
Into mute
Peak voltage, 32 samples
per second, A-weighted, R
IN
Click-and-Pop Level (Note 2)
K
dBV
CP
x C ≤ 10ms to guarantee
67
IN
clickless/popless operation
Out of mute
57
Input Impedance
Input Hysteresis
9.5dB Gain Voltage
Full Mute Voltage
DC volume control mode (SDA/VOL)
DC volume control mode (SDA/VOL)
DC volume control mode (SDA/VOL)
DC volume control mode (SDA/VOL)
100
11
MΩ
mV
V
0.1 x V
0.9 x V
DD
V
DD
DIGITAL INPUTS (SHDN, MUTE, ADDR1, ADDR2, SYNC)
SYNC
2.33
Input-Voltage High
Input-Voltage Low
Input Leakage Current
V
V
V
IH
All other pins
SYNC
0.7 x V
DD
0.8
0.3 x V
V
IL
All other pins
DD
I
T
= +25°C
±7.5
±13
SYNC
A
µA
I
All other digital inputs, T = +25°C
A
±1
LK
DIGITAL OUTPUT (SYNCOUT)
Output-Voltage High
Output-Voltage Low
Rise/Fall Time
Load = 1mA
Load = 1mA
V
- 0.3
V
V
DD
0.3
C = 10pF
5
ns
L
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│ 4
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MAX9768
10W Mono Class D Speaker
Amplifier with Volume Control
Electrical Characteristics (continued)
((PV
= 12V, V
= 3.3V, V
= V
= 0, V
= V , V = 0; Max volume setting; speaker load resistor connected
DD MUTE
DD
DD
GND
PGND
SHDN
between OUT+ and OUT-, R = ∞, unless otherwise noted. C
= 2.2μF, C1 = C2 = 0.1μF, C = 0.47μF, R = 20kΩ, R = 30kΩ,
L
BIAS
IN
IN
F
SSM mode. Filterless modulation mode (see the Functional Diagram/Typical Application Circuit). T = T
to T , unless otherwise
A
MIN
MAX
noted. Typical values are at T = +25°C.) (Note 1)
A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
THERMAL PROTECTION
Thermal Shutdown Threshold
150
15
°C
°C
Thermal Shutdown
Hysteresis
DIGITAL INPUTS (SCLK, SDA/VOL)
Input-Voltage High
V
0.7 x V
V
V
IH
DD
Input-Voltage Low
V
0.3 x V
DD
IL
Input High Leakage Current
Input Low Leakage Current
Input Hysteresis
I
V
V
= V , T = +25°C
±1
±1
µA
µA
V
IH
IN
DD
A
I
= GND, T = +25°C
A
IL
IN
0.1 x V
5
DD
Input Capacitance
C
pF
IN
DIGITAL OUTPUTS (SDA/VOL)
Output High Current
I
V
= V
DD
1
µA
V
OH
OH
Output Low Voltage
V
I
= 3mA
0.4
OL
OL
2
I C TIMING CHARACTERISTICS (Figure 3)
Serial Clock
f
400
kHz
µs
SCL
Bus Free Time Between a
STOP and START
Condition
t
1.3
BUF
Hold Time (Repeated)
START Condition
t
0.6
0.6
µs
µs
HD,STA
Repeated START Condition
Setup Time
t
SU,STA
STOP Condition Setup Time
Data Hold Time
t
0.6
0
µs
µs
ns
µs
µs
SU,STO
t
0.9
HD,DAT
Data Setup Time
t
100
1.3
0.6
SU,DAT
SCL Clock Low Period
SCL Clock High Period
t
LOW
t
HIGH
Rise Time of SDA and SCL,
Receiving
20 +
0.1Cb
t
(Note 4)
(Note 4)
300
300
ns
ns
R
Fall Time of SDA and SCL,
Receiving
20 +
0.1Cb
t
F
Maxim Integrated
│ 5
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MAX9768
10W Mono Class D Speaker
Amplifier with Volume Control
Electrical Characteristics (continued)
((PV
= 12V, V
= 3.3V, V
= V
= 0, V
= V , V = 0; Max volume setting; speaker load resistor connected
DD MUTE
DD
DD
GND
PGND
SHDN
between OUT+ and OUT-, R = ∞, unless otherwise noted. C
= 2.2μF, C1 = C2 = 0.1μF, C = 0.47μF, R = 20kΩ, R = 30kΩ,
L
BIAS
IN
IN
F
SSM mode. Filterless modulation mode (see the Functional Diagram/Typical Application Circuit). T = T
to T , unless otherwise
A
MIN
MAX
noted. Typical values are at T = +25°C.) (Note 1)
A
PARAMETER
Fall Time of SDA,
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
20 +
0.1Cb
t
(Note 4)
250
ns
F
Transmitting
Pulse Width of Spike
Suppressed
t
0
50
ns
SP
Capacitive Load for Each
Bus Line
C
400
pF
b
Note 1: All devices are 100% production tested at T = +25°C. All temperature limits are guaranteed by design.
A
Note 2: Testing performed with a resistive load in series with an inductor to simulate an actual speaker load. For R = 8Ω, L = 68μH.
L
Note 3: Device muted by either asserting MUTE or minimum V setting.
OL
Note 4: C = total capacitance of one bus line in pF.
b
Typical Operating Characteristics
((PV
= 12V, V
= 3.3V, V
= V
= 0, V
= 0; 0dB volume setting; all speaker load resistors connected between OUT+
DD
DD
GND
PGND
MUTE
and OUT-, R = 8Ω, unless otherwise noted. C
= 2.2μF, C1 = C2 = 0.1μF, C = 0.47μF, R = 20kΩ, R = 30kΩ, spread-spectrum
L
BIAS
IN
IN
FB
modulation mode.)
TOTAL HARMONIC DISTORTION
PLUS NOISE vs. FREQUENCY
TOTAL HARMONIC DISTORTION
PLUS NOISE vs. FREQUENCY
TOTAL HARMONIC DISTORTION
PLUS NOISE vs. FREQUENCY
10
10
10
PV = 12V
DD
PV = 12V
DD
PV = 5V
DD
R = 8Ω
L
R = 8Ω
L
R = 8Ω
L
FILTERLESS MODULATION
PWM MODE
FILTERLESS MODULATION
1
0.1
1
0.1
1
0.1
OUTPUT POWER = 1W
OUTPUT POWER = 6W
OUTPUT POWER = 5W
OUTPUT POWER = 300mW
0.01
0.001
OUTPUT POWER = 2W
OUTPUT POWER = 2W
0.01
0.01
10
100
1k
10k
100k
10
100
1k
FREQUENCY (Hz)
10k
100k
10
100
1k
10k
100k
FREQUENCY (Hz)
FREQUENCY (Hz)
Maxim Integrated
│ 6
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MAX9768
10W Mono Class D Speaker
Amplifier with Volume Control
Typical Operating Characteristics (continued)
((PV
= 12V, V
= 3.3V, V
= V
= 0, V
= 0; 0dB volume setting; all speaker load resistors connected between OUT+
DD
DD
GND
PGND
MUTE
and OUT-, R = 8Ω, unless otherwise noted. C
= 2.2μF, C1 = C2 = 0.1μF, C = 0.47μF, R = 20kΩ, R = 30kΩ, spread-spectrum
L
BIAS
IN
IN
FB
modulation mode.)
TOTAL HARMONIC DISTORTION
PLUS NOISE vs. FREQUENCY
TOTAL HARMONIC DISTORTION
PLUS NOISE vs. FREQUENCY
TOTAL HARMONIC DISTORTION
PLUS NOISE vs. FREQUENCY
10
10
1
10
PV = 12V
DD
PV = 5V
DD
R = 8Ω
L
PV = 12V
DD
R = 8Ω
L
R = 8Ω
L
FILTERLESS MODULATION
PWM MODE
1
PWM MODE
P
= 4W
OUT
1
0.1
P
= 4W
OUT
FIXED-FREQUENCY
MODULATION
FIXED-FREQUENCY
MODULATION
OUTPUT POWER = 300mW
0.1
0.1
0.01
SPREAD-SPECTRUM
MODULATION
0.01
0.01
0.001
SPREAD-SPECTRUM
MODULATION
OUTPUT POWER = 800mW
0.001
0.001
10
100
1k
10k
100k
10
100
1k
10k
100k
10
100
1k
10k
100k
FREQUENCY (Hz)
FREQUENCY (Hz)
FREQUENCY (Hz)
TOTAL HARMONIC DISTORTION
PLUS NOISE vs. OUTPUT POWER
TOTAL HARMONIC DISTORTION
PLUS NOISE vs. OUTPUT POWER
TOTAL HARMONIC DISTORTION
PLUS NOISE vs. OUTPUT POWER
100
10
1
100
10
1
100
10
1
PV = 12V
PV = 12V
PV = 5V
DD
DD
DD
R = 8Ω
R = 8Ω
R = 8Ω
L
L
L
FILTERLESS MODULATION
PWM MODE
FILTERLESS MODULATION
f
IN
= 10kHz
f = 10kHz
IN
f
= 10kHz
IN
0.1
0.1
0.1
0.01
0.01
0.01
f
= 1kHz
IN
f
IN
= 100Hz
f
= 100Hz
0.5
f
= 1kHz
IN
f
= 100Hz
2
IN
IN
f
= 1kHz
IN
0.001
0.001
0.001
0
2
4
6
8
10
12
0
4
6
8
10
0
1.0
1.5
2.0
OUTPUT POWER (W)
OUTPUT POWER (W)
OUTPUT POWER (W)
TOTAL HARMONIC DISTORTION
PLUS NOISE vs. OUTPUT POWER
TOTAL HARMONIC DISTORTION
PLUS NOISE vs. OUTPUT POWER
TOTAL HARMONIC DISTORTION
PLUS NOISE vs. OUTPUT POWER
100
10
1
100
10
100
10
PV = 5V
PV = 12V
PV = 12V
DD
DD
DD
R = 8Ω
R = 8Ω
R = 8Ω
L
L
L
PWM MODE
f
= 1kHz
f = 1kHz
IN
PWM MODE
IN
FILTERLESS MODULATION
f
= 10kHz
IN
1
1
FIXED-FREQUENCY
MODULATION
FIXED-FREQUENCY
MODULATION
0.1
0.1
0.01
0.1
0.01
0.01
SPREAD-SPECTRUM
MODULATION
f
= 100Hz
0.4
IN
SPREAD-SPECTRUM
MODULATION
f
= 1kHz
1.2
IN
0.001
0
0.8
1.6
2.0
0
2
4
6
8
10
0
2
4
6
8
10
OUTPUT POWER (W)
OUTPUT POWER (W)
OUTPUT POWER (W)
Maxim Integrated
│ 7
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MAX9768
10W Mono Class D Speaker
Amplifier with Volume Control
Typical Operating Characteristics (continued)
((PV
= 12V, V
= 3.3V, V
= V
= 0, V
= 0; 0dB volume setting; all speaker load resistors connected between OUT+
DD
DD
GND
PGND
MUTE
and OUT-, R = 8Ω, unless otherwise noted. C
= 2.2μF, C1 = C2 = 0.1μF, C = 0.47μF, R = 20kΩ, R = 30kΩ, spread-spectrum
L
BIAS
IN
IN
FB
modulation mode.)
EFFICIENCY vs. OUTPUT POWER
EFFICIENCY vs. OUTPUT POWER
EFFICIENCY vs. SUPPLY VOLTAGE
100
100
95
FILTERLESS MODULATION
f
= 1kHz
IN
FILTERLESS MODULATION
PWM MODE
90
80
70
60
90
80
70
60
R = 8Ω
FILTERLESS MODULATION
L
92
89
86
83
80
PWM MODE
THD+N = 10%
50
40
50
40
30
20
10
0
30
20
10
0
THD+N = 1%
PV = 12V
PV = 5V
DD
DD
f
IN
= 1kHz
f
IN
= 1kHz
R = 8Ω
L
R = 8Ω
L
0
2
4
6
8
10
0
0.5
1.0
1.5
2.0
4.5
6.5
8.5
10.5
12.5
14.5
OUTPUT POWER (W)
OUTPUT POWER (W)
SUPPLY VOLTAGE (V)
EFFICIENCY vs. SUPPLY VOLTAGE
OUTPUT POWER vs. SUPPLY VOLTAGE
OUTPUT POWER vs. SUPPLY VOLTAGE
95
92
89
86
14
12
12
10
8
f
= 1kHz
R = 8Ω
R = 4Ω
L
IN
L
R = 8Ω
PWM MODULATION
f
= 1kHz
f = 1kHz
L
IN
IN
PWM MODE
PWM MODE
10
8
THD+N = 10%
THD+N = 10%
THD+N = 10%
6
4
2
6
THD+N = 1%
4
THD+N = 1%
THD+N = 1%
83
80
2
0
0
4.5
6.5
8.5
10.5
12.5
14.5
4
6
8
10
12
14
4
6
8
10
12
14
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
OUTPUT POWER vs. LOAD RESISTANCE
OUTPUT POWER vs. LOAD RESISTANCE
CASE TEMPERATURE vs. OUTPUT POWER
12
10
8
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
90
80
70
60
50
PV = 12V
DD
f = 1kHz
PWM MODE
PV = 5V
DD
f = 1kHz
PWM MODE
f = 1kHz
IN
R = 8Ω
L
PV = 14V
DD
THD+N = 10%
THD+N = 10%
6
4
2
THD+N = 1%
40
30
20
PV = 12V
DD
THD+N = 1%
10
0
0
0
5
10
15
20
25
30
0
5
10
15
20
25
30
0
2
4
6
8
10
12
LOAD RESISTANCE (Ω)
LOAD RESISTANCE (Ω)
OUTPUT POWER (W)
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MAX9768
10W Mono Class D Speaker
Amplifier with Volume Control
Typical Operating Characteristics (continued)
((PV
= 12V, V
= 3.3V, V
= V
= 0, V
= 0; 0dB volume setting; all speaker load resistors connected between OUT+
DD
DD
GND
PGND
MUTE
and OUT-, R = 8Ω, unless otherwise noted. C
= 2.2μF, C1 = C2 = 0.1μF, C = 0.47μF, R = 20kΩ, R = 30kΩ, spread-spectrum
L
BIAS
IN
IN
FB
modulation mode.)
POWER-SUPPLY REJECTION RATIO (PV
vs. FREQUENCY
)
DD
POWER-SUPPLY REJECTION RATIO (V
)
DD
OUTPUT WAVEFORM
(FILTERLESS MODULATION)
vs. FREQUENCY
0
0
MAX9768 toc24
PV = 12V
DD
V = 3.3V
DD
V = 100mV
RIPPLE P-P
-10
-20
-30
-40
-10
-20
-30
-40
V
= 100mV
RIPPLE
P-P
R = 8Ω
R = 8Ω
L
L
5V/div
5V/div
PWM MODE
-50
-50
PWM MODE
-60
-70
-80
-60
-70
-80
FILTERLESS MODULATION
-90
-90
FILTERLESS MODULATION
-100
-100
10
100
1k
10k
100k
10
100
1k
10k
100k
1µs/div
FREQUENCY (Hz)
FREQUENCY (Hz)
OUTPUT FREQUENCY SPECTRUM
OUTPUT FREQUENCY SPECTRUM
OUTPUT WAVEFORM (PWM MODE)
0
0
MAX9768 toc25
FFM MODE
V = -60dBV
IN
V
= -60dBV
f = 1kHz
IN
-20
-20
f = 1kHz
R = 8Ω
UNWEIGHTED
R = 8Ω
L
UNWEIGHTED
L
-40
-60
-80
-40
-60
-80
5V/div
-100
-120
-140
-100
-120
-140
5V/div
0
5
10
15
20
0
5
10
15
20
1µs/div
FREQUENCY (kHz)
FREQUENCY (kHz)
WIDEBAND OUTPUT SPECTRUM
(FIXED-FREQUENCY MODULATION MODE)
WIDEBAND OUTPUT SPECTRUM
(FIXED-FREQUENCY MODULATION MODE)
WIDEBAND OUTPUT SPECTRUM
(SPREAD-SPECTRUM MODULATION MODE)
0
-10
-20
-30
0
-10
-20
-30
0
-10
-20
-30
RBW = 10kHz
INPUT AC GROUNDED
FILTERLESS MODULATION
RBW = 10kHz
INPUT AC GROUNDED
PWM MODE
RBW = 10kHz
INPUT AC GROUNDED
FILTERLESS MODULATION
-40
-50
-60
-70
-80
-40
-50
-60
-70
-80
-40
-50
-60
-70
-80
-90
-90
-90
-100
-100
-100
1
10
100
1000
1
10
100
1000
1
10
100
1000
FREQUENCY (MHz)
FREQUENCY (MHz)
FREQUENCY (MHz)
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MAX9768
10W Mono Class D Speaker
Amplifier with Volume Control
Typical Operating Characteristics (continued)
((PV
= 12V, V
= 3.3V, V
= V
= 0, V
= 0; 0dB volume setting; all speaker load resistors connected between OUT+
DD
DD
GND
PGND
MUTE
and OUT-, R = 8Ω, unless otherwise noted. C
= 2.2μF, C1 = C2 = 0.1μF, C = 0.47μF, R = 20kΩ, R = 30kΩ, spread-spectrum
IN IN FB
L
BIAS
modulation mode.)
TURN-ON/OFF RESPONSE
(MAX9768)
TURN-ON/OFF RESPONSE
(MAX9768B)
WIDEBAND OUTPUT SPECTRUM
(SPREAD-SPECTRUM MODULATION MODE)
MAX9768 toc32
MAX9768 toc33
0
RBW = 10kHz
-10
-20
-30
INPUT AC GROUNDED
PWM MODE
SHDN
2V/div
SHDN
2V/div
-40
-50
-60
-70
-80
OUT
500mA/div
OUT
500mA/div
-90
-100
1
10
100
1000
100ms/div
40ms/div
FREQUENCY (MHz)
VOLUME CONTROL LEVEL
SUPPLY CURRENT (PV
)
DD
vs. VOLUME CONTROL VOLTAGE
vs. SUPPLY VOLTAGE
20
0
4.0
R = ∞
L
3.5
3.0
2.5
-20
-40
-60
PWM MODE
2.0
1.5
-80
-100
-120
FILTERLESS MODULATION
1.0
0.5
0
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5
4
6
8
10
12
14
V
VOL
(V)
SUPPLY VOLTAGE (V)
SUPPLY CURRENT (V
vs. SUPPLY VOLTAGE
)
DD
SHUTDOWN CURRENT
vs. SUPPLY VOLTAGE
15
13
11
0.50
0.45
0.40
0.35
SHUTDOWN CURRENT = I
+ I
PVDD DD
V
DD
= 3.3V
PWM MODE
9
7
5
FILTERLESS MODULATION
0.30
2.6
2.8
3.0
3.2
3.4
3.6
4
6
8
10
12
14
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
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MAX9768
10W Mono Class D Speaker
Amplifier with Volume Control
Pin Configuration
TOP VIEW
18
17
16
15
14
13
12
SHDN 19
MUTE
SYNC
11
GND
20
PGND 21
10 BIAS
MAX9768
22
23
24
9
PGND
GND
ADDR2
8
7
IN
+
ADDR1
FB
1
2
3
4
5
6
TQFN
(4mm x 4mm)
Pin Description
PIN
1, 2
NAME
FUNCTION
OUT+
Positive Speaker Output
3, 16
PV
Speaker Amplifier Power-Supply Input. Bypass with a 1µF capacitor to ground.
DD
Positive Speaker Output Boost Flying-Capacitor Connection. Connect a 0.1µF ceramic capacitor
between BOOT+ and OUT+.
4
BOOT+
2
2
I C Serial-Clock Input and Modulation Scheme Select. In I C mode (ADDR1 and ADDR2 ≠ GND)
2
5
SCLK
acts as I C serial-clock input. Connect SCLK to V
for classic PWM modulation, or connect
DD
SCLK to ground for filterless modulation.
2
6
7
SDA/VOL
FB
I C Serial Data I/O and Analog Volume Control Input
Feedback. Connect feedback resistor between FB and IN to set amplifier gain. See the Adjustable
Gain section.
8
IN
Audio Input
9, 11
10
GND
BIAS
Ground
Common-Mode Bias Voltage. Bypass with a 2.2µF capacitor to GND.
Frequency Select and External Clock Input.
SYNC = GND: Fixed-frequency mode with f = 300kHz.
S
12
SYNC
SYNC = Unconnected: Fixed-frequency mode with f = 360kHz.
S
SYNC = V : Spread-spectrum mode with f = 300kHz ±7.5kHz.
DD
S
SYNC = Clocked: Fixed-frequency mode with f = external clock frequency.
S
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MAX9768
10W Mono Class D Speaker
Amplifier with Volume Control
Pin Configuration (continued)
13
14
SYNCOUT
Clock Signal Output
V
Power-Supply Input. Bypass with a 1µF capacitor to GND.
DD
Negative Speaker Output Boost Flying-Capacitor Connection. Connect a 0.1µF ceramic capacitor
between BOOTL- and OUTL-.
15
17, 18
19
BOOT-
OUT-
Negative Speaker Output
Shutdown Input. Drive SHDN low to disable the audio amplifiers. Connect SHDN to V
for normal
DD
SHDN
operation
Mute Input. Drive MUTE high to mute the speaker outputs. Connect Mute to GND for normal
operation.
20
MUTE
21, 22
23
PGND
ADDR2
ADDR1
Power Ground
2
Address Select Input 2. I C address option, also selects volume control mode.
2
24
Address Select Input 1. I C address option, also selects volume control mode.
Exposed Pad. Connect the exposed thermal pad to GND, and use multiple vias to a solid copper
area on the bottom of the PCB.
—
EP
Functional Diagram/Typical Application Circuit
2.7V to 3.6V
4.5V to 14V
1µF
1µF
V
PV
DD
DD
14
3, 16
R
30kΩ
MAX9768
F
FB
IN
7
8
4
BOOT+
C
IN
R
20kΩ
IN
C1
0.1µF
0.47µF
1, 2
OUT+
OUT-
VOLUME
CONTROL
17, 18
15
C2
0.1µF
BOOT-
BIAS
20
MUTE
MUTE
SHDN 19
10
SHUTDOWN
CONTROL
BIAS
SDA/VOL
SCLK
6
5
C
BIAS
2.2µF
2
I C
V
DD
24
ADDR1
ANALOG
ADDR2 23
CONTROL
SYNCOUT
13
SYNC 12
OSCILLATOR
9, 11
GND
21, 22
PGND
(SHOWN IN ANALOG VOLUME CONTOL MODE, A = 23.5dB, f
= 17Hz, SPREAD-SPECTRUM MODULATION MODE, FILTERLESS MODULATION MODE, MUTE OFF)
-3dB
V
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MAX9768
10W Mono Class D Speaker
Amplifier with Volume Control
spectrum placement of the switching fundamental is
important, program the switching frequency so the har-
monics do not fall within a sensitive frequency band
(Table 1). Audio reproduction is not affected by changing
the switching frequency.
Detailed Description
The MAX9768 10W, Class D audio power amplifier
with spread-spectrum modulation provides a significant
step forward in switch-mode amplifier technology. The
MAX9768 offers Class AB performance with Class D effi-
ciency and a minimal board space solution. This device
features a wide supply voltage operation (4.5V to 14V),
analog or digitally adjusted volume control, externally
set input gain, shutdown mode, SYNC input and output,
speaker mute, and industry-leading click-and-pop sup-
pression.
Spread-Spectrum Mode
The MAX9768 features a unique spread-spectrum mode
that flattens the wideband spectral components, improv-
ing EMI emissions that may be radiated by the speaker
and cables. This mode is enabled by setting SYNC =
V
(Table 1). In SSM mode, the switching frequency
DD
The MAX9768 features a 64-step, dual-mode (analog
or I C programmed) volume control and mute function.
In analog volume control mode, voltage applied to SDA/
VOL sets the volume level. Two address inputs (ADDR1,
ADDR2) set the volume control function between analog
varies randomly by ±7.5kHz around the center frequency
(300kHz). The modulation scheme remains the same, but
the period of the triangle waveform changes from cycle to
cycle. Instead of a large amount of spectral energy pres-
ent at multiples of the switching frequency, the energy is
now spread over a bandwidth that increases with frequen-
2
2
2
and I C and set the slave address. In I C mode there
are three selectable slave addresses allowing for multiple
devices on a single bus.
Spread-spectrum modulation and synchronizable switch-
ing frequency significantly reduce EMI emissions. The
outputs use Maxim’s low-EMI modulation scheme with
minimum pulse outputs when the audio inputs are at the
zero crossing. As the input voltage increases or decreases,
the duration of the pulse at one output increases while the
other output pulse duration remains the same. This causes
OUT+
MAX9768
OUT-
SYNCOUT
the net voltage across the speaker (V
- V ) to
OUT-
OUT+
change. The minimum-width pulse topology reduces EMI
and increases efficiency.
Operating Modes
Fixed-Frequency Mode
MAX9768
The MAX9768 features two fixed-frequency modes:
300kHz and 360kHz. Connect SYNC to GND to select
300kHz switching frequency; leave SYNC unconnected
to select 360kHz switching frequency. The frequency
spectrum of the MAX9768 consists of the fundamental
switching frequency and its associated harmonics (see
the Wideband Output Spectrum graphs in the Typical
Operating Characteristics). For applications where exact
OUT+
SYNC
OUT-
Figure 1. Cascading Two Amplifiers
Table 1. Operating Modes
SYNC
OSCILLATOR FREQUENCY (kHZ)
CLASS D FREQUENCY (kHZ)
GND
Fixed-frequency modulation with f
= 1200
= 1440
Fixed-frequency modulation with f
Fixed-frequency modulation with f
= 300
= 360
OSC
OSC
OSC
OSC
Unconnected Fixed-frequency modulation with f
V
Spread-spectrum modulation with f
= 1200 ±30
Spread-spectrum modulation with f
= 300 ±7.5
OSC
DD
OSC
Fixed-frequency modulation with f
frequency
= external clock
Fixed-frequency modulation with f
frequency/4
= external clock
OSC
OSC
Clocked
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MAX9768
10W Mono Class D Speaker
Amplifier with Volume Control
cy. Above a few megahertz, the wideband spectrum looks
like white noise for EMI purposes. A proprietary amplifier
topology ensures this does not corrupt the noise floor in
the audio bandwidth.
Efficiency
Efficiency of a Class D amplifier is due to the switching
operation of the output stage transistors. In a Class D
amplifier, the output transistors act as current-steering
switches and consume negligible additional power. Any
power loss associated with the Class D output stage is
External Clock Mode
The SYNC input allows the MAX9768 to be synchronized
to an external clock, or another Maxim Class D ampli-
fier, creating a fully synchronous system, minimizing clock
intermodulation, and allocating spectral components of
the switching harmonics to insensitive frequency bands.
Applying a clock signal between 1MHz and 1.6MHz to
SYNC synchronizes the MAX9768. The Class D switching
frequency is equal to one-fourth the SYNC input frequency.
2
mostly due to the I R loss of the MOSFET on-resistance,
and quiescent-current overhead.
The theoretical best efficiency of a linear amplifier is 78%,
however, that efficiency is only exhibited at peak output
power. Under normal operating levels (typical music
reproduction levels), efficiency falls below 30%, whereas
the MAX9768 still exhibits > 80% efficiencies under the
same conditions (Figure 2).
SYNCOUT is equal to the SYNC input frequency and
allows several Maxim amplifiers to be cascaded. The
synchronized output minimizes interference due to clock
intermodulation caused by the switching spread between
single devices. The modulation scheme remains the same
when using SYNCOUT, and audio reproduction is not
affected (Figure 1). Current flowing between SYNCOUT
of a master device and SYNC of a slave device is low as
the SYNC input is high impedance (typically 200kΩ).
Soft Current Limit
When the output current exceeds the soft current limit, 2A
(typ), the MAX9768 enters a cycle-by-cycle current-limit
mode. In soft current-limit mode, the output is clipped at
2A. When the output decreases so the output current
falls below 2A, normal operation resumes. The effect of
soft current limiting is a slight increase in distortion. Most
Filterless Modulation/PWM Modulation
The MAX9768 features two output modulation schemes:
filterless modulation or classic PWM, selectable through
SCLK when the device is in analog mode (ADDR2 and
EFFICIENCY vs. OUTPUT POWER
100
2
ADDR1 = GND, Table 2) or through the I C interface
MAX9768
90
(Table 7). Maxim’s unique, filterless modulation scheme
eliminates the LC filter required by traditional Class D
amplifiers, reducing component count, conserving board
space and system cost. Although the MAX9768 meets
FCC and other EMI limits with a low-cost ferrite bead filter,
many applications still may want to use a full LC-filtered
output. If using a full LC filter, the performance is best with
the MAX9768 configured for classic PWM output.
80
70
60
CLASS AB
50
40
30
20
10
0
PV = 12V
DD
Switching between schemes while in normal operating
f = 1kHz
IN
R = 8Ω
L
2
mode with the I C interface, the output is not click-and-
pop protected. To have click-and-pop protection when
switching between output schemes, the device must enter
shutdown mode and be configured to the new output
scheme before the startup sequence is terminated.
0
2
4
6
8
10
OUTPUT POWER (W)
The startup time for the MAX9768 is typically 220ms. The
startup time for the MAX9768B is typically 15ms.
Figure 2. MAX9768 Efficiency vs. Class AB Efficiency
Table 2. Modulation Scheme Selection In Analog Mode
ADDR2
ADDR1
SDA/VOL
SCLK
FUNCTION
0
0
0
0
Analog Volume Control
Analog Volume Control
0
1
Filterless Modulation
Classic PWM (50% Duty Cycle)
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MAX9768
10W Mono Class D Speaker
Amplifier with Volume Control
applications will not enter soft current-limit mode unless
the speaker or filter creates impedance nulls below 8Ω.
Volume Control
The volume control operates from either an analog volt-
age input or through the I C interface. The volume control
has 64 levels, with the lowest setting equal to mute.
2
Hard Current Limit
When the output current exceeds the hard current limit,
2.5A (typ), the MAX9768 disables the outputs and initiates
a startup sequence. This startup sequence takes 220ms
for the MAX9768 and 15ms for the MAX9768B. The shut-
down and startup sequence is repeated until the output
fault is removed. When in hard current limit, the output may
make a soft clicking sound. The average supply current is
relatively low, as the duty cycle of the output short is brief.
Most applications will not enter hard current-limit mode
unless the output is short circuited or incorrectly connected.
To set the device to analog mode, connect ADDR1 and
ADDR2 to GND. In analog mode, SDA/VOL is an analog
input for volume control, see the Functional Diagram/
Typical Application Circuit. The analog input range is
ratiometric between 0.9 x V
and 0.1 x V , where 0.9
DD
DD
x V
= full mute and 0.1 x V
= full volume (Table 6).
DD
2
DD
In I C mode, volume control for the speaker is controlled
separately by the command register (see Table 4, Table
5, and Table 6). See the Write Data Format section for
more information regarding formatting data and tables to
set volume levels.
Thermal Shutdown
When the die temperature exceeds the thermal shutdown
threshold, +150°C (typ), the MAX9768 outputs are dis-
abled. When the die temperature decreases below +135°C
(typ), normal operation resumes. The effect of thermal shut-
down is an output signal turning off for approximately 3s in
most applications, depending on the thermal time constant
of the audio system. Most applications should never enter
thermal shutdown. Some of the possible causes of thermal
shutdown are too low of a load impedance, high ambient
temperature, poor PCB layout and assembly, or excessive
output overdrive.
2
I C Interface
2
The MAX9768 features an I C 2-wire serial interface con-
sisting of a serial data line (SDA) and a serial clock line
(SCL). SDA and SCL facilitate communication between
the MAX9768 and the master at clock rates up to 400kHz.
2
When the MAX9768 is used on an I C bus with multiple
devices, the V
2
supply must stay powered on to ensure
DD
proper I C bus operation. The master, typically a micro-
controller, generates SCL and initiates data transfer on the
bus. Figure 3 shows the 2-wire interface timing diagram.
A master device communicates to the MAX9768 by trans-
mitting the proper address followed by the data word.
Each transmit sequence is framed by a START (S) or
Shutdown
The MAX9768 features a shutdown mode that reduces
power consumption and extends battery life. Driving SHDN
low places the device in low-power (0.5μA) shutdown
mode. Connect SHDN to digital high for normal opera-
tion. In shutdown mode, the outputs are high impedance,
SYNCOUT is pulled high, the BIAS voltage decays to zero,
and the common-mode input voltage decays to zero. The
REPEATED START (S ) condition and a STOP (P) condi-
r
tion. Each word transmitted over the bus is 8 bits long and
is always followed by an acknowledge clock pulse.
The MAX9768 SDA line operates as both an input and an
open-drain output. A pullup resistor, greater than 500Ω, is
required on the SDA bus. The MAX9768 SCL line oper-
ates as an input only. A pullup resistor, greater than 500Ω,
is required on SCL if there are multiple masters on the
bus, or if the master in a single-master system has an
open-drain SCL output. Series resistors in line with SDA
and SCL are optional. The SCL and SDA inputs suppress
noise spikes to assure proper device operation even on
a noisy bus.
2
I C register does not retain its contents during shutdown.
Undervoltage Lockout (UVLO)
The MAX9768 features an undervoltage lockout protection
that shuts down the device if either of the supplies are too
low. The device will go into shutdown if V
is less than
is less than 4V (PV
DD DD
DD
2.5V (V
UVLO = 2.5V) or if PV
DD
UVLO = 4V).
Mute Function
Bit Transfer
The MAX9768 features a clickless/popless mute mode.
When the device is muted, the outputs do not stop
switching, only the volume level is muted to the speaker.
To mute the MAX9768, drive MUTE to logic-high. MUTE
should be held high during system power-up and power-
down to ensure optimum click-and-pop performance.
One data bit is transferred during each SCL cycle. The data
on SDA must remain stable during the high period of the
SCL pulse. Changes in SDA while SCL is high are control
signals (see the START and STOP Conditions section).
2
SDA and SCL idle high when the I C bus is not busy.
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MAX9768
10W Mono Class D Speaker
Amplifier with Volume Control
SDA
SCL
t
BUF
t
t
SU,STA
SU,DAT
t
t
SP
HD,STA
t
SU,STO
t
t
HD,DAT
LOW
t
HIGH
t
HD,STA
t
t
F
R
START
CONDITION
REPEATED
START
STOP
START
CONDITION CONDITION
CONDITION
Figure 3. 2-Wire Serial-Interface Timing Diagram
(10010). The second is a 2-bit field, which is set through
ADDR2 and ADDR1 (externally connected as logic-high
or low). Third field is a R/W flag bit. Set R/W = 0 to write to
the slave. A representation of the slave address is shown
in Table 3.
START and STOP Conditions
A master device initiates communication by issuing a
START condition. A START condition is a high-to-low
transition on SDA with SCL high. A STOP condition
is a low-to-high transition on SDA while SCL is high
(Figure 4). A START (S) condition from the master signals
the beginning of a transmission to the MAX9768. The
master terminates transmission, and frees the bus, by
issuing a STOP (P) condition. The bus remains active if a
REPEATED START (Sr) condition is generated instead of
a STOP condition.
When ADDR1 and ADDR2 are connected to GND, serial
interface communication is disabled. Table 4 summarizes
the slave address of the device as a function of ADDR1
and ADDR2.
Acknowledge
The acknowledge bit (ACK) is a clocked 9th bit that the
MAX9768 uses to handshake receipt each byte of data
(Figure 5). The MAX9768 pulls down SDA during the mas-
ter-generated 9th clock pulse. The SDA line must remain
stable and low during the high period of the acknowledge
clock pulse. Monitoring ACK allows for detection of unsuc-
cessful data transfers. An unsuccessful data transfer
occurs if a receiving device is busy or if a system fault has
occurred. In the event of an unsuccessful data transfer, the
bus master can reattempt communication.
Early STOP Conditions
The MAX9768 recognizes a STOP condition at any point
during data transmission except if the STOP condition
occurs in the same high pulse as a START condition.
Slave Address
The slave address of the MAX9768 is 8 bits and consist-
S
Sr
P
Write Data Format
SCL
SDA
A write to the MAX9768 includes transmission of a START
condition, the slave address with the R/W bit set to 0 (see
Table 3), one byte of data to the command register, and
a STOP condition. Figure 6 illustrates the proper format
for one frame.
Figure 4. START, STOP, and REPEATED START Conditions
ing of 3 fields: the first field is 5 bits wide and is fixed
Maxim Integrated
│ 16
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MAX9768
10W Mono Class D Speaker
Amplifier with Volume Control
Table 3. Slave Address Block
SA7 (MSB)
SA6
SA5
SA4
SA3
SA2
SA1
SA0 (LSB)
1
0
0
1
0
ADDR2
ADDR1
R/W
Table 4. Slave Address
Table 5. Data Byte Format
ADDR2
ADDR1
SLAVE ADDRESS
Disabled
D7
(MSB)
D0
D1
D6
D5
D4
D3
D2
(LSB)
0
0
1
1
0
1
0
1
0
0
V5
V4
V3
V2
V1
V0
1001001_
1001010_
1001011_
CLOCK PULSE FOR
ACKNOWLEDGMENT
START
CONDITION
Volume Control
The command register is used to control the volume
level of the speaker amplifier. The two MSBs (D7 and
D6) should be set to 00 to choose the speaker register.
V5–V0 is the volume control data that will be written into
the addresses register to set the volume level (see Table
5 and Table 6).
SCL
1
2
8
9
NOT ACKNOWLEDGE
SDA
ACKNOWLEDGE
For a write byte operation, the master sends a single byte
to the slave device (MAX9768). This is done as follows:
Figure 5. Acknowledge
1) The master sends a start condition.
2) The master sends the 7-bit slave ID plus a write bit
(low).
WRITE BYTE FORMAT
3) The addressed slave asserts an ACK on the data
line.
S
SLAVE ADDRESS
WR ACK
DATA
8 bits
ACK
P
4) The master sends 8 data bits.
7 bits
0
5) The active slave asserts an ACK (or NACK) on the
data line.
SLAVE ADDRESS:
DATA BYTE: GIVES A COMMAND.
EQUIVALENT TO CHIP-
SELECT LINE OF A 3-
WIRE INTERFACE.
6) The master generates a stop condition.
Applications Information
Figure 6. Write Data Format Example
Filterless Class D Operation
The MAX9768 can be operated without a filter and meet
common EMC radiation limits when the speaker leads are
less than approximately 10cm. Lengths beyond 10cm are
possible but should be verified against the appropriate
EMC standard. Select the filter-less modulation mode with
spread-spectrum modulation mode for best performance.
For longer speaker wire lengths, a simple ferrite bead and
capacitor-based filter can be used to meet EMC limits.
See Figure 7 for the correct connections of these com-
ponents. Select a ferrite bead with 100Ω to 600Ω imped-
ance, and rated for at least 1.5A. The capacitor value
will vary based on the ferrite bead chosen and the actual
Maxim Integrated
│ 17
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MAX9768
10W Mono Class D Speaker
Amplifier with Volume Control
Table 6. Speaker Volume Levels
VOLUME
POSITION
VOLUME
LEVEL (dB)
STEP SIZE
(dB)
V5
V4
V3
V2
V1
V0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40*
39
38
37
36
35
34
33
32
9.5
8.8
0.7
0.7
0.6
0.6
0.6
0.5
0.5
0.5
0.5
0.5
0.6
0.4
0.5
0.4
0.4
0.4
0.7
1.0
1.5
1.5
1.5
1.1
1.1
1.8
1.0
1.0
1.1
1.2
1.3
0.9
1.0
1.1
1
1
8.2
1
7.6
1
7.0
1
6.5
1
5.9
1
5.4
1
4.9
1
4.4
1
3.9
1
3.4
1
2.9
1
2.4
1
2.0
1
1.6
1
1.2
1
0.5
1
-0.5
-1.9
-3.4
-5.0
-6.0
-7.1
-8.9
-9.9
-10.9
-12.0
-13.1
-14.4
-15.4
-16.4
1
1
1
1
1
1
1
1
1
1
1
1
1
*Default.
Maxim Integrated
│ 18
www.maximintegrated.com
MAX9768
10W Mono Class D Speaker
Amplifier with Volume Control
Table 6. Speaker Volume Levels (continued)
VOLUME
POSITION
VOLUME
LEVEL (dB)
STEP SIZE
(dB)
V5
V4
V3
V2
V1
V0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
-17.5
-19.7
-21.6
-23.5
-25.2
-27.2
-29.8
-31.5
-33.4
-36.0
-37.6
-39.6
-42.1
-43.7
-45.6
-48.1
-50.6
-54.2
-56.7
-60.2
-62.7
-66.2
-68.7
-72.2
-74.7
-78.3
-80.8
-84.3
-86.8
-90.3
-92.8
-161.5
2.2
1.9
1.9
1.7
2.0
2.6
1.6
2.0
2.5
1.6
2.0
2.5
1.6
2.0
2.5
2.5
3.5
2.5
3.5
2.5
3.5
2.5
3.5
2.5
3.5
2.5
3.5
2.5
3.5
2.5
—
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
8
0
7
0
6
0
5
0
4
0
3
0
2
0
0
1
0 (MUTE)
—
*Default.
Maxim Integrated
│ 19
www.maximintegrated.com
MAX9768
10W Mono Class D Speaker
Amplifier with Volume Control
speaker lead length. Select the capacitor value based on
EMC performance.
ing to compensate for the rising impedance of the loud-
speaker. Without a Zobel, the filter will have a peak in its
response near the cutoff frequency. Capacitors C11 and
C12 provide additional high-frequency bypass to reduce
radiated emissions.
When doing bench evaluation without a filter or a ferrite
bead filter, include a series inductor (68μH for 8Ω load) to
model the actual loudspeaker’s behavior. If this inductance
is omitted, the MAX9768 will have reduced efficiency and
output power, as well as worse THD+N performance.
Adjustable Gain
Gain-Setting Resistors
Inductor-Based Output Filters
External feedback resistors set the gain of the MAX9768.
The output stage has an internal 20dB gain in addition to
the externally set gain. Set the maximum gain by using
Some applications will use the MAX9768 with a full induc-
tor-/capacitor-based (LC) output filter. This is common
for longer speaker lead lengths, and to gain increased
margin to EMC limits. Select the PWM output mode and
use fixed-frequency modulation mode for best audio
performance. See Figure 8 for the correct connections of
these components.
resistors R and R (Figure 9) as follows:
F
IN
R
R
F
A
= −10
V / V
V
IN
Choose R between 10kΩ and 50kΩ. Please note that the
F
The component selection is based on the load impedance
of the speaker. Table 8 lists suggested values for a variety
of load impedances.
actual gain of the amplifier is dependent on the volume
level setting. For example, with the volume control set to
+9.5dB, the amplifier gain would be 9.5dB + 20dB, assum-
Inductors L3 and L4, and capacitor C15 form the primary
output filter. In addition to these primary filter components,
other components in the filter improve its functionality.
Capacitors C13 and C14, plus resistors R6 and R7, form
a Zobel at the output. A Zobel corrects the output load-
ing R = R .
F
IN
The input amplifier can be configured into a variety of
circuits. The FB terminal is an actual operational ampli-
fier output, allowing the MAX9768 to be configured as a
summing amplifier, a filter, or an equalizer, for example.
Table 7. Setting Class D Output Modulation Scheme
D7 (MSB)
D6
1
D5
0
D4
1
D3
0
D2
1
D1
0
D0 (LSB)
FUNCTION
1
1
Classic PWM
FILTERLESS MODULATION*
1
1
0
1
0
1
1
0
*Power-on default.
BOOT_+
OUT_+
C1
0.1µF
MAX9768
C9
330pF
OUT_-
C10
330pF
C2
0.1µF
BOOT_-
Figure 7. Ferrite Bead Filter
Maxim Integrated
│ 20
www.maximintegrated.com
MAX9768
10W Mono Class D Speaker
Amplifier with Volume Control
Choose C so f
is well below the lowest frequency of
Power Supplies
IN
-3dB
interest. Use capacitors whose dielectrics have lowvoltage
coefficients, such as tantalum or aluminum electrolytic.
Capacitors with high-voltage coefficients, such as ceram-
ics, may result in increased distortion at low frequencies.
The MAX9768 has different supplies for each portion of
the device, allowing for the optimum combination of head-
room power dissipation and noise immunity. The speaker
amplifiers are powered from PV
and can range from
DD
4.5V to 14V. The remainder of the device is powered by
. Power supplies are independent of each other so
sequencing is not necessary. Power may be supplied by
separate sources or derived from a single higher source
using a linear regulator to reduce the voltage, as shown
in Figure 10.
Other considerations when designing the input filter
include the constraints of the overall system and the
actual frequency band of interest. Although high-fidelity
audio calls for a flat-gain response between 20Hz and
20kHz, portable voice-reproduction devices such as cellu-
lar phones and two-way radios need only concentrate on
the frequency range of the spoken human voice (typically
300Hz to 3.5kHz). In addition, speakers used in portable
devices typically have a poor response below 300Hz.
Taking these two factors into consideration, the input
filter may not need to be designed for a 20Hz to 20kHz
response, saving both board space and cost due to the
use of smaller capacitors.
V
DD
Component Selection
Input Filter
An input capacitor, C , in conjunction with the input resis-
IN
tor of the MAX9768 forms a highpass filter that removes
the DC bias from an incoming signal. The AC-coupling
capacitor allows the amplifier to automatically bias the
signal to an optimum DC level. Assuming zero source
impedance, the -3dB point of the highpass filter is given by:
BIAS Capacitor
BIAS is the output of the internally generated DC bias
voltage. The BIAS bypass capacitor, C
, improves
1
BIAS
f
=
− 3dB
PSRR and THD+N by reducing power supply and other
noise sources at the common-mode bias node. Bypass
BIAS with a 2.2μF capacitor to GND.
2πR C
IN IN
BOOT_+
OUT_+
4
C1
0.1µF
L4
L3
1, 2
MAX9768
C11
C12
C13
R6
C15
R
L
OUT_-
14, 18
15
C2
0.1µF
C14
R7
BOOT_-
Figure 8. Output Filter for PWM Mode
Table 8. Suggested Values for LC filter
R (Ω)
L3, L4 (µH)
C15 (µF)
0.33
C11, C12 (µF)
0.01
R6, R7 (Ω)
C13, C14 (µF)
0.68
L
6
8
15
22
33
7.5
10
15
0.22
0.01
0.47
12
0.1
0.01
0.33
Maxim Integrated
│ 21
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MAX9768
10W Mono Class D Speaker
Amplifier with Volume Control
12V
BOOT+
OUT+
AUDIO
INPUT
C
IN
R
IN
IN
PV
DD
MAX9768
IN
1µF
1µF
OUT
3.3V
SHDN
V
DD
MAX9768
R
F
MAX1726
FB
OUT-
GND
BOOT-
GND
Figure 10. Using a Linear Regulator to Produce 3.3V from a
12V Power Supply
Figure 9. Setting Gain
Bypass V
and PV
with a 1μF capacitor to PGND.
Supply Bypassing, Layout, and Grounding
DD
DD
Place the bypass capacitors as close to the MAX9768
as possible. Place a bulk capacitor between PV
PGND, if needed.
Proper layout and grounding are essential for optimum
performance. Use large traces for the power-supply
inputs and amplifier outputs to minimize losses due to
parasitic trace resistance. Large traces also aid in moving
heat away from the package. Proper grounding improves
audio performance, minimizes crosstalk between chan-
nels, and prevents any switching noise from coupling into
the audio signal. Connect PGND and GND together at a
single point on the PCB. Route all traces that carry switch-
ing transients away from GND and the traces/components
in the audio signal path.
and
DD
Use large, low-resistance output traces. Current drawn
from the outputs increase as load impedance decreases.
High output trace resistance decreases the power deliv-
ered to the load. Large output, supply, and GND traces
allow more heat to move from the MAX9768 to the air,
decreasing the thermal impedance of the circuit if possible.
Ordering Information
Package Information
For the latest package outline information and land patterns (foot-
prints), go to www.maximintegrated.com/packages. Note that
a “+”, “#”, or “-” in the package code indicates RoHS status only.
Package drawings may show a different suffix character, but the
drawing pertains to the package regardless of RoHS status.
PART
PIN-PACKAGE
24 TQFN-EP*
24 TQFN-EP*
24 TQFN-EP*
t
(ms)
ON
MAX9768ETG+
MAX9768BETG+
MAX9768BETG/V+
220
15
15
PACKAGE
TYPE
PACKAGE
CODE
DOCUMENT
NO.
Note: All devices are specified over the -40°C to +85°C
operating temperature range.
24 TQFN-EP
T2444+4
21-0139
+Denotes a lead(Pb)-free/RoHS-compliant package.
/V Denotes an automotive-qualified part,
*EP = Exposed pad.
Chip Information
PROCESS: BiCMOS
Maxim Integrated
│ 22
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MAX9768
10W Mono Class D Speaker
Amplifier with Volume Control
Revision History
REVISION
NUMBER
REVISION
DATE
PAGES
CHANGED
DESCRIPTION
0
1
2
9/07
3/08
Initial release
—
Updated package outline
Corrected various items
24, 25
11/08
2, 4, 5, 11
Converted data sheet to new template; updated globals in Electrical
Characteristics and Typical Operating Characteristics, and added new variant
(MAX9768BETG/V+) to Ordering Information
3
12/17
1‒25
4
5
7/19
Updated Table 6
18, 19
15
11/20
Updated Shutdown section
For pricing, delivery, and ordering information, please visit Maxim Integrated’s online storefront at https://www.maximintegrated.com/en/storefront/storefront.html.
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
©
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
2020 Maxim Integrated Products, Inc.
│ 23
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