MAX9987EGP [MAXIM]
+14dBm to +20dBm LO Buffers/Splitters with 【1dB Variation; + 14dBm至+ 20dBm的LO缓冲器/分配器具有±1dB的变化
| 型号： | MAX9987EGP |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | +14dBm to +20dBm LO Buffers/Splitters with 【1dB Variation |
| 文件： | 总12页 (文件大小：284K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
19-2416; Rev 0; 4/02
+14dBm to +20dBm LO Buffers/Splitters
with 1dB ꢀariation
General Description
Features
The MAX9987 and MAX9988 LO buffers/splitters each
integrate a passive two-way power splitter with high-
isolation input and output buffer amplifiers. These
buffers are designed to provide the high output
(+14dBm to +20dBm) necessary to drive the LO inputs
of high-linearity passive mixers, while offering 40dB
reverse isolation to prevent LO pulling. The MAX9987 is
internally matched for the cellular/GSM bands, and the
MAX9988 is matched for the DCS/PCS/UMTS bands.
ꢀ ±±1dB OutOuBꢀPoweBꢁVerVurPꢂ
ꢀ +±41dmBuPB+201dmBA1jOsuVblwB OutOuBꢀPowe
ꢀ ToP-WVyBꢀPoweBStlruurꢂg
ꢀ 401dBRwvweswBIsPlVurPꢂ
ꢀ MPewBuhVꢂB301dB OutOu-uP- OutOuBIsPlVurPꢂ
ꢀ LPoB OutOuBNPrsw:B-±701dc/HzBVuB+±71dm
ꢀ ±60mABSOttlyBCOeewꢂuBVuB+±71dm
ꢀ ESDBꢀePuwcurPꢂ
The typical application circuit provides a nominal
+17dBm output power with 1dB variation over supply,
temperature, and input power. With two optional resis-
tors, the output power can be precision set from
+14dBm to +20dBm. The devices offer more than 30dB
ꢀ IsPlVuw1BꢀLLB OutOuB(+31dm)
✕
output-to-output port isolation, and are offered in 5mm
5mm 20-pin QFN packages with exposed paddle.
Applications
Ordering Information
Cellular/GSM/DCS/PCS/UMTS Base Station
Tx/Rx LO Drive
TEMꢀ
RANGE
ꢀIN-
ꢀACKAGE
FREQUENCY
RANGE
ꢀART
Base Station Main and Diversity Channels
Coherent Receivers
700MHz to
1100MHz
MAX9987EGP -40°C to 85°C 20 QFN-EP*
ISM Wireless LAN
1500MHz to
2200MHz
MAX9988EGP -40°C to 85°C 20 QFN-EP*
*EP = Exposed paddle
Wireless Local Loop
Local Multipoint Distribution Service
Point-to-Point Systems
Typical Operating Circuit and Block Diagram
RF INPUT
(1)
OUTPUT AMP
(1)
PLL BUFFER
MAX9987
MAX9988
OUTPLL
(+3dBm)
TO PLL
PRESCALER
OUT1
(+17dBm)
IF OUTPUT
(1)
IN
(+7dBm)
RF INPUT
(2)
INPUT AMP
RF LO
PASSIVE TWO-WAY
POWER SPLITTER
OUT2
(+17dBm)
IF OUTPUT
(2)
BIAS
OUTPUT AMP
(2)
BIASIN
BIASOUT
BIAS
CONTROL
NETWORK
________________________________________________________________ Maxim Integrated Products
±
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
+14dBm to +20dBm LO Buffers/Splitters
with 1dB ꢀariation
AdS LUTEBMAXIMUMBRATINGS
VCC1, VCC2, VCC3,
Continuous Power Dissipation (T = +70°C)
A
5mm 5mm 20-Pin QFN (derate 20mW/°C
✕
VCCREF to GND.................................................-0.3V to +6.0V
IN to GND...................................................-0.3V to (V
OUT1, OUT2,
OUTPLL to GND......................................-0.3V to (V
REF to GND ......................................................Source/Sink 5mA
INBIAS, OUTBIAS, to GND..................................-0.3V to +0.75V
PLLBIAS ......................................................................Sink 25mA
RF Input Power...............................................................+20dBm
+ 0.3V)
above +70°C).............................................................1600mW
CC
θ
....................................................................................50°C/W
JA
+ 0.3V)
Junction Temperature......................................................+150°C
Operating Temperature Range ...........................-40°C to +85°C
Storage Temperature Range.............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
CC
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
DCBELECTRICALBCHARACTERISTICS—MAX9987
(Typical Application Circuit, V
= 4.75V to 5.25V, input and outputs terminated in 50Ω, T = -40°C to +85°C. Typical specifications
A
CC
are for V
= 5.0V and T = +25°C.) (Note 1)
CC
A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Supply Voltage
Supply Current
V
4.75
5.00
5.25
V
CC
Low power setting
(see Table 1 for resistor values)
110
155
221
Nominal power setting
I
139
171
mA
CC
(R , R , R , and R not installed)
1
2
4
5
High power setting
(see Table 1 for resistor values)
DC ELECTRICAL CHARACTERISTICS—MAX9988
(Typical Application Circuit, V
= 4.75V to 5.25V, input and outputs terminated in 50Ω, T = -40°C to +85°C. Typical specifications
A
CC
are for V
= 5.0V and T = +25°C.) (Note 1)
CC
A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Supply Voltage
Supply Current
V
4.75
5.00
5.25
V
CC
Low power setting
(see Table 1 for resistor values)
120
162
229
Nominal power setting
I
150
175
mA
CC
(R , R , R , and R not installed)
1
2
4
5
High power setting
(see Table 1 for resistor values)
2
_______________________________________________________________________________________
+14dBm to +20dBm LO Buffers/Splitters
with 1dB ꢀariation
AC ELECTRICAL CHARACTERISTICS—MAX9987
(Typical Application Circuit, V
= 4.75V to 5.25V, 50Ω environment, +4dBm < P < +10dBm, 700MHz < f < 1100MHz,
CC
IN IN
= 5.0V, P = +7dBm, f = 900MHz, and
T
A
T
A
= -40°C to +85°C, unless otherwise noted. Typical specifications are for V
= +25°C, unless otherwise noted.) (Note 1)
CC
IN
IN
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Operating Frequency
f
700
1100
MHz
Low power setting, P = +4dBm
IN
(see Table 1 for resistor values)
14.3
Nominal power setting,
17.3
0.8
+4dBm < P < +10dBm, 4.75V < V
<
CC
IN
Output Power (Main Drivers)
P
dBm
dBm
OUTLO
5.25V, -40°C < T < +85°C
A
(R , R , R , and R not installed)
1
2
4
5
High power setting, P = +10dBm
IN
(see Table 1 for resistor values)
19.7
Output Power (PLL Driver)
Input VSWR
P
3.7
OUTPLL
VSWR
1.2:1
1.7:1
IN
Output VSWR
VSWR
OUT
V
= 5.0V, 100MHz offset
CC
Output-Noise Power Density
OUT1 to OUT2 Isolation
OUT2 to OUT1 Isolation
OUT1 to RFIN Isolation
OUT2 to RFIN Isolation
P
-152
45
dBm/Hz
dB
NOISE
(R , R , R , and R not installed)
1
2
4
5
V
= 5.0V, nominal power setting
CC
S23
S32
S12
S13
(R , R , R , and R not installed)
1
2
4
5
V
= 5.0V, nominal power setting
CC
39
dB
(R , R , R , and R not installed)
1
2
4
5
V
= 5.0V, nominal power setting
CC
48
dB
(R , R , R , and R not installed)
1
2
4
5
V
= 5.0V, nominal power setting
CC
50
dB
(R , R , R , and R not installed)
1
2
4
5
_______________________________________________________________________________________
3
+14dBm to +20dBm LO Buffers/Splitters
with 1dB ꢀariation
AC ELECTRICAL CHARACTERISTICS—MAX9988
(Typical Application Circuit, V
= 4.75V to 5.25V, 50Ω environment, +6dBm < P < +12dBm, 1500MHz < f < 2200MHz, and
CC
IN
IN
T
A
T
A
= -40°C to +85°C, unless otherwise noted. Typical specifications are for V
= +25°C unless otherwise noted.) (Note 1)
= 5.0V, P = +9dBm, f = 1800MHz, and
CC IN IN
PARAMETER
SYMBOL
CONDITIONS
MIN
1500
TYP
MAX
UNITS
Operating Frequency
f
2200
MHz
Low power setting, P = +6dBm
IN
(see Table 1 for resistor values)
14.2
Nominal power setting,
17.3
0.8
Output Power
(Main Drivers)
+6dBm < P < +12dBm, 4.75V < V
<
CC
IN
P
dBm
dBm
OUTLO
5.25V, -40°C < T < +85°C
A
(R , R , R , and R not installed)
1
2
4
5
High power setting, P = +12dBm
IN
(see Table 1 for resistor values)
19.5
3.6
Output Power
(PLL Driver)
P
OUTPLL
Input VSWR
VSWR
1.5:1
1.4:1
-152
IN
Output VSWR
VSWR
OUT
Output-Noise Power Density
P
V
V
= 5.0V, 100MHz offset
dBm/Hz
dB
NOISE
CC
CC
= 5.0V, nominal power setting
OUT1 to OUT2 Isolation
OUT2 to OUT1 Isolation
OUT1 to RFIN Isolation
OUT2 to RFIN Isolation
S23
S32
S12
S13
33
44
49
47
(R , R , R , and R not installed)
1
2
4
5
V
= 5.0V, nominal power setting
CC
dB
dB
dB
(R , R , R , and R not installed)
1
2
4
5
V
= 5.0V, nominal power setting
CC
(R , R , R , and R not installed)
1
2
4
5
V
= 5.0V, nominal power setting
CC
(R , R , R , and R not installed)
1
2
4
5
Note 1: Devices are 100% DC screened and AC production tested for functionality. Data sheet typical specifications are derived
from the average of 30 units from a typical lot, and are tested under the conditions specified for the typical specifications.
4
_______________________________________________________________________________________
+14dBm to +20dBm LO Buffers/Splitters
with 1dB ꢀariation
Typical Operating Characteristics
(V
= 5.0V, nominal bias, f = 900MHz, P = +7dBm, T = +25°C, unless otherwise noted.) (Shaded regions are outside the
IN IN A
CC
guaranteed operating range, and are provided for reference only.)
MAX9987
SUPPLY CURRENT vs. OUTPUT POWER
OUTMAIN
OUTPUT POWER vs. INPUT POWER
OUT1
OUTPUT POWER vs. INPUT POWER
OUT2
MAX9987 toc02
MAX9987 toc03
180
175
170
165
160
20
19
18
17
16
15
14
13
12
11
10
20
19
18
17
16
15
14
13
12
11
10
T
= -40°C
T = -40°C
A
A
T
= +25°C
T = +25°C
A
A
T
= +25°C AND +85°C
A
T
= +85°C
T = +85°C
A
A
155
150
T
= -40°C
A
145
140
-15 -10
-5
0
5
10
15
20
-5 -4 -3 -2 -1
0
1
2
3
4
5
6
7
8
9 10
-5 -4 -3 -2 -1
0
1
2
3 4 5 6 7 8 9 10
OUTPUT POWER (dBm)
INPUT POWER (dBm)
INPUT POWER (dBm)
OUTPUT POWER vs. FREQUENCY, OUT2
OUTPUT POWER vs. INPUT POWER, OUTPLL
5
OUTPUT POWER vs. FREQUENCY, OUT1
20
20
4
3
19
18
17
16
15
14
19
18
17
T
= +25°C
= +85°C
T
= -40°C
A
T = -40°C
A
A
T
= +25°C
= +85°C
A
2
T
= -40°C
A
1
T
= +25°C
A
0
-1
-2
-3
-4
-5
T
A
T
A
16
15
14
T
= +85°C
A
900 1000 1100
1200
-6 -4 -2
0
2
4
6
8
10
500 600 700 800
900 1000 1100
500 600 700 800
1200
INPUT POWER (dBm)
OPERATING FREQUENCY (MHz)
OPERATING FREQUENCY (MHz)
OUTPUT POWER AND SUPPLY CURRENT
OUTPUT POWER vs. FREQUENCY, PLL
vs. TEMPERATURE
OUTPUT POWER vs. SUPPLY VOLTAGE
MAX9987 toc08
MAX9987 toc09
6
18.0
17.8
17.6
17.4
17.2
17.0
16.8
16.6
16.4
16.2
16.0
162.0
161.8
161.6
161.4
161.2
161.0
160.8
160.6
160.4
160.2
160.0
18.0
17.5
17.0
16.5
16.0
15.5
15.0
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
OUT2
OUT1
T
= +25°C
T
A
= +85°C
A
5
4
3
2
1
I
CC
T
= -40°C
A
OUTPLL
P
OUT
20
14.5
14.0
0
900 1000 1100
500 600 700 800
1200
5.0 5.1 5.2
5.4
5.5
-40 -20
0
40
60
80
4.5 4.6 4.7 4.8 4.9
5.3
OPERATING FREQUENCY (MHz)
AMBIENT TEMPERATURE (°C)
SUPPLY VOLTAGE (V)
_______________________________________________________________________________________
5
+14dBm to +20dBm LO Buffers/Splitters
with 1dB ꢀariation
Typical Operating Characteristics (continued)
(V
= 5.0V, nominal bias, f = 900MHz, P = +7dBm, T = +25°C, unless otherwise noted.) (Shaded regions are outside the
IN IN A
CC
guaranteed operating range, and are provided for reference only.)
MAX9987
SMALL-SIGNAL GAIN vs. FREQUENCY
SUPPLY CURRENT vs. SUPPLY VOLTAGE
INPUT RETURN LOSS vs. FREQUENCY
170
19
18
17
16
15
14
13
0
-5
V
A
P
= 5.0V
CC
= +25°C
IN
V
A
= 5.0V
CC
= +25°C
IN
T
T
165
160
155
= -15dBm
OUT2
P = +7dBm
NOMINAL BIAS
-10
-15
-20
-25
PLL BIASED
OUT1
150
145
140
-30
-35
-40
PLL NOT BIASED
5.0 5.1 5.2
5.4
5.5
4.5 4.6 4.7 4.8 4.9
5.3
0.5
0.5
1.1
0.6
0.7
0.8
0.9
1.0
1.1
0.5
0.6
0.7
0.8
0.9
1.0
1.1
SUPPLY VOLTAGE (V)
FREQUENCY (GHz)
FREQUENCY (GHz)
OUTPUT RETURN LOSS vs. FREQUENCY
IN ISOLATION vs. FREQUENCY
OUT1 AND OUT2 ISOLATION vs. FREQUENCY
0
-20
-20
V
A
P
= 5.0V
V
A
P
= 5.0V
V
A
= 5.0V
CC
CC
= +25°C
IN
CC
-25
-2
-25
-30
-35
-40
-45
-50
-55
-60
-65
-70
T
T
= +25°C
T = +25°C
-30
-35
-40
-45
-50
-55
-60
-65
-70
-4
-6
= +7dBm
= +7dBm
P = +7dBm
IN
IN
OUT1 TO OUT2
OUT1
-8
PLL TO IN
-10
-12
-14
-16
PLL
OUT2
OUT1 TO IN
OUT2 TO IN
0.9
OUT2 TO OUT1
-18
-20
0.5
0.6
0.7
0.8
0.9
1.0
1.1
0.6
0.7
0.8
1.0
1.1
0.5
0.6
0.7
0.8
0.9
1.0
1.1
FREQUENCY (GHz)
FREQUENCY (GHz)
FREQUENCY (GHz)
OUTPUT NOISE POWER
vs. INPUT POWER
PLL ISOLATION vs. FREQUENCY
-140
-20
100MHz OFFSET
V
= 5.0V
CC
A
IN
-25
-30
-35
-40
-45
-50
-55
-60
-65
-70
T
= +25°C
= +7dBm
P
-145
-150
-155
-160
PLL TO OUT_
OUT2 TO PLL
OUT1 TO PLL
4
5
6
7
8
9
10
0.5
0.6
0.7
0.8
0.9
1.0
INPUT POWER (dBm)
FREQUENCY (GHz)
6
_______________________________________________________________________________________
+14dBm to +20dBm LO Buffers/Splitters
with 1dB ꢀariation
Typical Operating Characteristics (continued)
(V
= 5.0V, nominal bias, f = 1800MHz, P = +7dBm, T = +25°C, unless otherwise noted.) (Shaded regions are outside the
IN IN A
CC
guaranteed operating range, and are provided for reference only.)
MAX9988
SUPPLY CURRENT vs. OUTPUT POWER
OUTPUT POWER vs. INPUT POWER, OUT1
OUTPUT POWER vs. INPUT POWER, OUT2
180
175
170
165
160
155
150
145
140
20
19
18
17
16
15
14
13
12
11
10
20
19
18
17
16
15
14
13
12
11
10
T
= -40°C
A
T
= +85°C
A
T = -40°C
A
T
= +25°C
A
T
= +25°C
A
T
= +85°C
A
T
= +25°C
A
T
= +85°C
A
T
= -40°C
A
-15 -10
-5
0
5
10
15
20
-5 -4 -3 -2 -1 0 1 2 3 4 5 6 7 8 9 10
-5 -4 -3 -2 -1
0 1 2 3 4 5 6 7 8 9 10
OUTPUT POWER (dBm)
INPUT POWER (dBm)
INPUT POWER (dBm)
OUTPUT POWER vs. INPUT POWER, OUTPLL
5
OUTPUT POWER vs. FREQUENCY, OUT1
OUTPUT POWER vs. FREQUENCY, OUT2
20
19
18
17
16
15
14
13
12
11
10
20
19
18
17
16
15
14
13
12
11
10
T
= +25°C AND +85°C
A
T
= -40°C
T
= -40°C
4
A
A
3
2
1
T = -40°C
A
T
= +25°C
T
= +25°C
A
A
T
= +85°C
A
0
T = +85°C
A
-1
-2
-3
-4
-5
-6 -4 -2
0
2
4
6
8
10
1500 1600 1700 1800 1900 2000 2100 2200
OPERATING FREQUENCY (MHz)
1500 1600 1700 1800 1900 2000 2100 2200
OPERATING FREQUENCY (MHz)
INPUT POWER (dBm)
OUTPUT POWER AND SUPPLY CURRENT
OUTPUT POWER vs. SUPPLY VOLTAGE
vs. TEMPERATURE
OUTPUT POWER vs. FREQUENCY, OUTPLL
MAX9988 toc09
MAX9988 toc08
190
188
186
184
182
180
178
176
174
172
170
168
166
164
162
160
18.0
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
18.0
17.5
17.0
16.5
16.0
15.5
15.0
14.5
14.0
6
5
4
3
2
1
0
17.8
17.6
17.4
17.2
17.0
16.8
16.6
16.4
16.2
16.0
15.8
15.6
15.4
15.2
15.0
OUT2
OUT1
T
= +25°C
A
P
OUT
T
= +85°C
A
OUTPLL
T
= -40°C
A
I
CC
4.5 4.6 4.7 4.8 4.9 5.0 5.1 5.2 5.3 5.4 5.5
-40 -20
0
20
40
60
80
1500 1600 1700 1800 1900 2000 2100 2200
OPERATING FREQUENCY (MHz)
SUPPLY VOLTAGE (V)
AMBIENT TEMPERATURE (°C)
_______________________________________________________________________________________
7
+14dBm to +20dBm LO Buffers/Splitters
with 1dB ꢀariation
Typical Operating Characteristics (continued)
(V
= 5.0V, nominal bias, f = 1800MHz, P = +7dBm, T = +25°C, unless otherwise noted.) (Shaded regions are outside the
IN IN A
CC
guaranteed operating range, and are provided for reference only.)
MAX9988
SUPPLY CURRENT
vs. SUPPLY VOLTAGE
SMALL-SIGNAL GAIN vs. FREQUENCY
INPUT RETURN LOSS vs. FREQUENCY
18
17
16
15
14
13
12
11
10
-6
-8
180
175
170
165
160
155
150
V
T
= 5.0V
V
T
= 5.0V
CC
CC
= +25°C
= +25°C
A
P
A
= -15dBm
P
= +7dBm
IN
IN
OUT2
NORMAL BIAS
-10
-12
-14
-16
-18
-20
PLL BIASED
OUT1
PLL NOT BIASED
4.5 4.6 4.7 4.8 4.9 5.0 5.1 5.2 5.3 5.4 5.5
SUPPLY VOLTAGE (V)
1.5 1.6 1.7 1.8 1.9 2.0 2.1 2.2
FREQUENCY (GHz)
1.5 1.6 1.7 1.8 1.9 2.0 2.1 2.2
FREQUENCY (GHz)
OUTPUT RETURN LOSS vs. FREQUENCY
OUT TO IN ISOLATION vs. FREQUENCY
OUT TO OUT ISOLATION vs. FREQUENCY
0
-5
-15
-15
-20
-25
-30
-35
-40
-45
-50
-55
-60
-65
V
T
= 5.0V
V
T
= 5.0V
V
T
= 5.0V
CC
CC
CC
-20
-25
-30
-35
-40
-45
-50
-55
-60
-65
= +25°C
= +25°C
= +25°C
A
A
A
P
= +7dBm
P
= +7dBm
P
= +7dBm
IN
IN
IN
OUTPLL
-10
-15
-20
-25
-30
-35
-40
PLL TO IN
OUT1 TO OUT2
OUT2
OUT2 TO IN
OUT2 TO OUT1
OUT1
OUT1 TO IN
1.5 1.6 1.7 1.8 1.9 2.0 2.1 2.2
FREQUENCY (GHz)
1.5 1.6 1.7 1.8 1.9 2.0 2.1 2.2
FREQUENCY (GHz)
1.5 1.6 1.7 1.8 1.9 2.0 2.1 2.2
FREQUENCY (GHz)
PLL ISOLATION vs. FREQUENCY
OUTPUT NOISE vs. INPUT POWER
0
-5
-140
-145
-150
-155
-160
V
A
P
= 5.0V
100MHz OFFSET
CC
= +25°C
IN
T
= +7dBm
-10
-15
-20
-25
-30
-35
-40
-45
-50
PLL TO OUT_
OUT2 TO PLL
OUT1 TO PLL
1.5 1.6 1.7 1.8 1.9 2.0 2.1 2.2
FREQUENCY (GHz)
4
5
6
7
8
9
10
INPUT POWER (dBm)
8
_______________________________________________________________________________________
+14dBm to +20dBm LO Buffers/Splitters
with 1dB ꢀariation
Pin Description
PIN
NAME
FUNCTION
1, 4, 8, 9, 13,
17, 18, EP
GND
Ground
2
3
IN
Input. Internally matched 50Ω RF input. AC couple to this pin.
Supply. Supply connection for on-chip voltage and current references. See Applications Information
for information on decoupling.
VCCREF
Voltage Reference Output. Output for on-chip 1.5V bandgap voltage reference. See
Applications Information section for information on decoupling.
5
6
REF
Bias Connection for Input Buffer. Set compressed power point for input amplifier with a resistor to
REF or GND. For +17dBm output power, no external biasing resistors are required. See Applications
Information section for information.
BIASIN
Bias Connection for Output Amplifiers. Set compressed power point for OUT1 and OUT2 with a
resistor to REF or ground. For +17dBm output power, no external biasing resistors are required. See
Applications Information section for information.
7
BIASOUT
10
11, 12
14, 15
16
OUT2
VCC3
Output 2. Internally matched 50Ω RF output. AC couple to this pin.
Supply. Supply connection for OUT2.
VCC2
Supply. Supply connection for OUT1.
OUT1
Output 1. Internally matched 50Ω RF output. AC couple to this pin.
Supply. Supply connection for input amplifier.
19
VCC1
20
OUTPLL
Output PLL. Output for driving optional external PLL.
Input Amplifier
Detailed Description
A single low-noise input amplifier before the passive
splitter provides gain and isolation. The compressed
output power for this stage is controlled by the bias set-
The MAX9987/MAX9988 LO amplifiers/splitters each
consist of a single input amplifier, a two-way passive
power splitter, two separate output amplifiers, as well as
a third buffer amplifier to drive the LO’s PLL. The bias
currents for the amplifiers are adjustable through off-chip
resistors. This allows the output level to be precision set
anywhere from +14dBm to +20dBm. The PLL output is
ting resistors R or R (see Typical Application Circuit).
1
4
These resistors are not required for the nominal +17dBm
output; see Table 1 for bias resistor values to obtain
+14dBm to +20dBm output power.
The input is internally matched to 50Ω, and typical
VSWR is no more than 2:1 over all operating conditions.
Since the input is internally biased, provide a DC block
at the input pin.
preset to +3dBm (about 900mV
into 50Ω).
P-P
Power levels are typically 1dB over the full supply, input
power, frequency, and temperature range. Precision
power control is achieved by internal control circuitry.
Maintaining tight power control keeps the system engi-
neer from over specifying the LO drive in order to guar-
antee a linearity specification in the base-station mixer.
PLL Amplifier and Output
A small amount of power is tapped off from the input
amplifier’s output, and fed to a high-isolation buffer to
drive the PLL output at +3dBm. If the PLL output is not
required, it can be disabled by removing R ; disabling
3
the PLL output saves 12mA supply current.
More than 40dB isolation between the LO outputs and
the input prevents VCO pulling, and the 30dB output-
to-output isolation reduces branch-to-branch coupling.
The MAX9987 is specified from 700MHz to 1100MHz,
and the MAX9988 is specified from 1500MHz to
Passive Two-Way Splitter
The input amplifier drives an integrated power splitter.
All impedance matching between stages is on-chip, so
no external tuning components are required.
✕
2200MHz. Both are offered in compact 5mm 5mm 20-
pin QFN packages with exposed paddle.
_______________________________________________________________________________________
9
+14dBm to +20dBm LO Buffers/Splitters
with 1dB ꢀariation
Table 1. External Resistor Values for +14dBm to +20dBm Output Power
NOMINAL
OUTPUT POWER
(dBm)
MAX9987
INPUT DRIVE
(dBm)
MAX9988
INPUT DRIVE
(dBm)
R (Ω)
1
R (Ω)
2
R (Ω)
4
R (Ω)
5
+20
+19
+18
+17
+16
+15
+14
1.35k
2.2k
2.0k
3.0k
Open
Open
Open
Open
1.8k
Open
Open
Open
Open
3.0k
10
9
3
12
11
10
9
3
3
3
3
5.0k
6.0k
8
3
3
3
3
3
Open
Open
Open
Open
Open
Open
Open
Open
7
3
6
8
3
3
3
0.9k
1.1k
5
7
0.6k
0.6k
4
6
Applications Information
Table 2. Component Values for Typical
Application Circuit
Input and Output Matching
All input and output matching is accomplished on-chip;
no external matching circuitry is required. Use a DC
block of about 47pF (lowband) or 22pF (highband) at
the input and the outputs. Because these parts are
internally broadband matched, adjusting external com-
ponent values can optimize performance for a particu-
lar band.
COMPONENT VALUE
DESIGNATION
MAX9987
MAX9988
(LOWBAND)
(HIGHBAND)
C1, C3, C6
100pF
100nF
C2, C4, C5, C7, C8,
C9, C12, C13, C14
47pF
22pF
Input Drive Level
In the case of the MAX9987, the typical required input
drive level is +7dBm for +17dBm output, or +10dBm for
+20dBm output. The MAX9988 uses slightly higher
input levels (see Table 1). The typical VCO cannot pro-
vide sufficient drive by itself; the typical application fol-
lows the VCO with attenuation (about +3dB), and then
with a low-noise gain block. This allows the VCO to
drive the MAX9987/MAX9988 input at the required level
without being load-pulled.
C10, C11
R1, R2, R4, R5
R3
5pF
See Table 1.
100Ω
10pF
See Table 1.
100Ω
Driver Amplifiers and Outputs
Each of the output amplifiers are similar to the input
amplifier, except they are biased higher to provide more
output power. For example, with an input power of
+10dBm, the MAX9987 can deliver +20dBm at both out-
puts. The bias is adjustable; see Table 1 for details.
Output Drive Level
The output drive of the MAX9987/MAX9988 is nominally
+17dBm 1dB. This is the typical application, with no
external bias-setting resistors at INBIAS and OUTBIAS.
Output power can be set from +14dBm to +20dBm by
using the bias-setting resistor values listed in Table 1.
Both RF outputs are internally matched to 50Ω, with a
typical VSWR limit of 2:1. Provide DC blocking capaci-
tors at the outputs.
Chip Information
TRANSISTOR COUNT: 89
PROCESS: BiCMOS
10 ______________________________________________________________________________________
+14dBm to +20dBm LO Buffers/Splitters
with 1dB ꢀariation
Typical Application Circuit/Pin Configuration
5.0V
5.0V
C1
MAX9987
MAX9988
C2
C3
C4
TO OUTPUT 1
C13
R3
100Ω
OUT TO PLL
(+3dBm)
C14
5.0V
20
19
18
17
16
GND
IN
VCC2
1
15
C11
C12
INPUT FROM LO
5.0V
VCC2
GND
2
3
4
5
14
13
12
11
C5
VCCREF
C6
C7
VCC3
VCC3
GND
REF
5.0V
BIAS
C10
C9
6
10
7
8
9
TO OUTPUT 2
R4*
R5*
C8
R2*
R1*
* FOR THESE VALUES, SEE TABLE 1.
FOR CAPACITOR VALUES, SEE TABLE 2.
______________________________________________________________________________________ 11
+14dBm to +20dBm LO Buffers/Splitters
with 1dB ꢀariation
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
12 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2002 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products.
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