MAXM17532_V01 [MAXIM]
4V to 42V, 100mA, Himalaya uSLIC Step-Down Power Module;型号: | MAXM17532_V01 |
厂家: | MAXIM INTEGRATED PRODUCTS |
描述: | 4V to 42V, 100mA, Himalaya uSLIC Step-Down Power Module |
文件: | 总17页 (文件大小:1018K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
EVALUATION KIT AVAILABLE
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MAXM17532
4V to 42V, 100mA, Himalaya uSLIC
Step-Down Power Module
General Description
Benefits and Features
● Easy to use
The Himalaya series of voltage regulator ICs and power
modules enable cooler, smaller, and simpler power-
supply solutions. The MAXM17532 is a high-efficiency,
synchronous, step-down DC-DC power module with inte-
grated controller, MOSFETs, compensation components,
and inductor that operates over a wide input-voltage
range. The module operates from 4V to 42V input and
delivers up to 100mA output current over a programmable
output voltage from 0.9V to 5.5V. The module significantly
reduces design complexity, manufacturing risks and offers
a true “plug and play” power supply solution, reducing the
time-to-market.
• Wide 4V to 42V Input
• Adjustable 0.9V to 5.5V Output
• ±1.75% Feedback Accuracy
• Up to 100mA Output Current
• Internally Compensated
• All Ceramic Capacitors
● High Efficiency
• Fixed-Frequency PWM
• Pulse Frequency Modulation (PFM) Mode to
Enhance Light-Load Efficiency
• Shutdown Current as Low as 1.2μA (typ)
The MAXM17532 employs peak-current-mode control
architecture. To reduce input inrush current, the device
offers a soft-start feature including the default soft-start
time of 5.1ms.
● Flexible Design
• Programmable Soft-Start and Prebias Startup
• Open-Drain Power Good Output (RESET Pin)
• Programmable EN/UVLO Threshold
● Robust Operation
The MAXM17532 is available in a low profile, compact
10-pin 2.6mm x 3mm x 1.5mm uSLIC™ package.
• Hiccup Overcurrent Protection
• Overtemperature Protection
• -40°C to +125°C Ambient OperatingTemperature /
-40°C to +150°C Junction Temperature
● Rugged
Applications
● Industrial Sensors and Encoders
● 4-20mA Current-Loop Powered Sensors
● LDO Replacement
● HVAC and Building Control
● Battery-Powered Equipment
• Complies with CISPR22 (EN55022) Class B Con-
ducted and Radiated Emissions.
• Passes Drop, Shock, and Vibration Standards–
JESD22–B103, B104, B111
uSLIC is a trademark of Maxim Integrated Products, Inc.
Ordering Information appears at end of data sheet.
Typical Application Circuit
MAXM17532
V
V
OUT
IN
24V
5V, 100mA
IN
OUT
GND
C
10µF
OUT
C
2.2µF
IN
EN/UVLO
R
1
261kΩ
RESET
RT/SYNC
LX
FB
SS
R
2
R3
69.8kΩ
49.9kΩ
MODE
C
IN
= 2.2µF: C2012X7R1H225K125AC
C
= 10µF: GRM21BR70J106K
OUT
19-100038; Rev 7; 11/20
MAXM17532
4V to 42V, 100mA, Himalaya uSLIC
Step-Down Power Module
Absolute Maximum Ratings
IN, EN/UVLO to GND............................................-0.3V to +48V
LX to GND.......................................................-0.3V to IN +0.3V
OUT to GND............................................................-0.3V to +7V
RT/SYNC, SS, FB, MODE to GND.........................-0.3V to +6V
RESET...................................................................-0.3V to +18V
Output Short-Circuit Duration....................................Continuous
Junction Temperature (Note 1)........................................+150°C
Storage Temperature Range............................ -55°C to +125°C
Lead Temperature (soldering, 10s) .................................+260°C
Soldering Temperature (reflow).......................................+260°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Package Information
PACKAGE TYPE: 10-PIN uSLIC
Package Code
M102A3+1
21-100094
90-100027
Outline Number
Land Pattern Number
THERMAL RESISTANCE FOUR-LAYER BOARD (Note 2)
Junction to Ambient (θ 30.6°C/W
)
JA
For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”,
“#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing
pertains to the package regardless of RoHS status.
Note 1: Junction temperature greater than +125°C degrades operating lifetimes
Note 2: Package thermal resistance measured on Evaluation Board, Natural convection. For detailed information on package ther-
mal considerations, refer to www.maximintegrated.com/thermal-tutorial.
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MAXM17532
4V to 42V, 100mA, Himalaya uSLIC
Step-Down Power Module
Electrical Characteristics
(V = 24V, V
= 0V, V = 0.85V, V
= 1.5V, RT/SYNC = 69.8kΩ, LX = SS = RESET = unconnected, MODE = GND; T
IN
GND
FB
EN/UVLO
A
= -40°C to +125°C, unless otherwise noted. Typical values are at T = +25°C. All voltages are referenced to GND, unless otherwise
A
noted) (Note 3)
PARAMETER
INPUT SUPPLY (IN)
Input Voltage Range
Input Shutdown Current
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
V
4
42
V
IN
I
V
V
= 0V, T = +25°C
0.67
1.2
62
2.25
µA
IN-SH
EN/UVLO
A
I
= unconnected
MODE
30
110
Q-PFM
Input Supply Current
µA
V
V
= Normal switching, V
= 0V,
MODE
FB
I
800
1100
1950
Q-PWM
= 3.3V
OUT
MODULE OUTPUT PIN (OUT)
Output Line Regulation
Accuracy
V
= 4V to 42V, V
= 0
= 3.3V,
IN
OUT
0.1
0.3
mV/V
I
LOAD
Output Load Regulation
Accuracy
Tested with I
= 0A and 100mA
OUT
= 3.3V
mV/mA
V
OUT
ENABLE/UVLO (EN/UVLO)
V
V
V
V
rising
falling
1.2
1.1
1.25
1.15
0.72
1.3
1.2
ENR
EN/UVLO
EN/UVLO
EN/UVLO
V
EN/UVLO Threshold
V
ENF
V
falling, true shutdown
= 1.3V, T = +25°C
EN-TRUESD
I
EN/UVLO Leakage Current
V
-100
-1
+100
+1
nA
EN
EN/UVLO
A
LX
V = (V
+ 1V)
GND
V
= 0V, T = +25°C,
EN
A
LX
I
LX Leakage Current
µA
LX-LKG
to (V - 1V) V
= float
IN
OUT
SOFT-START (SS)
Soft-Start Time
t
No SS cap
4.4
4.7
5.1
5
5.8
5.3
ms
µA
SS
I
V
= 0.4V
SS Charging Current
FEEDBACK (FB)
SS
SS
MODE = OPEN
MODE = GND
0.786 0.812 0.830
V
FB Regulation Voltage
V
FB-REG
0.786
-100
0.8
0.814
+120
I
FB Input Leakage Current
V
= 0.81V, T = 25°C
nA
FB
FB
A
CURRENT LIMIT
I
V
Current-Limit
100
178
mA
mA
OUT
OUT
SOURCE-LIMIT
MODE = OPEN
MODE = GND
-74
-1
-50
I
V
Current-Limit
SINK-LIMIT
OSCILLATOR (RT/SYNC)
R
R
R
R
R
= 422kΩ
= 191kΩ
= 130kΩ
= 69.8kΩ
= 45.3kΩ
85
100
220
322
600
900
120
250
350
640
973
RT
RT
RT
RT
RT
200
295
540
813
Switching Frequency
f
kHz
SW
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MAXM17532
4V to 42V, 100mA, Himalaya uSLIC
Step-Down Power Module
Electrical Characteristics (continued)
(V = 24V, V
= 0V, V = 0.85V, V
= 1.5V, RT/SYNC = 69.8kΩ, LX = SS = RESET = unconnected, MODE = GND; T
IN
GND
FB
EN/UVLO A
= -40°C to +125°C, unless otherwise noted. Typical values are at T = +25°C. All voltages are referenced to GND, unless otherwise
A
noted) (Note 3)
PARAMETER
SYMBOL
CONDITIONS
MIN
100
TYP
MAX
UNITS
Switching Frequency
Adjustable Range
See the Switching Frequency
(RT/SYNC) section for details
900
kHz
1.1 x
SYNC Input Frequency
900
kHz
ns
f
SW
SYNC Pulse Minimum
Off-Time
40
V
SYNC Rising Threshold
Hysteresis
1
1.22
0.18
1.48
SYNC-H
V
V
0.115
0.265
SYNC-HYS
Number of SYNC Pulses to
Enable Synchronization
1
Cycles
MODE
V
V
MODE PFM Threshold
MODE Hysteresis
TIMING
1.00
1.22
0.19
1.48
V
V
MODE-PFM
MODE-HYS
t
Minimum On-Time
46
90
90
94
152
98
ns
%
ON-MIN
V
= 0.98 x V
≤ 600kHz
FB
FB-REG
f
SW
D
Maximum Duty Cycle
MAX
600kHz < f
< 900kHz,
FB-REG
SW
= 0.98 x V
87
92
51
V
FB
Hiccup Timeout
ms
RESET
FB Threshold for RESET
Rising
V
V
V
rising
falling
93
90
95
92
97
94
%
%
FB-OKR
FB
FB Threshold for RESET
Falling
V
FB-OKF
FB
RESET Delay after FB
Reaches 95% Regulation
2.08
0.23
ms
V
RESET Output Level Low
I
= 1mA
RESET
RESET Output Leakage
Current
V
= 1.01 x V
, T = +25°C
1
µA
FB
FB-REG
A
THERMAL SHUTDOWN
Thermal-Shutdown Threshold
Thermal-Shutdown Hysteresis
Temperature rising
160
20
°C
°C
Note 3: All limits are 100% tested at +25°C. Limits over temperature are guaranteed by design.
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MAXM17532
4V to 42V, 100mA, Himalaya uSLIC
Step-Down Power Module
Typical Operating Characteristics
(V = 24V, V
= 1.5V, RT/SYNC = 69.8kΩ, MODE = GND, T = +25°C unless otherwise noted)
IN
EN/UVLO
A
LOAD AND LINE REGULATION
(3.3V OUTPUT, PWM MODE)
toc03
EFFICIENCY vs. LOAD CURRENT
(5V OUTPUT, PWM MODE)
EFFICIENCY vs. LOAD CURRENT
(3.3V OUTPUT, PWM MODE)
toc01
toc02
100
90
80
70
60
50
40
30
20
10
100
90
80
70
60
50
40
30
20
10
3.350
3.345
3.340
3.335
3.330
3.325
3.320
3.315
3.310
3.305
3.300
VIN = 24V
V
= 36V
IN
V
= 36V
IN
V
= 24V
V
= 24V
IN
IN
VIN = 12V
VIN = 36V
V
= 12V
IN
V
= 12V
IN
0
20
40
60
80
100
0
20
40
60
80
100
0
10 20 30 40 50 60 70 80 90 100
LOAD CURRENT (mA)
LOAD CURRENT (mA)
LOAD CURRENT (mA)
EFFICIENCY vs. LOAD CURRENT
(5V OUTPUT PFM MODE)
LOAD AND LINE REGULATION
(5V OUTPUT, PWM MODE)
EFFICIENCY vs. LOAD CURRENT
(3.3V OUTPUT PFM MODE)
toc06
toc04
toc05
100
90
80
70
60
50
40
30
20
10
5.05
5.00
4.95
4.90
4.85
4.80
4.75
4.70
90
80
70
60
50
40
30
20
10
V
= 24V
IN
VIN = 12V
VIN = 24V
V
= 36V
VIN = 36V
VIN = 12V
IN
VIN = 24V
V
= 12V
VIN = 36V
IN
MODE = OPEN
MODE = OPEN
1
10
LOAD CURRENT (mA)
100
1
10
100
0
10 20 30 40 50 60 70 80 90 100
LOAD CURRENT (mA)
LOAD CURRENT (mA)
SOFT-START FROM EN/UVLO
(3.3V OUTPUT, 100MA LOAD CURRENT, PWM MODE)
LOAD AND LINE REGULATION
(5V OUTPUT, PFM MODE)
LOAD AND LINE REGULATION
(3.3V OUTPUT, PFM MODE)
toc07
toc08
toc09
3.50
3.45
3.40
3.35
3.30
3.25
3.20
5.20
5.15
5.10
5.05
5.00
4.95
4.90
4.85
4.80
5V/div
1V/div
VEN/UVLO
VOUT
IOUT
VIN = 12V
VIN = 24V
VIN = 36V
V
= 12V
V = 36V
IN
IN
V
= 24V
IN
50mA/div
5V/div
MODE = OPEN
80 100
VRESET
MODE = OPEN
80 100
0
20
40
60
0
20
40
60
LOAD CURRENT (mA)
1ms/div
LOAD CURRENT (mA)
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MAXM17532
4V to 42V, 100mA, Himalaya uSLIC
Step-Down Power Module
Typical Operating Characteristics (continued)
(V = 24V, V
= 1.5V, RT/SYNC = 69.8kΩ, MODE = GND, T = +25°C unless otherwise noted)
IN
EN/UVLO
A
SHUTDOWN FROM EN/UVLO
(5V OUTPUT, 100mA LOAD CURRENT, PWM MODE)
SOFT-START WITH 3V PREBIAS
SOFT-START FROM EN/UVLO
(5V OUTPUT, 100mA LOAD CURRENT, PWM MODE)
(5V OUTPUT, NO LOAD, PWM MODE)
TOC11
toc10
toc12
VEN/UVLO
5V/div
5V/div
2V/div
VEN/UVLO
5V/div
1V/di
v
VEN/UVLO
VOUT
IOUT
2V/div
VOUT
IOUT
50mA/div
5V/div
50mA/div
5V/div
5V/div
VOUT
VRESET
VRESET
VRESET
1ms/div
1ms/div
1ms/div
SOFT-START WITH 3V PREBIAS,
(5V OUTPUT, 100mA LOAD CURRENT, PWM MODE)
STEADY-STATE SWITCHING WAVEFORMS
STEADY-STATE SWITCHING WAVEFORMS
(5V OUTPUT, NO LOAD, PWM MODE)
(5V OUTPUT, 0.1A LOAD CURRENT, PWM MODE)
toc13
toc14
toc15
5V/div
V
T
(AC)
OU
V
(AC)
V
OUT
EN/UVLO
10mV/div
10mV/div
2V/div
V
I
OUT
100mA/div
OUT
5V/div
V
RESET
V
V
10V/div
LX
LX
10V/div
1ms/div
2μs/div
2μs/div
STEADY-STATE SWITCHING WAVEFORMS
SWITCHING FREQUENCY
vs. INPUT VOLTAGE
(VIN = 24V, VOUT = 5V, IOUT = 20mA, PFM)
AVERAGE CURRENT LIMIT
toc17
toc16
toc18
240
230
220
210
200
190
180
170
160
630
620
610
600
590
580
570
560
TEMP =
85°C
V
(AC)
OUT
50mV/div
(AC-
COUPLED)
-40°C
25°C
85°C
TEMP =
TEMP = -40°C
25°C
10V/div
V
LX
0
5
10 15 20 25 30 35 40 45
INPUT VOLTAGE (V)
0
5
10 15 20 25 30 35 40 45
INPUT VOLTAGE (V)
10µs/div
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MAXM17532
4V to 42V, 100mA, Himalaya uSLIC
Step-Down Power Module
Typical Operating Characteristics (continued)
(V = 24V, V
= 1.5V, RT/SYNC = 69.8kΩ, MODE = GND, T = +25°C unless otherwise noted)
IN
EN/UVLO
A
LOAD CURRENT TRANSIENT RESPONSE
SHUTDOWN CURRENT
vs. INPUT VOLTAGE
(VIN = 24V, VOUT = 5V, IOUT = 0.05A TO 0.1A)
toc19
toc20
3.0
2.5
2.0
1.5
1.0
0.5
50mV/div
(AC
V
OUT
COUPLED)
25°
TEMP = 25°C
I
50mA/div
OUT
0.0
0
7
14
21
28
35
42
100µs/div
INPUT VOLTAGE (V)
LOAD CURRENT TRANSIENT RESPONSE
LOAD CURRENT TRANSIENT RESPONSE
(VIN = 24V, VOUT = 3.3V, IOUT = 0.05A TO 0.1A)
(VIN = 24V, VOUT = 5V, IOUT = 0A TO 0.05A)
toc22
toc21
50mV/div
(AC
V
OUT
V
50mV/div
(AC
OUT
COUPLED)
COUPLED)
I
OUT
I
50mA/div
OUT
50mA/div
200µs/div
100µs/div
LOAD CURRENT TRANSIENT RESPONSE
LOAD CURRENT TRANSIENT RESPONSE
(VIN = 24V, VOUT = 5V, IOUT = 25mA to 75mA)
(VIN = 24V, VOUT = 3.3V, IOUT = 0A TO 0.05A)
toc24
toc23
50mV/div
(AC
COUPLED)
V
OUT
100mV/div
(AC-
COUPLED)
V
(AC)
OUT
50mA/div
I
OUT
I
OUT
50mA/div
200µs/div
200µs/div
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MAXM17532
4V to 42V, 100mA, Himalaya uSLIC
Step-Down Power Module
Typical Operating Characteristics (continued)
(V = 24V, V
= 1.5V, RT/SYNC = 69.8kΩ, MODE = GND, T = +25°C unless otherwise noted)
IN
EN/UVLO
A
EXTERNAL SYNCHRONIZATION
WITH 900kHz CLOCK FREQUENCY
(VIN = 24V, VOUT = 5V, IOUT = 0.1A)
LOAD CURRENT TRANSIENT RESPONSE
(VIN = 24V, VOUT = 3.3V, IOUT = 20mA to 75mA)
toc26
toc25
100mV/div
V
V
(AC)
10V/div
2V/div
LX
OUT
(AC-
COUPLED)
50mA/div
I
OUT
V
SYNC
200µs/div
2µs/div
OVERLOAD PROTECTION
OVERLOAD PROTECTION
toc28
toc27
2V/div
V
OUT
LX
I
100mA/div
OUT
20V/div
40µs/div
20ms/div
BODE PLOT
BODE PLOT
(VIN = 24V, VOUT = 3.3V, IOUT = 0.1A)
(VIN = 24V, VOUT = 5V, IOUT = 0.1A)
toc29
toc30
40
30
20
10
0
80
40
30
20
10
0
80
PHASE
PHASE
70
60
50
40
30
20
10
0
70
60
50
40
30
20
10
0
GAIN
GAIN
-10
-20
-30
-40
-10
-20
-30
-40
f
= 26.4kHz,
CR
f
= 22.3kHz,
CR
PHASE MARGIN = 59.8°
-10
-20
PHASE MARGIN = 65.2°
4
5
3
10
10
10
4
3
5
10
10
10
FREQUENCY (Hz)
FREQUENCY (Hz)
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MAXM17532
4V to 42V, 100mA, Himalaya uSLIC
Step-Down Power Module
Pin Configuration
TOP VIEW
1
2
10 IN
LX
GND
+
9
EN/UVLO
MAXM17532
3
4
MODE
RESET
OUT
8
7
RT/SYNC
SS
5
6
FB
‘+’ INDICATES PIN 1 OF THE MODULE
Pin Description
PIN NAME
PIN #
FUNCTION
Switching Node. LX is high impedance when the device is in shutdown. Do not connect any external
components to this pin.
LX
1
Ground. Connect GND to the power ground plane. Connect all the circuit ground connections together
at a single point. See the PCB Layout Guidelines section.
GND
2
3
PFM/PWM Mode Selection Input. Connect MODE to GND to enable the fixed-frequency PWM. Leave
MODE unconnected for light-load PFM operation.
MODE
Open-Drain Reset Output. Pull up RESET to an external power supply less than or equal to 16V with
an external resistor. RESET pulls low if FB drops below 92% of its set value. RESET goes high 2ms
after FB rises above 95% of its set value.
RESET
4
Module output pin. Connect a capacitor from OUT to GND. See the PCB Layout Guidelines section
for more connection details.
OUT
FB
5
6
7
Output Feedback Connection. Connect FB to a resistor-divider between OUT and GND to set the
output voltage.
Soft-Start Capacitor Input. Connect a capacitor from SS to GND to set the soft-start time. Leave SS
unconnected for default 5.1ms internal soft-start.
SS
Oscillator Timing Resistor Input. Connect a resistor from RT/SYNC to GND to program the switching
frequency from 100kHz to 900kHz. See the Switching Frequency (RT/SYNC) section for details. An
external pulse can be applied to RT/SYNC through a coupling capacitor to synchronize the internal
clock to the external pulse frequency.
RT/SYNC
8
Active-High, Enable/Undervoltage-Detection Input. Pull EN/UVLO to GND to disable the module
output. Connect EN/UVLO to IN for always-on operation. Connect a resistor-divider between IN, EN/
UVLO, and GND to program the input voltage at which the module is enabled and turns on.
EN/UVLO
IN
9
Power Module Input. Connect a ceramic capacitor from IN to GND for bypassing. Place the capacitor
close to the IN and PGND pins. See Table 1 for more details.
10
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MAXM17532
4V to 42V, 100mA, Himalaya uSLIC
Step-Down Power Module
Functional Diagram
MAXM17532
IN
LDO
V
CC_INT
HIGH-SIDE DRIVER
OSCILLATOR
RT/SYNC
LX
V
CC_INT
MODE
PEAK
CURRENT
MODE
CONTROLLER
100µH
OUT
1.22V
1.25V
EN/UVLO
LOW-SIDE DRIVER
GND
SS
RESET
FB
PGOOD LOGIC
0.76V
voltage. The error voltage is compared to a sum of the
current-sense voltage and a slope-compensation voltage
by a PWM comparator to set the “on-time.” During the
on-time of the pMOSFET, the inductor current ramps up.
For the remainder of the switching period (off-time), the
pMOSFET is kept off and the low-side nMOSFET turns
on. During the off-time, the inductor releases the stored
energy as the inductor current ramps down, providing cur-
rent to the output. Under overload conditions, the cycle-
by-cycle current- limit feature limits inductor peak current
by turning off the high-side pMOSFET and turning on the
low-side nMOSFET.
Detailed Description
The MAXM17532 high-voltage, synchronous step-down
power module with integrated MOSFETs and inductor,
operates over a 4V to 42V input voltage range. The mod-
ule can deliver output current up to 100mA at output volt-
ages of 0.9V to 5.5V. The feedback voltage is accurate to
within ±1.75% over -40°C to +125°C.
The device uses an internally-compensated, peak cur-
rent mode control architecture. On the rising edge of
the internal clock, the high-side pMOSFET turns on. An
internal error amplifier compares the feedback voltage to
a fixed internal reference voltage and generates an error
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MAXM17532
4V to 42V, 100mA, Himalaya uSLIC
Step-Down Power Module
Undervoltage-Lockout Level section for details. If input
UVLO programming is not desired, connect EN/UVLO to
IN (see the Electrical Characteristics table for EN/UVLO
rising and falling-threshold voltages). Driving EN/UVLO
low disables both power MOSFETs, as well as other inter-
nal circuitry, and reduces IN quiescent current to below
1.2μA. The SS capacitor is discharged with an internal
pulldown resistor when EN/UVLO is low. If the EN/UVLO
pin is driven from an external signal source, a series
resistance of minimum 1kΩ is recommended to be placed
between the signal source output and the EN/UVLO pin,
to reduce voltage ringing on the line.
Mode Selection (MODE)
The device features a MODE pin for selecting either
forced-PWM or PFM mode of operation. If the MODE pin
is left unconnected, the device operates in PFM mode
at light loads. If the MODE pin is grounded, the device
operates in a constant-frequency forced-PWM mode at all
loads. The mode of operation cannot be changed on-the
fly during normal operation of the device.
In PWM mode, the inductor current is allowed to go
negative. PWM operation is useful in frequency-sensitive
applications and provides fixed switching frequency at
all loads. However, the PWM mode of operation gives
lower efficiency at light loads compared to PFM mode of
operation.
Switching Frequency (RT/SYNC)
Switching frequency of the device can be programmed
from 100kHz to 900kHz by using a resistor connected
PFM mode disables negative inductor current and addi-
tionally skips pulses at light loads for high efficiency. In
PFM mode, the inductor current is forced to a fixed peak
of 72mA (typ) (IPFM) every clock cycle until the output
rises to 102% (typ) of the nominal voltage. Once the
output reaches 102% (typ) of the nominal voltage, both
high-side and low-side FETs are turned off and the device
enters hibernation mode until the load discharges the
output to 101% (typ) of the nominal voltage. Most of the
internal blocks are turned off in hibernation mode to save
quiescent current. Once the output falls below 101% (typ)
of the nominal voltage, the device comes out of hiberna-
tion mode, turns on all internal blocks, and again com-
mences the process of delivering pulses of energy to the
output until it reaches 102% (typ) of the nominal output
voltage. The device naturally exits PFM mode when the
inductor peak current increases to a magnitude approxi-
mately equal to IPFM.
from RT/SYNC to GND. The switching frequency (f
is related to the resistor connected at the RT/SYNC pin
)
SW
(R ) by the following equation, where R is in kΩ and f
T
T
SW
is in kHz:
42000
R
=
T
f
SW
MAXM17532
47pF
RT/SYNC
CLOCK
SOURCE
R
T
Enable Input (EN/UVLO) and Soft-Start (SS)
When EN/UVLO voltage increases above 1.25V (typ), the
device initiates a soft-start sequence and the duration of
the soft-start depends on the status of the SS pin voltage
at the time of power-up. If the SS pin is not connected, the
device uses a fixed 5.1ms (typ) internal soft-start to ramp
up the internal error-amplifier reference. If a capacitor is
connected from SS to GND, a 5μA current source charges
the capacitor and ramps up the SS pin voltage. The SS
pin voltage is used as a reference for the internal error
amplifier. Such a reference ramp up allows the output
voltage to increase monotonically from zero to the final
set value independent of the load current.
V
LOGIC-HIGH
DUTY
V
LOGIC-LOW
Figure 1. Synchronization to an External Clock
The switching frequency in ranges of 130kHz to 160kHz
and 230kHz to 280kHz are not allowed for user pro-
gramming to ensure proper configuration of the internal
adaptive-loop compensation scheme.
External Synchronization
EN/UVLO can be used as an input voltage UVLO adjust-
ment input. An external voltage-divider between IN and
EN/UVLO to GND adjusts the input voltage at which
the device turns on or off. See the Setting the Input
The RT/SYNC pin can be used to synchronize the
device’s internal oscillator to an external system clock.
The external clock should be coupled to the RT/SYNC
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MAXM17532
4V to 42V, 100mA, Himalaya uSLIC
Step-Down Power Module
pin through a 47pF capacitor, as shown in Figure 1. The
external clock logic high level should be higher than 3V,
logic low level lower than 0.5V and the duty cycle of the
external clock should be in the range of 10% to 70%.
The RT resistor should be selected to set the switching
frequency 10% lower than the external clock frequency.
The external clock should be applied at least 500μs after
enabling the device for proper configuration of the internal
loop compensation.
where,
V
= Steady-state output voltage
= Maximum load current
OUT
I
f
OUT
= Switching frequency (max)
SW
D
= Maximum duty cycle
MAX
t
= Worst case minimum controllable switch on-
ON(MIN)
time (152ns).
Overcurrent Protection (OCP), Hiccup Mode
Reset Output (RESET)
The device implements a HICCUP-type overload protec-
tion scheme to protect the inductor and internal FETs
under output short-circuit conditions. When the overcur-
rent event occurs, the part enters hiccup mode. In this
mode, the part is initially operated with hysteretic cycle-
by-cycle peak-current limit that continues for a time period
equal to twice the soft-start time. The part is then turned
off for a fixed 51ms hiccup timeout period. This sequence
of hysteretic inductor current waveforms, followed by a
hiccup timeout period, continues until the short/overload
on the output is removed. Since the inductor current is
bound between two limits, inductor current runway never
happens.
The device includes an open-drain RESET output to
monitor output voltage. RESET should be pulled up with
an external resistor to the desired external power supply
less than or equal to 16V. RESET goes high impedance
2ms after the output rises above 95% of its nominal set
value and pulls low when the output voltage falls below
92% of the set nominal output voltage. RESET asserts
low during the hiccup timeout period.
Startup Into a Pre-biased Output
The device supports monotonic startup into a pre-biased
output. When the module starts into a pre-biased output,
both the high-side and low-side switches are turned off
so that the module does not sink current from the output.
High-side and low-side switches do not start switching
until the PWM comparator commands the first PWM
pulse, at which point switching commences. The output
voltage is then smoothly ramped up to the target value
in alignment with the internal reference. Such a feature is
useful in applications where digital integrated circuits with
multiple rails are powered.
Thermal Shutdown
Thermal shutdown limits the total power dissipation in the
module. When the junction temperature exceeds +160°C,
an on-chip thermal sensor shuts down the device, turns
off the internal power MOSFETs, allowing the device to
cool down. The device turns on after the junction tem-
perature cools by approximately 20°C.
Application Information
Operating Input-Voltage Range
The maximum operating input voltage is determined by
the minimum controllable on-time, while the minimum
operating input voltage is determined by the maximum
duty cycle and circuit voltage drops. The minimum and
maximum operating input voltages for a given output volt-
age should be calculated as follows:
FREQUENCY RANGE
MINIMUM OUTPUT CA-
PACITANCE (µF)
(kHZ)
50
100 to 130
160 to 230
V
V
V
OUT
25
OUT
17
V
+ (I
D
× 8.6)
OUT
OUT
MAX
V
=
+ (I
× 2.5)
IN(MIN)
OUT
280 to 900
f
OUT
SW
for duty cycle, D > 0.3 : V
> 4.8× V
−
OUT
IN(MIN)
42000
Input Capacitor Selection
Small ceramic input capacitors are recommended. The
input capacitor reduces peak current drawn from the
V
OUT
× f
V
=
IN(MAX)
t
ON(MIN) SW
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MAXM17532
4V to 42V, 100mA, Himalaya uSLIC
Step-Down Power Module
power source and reduces noise and voltage ripple on
the input caused by the switching circuitry. It is recom-
mended to select the input capacitor of the module to
keep the input-voltage ripple under 2% of the minimum
input voltage, and to meet the maximum ripple-current
requirements.
V
IN
IN
MAXM17532
R1
R2
Output Capacitor Selection
EN/UVLO
Small ceramic X7R-grade output capacitors are recom-
mended for the device. The output capacitor has two
functions. It stores sufficient energy to support the output
voltage under load transient conditions and stabilizes the
device’s internal control loop. Usually the output capacitor
is sized to support a step load of 50% of the maximum
output current in the application, such that the output
voltage deviation is less than 3%. Calculate the minimum
required output capacitance from the recommended out-
put capacitance table.
GND
Figure 2. Adjustable EN/UVLO Network
It should be noted that dielectric materials used in ceramic
capacitors exhibit capacitance loss due to DC bias lev-
els and should be appropriately de-rated to ensure the
required output capacitance is obtained in the application.
VOUT
MAXM17532
Soft-Start Capacitor Selection
R4
R5
The device offers a 5.1ms internal soft-start when the SS
pin is left unconnected. When adjustable soft-start time is
required, connect a capacitor from SS to GND to program
the soft-start time. The minimum soft-start time is related
FB
to the output capacitance (C
) and the output voltage
OUT
GND
(V
) by the following equation:
OUT
t
> 0.05 x C x V
OUT OUT
SS
where t is in milliseconds and C
is in µF.
OUT
SS
Soft-start time (t ) is related to the capacitor connected
SS
at SS (C ) by the following equation:
SS
Figure 3 Circuit for Setting the Output Voltage.
C
= 6.25 x t
SS
SS
where t is in milliseconds and C is in nF.
Adjusting the Output Voltage
SS
SS
The output voltage can be programmed from 0.9V to 5.5V.
Different output voltage needs to use different switching
frequency (see Table 1). Set the output voltage by con-
necting a resistor-divider from output to FB to GND (see
Figure 3). Choose R5 in the range of 25kΩ to 100kΩ and
calculate R4 with the following equation:
Setting the Input Undervoltage-Lockout Level
The device offers an adjustable input undervoltage-lock-
out level. Set the voltage at which the device turns on with
a resistive voltage-divider connected from IN to GND (see
Figure 2). Connect the center node of the divider to EN/
UVLO. Choose R1 to be 3.3MΩ max and then calculate
R2 as follows:
V
OUT
R4 = R5×
−1
0.8
1.25×R
1
R2 =
V
−1.25
INU
where V
is the voltage at which the device is required
INU
to turn on.
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MAXM17532
4V to 42V, 100mA, Himalaya uSLIC
Step-Down Power Module
Table 1. Component Selection Table
V
(V)
V
(V)
C
f
(kHz)
R3 (kΩ)
191
R4 (kΩ)
6.19
24.9
43.2
61.9
107
R5 (kΩ)
49.9
49.9
49.9
49.9
49.9
49.9
49.9
49.9
49.9
COUT
OUT
IN
IN
SW
0.9
4 to 26
4 to 35
4 to 32
4 to 39
4 to 41
6.5 to 42
6 to 36
10 to 42
10 to 42
2 x 1μF 1206 50V X7R
2 x 2.2μF 1206 50V X7R
2 x 2.2μF 1206 50V X7R
2 x 2.2μF 1206 50V X7R
2 x 2.2μF 0805 50V X7R
1 x 1μF 0603 50V X7R
1 x 2.2μF 1206 50V X7R
1 x 2.2μF 0805 50V X7R
1 x 2.2μF 0805 50V X7R
220
2 x 10μF 0805 6.3V X7R
2 x 10μF 0805 6.3V X7R
1 x 10μF 0805 6.3V X7R
1 x 10μF 0805 6.3V X7R
1 x 10μF 0805 6.3V X7R
1 x 10μF 0805 6.3V X7R
1 x 10μF 0805 6.3V X7R
1 x 10μF 0805 6.3V X7R
1 x 10μF 0805 6.3V X7R
1.2
1.5
1.8
2.5
3.3
3.3
5
220
322
322
400
400
600
600
700
191
130
130
105
105
158
69.8
69.8
60
158
261
5.5
294
Transient Protection
In applications where fast line transients or oscilla-
tions with a slew rate in excess of 15V/µs are expect-
ed during power-up or steady-state operation, the
MAXM17532 should be protected with a series resistor
that forms a low pass filter with the input ceramic capacitor
(Figure 4). These transients can occur in conditions such
as hot-plugging from a low-impedance source or due to
inductive load switching and surges on the supply lines.
4.7Ω
IN
MAXM17532
C = 2.2µF
IN
GND
Power Dissipation
Ensure that the junction temperature of the devices do
not exceed 125°C under the operating conditions speci-
fied for the power supply. At a particular operating condi-
tion, the power losses that lead to temperature rise of the
device are estimated as follows:
Figure 4. Circuit for Transient Protection
measure the efficiency to determine the total power
dissipation. The junction temperature (T ) of the device
J
1
can be estimated at any ambient temperature (T ) from
A
P
= P
(
−1)
LOSS
OUT
η
the following equation:
P
= V
×I
OUT OUT
OUT
T = T + θ ×P
LOSS
J
A
JA
where P
is the output power, η is the efficien-
OUT
where θ is the junction-to-ambient thermal impedance
of the package.
JA
cy of power conversion. See the Typical Operating
Characteristics for the power-conversion efficiency or
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MAXM17532
4V to 42V, 100mA, Himalaya uSLIC
Step-Down Power Module
● Ensure that all feedback connections are short and
PCB Layout Guidelines
direct
Careful PCB layout (Figure 5) is critical to achieve clean
and stable operation. The switching power stage requires
particular attention. Follow these guidelines for a good
PCB layout:
● Route high-speed switching node (LX) away from the
signal pins
For a sample PCB layout that ensures the first-pass success,
refer to the MAXM17532 evaluation kit data sheet.
● Place the input ceramic capacitor as close as
possible to IN and GND pins
V
IN
V
OUT
OUT
IN
C
IN
MAXM17532
R1
R2
R6
C
OUT
R4
LX
RESET
EN/UVLO
FB
SS
RT/SYNC
R5
GND
MODE
R3
C
IN
V
PLANE
IN
GND PLANE
+
1
2
10
9
IN
LX
R1
MAXM17532
GND
EN/UVLO
RT/SYNC
R3
R2
MODE
3
4
8
RESET
7
SS
C
OUT
R6
OUT
5
6
FB
R5
R4
V
OUT
PLANE
GND PLANE
VIAS TO BOTTOM SIDE GROUND PLANE
Figure 5. Layout Guidelines
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MAXM17532
4V to 42V, 100mA, Himalaya uSLIC
Step-Down Power Module
Ordering Information
PART
TEMP RANGE
PIN-PACKAGE
10-pin uSLIC
10-pin uSLIC
MAXM17532AMB+
MAXM17532AMB+T
-40°C to +125°C
-40°C to +125°C
+Denotes a lead(Pb)-free/RoHS-compliant package.
T = Tape and reel.
Chip Information
PROCESS: BiCMOS
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MAXM17532
4V to 42V, 100mA, Himalaya uSLIC
Step-Down Power Module
Revision History
REVISION
NUMBER
REVISION
DATE
PAGES
CHANGED
DESCRIPTION
0
5/17
Initial release
—
Updated all figures, and changed package type to uSLIC. Updated Benefits and
Features, Absolute Maximum Ratings, Detailed Description, Enable Input (EN/
UVLO) and Soft-Start (SS), Operating Input-Voltage Range, Overcurrent Protection
(OCP), Hiccup Mode, and Input Capacitor Selection sections. Updated Electrical
Characteristics global characteristics, Pin Description table (pin 1 and pin 5), Table 1,
Ordering Information, and Package Information table. Updated TOC01-TOC04 and
TOC19, and added TOC22-TOC23.
1
9/17
1–16
1.1
2
Added trademark information for uSLIC
1–2, 15
1–2, 15
Updated the General Description, Applications, Benefits and Features, Absolute
Maximum Ratings sections, and Package Information and Ordering Information
table.
2/18
2.1
3
Corrected typos
1
1
3/18
4/18
Updated the General Description and Benefits and Features sections.
Updated Benefits and Features, Electrical Characteristics table, Pin Description
table, and TOC01–TOC04. Replaced Typical Application Circuit, Pin Configuration,
Functional Diagram, and Figure 5. Added Mode Selection section, new TOC05–
TOC08, TOC16 and TOC24–TOC25, and renumbered existing TOCs.
4
1, 3–10, 14
5
6
5/18
Updated the Electrical Characteristics table.
4
Updated the Absolute Maximum Ratings, Pin Description, and Reset Output
(RESET) sections
12/19
2, 9, 12
Updated Table 1, and the Output Capacitor Selection and PCB Layout Guidelines
sections
7
11/30
13‒15
For pricing, delivery, and ordering information, please visit Maxim Integrated’s online storefront at https://www.maximintegrated.com/en/storefront/storefront.html.
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
©
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
2020 Maxim Integrated Products, Inc.
│ 17
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