PHY1095 [MAXIM]

1.25Gbps High Sensitivity Transimpedance Amplifier;
PHY1095
型号: PHY1095
厂家: MAXIM INTEGRATED PRODUCTS    MAXIM INTEGRATED PRODUCTS
描述:

1.25Gbps High Sensitivity Transimpedance Amplifier

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19-5689; Rev 1/11  
PHY1095-01  
A Maxim Integrated Products Brand  
1.25Gbps High Sensitivity Transimpedance Amplifier  
Features  
-32dBm Sensitivity  
Up to 1.25Gbps (NRZ) data rates  
60nA rms typical input referred noise  
Automatic gain control  
Description  
The PHY1095 is a transimpedance amplifier  
designed for use within small form factor fibre  
optic modules targeted at Gigabit Enabled  
Passive Optical Network (GEPON) applications.  
Working from a 3.3V power supply the PHY1095  
integrates a low noise transimpedance amplifier,  
with a typical differential transimpedance of  
60k, an AGC and an output stage.  
Flexible bond pad layout and output signal  
inversion for simple ROSA layout  
Received Signal Strength Indicator output  
with selectable direction of current flow  
The RSSI pad can be used to implement a signal  
strength monitor circuit. This is designed to sink  
or source a current equal to the photodiode  
current for ease of interfacing.  
-40 to +95°C operating temperature range  
Sensitivity of -32dBm can be achieved at  
Applications  
GEPON Optical Network Unit (ONU)  
Gigabit Ethernet  
1.25Gbps using  
a
photodiode with 0.5pF  
capacitance and a responsivity of 0.8A/W at a  
wavelength of 1490nm.  
The PHY1095 is available in die form for  
mounting on a header to create a ROSA when  
combined with suitable optics and photo-detector  
diode.  
VCC  
Voltage  
Regulator  
50  
50  
Signal Detect  
& DC Restore  
PDC1/2  
R
F
RX+  
RX-  
AGC  
Amp  
O/P  
Buffer  
PDA  
GND  
Amplifier  
Signal  
Strength  
Indicator  
RSSI_DIR  
RSSI  
AGC  
DATA_INVERT  
Figure 1: Outline block diagram  
Figure 2: Device pad layout  
PHY1095-01-RD-1.1  
Datasheet  
Page 1  
1 Ordering Information  
Part Number  
Description  
Package  
PHY1095-01DS-WR  
1.25G High Sensitivity TIA  
Bare die in waffle pack  
PHY1095-01DS-FR  
1.25G High Sensitivity TIA  
Film on grip ring  
2 Pad Description  
Number  
Name  
Type  
Description  
1
GND1  
PWR  
Analog  
Analog  
Analog  
PWR  
Connect to Analog Ground  
2
3
4
5
PDC1  
PDA  
Regulated Power supply to Photodiode Cathode  
Connect to Photodiode anode, input to TIA stage  
Regulated Power supply to Photodiode Cathode  
Connect to Analog Ground  
PDC2  
GND2  
Received Signal Strength output. Sinks or sources current  
equal to PD current  
6
RSSI  
Analog Out  
7
8
VCC1  
VCC2  
RX-  
PWR  
PWR  
3.3 Volt Power supply connection  
3.3 Volt Power supply connection  
9
Analog Out Differential Analog Output pair with RX+  
10  
11  
12  
GND3  
GND4  
GND5  
GND  
GND  
GND  
Connect to Analog Ground  
Connect to Analog Ground  
Connect to Analog Ground  
Analog  
Input  
13  
DATA_INVERT  
Inverts polarity of data output pins RX+ and RX-  
14  
15  
16  
17  
18  
19  
20  
GND6  
GND7  
GND8  
RX+  
GND  
GND  
GND  
Connect to Analog Ground  
Connect to Analog Ground  
Connect to Analog Ground  
Analog Out Differential Analog Output pair with RX-  
AGC  
Analog  
PWR  
Disables AGC amplifier function when connected to GND  
VCC3  
VCC4  
3.3 Volt Power supply connection  
3.3 Volt Power supply connection  
PWR  
Selects whether RSSI output is a current sink or source.  
Open circuit is a current sink, connect to Ground for current  
source  
Analog  
Input  
21  
RSSI_DIR  
PHY1095-01-RD-1.1  
Datasheet  
Page 2  
3 Device Specifications  
3.1 Absolute Maximum Ratings  
Exceeding these limits may cause permanent damage. Correct operation under these conditions is not implied. Extended periods of  
operation under these conditions may affect device reliability.  
Parameter  
Conditions  
Min  
Max  
Unit  
Supply voltage  
-0.5  
4.0  
V
Maximum Voltage on signal pins  
Device Operating Temperature  
Storage Temperature  
-0.5  
-55  
Vcc + 0.5V  
+115  
V
Measured on Die  
°C  
°C  
°C  
150  
Die Attach Temperature  
400  
Average input current, VCC > 3.0V, PIN  
photodiode biased internally from PDC,  
ER=10dB  
3.0  
mA  
PDA Input Current1  
ESD Performance  
Ramp time of input current to maximum  
(0mA to 3mA) from initial optical input  
200  
µs  
Human Body Model (excluding PDA pin)  
Human Body Model (PDA pin)  
2.0  
0.5  
kV  
kV  
Notes: 1 See section 4.1 in case of external Vpd biasing of the photodiode  
3.2 Recommended Operating Conditions  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
Supply voltage  
3.0  
3.3  
3.6  
V
Current consumption  
Including output termination  
30  
42  
55  
95  
mA  
°C  
Ambient Operating temperature  
Photodiode Capacitance  
-40  
Photodiode bias voltage 1.8V  
1.0  
pF  
PHY1095-01-RD-1.1  
Datasheet  
Page 3  
3.3 Parametric Performance  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
High-speed data input rate  
CIN = 0.5pF  
1.25  
Gbps  
CIN = 0.5pF, Responsivity = 0.8A/W,  
BER = 10-12 ER = 10dB  
-31.5  
dBm  
Sensitivity Examples  
CIN = 0.5pF, Responsivity = 0.8A/W,  
BER = 10-10 ER = 10dB  
-32.0  
60  
dBm  
C
IN = 0.5pF, Measured into a 940MHz, 4th  
Input referred noise  
90  
nA rms  
order Bessel filter.  
Small Signal Bandwidth (-3dB)  
Low frequency cut-off  
Relative to 100MHz, CIN = 0.5pF  
Relative to +100MHz  
1MHz to 630MHz  
750  
320  
860  
25  
MHz  
kHz  
dB  
Gain Variation with Frequency  
±2  
Input current > 8µA pp  
100differential load, 1.25Gbps  
Differential Output Swing 1  
400  
480  
mVp-p  
Parameter  
Conditions  
Min  
Typ  
Max  
Unit  
Transimpedance (differential)  
Input current <8µAp-p  
50k  
60k  
70k  
Deterministic Jitter  
Overshoot  
K28.5 Pattern  
25  
50  
mUIp-p  
%
27-1PRBS (wrt to average 0/1 level)  
27-1PRBS (wrt average 0/1 level)  
DJ within spec  
±15  
±15  
Undershoot  
%
Input Overload, a.c.  
Input Overload d.c.  
AGC settling time  
1.5  
1.0  
mApp  
mA  
µs  
DJ within spec  
50  
120  
Output resistance  
Photodiode Cathode Voltage  
Photodiode Anode Voltage  
RSSI Current Accuracy  
Differential RX+ to RX-  
80  
100  
2.6  
0.8  
0.3µA photodiode current  
2.5  
2.7  
V
1.0  
V
Measured relative to photodiode current  
Source mode, IIN=0.5mA  
Sink mode, IIN=0.5mA  
±20  
%
0
1.1  
V
RSSI Compliance Voltage  
0.7  
30  
VDD-0.8  
V
Power Supply Rejection Ratio  
100kHz - 4MHz  
40  
dB  
Notes: 1 Expected load is 2 x 50 ohms  
PHY1095-01-RD-1.1  
Datasheet  
Page 4  
4 Device Description  
The PHY1095 implements a complete analog front end, converting the photo-detector current, into a  
differential analog voltage signal.  
The PHY1095 also provides a filtered bias current to the photo-detector to increase the level of component  
integration as well as the signal processing functions.  
4.1 Photodiode Connection  
The recommended method to connect a PIN photodiode to PHY1095 is using the internal voltage reference  
to bias the Photodiode as shown in figure 3. The internal reference supplies a low noise output with high  
power supply rejection to 4GHz.  
Connection of a PIN photodiode to the PDA input with an external Vpd bias supply can produce inconsistent  
sensitivity and bandwidth operation. The maximum damage level for the PDA input is reduced to <1mA when  
PDA is connected in this way.  
The voltage across the photodiode is equal to the power supply voltage, Vpdc minus the input bias voltage of  
the input of the PHY1095, equal to Vpda. The anode voltage, Vpda is sensitive to temperature and has a  
typical value of 0.8V.  
3.3V  
Vcc  
RSSI  
MON  
Internal Voltage  
Reference  
PDC1  
Vpdc  
PDA  
Vpda  
0V  
PHY1095  
Figure 3 – Photodiode biased by internal voltage regulator  
4.2 DC Cancellation  
The removal of the direct current component of the input signal is necessary to reduce the pulse width  
distortion for signals with a 50% mark density.  
The DC cancellation block provides low frequency feedback using an internally compensated amplifier,  
removing the need for external compensation capacitors.  
PHY1095-01-RD-1.1  
Datasheet  
Page 5  
4.3 Transimpedance Amplifier (TIA)  
The transimpedance (current to voltage) stage is a very low noise amplifier with a feedback resistor to set the  
gain. This stage features automatic gain control, where the transimpedance depends on the output signal  
level. This ensures that the output does not overload the subsequent stage in the signal path.  
An internal voltage regulator is used to power the front-end transimpedance amplifier in order to improve the  
rejection of power supply noise.  
4.4 Output Gain Stage  
The output gain stage features a voltage amplifier, a single ended to differential converter and a supply  
referenced differential output buffer.  
The PHY1095 has a 50single ended output impedance, which is suitable for the majority of applications.  
For optimum supply-noise rejection, the PHY1095 should be terminated differentially.  
4.5 Output Data Polarity  
The data polarity pin has an internal 8kpull-up resistor. In normal non-inverting operation, where there is no  
external connection, the pin pulls to VDD. In this mode an optical '1' gives maximum input current and a  
voltage '1' on the positive output pin Rx+. Connection of the pad to ground selects an inverted sense output.  
4.6 Received Signal Strength Indication (RSSI)  
The PHY1095 provides a RSSI output which can be used to measure the strength of the received optical  
signal. The photodiode current is proportional to the received optical power. The PHY1095 generates an  
output current which is a mirror of the photodiode current. The RSSI output is either a current sink or a  
current source.  
The direction of current flow is selected by using the RSSI_DIR bond. Leaving this bond pad unconnected  
selects a current sink, connecting this bond pad to ground selects a current source.  
An alternative method of measuring the received signal power is by using the received Optical Modulation  
Amplitude (OMA). This method is provided by the PHY1078 integrated burst mode laser driver and post  
amplifier device.  
PHY1095-01-RD-1.1  
Datasheet  
Page 6  
5 Typical Application  
VCC  
PHY1095  
PHY1078  
Voltage  
Regulator  
50  
50  
Signal Detect  
& DC Restore  
PDC1/2  
PDA  
R
F
RX+  
RX-  
RXIN+  
RXIN-  
RXOUT+  
RXOUT-  
O/P  
Buffer  
CML  
Output  
Input  
Amp  
Low Pass  
Filter  
AGC  
Amp  
Amplifier  
Signal  
Strength  
Indicator  
Overload  
GND  
RSSI  
AGC  
DATA_INVERT  
Figure 4 - Typical Application: GEPON ONU Receiver path  
Figure 4 shows a typical application for the PHY1095. In this application the output of the PHY1095 is  
connected to the Phyworks PHY1078 PON Laser Driver and Post Amplifier circuit to form the receive path for  
a fibre optic module.  
The PHY1078 provides the receive signal monitoring functions such as loss of signal and converts the input  
data into a variety of electrical formats.  
5.1 Layout and Bonding  
In order to achieve the best performance it is necessary to minimise noise pickup and to reduce the effects of  
parasitic components.  
Noise is picked up through the signal paths or through the power supply. Noise at the input of the TIA will be  
amplified and mixed with the wanted signal. This can be a result of noise pickup in the other components  
connected to the TIA input, such as the photodiode, the capacitors and the bond wires.  
Noise picked up in the signal path can be reduced by keeping bond wires short and by making sure the  
output and input bond wires are not close and are orthogonal to each other,  
Power supply noise will be present as a result of the power supply design, the quality of decoupling  
precautions and pickup in the bond wires.  
To effectively de-couple supply rail noise to ground a capacitor may be placed inside the ROSA. This should  
be placed as close as possible to the VCC pin on the TIA. This reduces the effect of the bond wire  
inductance.  
The high PSRR performance of PHY1095 enables the decoupling capacitor to be omitted and fewer ground  
bonds used without degradation to sensitivity. See Figure 6 and 7 for this low cost bonding option.  
Decoupling for supply and RSSI is recommended to be used on the optical host board.  
Noise on the power supply can also be a result of coupling between the TIA output and the power supply.  
This coupling takes place between the output bond wires and the power supply bond wires. As a result these  
must also be kept as short as possible and be routed orthogonally to each other.  
The PHY1095 provides alternative bonding options through the replication of some device inputs and  
outputs, allowing a variety of ROSA pin outs to be realised without compromising performance.  
PHY1095-01-RD-1.1  
Datasheet  
Page 7  
6 Mechanical Specifications  
6.1 TO-Can Connections  
Top-view: looking into the CD header. The diagrams below show an internal power supply decoupling  
capacitor and illustrate the optimum bondwire lengths and orientation. The value of the supply de-coupling  
capacitor should be 250 – 500 pF.  
RX-  
RX+  
Capacitor  
VCC  
Photodiode  
MON  
Figure 5 - 5 pin ROSA with decoupling  
RX-  
RX+  
RX-  
RX+  
Photodiode  
Photodiode  
VCC  
MON  
VCC  
GND  
Figure 6 – Low Cost 4 pin ROSA  
Figure 7 – Low Cost 5 pin ROSA  
PHY1095-01-RD-1.1  
Datasheet  
Page 8  
7 Pad Positions and Sizes  
Die Size:  
1100µm x 900µm  
Thickness:  
290µm +/- 10 µm  
Pad Opening: 80 µm x 80 µm measured between parallel sides  
Pad centres  
Number  
Name  
X
Y
1
2
GND1  
PDC1  
-439.5  
221.5  
-439.5  
-412.5  
-439.5  
-439.5  
-320.095  
-219.5  
-121.5  
55.09  
113  
0
3
PDA  
4
PDC2  
-113  
5
GND2  
RSSI  
-221.5  
-339.5  
-339.5  
-339.5  
-339.5  
-339.5  
-339.5  
-221.5  
-123.5  
0
6
7
VCC1  
8
VCC2  
9
AGC  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
RX-  
222.1  
GND3  
GND4  
GND5  
DATA_INVERT  
GND6  
GND7  
GND8  
RX+  
321.5  
439.5  
439.5  
439.5  
439.5  
123.5  
221.5  
339.5  
339.5  
339.5  
339.5  
339.5  
439.5  
321.5  
222.1  
VCC3  
-121.5  
-219.5  
-320.095  
VCC4  
RSSI_DIR  
Table 1: PHY1095 pad coordinates  
Figure 8: PHY1095 Die image  
PHY1095-01-RD-1.1  
Datasheet  
Page 9  
8 Contact Information  
For technical support, contact Maxim at www.maxim-ic.com/support.  
Disclaimer  
This datasheet contains preliminary information and is subject to change.  
This document does not transfer or license any intellectual property rights to the user. It does not imply any  
commitment to produce the device described and is intended as a proposal for a new device.  
Phyworks Ltd assumes no liability or warranty for infringement of patent, copyright or other intellectual  
property rights through the use of this product.  
Phyworks Ltd assumes no liability for fitness for particular use or claims arising from sale or use of its  
products.  
Phyworks Ltd products are not intended for use in life critical or sustaining applications.  
PHY1095-01-RD-1.1  
Datasheet  
Page 10  
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent  
licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.  
Maxim Integrated Products, Inc. 160 Rio Robles, San Jose, CA 95134 USA 1-408-601-1000  
2011 Maxim Integrated Products  
Maxim is a registered trademark of Maxim Integrated Products, Inc.  

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