PHY1097-03DS-FR [MAXIM]
2.5Gbps High Sensitivity Transimpedance Amplifier;
| 型号： | PHY1097-03DS-FR |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | 2.5Gbps High Sensitivity Transimpedance Amplifier |
| 文件： | 总10页 (文件大小：363K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PHY1097-03
A Maxim Integrated Products Brand
2.5Gbps High Sensitivity Transimpedance Amplifier
Features
• -29dBm Sensitivity
• Up to 2.5Gbps (NRZ) data rates
• 150nA rms typical input referred noise
Description
The PHY1097 is a transimpedance amplifier
designed for use within small form factor fibre
optic modules targeted at Gigabit capable
Passive Optical Network (GPON) applications.
• Automatic gain control of output over full input
Working from a 3.3V power supply the PHY1097
integrates a low noise transimpedance amplifier,
with a typical differential transimpedance of
25kΩ, an AGC and an output stage.
range
• Flexible bond pad layout and output signal
inversion for simple ROSA layout
• Received Signal Strength Indicator output
• -40 to +95°C operating temperature range
The RSSI pad can be used to implement a signal
strength monitor circuit. This is designed to sink
or source a current equal to the photodiode
current for ease of interfacing.
Sensitivity of -29dBm can be achieved at
2.5Gbps.
Applications
The PHY1097 is available in die form for
mounting on a header to create a ROSA when
combined with suitable optics and photo-detector
diode.
• Telecom Infrastructure OC48
• GPON Optical Network Unit (ONU)
• 2.5GEPON
VCC
Voltage
Regulator
50Ω
50Ω
Signal Detect
& DC Restore
PDC1/2
RF
RX+
RX-
AGC
Amp
O/P
Buffer
PDA
GND
Amplifier
Signal
Strength
Indicator
RSSI_DIR
RSSI
AGC DATA_INVERT
Figure 2: Device pad layout
Figure 1: Outline block diagram
PHY1097-03-RD-1.5
Datasheet
Page 1
1 Ordering Information
Part Number
Description
Package
PHY1097-03DS-WR
PHY1097-03DS-FR
PHY1097-03DS-QR
2.5G TIA
2.5G TIA
2.5G TIA
Bare die in waffle pack
Film on 10” wafer ring
Film on quarter 8” wafer ring
2 Pad Description
Number
Name
Type
Description
1
GND1
PWR
Analog
Analog
Analog
PWR
Connect to Analog Ground
2
3
4
5
PDC1
PDA
Regulated Power supply to Photodiode Cathode
Connect to Photodiode anode, input to TIA stage
Regulated Power supply to Photodiode Cathode
Connect to Analog Ground
PDC2
GND2
Received Signal Strength output. Sources current equal to
PD current
6
RSSI
Analog Out
7
8
VCC1
VCC2
RX-
PWR
PWR
3.3 Volt Power supply connection
3.3 Volt Power supply connection
9
Analog Out Differential Analog Output pair with RX+
10
11
12
GND3
GND4
GND5
GND
GND
GND
Connect to Analog Ground
Connect to Analog Ground
Connect to Analog Ground
Analog
Input
13
DATA_INVERT
Inverts polarity of data output pins RX+ and RX-
14
15
16
17
18
19
20
GND6
GND7
GND8
RX+
GND
GND
GND
Connect to Analog Ground
Connect to Analog Ground
Connect to Analog Ground
Analog Out Differential Analog Output pair with RX-
AGC
Analog
PWR
Disables AGC amplifier function when connected to GND
VCC3
VCC4
3.3 Volt Power supply connection
3.3 Volt Power supply connection
PWR
Selects whether RSSI output is a current sink or source.
Open circuit is a current sink, connect to Ground for current
source
Analog
Input
21
RSSI_DIR
PHY1097-03-RD-1.5
Datasheet
Page 2
3 Device Specifications
3.1 Absolute Maximum Ratings
Exceeding these limits may cause permanent damage. Correct operation under these conditions is not
implied. Extended periods of operation under these conditions may affect device reliability.
Parameter
Conditions
Min
Max
Unit
Supply voltage
-0.5
4.0
V
Maximum Voltage on signal pins
Device Operating Temperature
Storage Temperature
Die Attach Temperature
PDA Input Current
Vcc within the maximum rating conditions
Measured on Die
-0.5
-55
Vcc + 0.5V
+115
150
V
°C
°C
°C
mA
mA
kV
kV
For a maximum 30 secs
VCC > 3.0V
400
3.0
PDA Input current
VCC < 3.0V
2.0
ESD Performance
Human Body Model (Excluding PDA pin)
Human Body Model (PDA pin)
2.0
0.5
3.2 Recommended Operating Conditions
Parameter
Conditions
Min
Max
Unit
Supply voltage
3.0
3.3
48
3.6
V
Current consumption
Including output termination
40
60
95
mA
°C
Ambient Operating temperature
Photodiode Capacitance
-40
Photodiode bias voltage 1.8V
1.0
pF
3.3 Parametric Performance
All typical parameters are tested at 25°C and at VCC = 3.3V
Parameter
Conditions
Min
Typ
Max
Unit
High-speed data input rate
CIN = 0.5pF
2.5
Gbps
C
IN = 0.5pF, Responsivity = 0.9A/W,
Sensitivity
-29
dBm
BER = 10-10, ER = 10dB
CIN = 0.5pF, Measured into a 1.866GHz, 4th
order Bessel filter.
Input referred noise
150
200
nA rms
Cpd = 0.35pF, -3dB point at -27dBm,
Guaranteed by characterization of reference
ROSA assemblies.
Small Signal Bandwidth (-3dB)
1400
1700
MHz
Low frequency cut-off
Relative to 100MHz
25
±2
35
kHz
dB
1MHz to 1250MHz, with respect to 100MHz
Gain Variation with Frequency
Input current < 500µA pp
Input current > 16µA pp
100Ω differential load, 2.5Gbps
Differential Output Swing 1
320
400
480
mVp-p
PHY1097-03-RD-1.5
Datasheet
Page 3
Parameter
Conditions
Min
Typ
Max
Unit
Transimpedance (differential)
Input current <8µAp-p, 100Ω load
20k
25k
30k
Ω
Deterministic Jitter
K28.5 Pattern
50
100
±15
±15
mUIp-p
Overshoot
27-1PRBS (wrt to average 0/1 level)
27-1PRBS (wrt average 0/1 level)
DJ within spec, ER = ∞
%
%
Undershoot
Input Overload, a.c.
Input Overload d.c.
AGC settling time
4.4
2.2
mApp
mA
µs
Ω
DJ within spec, TJ = 95°C
50
120
-0.25
2.7
Output resistance
Differential VOUT+ to VOUT-
Measured relative to VCC
80
-0.5
2.5
100
-0.37
2.6
Output Common Mode Voltage
Photodiode Cathode Voltage
Photodiode Anode Voltage
RSSI Current Accuracy
V
V
0.8
1.0
V
Measured relative to photodiode current
Current source mode
±20
%
1.0
30
V
RSSI Compliance Voltage
Current sink mode
0.8
V
Power Supply Rejection Ratio
100kHz – 4MHz
40
dB
4 Device Description
The PHY1097 implements a complete analog front end, converting the photo-detector current, which has
been modulated by light from an optical fibre, to a differential analog voltage signal.
The PHY1097 also provides a filtered bias current to the photo-detector to increase the level of component
integration as well as the signal processing functions.
4.1 Photodiode Connection
A PIN Photodiode should be connected to the PHY1097 as shown in Figure 3, using the internal voltage
reference to bias the Photodiode. The internal reference supplies a low noise output with high power supply
rejection to 4MHz.
The voltage across the photodiode is equal to the power supply voltage, Vpdc minus the base emitter voltage
of the input transistor on the PHY1097, equal to Vpda. The anode voltage, Vpda is sensitive to temperature
and has a typical value of 0.8V.
3.3V
Vcc
RSSI
MON
Internal Voltage
Reference
PDC1
Vpdc
PDA
Vpda
0V
PHY1097
Figure 3 – Photodiode biased by internal voltage regulator
PHY1097-03-RD-1.5
Datasheet
Page 4
Single ended connection of a PIN photodiode to the PDA input with an external bias supply can produce
inconsistent sensitivity and bandwidth operation.
If an Avalanche Photodiode (APD) is to be used this can be connected as shown in figure 4, filtering of the
bias voltage must be provided externally to the PHY1097 to avoid damaging the device. The input current
applied to the PDA pad with Vcc off (<3.0V) must not exceed the value given in the section 3.1 maximum
ratings table, if exceeded damage may occur to the PDA input. The RSSI senses the MPD current from the
PDC pad, this is not used in single ended applications such as APD. In this case a current mirror should be
included on the APD bias to provide the RSSI current.
Vpd
Vcc
470pF
10nF
APD
PHY1097
470pF
Figure 4 – Connection of an avalanche photodiode
4.2 DC Cancellation
The removal of the direct current component of the input signal is necessary to reduce the pulse width
distortion for signals with a 50% mark density.
The DC cancellation block provides low frequency feedback using an internally compensated amplifier,
removing the need for external compensation capacitors.
4.3 Transimpedance Amplifier (TIA)
The transimpedance (current to voltage) stage is a very low noise amplifier with a feedback resistor to set the
gain. This stage features automatic gain control, where the transimpedance depends on the output signal
level. This ensures that the output does not overload the subsequent stage in the signal path.
An internal voltage regulator is used to power the front-end transimpedance amplifier in order to improve the
rejection of power supply noise.
4.4 Output Data Polarity
The data polarity pin has an internal 8kΩ pull-up resistor. In normal non-inverting operation, where there is no
external connection, the pin pulls to VDD. In this mode an optical '1' gives maximum input current and a
voltage '1' on the positive output pin Rx+. Connection of the pad to ground selects an inverted sense output.
4.5 Output Gain Stage
The output gain stage features a voltage amplifier, a single ended to differential converter and a supply
referenced differential output buffer.
The PHY1097 has a 50Ω single ended output impedance, which is suitable for the majority of applications.
For optimum supply-noise rejection, the PHY1097 should be terminated differentially.
PHY1097-03-RD-1.5
Datasheet
Page 5
4.6 Received Signal Strength Indication (RSSI)
The PHY1097 provides a RSSI output which can be used to measure the strength of the received optical
signal. The photodiode current is proportional to the received optical power. The PHY1097 generates an
output current which is a mirror of the photodiode current at the PDC input and is valid only for differential
photodiode connections. The RSSI output is a current sink or a current source.
The direction of current flow is selected by using the RSSI_DIR bond. Leaving this bond pad unconnected
selects a current sink, connecting this bond pad to ground selects a current source.
An alternative method of measuring the received signal power is by using the received Optical Modulation
Amplitude (OMA). This method is provided by the PHY2078 integrated burst mode laser driver and post
amplifier device.
PHY1097-03-RD-1.5
Datasheet
Page 6
5 Typical Application
VCC
PHY1097
PHY2078
Voltage
Regulator
50Ω
50Ω
PDC1/2
Signal Detect
& DC Restore
RF
RX+
RX-
RXIN+
RXIN-
RXOUT+
RXOUT-
CML
Output
AGC
Amp
Input
Amp
Low Pass
Filter
O/P
Buffer
Amplifier
PDA
GND
Signal
Strength
Indicator
RSSI_DIR
RSSI
AGC DATA_INVERT
Figure 5 - Typical Application - GPON ONU Receiver path
Figure 5 shows a typical application for the PHY1097. In this application the output of the PHY1097 is
connected to the Phyworks PHY2078 PON Laser Driver and Post Amplifier circuit to form the receive path for
a fibre optic module.
The PHY2078 provides the receive signal monitoring functions such as loss of signal and converts the input
data into a variety of electrical formats.
5.1 Layout and Bonding
In order to achieve the best performance it is necessary to minimise noise pickup and to reduce the effects of
parasitic components.
Noise is picked up through the signal paths or through the power supply. Noise at the input of the TIA will be
amplified and mixed with the wanted signal. This can be a result of noise pickup in the other components
connected to the TIA input, such as the photodiode, the capacitors and the bond wires.
Noise picked up in the signal path can be reduced by keeping bond wires short and by making sure the
output and input bond wires are not close and are orthogonal to each other,
Power supply noise will be present as a result of the power supply design, the quality of decoupling
precautions and pickup in the bond wires.
To effectively de-couple supply rail noise to ground a capacitor may be placed inside the ROSA TO can. This
should be placed as close as possible to the VCC pin on the TIA. This reduces the effect of the bond wire
inductance.
Noise on the power supply can also be a result of coupling between the TIA output and the power supply.
This coupling takes place between the output bond wires and the power supply bond wires. As a result these
must also be kept as short as possible and be routed orthogonally to each other.
The PHY1097 provides alternative bonding options through the replication of some device inputs and
outputs, allowing a variety of ROSA pin outs to be realised without compromising performance.
For stable operation the ground bonds GND1, GND2, GND4 and GND7 should not be omitted.
PHY1097-03-RD-1.5
Datasheet
Page 7
6 Mechanical Specifications
6.1 TO-Can Connections
Top-view: looking into the CD header. The diagrams below show an internal power supply decoupling
capacitor and illustrate the optimum bondwire lengths and orientation. The value of the supply de-coupling
capacitor should be 250 – 500 pF.
RX-
RX+
Capacitor
VCC
Photodiode
MON
Figure 6 - 5 pin ROSA layout 1
RX-
RX-
RX+
Capacitor
VCC
RX+
Capacitor
Photodiode
Photodiode
GND
GND
VCC
Figure 7 - 4 pin ROSA layout 1
Figure 8 – 4 Pin ROSA layout 2
PHY1097-03-RD-1.5
Datasheet
Page 8
7 Pad Positions and Sizes
Die Size:
1100µm x 900µm
Thickness: 290µm +/- 10 µm
Pad Opening: 80µm x 80µm measured between parallel sides
Pad centres
Number
Name
X
Y
1
2
GND1
PDC1
-439.5
221.5
-439.5
-412.5
-439.5
-439.5
-320.095
-219.5
-121.5
55.09
113
0
3
PDA
4
PDC2
-113
5
GND2
RSSI
-221.5
-339.5
-339.5
-339.5
-339.5
-339.5
-339.5
-221.5
-123.5
0
6
7
VCC1
8
VCC2
9
AGC
10
11
12
13
14
15
16
17
18
19
20
21
RX-
222.1
GND3
GND4
GND5
DATA_INVERT
GND6
GND7
GND8
RX+
321.5
439.5
439.5
439.5
439.5
123.5
221.5
339.5
339.5
339.5
339.5
339.5
439.5
321.5
222.1
VCC3
-121.5
-219.5
-320.095
VCC4
RSSI_DIR
Table 1: PHY1097 pad coordinates
Figure 9: PHY1097 Die image
PHY1097-03-RD-1.5
Datasheet
Page 9
8 Contact Information
For technical support, contact Maxim at www.maxim-ic.com/support.
Disclaimer
This datasheet contains preliminary information and is subject to change.
This document does not transfer or license any intellectual property rights to the user. It does not imply any
commitment to produce the device described and is intended as a proposal for a new device.
Phyworks Ltd assumes no liability or warranty for infringement of patent, copyright or other intellectual
property rights through the use of this product.
Phyworks Ltd assumes no liability for fitness for particular use or claims arising from sale or use of its
products.
Phyworks Ltd products are not intended for use in life critical or sustaining applications.
PHY1097-03-RD-1.5
Datasheet
Page 10
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent
licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, Inc. 160 Rio Robles, San Jose, CA 95134 USA 1-408-601-1000
2011 Maxim Integrated Products
Maxim is a registered trademark of Maxim Integrated Products, Inc.
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