WF2M32U-90G2UC5 [MERCURY]
Flash Module, 2MX32, 90ns, CQFP68, 22.40 X 22.40 MM, 3.56 MM HEIGHT, HERMETIC SEALED, CERAMIC, QFP-68;
| 型号： | WF2M32U-90G2UC5 |
| 厂家： | 
MERCURY UNITED ELECTRONICS INC |
| 描述： | Flash Module, 2MX32, 90ns, CQFP68, 22.40 X 22.40 MM, 3.56 MM HEIGHT, HERMETIC SEALED, CERAMIC, QFP-68 |
| 文件： | 总11页 (文件大小：1147K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
WF2M32-XXX5
2Mx32 5V NOR FLASH MODULE
FEATURES
Access Time of 90, 120, 150ns
5 Volt Read and Write
Low Power CMOS
Packaging:
Data# Polling and Toggle Bit feature for detection of
• 66 pin, PGA Type, 1.185" square, Hermetic Ceramic HIP
(Package 401).
program or erase cycle completion.
Supports reading or programming data to a sector not being
• 68 lead, Hermetic CQFP (G2U), 22.4mm (0.880") square
(Package 510) 3.56mm (0.140") height. Designed to fit
JEDEC 68 lead 0.990" CQFJ footprint (FIGURE 3)
erased.
RESET# pin resets internal state machine to the read
mode.
Sector Architecture
Built in Decoupling Caps and Multiple Ground Pins for Low
Noise Operation, Separate Power and Ground Planes to
improve noise immunity
• 32 equal size sectors of 64KBytes per each 2Mx8 chip
• Any combination of sectors can be erased. Also supports
full chip erase.
* This product is subject to change without notice.
Note: For programming information and waveforms refer to Flash Programming 16M5 Application
Note AN0038. RESET# and RY/BY# function and timings don't apply to this device.
Minimum 100,000 Write/Erase Cycles Minimum
Organized as 2Mx32
Commercial, Industrial, and Military Temperature Ranges
FIGURE 1 – PIN CONFIGURATION FOR WF2M32-XHX5
Top View
Pin Description
I/O0-31
A0-20
WE1-4#
CS1-4#
OE#
Data Inputs/Outputs
Address Inputs
Write Enables
Chip Selects
1
12
23
34
45
56
I/O8
I/O9
I/O10
A14
A16
A11
A0
WE2#
CS2#
GND
I/O11
A10
I/O15
I/O24
I/O25
I/O26
A7
VCC
CS4#
WE4#
I/O27
A4
I/O31
I/O30
I/O29
I/O28
A1
I/O14
I/O13
I/O12
OE#
A17
Output Enable
Power Supply
Ground
VCC
GND
A12
Block Diagram
A9
A20
A5
A2
WE1# CS1#
2M x 8
WE2# CS2#
WE3# CS3#
WE4# CS4#
2M x 8
A15
WE1#
I/O7
A13
A6
A3
OE#
A0-20
A18
I/O0
I/O1
I/O2
VCC
A8
WE3#
CS3#
GND
I/O19
I/O23
I/O22
I/O21
I/O20
2M x 8
2M x 8
CS1#
A19
I/O6
I/O16
I/O17
I/O18
I/O5
8
8
8
8
I/O3
I/O4
I/O16-23
I/O24-31
I/O0-7
I/O8-15
11
22
33
44
55
66
RESET# internally tied to VCC in the HIP package for this pin configuration. See
Alternate Pin Configuration with RESET# tied to pin 12 for system control of reset
(FIGURE 10, page 11).
Microsemi Corporation reserves the right to change products or specifications without notice.
August 2014 © 2014 Microsemi Corporation. All rights reserved.
Rev. 11
1
Microsemi Corporation • (602) 437-1520 • www.microsemi.com/pmgp
WF2M32-XXX5
FIGURE 2 – PIN CONFIGURATION FOR WF2M32-XG2UX5
Top View
Pin Description
I/O0-31
A0-20
WE1-4#
CS1-4#
OE#
Data Inputs/Outputs
Address Inputs
Write Enables
Chip Selects
Output Enable
Power Supply
Ground
9
8
7
6
5
4
3
2
1
68 67 66 65 64 63 62 61
60
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
I/O0
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
GND
I/O8
I/O16
I/O17
I/O18
I/O19
I/O20
I/O21
I/O22
I/O23
GND
I/O24
I/O25
I/O26
I/O27
I/O28
I/O29
I/O30
I/O31
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
VCC
GND
RESET#
Reset
I/O9
Block Diagram
I/O10
I/O11
I/O12
I/O13
I/O14
I/O15
WE1# CS1#
WE2# CS2#
WE3# CS3#
WE4# CS4#
RESET#
OE#
0-20
A
27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
2M x 8
2M x 8
2M x 8
2M x 8
8
8
8
8
I/O16-23
I/O24-31
I/O0-7
I/O8-15
The WEDC 68 lead G2U CQFP fills the same fit and function as the JEDEC 68 lead CQFJ
or 68 PLCC. But the G2U has the TCE and lead inspection advantage of the CQFP form.
Microsemi Corporation reserves the right to change products or specifications without notice.
August 2014 © 2014 Microsemi Corporation. All rights reserved.
Rev. 11
2
Microsemi Corporation • (602) 437-1520 • www.microsemi.com/pmgp
WF2M32-XXX5
ABSOLUTE MAXIMUM RATINGS
CAPACITANCE
Parameter
Symbol
VT
Ratings
-2.0 to +7.0
-65 to +150
100,000 min
20
Unit
V
TA = +25°C, f = 1.0MHz
Voltage on Any Pin Relative to VSS
Storage Temperature
Parameter
Symbol
Max
Unit
Tstg
°C
OE# capacitance
COE
50
pF
WE1-4# capacitance
HIP (PGA)
Endurance – Write/Erase Cycles
cycles
years
CWE
CWE
CWE
CWE
CWE
CCS
CI/O
CAD
20
50
50
20
50
20
20
50
pF
pF
pF
pF
pF
pF
pF
pF
Data Retention
NOTES:
HIP (Alternate pinout)
CQFP G4T
1. Minimum DC voltage on input or I/O pins is –0.5 V. During voltage transitions, inputs may
overshoot VSS to –2.0 V for periods of up to 20 ns. See . Maximum DC voltage on output and
I/O pins is VCC + 0.5 V. During voltage transitions, outputs may overshoot to VCC + 2.0 V for
periods up to 20 ns. See .
2. Minimum DC input voltage on A9, OE#, RESET# pins is –0.5V. During voltage transitions, A9,
OE#, RESET# pins may overshoot VSS to –2.0 V for periods of up to 20 ns. See Maximum DC
input voltage on A9, OE#, and RESET# is 12.5 V which may overshoot to 13.5 V for periods up
to 20 ns.
CQFP G2U
G2U (Alternate pinout)
CS1-4# capacitance
Data I/O capacitance
Address input capacitance
This parameter is guaranteed by design but not tested.
Stresses greater than those listed in this section may cause permanent damage to the device. This
is a stress rating only; functional operation of the device at these or any other conditions above those
indicated in the operational sections of this specification is not implied. Exposure of the device to
absolute maximum rating conditions for extended periods may affect device reliability.
RECOMMENDED DC OPERATING CONDITIONS
Parameter
Symbol
VCC
VSS
VIH
Min
4.5
0
Typ
Max
5.5
Unit
V
Supply Voltage
5.0
Ground
0
-
0
V
Input High Voltage
Input Low Voltage
2.0
-0.5
-55
-40
0
VCC + 0.5
+0.8
+125
+85
V
VIL
-
V
Operating Temperature (Mil.)
Operating Temperature (Ind.)
Operating Temperature (Com.)
TA
-
°C
°C
°C
TA
-
TA
-
+70
DC CHARACTERISTICS – CMOS COMPATIBLE
Parameter
Symbol
ILI
Conditions
Min
Max
10
Unit
μA
μA
mA
mA
mA
V
Input Leakage Current
Output Leakage Current
VCC = VCC MAX, VIN = GND to VCC
VCC = VCC MAX, VOUT = GND to VCC
CS# = VIL, OE# = VIH, f = 5MHz
CS# = VIL, OE# = VIH
ILOx32
ICC1
10
V
V
V
CC Active Current for Read (1)
160
240
8.0
CC Active Current for Program or Erase (2)
CC Standby Current
ICC2
ICC3
VCC = VCC MAX, CS# = VCC ± 0.5V, f = 5MHz, RESET# = VCC ± 0.5V
IOL = 12.0 mA, VCC = VCC MIN
Output Low Voltage
Output High Voltage
Low VCC Lock-Out Voltage
NOTES:
VOL
0.45
VOH
IOH = -2.5 mA, VCC = VCC MIN
0.85xVCC
3.2
V
VLKO
4.2
V
1. The ICC current is typically less than 8mA/MHz, with OE# at VIH
.
2. CC active while Embedded Algorithm (program or erase) is in progress.
I
Microsemi Corporation reserves the right to change products or specifications without notice.
August 2014 © 2014 Microsemi Corporation. All rights reserved.
Rev. 11
3
Microsemi Corporation • (602) 437-1520 • www.microsemi.com/pmgp
WF2M32-XXX5
AC CHARACTERISTICS – WRITE/ERASE/PROGRAM OPERATIONS - WE# CONTROLLED
Parameter
Symbol
-90
-120
-150
Unit
Min
90
0
Max
Min
120
0
Max
Min
150
0
Max
Write Cycle Time
tAVAV
tELWL
tWC
tCS
tWP
tAS
ns
ns
Chip Select Setup Time
Write Enable Pulse Width
Address Setup Time
tWLWH
tAVWL
tDVWH
tWHDX
tWLAX
tWHWL
tWHWH1
tWHWH2
tGHWL
tVCS
45
0
50
0
50
0
ns
ns
Data Setup Time
tDS
45
0
50
0
50
0
ns
Data Hold Time
tDH
tAH
ns
Address Hold Time
45
20
50
20
50
20
ns
Write Enable Pulse Width High
Duration of Byte Programming Operation (1)
Sector Erase (2)
tWPH
ns
300
15
300
15
300
15
μs
sec
μs
μs
sec
sec
ns
Read Recovery Time before Write
0
0
0
VCC Setup Time
50
50
50
Chip Programming Time
Chip Erase Time (3)
44
44
44
256
256
256
Output Enable Hold Time (4)
RESET# Pulse Width (5)
tOEH
tRP
10
10
10
500
500
500
ns
NOTES:
1. Typical value for tWHWH1 is 7μs.
2. Typical value for tWHWH2 is 1sec.
3. Typical value for Chip Erase Time is 32sec.
4. For Toggle and Data Polling.
5. RESET# internally tied to VCC for the default pin configuration in the HIP package.
AC CHARACTERISTICS – READ-ONLY OPERATIONS
Parameter
Symbol
-90
-120
-150
Unit
Min
90
Max
Min
120
Max
Min
150
Max
Read Cycle Time
tAVAV
tAVQV
tELQV
tGLQV
tEHQZ
tGHQZ
tAXQX
tRC
tACC
tCE
tOE
tDF
ns
ns
ns
ns
ns
ns
ns
Address Access Time
90
90
40
20
20
120
120
50
150
150
55
Chip Select Access Time
Output Enable to Output Valid
Chip Select High to Output High Z (1)
Output Enable High to Output High Z (1)
30
35
tDF
30
35
Output Hold from Addresses, CS# or OE# Change,
whichever is First
tOH
0
0
0
RST Low to Read Mode (1,2)
tReady
20
20
20
μs
NOTES:
1. Guaranteed by design, not tested.
2. RESET# internally tied to VCC for the default pin configuration in the HIP package.
Microsemi Corporation reserves the right to change products or specifications without notice.
August 2014 © 2014 Microsemi Corporation. All rights reserved.
Rev. 11
4
Microsemi Corporation • (602) 437-1520 • www.microsemi.com/pmgp
WF2M32-XXX5
AC CHARACTERISTICS – WRITE/ERASE/PROGRAM OPERATIONS,CS# CONTROLLED
Parameter
Symbol
-90
-120
-150
Unit
Min
90
0
Max
Min
120
0
Max
Min
150
0
Max
Write Cycle Time
tAVAV
tWLEL
tELEH
tWC
tWS
tCP
ns
ns
Write Enable Setup Time
Chip Select Pulse Width
Address Setup Time
45
0
50
0
50
0
ns
tAVEL
tAS
ns
Data Setup Time
tDVEH
tEHDX
tELAX
tDS
45
0
50
0
50
0
ns
Data Hold Time
tDH
tAH
ns
Address Hold Time
45
20
50
20
50
20
ns
Chip Select Pulse Width High
Duration of Byte Programming Operation (1)
Sector Erase Time (2)
Read Recovery Time
tEHEL
tCPH
ns
tWHWH1
tWHWH2
tGHEL
300
15
300
15
300
15
μs
sec
μs
sec
sec
ns
0
0
0
Chip Programming Time
Chip Erase Time (3)
44
44
44
256
256
256
Output Enable Hold Time (4)
tOEH
10
10
10
NOTES:
1. Typical value for tWHWH1 is 7μs.
2. Typical value for tWHWH2 is 1sec.
3. Typical value for Chip Erase Time is 32sec.
4. For Toggle and Data Polling.
FIGURE 3 – AC TEST CIRCUIT
AC TEST CONDITIONS
Parameter
Typ
Unit
V
Input Pulse Levels
Input Rise and Fall
VIL = 0, VIH = 3.0
IOL
5
ns
V
Current Source
Input and Output Reference Level
Output Timing Reference Level
1.5
1.5
V
NOTES:
V
Z is programmable from -2V to +7V.
D.U.T.
V
Z ≈ 1.5V
I
OL & IOH programmable from 0 to 16mA.
(Bipolar Supply)
Ceff = 50 pf
Tester Impedance Z0 = 75 ý.
VZ is typically the midpoint of VOH and VOL
.
IOL & IOH are adjusted to simulate a typical resistive load circuit.
ATE tester includes jig capacitance.
IOH
Current Source
Microsemi Corporation reserves the right to change products or specifications without notice.
August 2014 © 2014 Microsemi Corporation. All rights reserved.
Rev. 11
5
Microsemi Corporation • (602) 437-1520 • www.microsemi.com/pmgp
WF2M32-XXX5
FIGURE 10 – ALTERNATE PIN CONFIGURATION FOR WF2M32I-XHX5
TOP VIEW
PIN DESCRIPTION
I/O0-31
A0-20
Data Inputs/Outputs
Address Inputs
Write Enable
Chip Selects
Output Enable
Power Supply
Ground
1
12
23
34
45
56
WE#
I/O8
I/O9
I/O10
A14
A16
A11
A0
RESET#
CS2#
GND
I/O11
A10
I/O15
I/O24
I/O25
I/O26
A7
VCC
CS4#
NC
I/O31
I/O30
I/O29
I/O28
A1
CS1-4
#
I/O14
I/O13
I/O12
OE#
A17
OE#
VCC
GND
I/O27
A4
RESET#
Reset
A12
BLOCK DIAGRAM
A9
NC
A5
A2
CS1#
CS2#
CS3#
CS4#
A15
WE#
I/O7
A13
A6
A3
RESET#
WE#
OE#
A0-20
A18
I/O0
I/O1
I/O2
VCC
A8
A20
CS3#
GND
I/O19
I/O23
I/O22
I/O21
I/O20
CS1#
A19
I/O6
I/O16
I/O17
I/O18
2M x 8
2M x 8
2M x 8
2M x 8
I/O5
8
8
8
8
I/O3
I/O4
11
22
33
44
55
66
I/O16-23
I/O24-31
I/O0-7
I/O8-15
FIGURE 11 – ALTERNATE PIN CONFIGURATION FOR WF2M32U-XG2UX5
TOP VIEW
PIN DESCRIPTION
I/O0-31
A0-20
Data Inputs/Outputs
Address Inputs
Write Enable
Chip Select
Output Enable
Power Supply
Ground
9
8
7
6
5
4
3
2
1
68 67 66 65 64 63 62 61
60
WE#
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
I/O0
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
GND
I/O8
I/O16
I/O17
I/O18
I/O19
I/O20
I/O21
I/O22
I/O23
GND
I/O24
I/O25
I/O26
I/O27
I/O28
I/O29
I/O30
I/O31
CS#
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
OE#
VCC
GND
RESET#
Reset
I/O9
I/O10
I/O11
I/O12
I/O13
I/O14
I/O15
BLOCK DIAGRAM
RESET#
CS#
27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
WE#
OE#
A0-20
2M x 8
2M x 8
2M x 8
2M x 8
8
8
8
8
I/O16-23
I/O24-31
I/O0-7
I/O8-15
The WEDC 68 lead G2U CQFP fills the same fit and function as the JEDEC 68 lead CQFJ
or 68 PLCC. But the G2U has the TCE and lead inspection advantage of the CQFP form.
Microsemi Corporation reserves the right to change products or specifications without notice.
August 2014 © 2014 Microsemi Corporation. All rights reserved.
Rev. 11
6
Microsemi Corporation • (602) 437-1520 • www.microsemi.com/pmgp
WF2M32-XXX5
FIGURE 12 – PIN CONFIGURATION FOR WF2M32I-XG2UX5
TOP VIEW
PIN DESCRIPTION
I/O0-31
A0-20
Data Inputs/Outputs
Address Inputs
Write Enable
Chip Selects
Output Enable
Power Supply
Ground
WE#
CS1-4
#
9
8
7
6
5
4
3
2
1
68 67 66 65 64 63 62 61
60
OE#
VCC
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
I/O0
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
GND
I/O8
I/O16
I/O17
I/O18
I/O19
I/O20
I/O21
I/O22
I/O23
GND
I/O24
I/O25
I/O26
I/O27
I/O28
I/O29
I/O30
I/O31
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
GND
RESET#
Reset
I/O9
BLOCK DIAGRAM
I/O10
I/O11
I/O12
I/O13
I/O14
I/O15
CS1#
CS2#
CS3#
CS4#
RESET#
WE#
OE#
A0-20
27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
2M x 8
2M x 8
2M x 8
2M x 8
8
8
8
8
I/O16-23
I/O24-31
I/O0-7
I/O8-15
The WEDC 68 lead G2U CQFP fills the same fit and function as the JEDEC 68 lead CQFJ
or 68 PLCC. But the G2U has the TCE and lead inspection advantage of the CQFP form.
Microsemi Corporation reserves the right to change products or specifications without notice.
August 2014 © 2014 Microsemi Corporation. All rights reserved.
Rev. 11
7
Microsemi Corporation • (602) 437-1520 • www.microsemi.com/pmgp
WF2M32-XXX5
PACKAGE 401 – 66 PIN, PGA TYPE, CERAMIC HEX-IN-LINE PACKAGE, HIP (H)
30.1 (1.185) 0.38 (0.015) SQ
PIN 1 IDENTIFIER
SQUARE PAD
ON BOTTOM
25.4 (1.0) TYP
6.22 (0.245)
MAX
3.81 (0.150)
0.13 (0.005)
1.27 (0.050) 0.13 (0.005)
0.76 (0.030) 0.13 (0.005)
15.24 (0.600) TYP
25.4 (1.0) TYP
2.54 (0.100)
TYP
1.27 (0.050) TYP DIA
0.46 (0.018) 0.05 (0.002) DIA
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
Microsemi Corporation reserves the right to change products or specifications without notice.
August 2014 © 2014 Microsemi Corporation. All rights reserved.
Rev. 11
8
Microsemi Corporation • (602) 437-1520 • www.microsemi.com/pmgp
WF2M32-XXX5
PACKAGE 510 – 68 LEAD, CERAMIC QUAD FLAT PACK, CQFP (G2U)
25.15 (0.990) 0.25 (0.010) Sꢀ
3.56 (0.140) MAX
22.36 (0.880) 0.25 (0.010) Sꢀ
0.254 (0.010)
+ 0.051 (0.002)
- 0.025 (0.001)
0.254 (0.010) TYP
R 0.127
24.0 (0.946)
(0.005)
0.53 (0.021)
0.18 (0.007)
0.25 (0.010)
MIN
1°/ 7°
1.01 (0.040)
0.13 (0.005)
DETAIL A
1.27 (0.050) TYP
0.38 (0.015)
0.05 (0.002)
SEE DETAIL “A”
20.32 (0.800) TYP
The Microsemi 68 lead G2L CQFP fills the same
fit and function as the JEDEC 68 lead CQFJ or
68 PLCC. But the G2L has the TCE and lead
inspection advantage of the CQFP form.
24.0 (0.946) TYP
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
Microsemi Corporation reserves the right to change products or specifications without notice.
August 2014 © 2014 Microsemi Corporation. All rights reserved.
Rev. 11
9
Microsemi Corporation • (602) 437-1520 • www.microsemi.com/pmgp
WF2M32-XXX5
ORDERING INFORMATION
W F 2M32 X - XXX X X 5 X
MICROSEMI CORPORATION
NOR FLASH
ORGANIZATION, 2M X 32
User configurable as 4M x 16 or 8M x 8
(Except WF2M32U-XG2UX which is 32 bit wide only.)
IMPROVEMENT MARK
• For HIP Package
Blank = 4CS# and 4WE#
I = 4CS# and 1WE#
• For G2U Package
Blank = 4CS# and 4WE#
U = 1CS# and 1WE#
I = 4CS# and 1WE#
ACCESS TIME (ns)
PACKAGE TYPE:
H
= Ceramic Hex In line Package, HIP (Package 401)
G2U = 22.4mm Ceramic Quad Flat Pack, CQFP (Package 510)
DEVICE GRADE:
Q
= Military Grade* ...-55°C to +125°C
M = Military................-55°C to +125°C
I
= Industrial ............-40°C to +85°C
= Commercial........0°C to +70°C
C
VPP PROGRAMMING VOLTAGE
5 = 5 V
LEAD FINISH:
Blank = Gold plated leads
A
= Solder dip leads
* This product is processed the same as the 5962-XXXXXHXX product but all
test and mechanical requirements are per the Microsemi data sheet.
Microsemi Corporation reserves the right to change products or specifications without notice.
August 2014 © 2014 Microsemi Corporation. All rights reserved.
Rev. 11
10
Microsemi Corporation • (602) 437-1520 • www.microsemi.com/pmgp
WF2M32-XXX5
Document Title
2Mx32 5V NOR FLASH MODULE
Revision History
Rev #
History
Release Date Status
Rev 6
Change (Pg. 15)
November 2009
Final
Final
Final
Final
6.1 Remove "RESET#" from ordering information
Rev 7
Rev 8
Rev 9
Change (Pg. 1-16)
July 2011
7.1 Change document layout from White Electronic Designs to Microsemi
Change (Pg. 1, 16)
August 2011
June 2012
8.1 Add "NOR" to headline
Changes (Pg. 1, 3, 4, 5-15)
9.1 Update features
9.2 Update Absolute Maximum Ratings, Recommended Operating Conditions
and DC Characteristics – CMOS Compatible charts
9.3 Delete subhead from all AC Characteristics charts
9.4 Delete AC Waveforms diagrams
9.5 Update package 401 – 66 Pin, PGA Type, Ceramic Hex-In-Line Package, Hip
(H) diagram
9.6 Update package 510 – 68 Lead, Ceramic Quad Flat Pack, CQFP (G2U)
diagram
9.7 Add NOR to Flash option and MIL - STD 833 Compliant to the "Q" device
grade in the Ordering Information chart
Rev 10
Rev 11
Change (Pg. 10)
May 2014
Final
Final
10 Changed Device Grade "Q" description from "MIL-STD-883 Compliant" to
"MIL-PRF-38534 Class H Compliant."
Change (Pg. 10)
August 2014
11 Changed Device Grade "Q" description from "MIL-PRF-38534 Class H
Compliant" to "Military Grade."
Microsemi Corporation reserves the right to change products or specifications without notice.
August 2014 © 2014 Microsemi Corporation. All rights reserved.
Rev. 11
11
Microsemi Corporation • (602) 437-1520 • www.microsemi.com/pmgp
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