WS512K32-17G2LCA [MERCURY]
SRAM Module, 512KX32, 17ns, CMOS, CQFP68, 22.40 X 22.40 MM, 5.08 MM HEIGHT, HERMETIC SEALED, CERAMIC, QFP-68;
| 型号： | WS512K32-17G2LCA |
| 厂家： | 
MERCURY UNITED ELECTRONICS INC |
| 描述： | SRAM Module, 512KX32, 17ns, CMOS, CQFP68, 22.40 X 22.40 MM, 5.08 MM HEIGHT, HERMETIC SEALED, CERAMIC, QFP-68 静态存储器 |
| 文件： | 总11页 (文件大小：1213K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
WS512K32-XXX
512Kx32 SRAM MODULE, SMD 5962-94611
FEATURES
Access Times of 15, 17, 20, 25, 35, 45, 55ns
TTL Compatible Inputs and Outputs
Packaging
5 Volt Power Supply
Low Power CMOS
• 66 pin, PGA Type, 1.075" square, Hermetic Ceramic HIP
(Package 400).
Built-in Decoupling Caps and Multiple Ground Pins for Low
• 68 lead, 40mm Hermetic Low Profile CQFP, 3.5mm
(0.140") (Package 502)1
Noise Operation
Weight
• 68 lead, Hermetic CQFP (G2U), 22.4mm (0.880") square
(Package 510) 3.56mm (0.140") height.
WS512K32N-XH1X - 13 grams typical
WS512K32-XG2UX - 8 grams typical
WS512K32-XG4TX1 - 20 grams typical
WS512K32-XG2LX - 8 grams typical
• 68 lead, Hermetic CQFP (G2L), 22.4mm (0.880") square,
5.08mm (0.200") high (Package 528).
Organized as 512Kx32, User Configurable as 1Mx16 or
2Mx8
* This product is subject to change without notice.
Note 1: Package Not Recommended For New Design
Commercial, Industrial and Military Temperature Ranges
FIGURE 1 – PIN CONFIGURATION FOR WS512K32N-XH1X
Top View
Pin Description
1
12
23
34
45
56
I/O0-31
A0-18
Data Inputs/Outputs
Address Inputs
Write Enables
Chip Selects
I/O8
I/O9
I/O10
A13
WE2#
CS2#
GND
I/O11
A10
I/O15
I/O24
I/O25
I/O26
A6
VCC
CS4#
WE4#
I/O27
A3
I/O31
I/O30
I/O29
I/O28
A0
WE1-4
#
I/O14
I/O13
I/O12
OE#
A18
CS1-4
OE#
VCC
#
Output Enable
Power Supply
Ground
GND
NC
Not Connected
A14
A7
A15
A11
NC
A4
A1
Block Diagram
A16
A12
WE1#
I/O7
A8
A5
A2
WE1# CS1#
512K X 8
WE2# CS2#
WE3# CS3#
WE4# CS4#
512K X 8
OE#
A0-18
A17
VCC
CS1#
NC
A9
WE3#
CS3
GND
I/O19
I/O23
I/O22
I/O21
I/O20
I/O0
I/O1
I/O2
I/O6
I/O16
I/O17
I/O18
512K X 8
512K X 8
I/O5
I/O3
I/O4
8
8
8
8
11
22
33
44
55
66
I/O0 - 7
I/O8 - 15
I/O16 - 23
I/O24 - 31
Microsemi Corporation reserves the right to change products or specifications without notice.
April 2016 © 2016 Microsemi Corporation. All rights reserved.
Rev. 22
1
Microsemi Corporation • (602) 437-1520 • www.microsemi.com/pmgp
WS512K32-XXX
FIGURE 2 – PIN CONFIGURATION FOR WS512K32-XG4TX1
Top View Pin Description
I/O0-31
A0-18
Data Inputs/Outputs
Address Inputs
Write Enables
Chip Selects
Output Enable
Power Supply
Ground
WE#
9
8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61
CS1-4
OE#
VCC
#
I/O0
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
GND
I/O8
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
I/O16
I/O17
I/O18
I/O19
I/O20
I/O21
I/O22
I/O23
GND
I/O24
I/O25
I/O26
I/O27
I/O28
I/O29
I/O30
I/O31
GND
NC
Not Connected
Block Diagram
I/O9
CS1#
CS2#
CS3#
CS4#
I/O10
I/O11
I/O12
I/O13
I/O14
I/O15
WE#
OE#
A0-18
512K X 8
512K X 8
512K X 8
512K X 8
2728 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
8
8
8
8
I/O0 - 7
I/O8 - 15
I/O16 - 23
I/O24 - 31
Note 1: Package Not Recommended For New Design
FIGURE 3 – PIN CONFIGURATION FOR WS512K32-XG2UX AND WS512K32-XG2LX
Top View
Pin Description
I/O0-31
A0-18
Data Inputs/Outputs
Address Inputs
Write Enables
Chip Selects
9
8
7
6
5
4
3
2
1
68 67 66 65 64 63 62 61
60 I/O16
WE1-4
#
I/O0 10
CS1-4
OE#
VCC
#
I/O1 11
I/O2 12
I/O3 13
I/O4 14
I/O5 15
I/O6 16
I/O7 17
59 I/O17
58 I/O18
57 I/O19
56 I/O20
55 I/O21
54 I/O22
53 I/O23
52 GND
51 I/O24
50 I/O25
49 I/O26
48 I/O27
47 I/O28
46 I/O29
45 I/O30
44 I/O31
Output Enable
Power Supply
Ground
GND
NC
Not Connected
GND 18
I/O8 19
I/O9 20
I/O10 21
I/O11 22
I/O12 23
I/O13 24
I/O14 25
I/O15 26
Block Diagram
WE1# CS1#
512K X 8
WE2# CS2#
WE3# CS3#
WE4# CS4#
512K X 8
OE#
A0-18
512K X 8
512K X 8
2728 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
8
8
8
8
I/O0 - 7
I/O8 - 15
I/O16 - 23
I/O24 - 31
Microsemi Corporation reserves the right to change products or specifications without notice.
April 2016 © 2016 Microsemi Corporation. All rights reserved.
Rev. 22
2
Microsemi Corporation • (602) 437-1520 • www.microsemi.com/pmgp
WS512K32-XXX
ABSOLUTE MAXIMUM RATINGS
TRUTH TABLE
Parameter
Symbol
TA
Min
-55
Max
+125
+150
VCC+0.5
150
Unit
°C
°C
V
CS
H
L
OE
X
WE
X
Mode
Standby
Read
Data I/O
High Z
Power
Standby
Active
Operating Temperature
Storage Temperature
Signal Voltage Relative to GND
Junction Temperature
Supply Voltage
TSTG
VG
-65
L
H
Data Out
High Z
-0.5
L
H
H
Out Disable
Write
Active
TJ
°C
V
L
X
L
Data In
Active
VCC
-0.5
7.0
CAPACITANCE
RECOMMENDED OPERATING CONDITIONS
Ta = +25°C
Parameter
Symbol
VCC
Min
4.5
Max
5.5
Unit
V
Parameter
Symbol
COE
Conditions
Max Unit
Supply Voltage
OE# capacitance
VIN = 0 V, f = 1.0 MHz
VIN = 0 V, f = 1.0 MHz
50
pF
pF
Input High Voltage
Input Low Voltage
Operating Temp (Mil)
VIH
2.2
VCC + 0.3
+0.8
V
WE1-4# capacitance
HIP (PGA)
CWE
20
50
20
20
20
50
VIL
-0.5
-55
V
CQFP G4T
TA
+125
°C
CQFP G2U/G2L
CS1-4# capacitance
Data I/O capacitance
Address input capacitance
CCS
CI/O
CAD
VIN = 0 V, f = 1.0 MHz
VI/O = 0 V, f = 1.0 MHz
VIN = 0 V, f = 1.0 MHz
pF
pF
pF
This parameter is guaranteed by design but not tested.
DC CHARACTERISTICS
VCC = 5.0V, VSS = 0V, -55°C ≤ TA ≤ +125°C
Parameter
Symbol
ILI
ILO
Conditions
Min
Max
Units
Input Leakage Current
VCC = 5.5, VIN = GND to VCC
10
10
μA
μA
mA
mA
Output Leakage Current
Operating Supply Current x 32 Mode
Standby Current
CS# = VIH, OE# = VIH, VOUT = GND to VCC
CS# = VIL, OE# = VIH, f = 5MHz, VCC = 5.5
CS# = VIH, OE# = VIH, f = 5MHz, VCC = 5.5
ICC x 32
ISB
660
80
IOL = 6mA for 15 - 35ns,
IOL = 2.1mA for 45 - 55ns, VCC = 4.5
Output Low Voltage
Output High Voltage
VOL
VOH
0.4
V
V
IOH = -4.0mA for 15 - 35ns,
IOH = -1.0mA for 45 - 55ns, VCC = 4.5
2.4
NOTE: DC test conditions: VIH = VCC -0.3V, VIL = 0.3V
DATA RETENTION CHARACTERISTICS
(Ta = -55°C to +125°C)
Parameter
Symbol
Conditions
Min
Max
Units
Data Retention Supply Voltage
Data Retention Current
VDR
CS ≥ VCC − 0.2V
VCC = 3V
2.0
5.5
28
16
V
ICCDR1
ICCDR2
mA
mA
Low Power Data Retention Current (WS512K32L-XXX)
VCC = 3V
Microsemi Corporation reserves the right to change products or specifications without notice.
April 2016 © 2016 Microsemi Corporation. All rights reserved.
Rev. 22
3
Microsemi Corporation • (602) 437-1520 • www.microsemi.com/pmgp
WS512K32-XXX
AC CHARACTERISTICS
VCC = 5.0V, VSS = 0V, -55°C ≤ TA ≤ +125°C
-15
-17
-20
-25
-35
-45
-55
Parameter
Read Cycle
Symbol Min Max Min Max Min Max Min Max Min Max Min Max Min Max Units
Read Cycle Time
Address Access Time
Output Hold from Address Change
Chip Select Access Time
Output Enable to Output Valid
Chip Select to Output in Low Z
Output Enable to Output in Low Z
Chip Disable to Output in High Z
Output Disable to Output in High Z
tRC
tAA
15
0
17
0
20
0
25
0
35
0
45
0
55
0
ns
ns
ns
ns
ns
ns
ns
ns
ns
15
17
20
25
35
45
55
tOH
tACS
tOE
15
8
17
9
20
10
25
12
35
25
45
25
55
25
1
tCLZ
2
0
2
0
2
0
2
0
4
0
4
0
4
0
1
tOLZ
tCHZ
tOHZ
1
12
12
12
12
12
12
12
12
15
15
20
20
20
20
1
1. This parameter is guaranteed by design but not tested.
AC CHARACTERISTICS
VCC = 5.0V, VSS = 0V, -55°C ≤ TA ≤ +125°C
-15
-17
-20
-25
-35
-45
-55
Parameter
Write Cycle
Symbol
tWC
tCW
tAW
tDW
tWP
tAS
tAH
Min
15
13
13
10
13
2
Max
Min
17
15
15
11
15
2
Max
Min
20
15
15
12
15
2
Max
Min
25
17
17
13
17
2
Max
Min
35
25
25
20
25
2
Max
Min
45
35
35
25
35
2
Max
Min
55
50
50
25
40
2
Max Units
Write Cycle Time
ns
ns
ns
ns
ns
ns
ns
ns
Chip Select to End of Write
Address Valid to End of Write
Data Valid to End of Write
Write Pulse Width
Address Setup Time
Address Hold Time
Output Active from End of Write
Write Enable to Output in High Z
Data Hold Time
0
2
0
2
0
3
0
4
0
4
5
5
5
5
1
tOW
1
tWHZ
8
9
11
13
15
20
20
ns
ns
tDH
0
0
0
0
0
0
0
1. This parameter is guaranteed by design but not tested.
2. The Address Setup Time of minimum 2ns is for the G2U, G1U and H1 packages. tAS minimum for the G4T package is 0ns.
FIGURE. 4 – AC TEST CIRCUIT
AC Test Conditions
Parameter
Input Pulse Levels
Input Rise and Fall
Input and Output Reference Level
Output Timing Reference Level
Typ
VIL = 0, VIH = 3.0
Unit
V
ns
V
IOL
Current Source
5
1.5
1.5
V
D.U.T.
Ceff = 50 pf
VZ ≈ 1.5V
(Bipolar Supply)
Notes:
V
I
Z is programmable from -2V to +7V.
OL & IOH programmable from 0 to 16mA.
Tester Impedance Z0 = 75 Ω.
Z is typically the midpoint of VOH and VOL
OL & IOH are adjusted to simulate a typical resistive load circuit.
ATE tester includes jig capacitance.
V
I
.
IOH
Current Source
Microsemi Corporation reserves the right to change products or specifications without notice.
April 2016 © 2016 Microsemi Corporation. All rights reserved.
Rev. 22
4
Microsemi Corporation • (602) 437-1520 • www.microsemi.com/pmgp
WS512K32-XXX
FIGURE 5 – TIMING WAVEFORM - READ CYCLE
CS#
OE#
READ CYCLE 2, (CS# = OE# = VIL, WE# = VIH
)
READ CYCLE 2 (WE# = VIH
)
FIGURE 6 – WRITE CYCLE - WE# CONTROLLED
CS#
WE#
WRITE CYCLE 2, CS# CONTROLLED
FIGURE 7 – WRITE CYCLE - CS# CONTROLLED
CS#
WE#
WRITE CYCLE 2, CS# CONTROLLED
Microsemi Corporation reserves the right to change products or specifications without notice.
April 2016 © 2016 Microsemi Corporation. All rights reserved.
Rev. 22
5
Microsemi Corporation • (602) 437-1520 • www.microsemi.com/pmgp
WS512K32-XXX
PACKAGE 400: 66 PIN, PGA TYPE, CERAMIC HEX-IN-LINE PACKAGE, HIP (H1)
4.60 (0.181)
MAX
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
PACKAGE 502: 68 LEAD, CERAMIC QUAD FLAT PACK, LOW PROFILE CQFP (G4T)1
Note 1: Package Not
Recommended
For New Design
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
Microsemi Corporation reserves the right to change products or specifications without notice.
April 2016 © 2016 Microsemi Corporation. All rights reserved.
Rev. 22
6
Microsemi Corporation • (602) 437-1520 • www.microsemi.com/pmgp
WS512K32-XXX
PACKAGE 510: 68 LEAD, CERAMIC QUAD FLAT PACK, CQFP (G2U)
25.15 (0.990) 0.25 (0.010) Sꢀ
3.56 (0.140) MAX
22.36 (0.880) 0.25 (0.010) Sꢀ
0.254 (0.010) + 0.051 (0.002)
- 0.025 (0.001)
Pin 1
0.254 (0.010) TYP
R 0.127
(0.005)
MIN
24.0 (0.946)
0.25 (0.010)
0.53 (0.021)
0.18 (0.007)
1° / 7°
1.01 (0.040)
0.13 (0.005)
23.87
(0.940) REF
DETAIL A
1.27 (0.050) TYP
0.38 (0.015)
0.05 (0.002)
SEE DETAIL "A"
20.3 (0.800) REF
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
PACKAGE 528: 68 LEAD, CERAMIC QUAD FLAT PACK, CQFP (G2L)
25.15 (0.990) 0.25 (0.010) MAX
5.10 (0.200) MAX
22.36 (0.880) 0.25 (0.010) MAX
0.25 (0.010) 0.10 (0.002)
0.23 (0.009) REF
24.0 (0.946)
0.25 (0.010)
R 0.127
(0.005)
1.37 (0.054) MIN
0.004
2O / 9O
1.01 (0.040)
0.13 (0.005)
1.27 (0.050) TYP
0.38 (0.015) 0.05 (0.002)
20.31 (0.800) REF
0.940" TYP
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
Microsemi Corporation reserves the right to change products or specifications without notice.
April 2016 © 2016 Microsemi Corporation. All rights reserved.
Rev. 22
7
Microsemi Corporation • (602) 437-1520 • www.microsemi.com/pmgp
WS512K32-XXX
ORDERING INFORMATION
W S 512K 32 X - XXX X X X
MICROSEMI CORPORATION
SRAM
ORGANIZATION, 512Kx32
User configurable as 1Mx16 or 2Mx8
IMPROVEMENT MARK:
Blank = Standard Power
N
L
= No Connect at pin 21 and 39 in HIP for Upgrades
= Low Power Data Retention
ACCESS TIME (ns)
PACKAGE TYPE:
H1 = Ceramic Hex-In-line Package, HIP (Package 400)
G2U = 22.4mm Ceramic Quad Flat Pack, CQFP (Package 510)
G2L = 22.4mm Ceramic Quad Flat Pack, CQFP (Package 528)
G4T* = 40mm Low Profile CQFP (Package 502)
DEVICE GRADE:
Q
M
I
= Military Grade**
= Military Screened
= Industrial
-55°C to +125°C
-40°C to 85°C
0°C to +70°C
C
= Commercial
LEAD FINISH:
Blank = Gold plated leads
A
= Solder dip leads
* Package Not Recommended For New Design
** This product is processed the same as the 5962-XXXXXHXX product but all
test and mechanical requirements are per the Microsemi data sheet.
Microsemi Corporation reserves the right to change products or specifications without notice.
April 2016 © 2016 Microsemi Corporation. All rights reserved.
Rev. 22
8
Microsemi Corporation • (602) 437-1520 • www.microsemi.com/pmgp
WS512K32-XXX
DEVICE TYPE
SPEED
PACKAGE
SMD NO.
512K x 32 SRAM Module
512K x 32 SRAM Module
512K x 32 SRAM Module
512K x 32 SRAM Module
512K x 32 SRAM Module
512K x 32 SRAM Module
512K x 32 SRAM Module
55ns
45ns
35ns
25ns
20ns
17ns
15ns
66 pin HIP (H1)
66 pin HIP (H1)
66 pin HIP (H1)
66 pin HIP (H1)
66 pin HIP (H1)
66 pin HIP (H1)
66 pin HIP (H1)
5962-94611 05HTX
5962-94611 06HTX
5962-94611 07HTX
5962-94611 08HTX
5962-94611 09HTX
5962-94611 10HTX
5962-94611 19HTX
512K x 32 SRAM Module
512K x 32 SRAM Module
512K x 32 SRAM Module
512K x 32 SRAM Module
512K x 32 SRAM Module
512K x 32 SRAM Module
55ns
45ns
35ns
25ns
20ns
17ns
68 lead CQFP Low Profile (G4T)1
68 lead CQFP Low Profile (G4T)1
68 lead CQFP Low Profile (G4T)1
68 lead CQFP Low Profile (G4T)1
68 lead CQFP Low Profile (G4T)1
68 lead CQFP Low Profile (G4T)1
5962-94611 05HYX
5962-94611 06HYX
5962-94611 07HYX
5962-94611 08HYX
5962-94611 09HYX
5962-94611 10HYX
512K x 32 SRAM Module
512K x 32 SRAM Module
512K x 32 SRAM Module
512K x 32 SRAM Module
512K x 32 SRAM Module
512K x 32 SRAM Module
512K x 32 SRAM Module
55ns
45ns
35ns
25ns
20ns
17ns
15ns
68 lead CQFP (G2U)
68 lead CQFP (G2U)
68 lead CQFP (G2U)
68 lead CQFP (G2U)
68 lead CQFP (G2U)
68 lead CQFP (G2U)
66 pin HIP (H1)
5962-94611 05HMX
5962-94611 06HMX
5962-94611 07HMX
5962-94611 08HMX
5962-94611 09HMX
5962-94611 10HMX
5962-94611 19HMX
512K x 32 SRAM Module
512K x 32 SRAM Module
512K x 32 SRAM Module
512K x 32 SRAM Module
512K x 32 SRAM Module
512K x 32 SRAM Module
512K x 32 SRAM Module
55ns
45ns
35ns
25ns
20ns
17ns
15ns
68 lead CQFP (G2L)
68 lead CQFP (G2L)
68 lead CQFP (G2L)
68 lead CQFP (G2L)
68 lead CQFP (G2L)
68 lead CQFP (G2L)
66 pin HIP (H1)
5962-94611 05HAX
5962-94611 06HAX
5962-94611 07HAX
5962-94611 08HAX
5962-94611 09HAX
5962-94611 10HAX
5962-94611 19HAX
Note 1: Package Not Recommended For New Design
Microsemi Corporation reserves the right to change products or specifications without notice.
April 2016 © 2016 Microsemi Corporation. All rights reserved.
Rev. 22
9
Microsemi Corporation • (602) 437-1520 • www.microsemi.com/pmgp
WS512K32-XXX
Document Title
512K x 32 SRAM Multi-Chip Package
Revision History
Rev # History
Release Date Status
Rev 0
Initial
October 1996
Preliminary
Rev 1
Change (Pg. 1, 3)
September 2002
Advanced
1.1 Change Operation Supply Current from 520mA To 540mA
1.2 Change Data Retention Current from 12mA to 28mA.
Change (Pg. 1, 2, 8, 10, 11)
1.1 Delete G2 Package
November 1997
February 1998
April 1998
Preliminary
Preliminary
Preliminary
Preliminary
Preliminary
Change (Pg. 1, 9)
1.1 Add SMD Case Outline M for G2T
Change (Pg. 1, 3, 8)
1.1 Remove Low Capacitance package option
Change (Pg. 1, 6, 8)
1.1 Add H1 package
December 1998
March 1999
Change (Pg. 1, 4, 6, 9, 10)
1.1 Remove H2 package
1.2 Change logo to WEDC logo
Rev 2
Change (Pg. 1, 3, 4, 8)
May 1999
Final
2.1 Change status from Preliminary to Final
2.2 Make package descriptions consistent
2.3 Add 15ns as available in Commercial and Industrial Temperatures only.
Rev 4
Rev 5
Rev 6
Change (Pg. 1, 3)
4.1 Change Standby Current (Isb) from 60mA to 80mA Maximum
June 1999
Final
Final
Final
Change (Pg. 1, 2, 3, 4, 7, 8)
5.1 Add G1U package
November 1999
February 2000
Change (Pg. 1, 8)
6.1 Change G1U lead foot length from 0.64mm to 0.84mm Ref
Rev 7
Change (Pg. 1, 3, 9)
October 2000
Final
7.1 Change Operating Supply Current from 540mA to 660mA Maximum
7.2 Add Low Power Data Retention Current of 16mA to Data Retention Characteristics table
7.3 Add Low Power Data Retention (L) option to Ordering Information
Rev 8
Rev 9
Change (Pg. 1, 2, 6, 7, 9, 10)
8.1 Change G2T and G4T package status to Not Recommended For New Design
October 2001
Final
Final
Change (Pg. 1, 2, 3, 8, 9, 10)
9.1 Add G1T package
November 2001
9.2 Remove ‘Hi-Reliability Product’ Title
Rev 10
Change (Pg. 1, 2, 3, 4, 7, 8, 9, 10, 11)
10.1 Remove G2T package
August 2002
Final
10.2 Add G2U package
10.3 Remove ‘Package to be Developed’ note for G4T
Rev 11
Rev 12
Rev 13
Change (Pg. 1,2,4,8,10,11,13)
11.1 Change G1U package status to Not Recommended For New Designs
February 2002
May 2003
Final
Final
Final
Change (Pg. 1,2,3,7,8,10,11,13)
12.1 Add G2L package
Change (Pg. 1,2,3,7,8,10,11,13)
December 2003
13.1 Remove all reference to G1U package
13.2 Remove all reference to G1T package
Microsemi Corporation reserves the right to change products or specifications without notice.
April 2016 © 2016 Microsemi Corporation. All rights reserved.
Rev. 22
10
Microsemi Corporation • (602) 437-1520 • www.microsemi.com/pmgp
WS512K32-XXX
Document Title
512K x 32 SRAM Multi-Chip Package
Revision History
Rev # History
Release Date Status
Rev 14
Rev 15
Rev 16
Rev 17
Change (Pg. 1,3,11)
14.1 Change IOL to 6mA for 15-35 ns
May 2004
Final
Final
Final
Final
Change (Pg. 1,4,11)
15.1 Add 15ns for Military Temperature
November 2004
March 2006
May 2006
Change (Pg. 1, 6, 11)
16.1 Correct thickness to 0.181"per PCN#140A00143
Change ( Pg. 1, 2, 11)
17.1 Correct pinout of G4T
17.2 Correct G2L foot length
Rev 18
Rev 19
Change (Pg. 6)
18.1 Change drawing on HIP to generic square drawing
November 2010
September 2011
Final
Final
Change (Pg. 8)
19.1 Swap positions with 'Access Time' and 'Improvement Mark' in the 'Ordering Information' chart
Rev 20
Rev 21
Rev 22
Change (Pg. 8)
May 2014
Final
Final
Final
20.1 Changed Device Grade "Q" description from "MIL-STD-883 Compliant" to
"MIL-PRF-38534 Class H Compliant."
Change (Pg. 8)
August 2014
April 2016
21.1 Changed Device Grade "Q" description from "MIL-PRF-38534 Class H
Compliant." to "Military Grade."
Change (Pg. 7) (ECN 9936)
22.1 Update package 510 dimensions
Microsemi Corporation reserves the right to change products or specifications without notice.
April 2016 © 2016 Microsemi Corporation. All rights reserved.
Rev. 22
11
Microsemi Corporation • (602) 437-1520 • www.microsemi.com/pmgp
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