DSC2130FI5-T [MICREL]
Low-Jitter I2C/SPI Programmable LVDS Oscillator;
| 型号： | DSC2130FI5-T |
| 厂家： | 
MICREL SEMICONDUCTOR |
| 描述： | Low-Jitter I2C/SPI Programmable LVDS Oscillator |
| 文件： | 总6页 (文件大小：562K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DSC2130 DSC2230
Low-Jitter I2C/SPI Programmable LVDS Oscillator
General Description
Features
The DSC2130 and DSC2230 series of
Low RMS Phase Jitter: <1 ps (typ)
High Stability: ±10, ±25, ±50 ppm
programmable,
high-performance
LVDS
oscillators utilizes a proven silicon MEMS
technology to provide excellent jitter and
stability while incorporating high output
frequency flexibility. DSC2130 and DSC2230
allow the user to modify the output
frequency using I2C or SPI interface,
respectively. User can also select from two
pre-programmed default output frequencies
using the control pin.
Wide Temperature Range
o Industrial: -40° to 85° C
o Ext. commercial: -20° to 70° C
High Supply Noise Rejection: -50 dBc
I2C/SPI Programmable Output Freq
Short Lead Times: 2 Weeks
Wide Freq. Range:
o LVDS Output: 2.3 to 460 MHz
DSC2130 and DSC2230 are packaged in 14-
pin 3.2x2.5 mm QFN packages and available
in temperature grades from Ext. Commercial
to industrial.
Miniature Footprint of 3.2x2.5mm
Excellent Shock & Vibration Immunity
o Qualified to MIL-STD-883
High Reliability
o 20x better MTF than quartz oscillators
Block Diagram
Supply Range of 2.25 to 3.6 V
Lead Free & RoHS Compliant
Applications
Consumer Electronics
Storage Area Networks
o SATA, SAS, Fibre Channel
Passive Optical Networks
o EPON, 10G-EPON, GPON, 10G-PON
Ethernet
o 1G, 10GBASE-T/KR/LR/SR, and FCoE
HD/SD/SDI Video & Surveillance
PCI Express
Pin # DSC2130 (I2C)
DSC2230 (SPI)
3
5
6
7
NC
SDA
SCL
SCLK
MOSI
MISO
SS
CS_bar
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DSC2130 DSC2230 Page 1 MK-Q-B-P-D-12050106
DSC2130 DSC2230
Low-Jitter I2C/SPI Programmable LVDS Oscillator
Pin Description
Pin No. Pin Name Pin Type
Description
Enables outputs when high and disables when low
Leave unconnected or grounded
DSC2130: Leave unconnected or grounded
DSC2230: Serial clock from master
Ground
1
2
Enable
NC
I
NA
NA
I
Power
I
NC
3
4
5
SCLK
GND
SDA
MOSI
SCL
DSC2130: I2C Serial Data
DSC2230: SPI Serial Data from Master to Slave
I
O
I
I
O
DSC2130: I2C Serial Clock
6
7
MISO
CS_bar
SS
Output1+
Output1-
NC
DSC2230: SPI Serial Data from Slave to Master
DSC2130: I2C Chip Select (Active Low)
DSC2230: SPI Slave Select (Active Low)
Positive LVDS Output
8
9
O
NA
Negative LVDS Output
10
11
12
13
14
Leave unconnected or grounded
Leave unconnected or grounded
Power Supply
Power Supply
Default output clock frequency bit
NC
NA
VDD2
VDD
FS
Power
Power
I
Operational Description
The DSC2130/2230 is a LVDS oscillator
consisting of a MEMS resonator and a support
pin (FS) selects the initial frequency. Once
the device is powered up, a new output
frequency can be programmed. Programming
details are provided in the Programming
Guide. Standard default frequencies are
described in the following sections. Discera
supports customer defined versions of the
DSC2130/2230.
PLL IC.
The LVDS output is generated
through independent 8-bit programmable
dividers from the output of the internal PLL.
DSC2130/2230 allows for easy programming
of the output frequencies using I2C/SPI
interface. Upon power-up, the initial output
frequency is controlled by an internal pre-
programmed memory (OTP). This memory
stores all coefficients required by the PLL for
two different default frequencies. The control
When Enable (pin 1) is floated or connected to
VDD, the DSC2130/2230 is in operational
mode. Driving Enable to ground will disable
both output drivers (hi-impedance mode).
______________________________________________________________________________________________________________________________________________
DSC2130 DSC2230 Page 2 MK-Q-B-P-D-12050106
DSC2130 DSC2230
Low-Jitter I2C/SPI Programmable LVDS Oscillator
Output Clock Frequencies
Table 2 lists the standard frequency configurations and the associated ordering information to be
used in conjunction with the ordering code. Customer defined combinations are available.
Table 2. Pre-programmed pin-selectable output frequency combinations
Select Bit [FS] – Default is [1]
Ordering
Info
Freq
(MHz)
0
1
C0001
C0002
C0003
C0004
C0005
CXXXX
fOUT
fOUT
fOUT
fOUT
fOUT
fOUT
148.352
100
74.1758
0*
150
100
148.5
315
148.35
0*
Contact factory for additional configurations.
Frequency select bit are weakly tied high so if left unconnected the default setting will be [1] and
the device will output the associated frequency highlighted in Bold.
0* – denotes invalid selection, output frequency is not specified.
______________________________________________________________________________________________________________________________________________
DSC2130 DSC2230
Page 3
MK-Q-B-P-D-12050106
DSC2130 DSC2230
Low-Jitter I2C/SPI Programmable LVDS Oscillator
Absolute Maximum Ratings
Ordering Code
Item
Min
Max
Unit Condition
Prog Mode
1: I2C bus
2: SPI bus
Temp Range
E: -20 to 70
I: -40 to 85
Packing
T: Tape & Reel
: Tube
Supply Voltage
Input Voltage
Junction Temp
Storage Temp
Soldering Temp
-0.3
+4.0
V
V
-0.3 VDD+0.3
-
-55
-
+150
+150
+260
°C
°C
°C
V
DSC2 1 30 F I 2
xxxxx
T
40sec max.
Package
F: 3.2x2.5mm
Stability
1: ±50ppm
2: ±25ppm
5: ±10ppm
Freq (MHz)
See Freq. table
ESD
HBM
MM
-
4000
400
CDM
1500
Note: 1000+ years of data retention on internal memory
Specifications (Unless specified otherwise: T=25° C)
Parameter
Supply Voltage1
Condition
Min.
Typ.
Max.
Unit
V
VDD
IDD
IDD
2.25
3.6
23
32
Supply Current
Supply Current2
EN pin low – output is disabled
Output Enabled, RL=100Ω
21
29
mA
mA
Includes frequency variations due
to initial tolerance, temp. and
power supply voltage
±10
±25
±50
Frequency Stability
Δf
ppm
Aging
Startup Time2
Δf
tSU
1 year @25°C
T=25°C
±5
5
ppm
ms
Input Logic Levels
Input logic high
Input logic low
VIH
VIL
0.75xVDD
-
-
V
0.25xVDD
Output Disable Time3
Output Enable Time
Pull-Up Resistor4
tDA
5
ns
ns
tEN
20
Pull-up exists on all digital IO
LVDS Outputs
40
kΩ
Output Offset Voltage
Delta Offset Voltage
Pk to Pk Output Swing
Output Transition time4
Rise Time
R=100Ω Differential
1.125
1.4
50
V
mV
mV
Single-Ended
350
200
20% to 80%
RL=50Ω, CL= 2pF
tR
tF
ps
Fall Time
Frequency
f0
Single Frequency
Differential
2.3
48
460
52
MHz
%
Output Duty Cycle
Period Jitter5
SYM
JPER
FO=156.25 MHz
2.5
psRMS
200kHz to 20MHz @156.25MHz
100kHz to 20MHz @156.25MHz
12kHz to 20MHz @156.25MHz
0.28
0.4
1.7
Integrated Phase Noise
JCC
psRMS
2
Notes:
1.
Pin 4 VDD should be filtered with 0.01uf capacitor.
2.
3.
4.
5.
Output is enabled if Enable pad is floated or not connected.
tsu is time to 100PPM stable output frequency after VDD is applied and outputs are enabled.
Output Waveform and Test Circuit figures below define the parameters.
Period Jitter includes crosstalk from adjacent output.
______________________________________________________________________________________________________________________________________________
DSC2130 DSC2230 Page 4 MK-Q-B-P-D-12050106
DSC2130 DSC2230
Low-Jitter I2C/SPI Programmable LVDS Oscillator
Nominal Performance Parameters (Unless specified otherwise: T=25° C, VDD=3.3 V)
2.5
156MHz-LVDS
212MHz-LVDS
320MHz-LVDS
410MHz-LVDS
2.0
1.5
1.0
0.5
0.0
0
200
400
600
800
1000
Low-end of integration BW: x kHz to 20 MHz
LVDS Phase jitter (integrated phase noise)
Output Waveform: LVDS
tR
tF
Output
Output
80%
50%
20%
350 mV
tEN
1/fo
tDA
VIH
Enable
VIL
______________________________________________________________________________________________________________________________________________
DSC2130 DSC2230 Page 5 MK-Q-B-P-D-12050106
DSC2130 DSC2230
Low-Jitter I2C/SPI Programmable LVDS Oscillator
Solder Reflow Profile
20-40
Sec
260°C
MSL 1 @ 260°C refer to JSTD-020C
Ramp-Up Rate (200°C to Peak Temp) 3°C/Sec Max.
217°C
200°C
60-150
Sec
Preheat Time 150°C to 200°C
Time maintained above 217°C
Peak Temperature
Time within 5°C of actual Peak
Ramp-Down Rate
60-180 Sec
60-150 Sec
255-260°C
20-40 Sec
6°C/Sec Max.
8 min Max.
Reflow
60-180
Sec
150°C
Cool
Pre heat
25°C
Time 25°C to Peak Temperature
Time
8 min max
Package Dimensions
3.2 x 2.5 mm 14 Lead Plastic Package
Disclaimer:
Micrel makes no representations or warranties with respect to the accuracy or completeness of the information furnished in this data sheet. This information
is not intended as a warranty and Micrel does not assume responsibility for its use. Micrel reserves the right to change circuitry, specifications and
descriptions at any time without notice. No license, whether express, implied, arising by estoppel or otherwise, to any intellectual property rights is granted
by this document. Except as provided in Micrel’s terms and conditions of sale for such products, Micrel assumes no liability whatsoever, and Micrel disclaims
any express or implied warranty relating to the sale and/or use of Micrel products including liability or warranties relating to fitness for a particular purpose,
merchantability, or infringement of any patent, copyright or other intellectual property right.
Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can
reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the
body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser’s use or
sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser’s own risk and Purchaser agrees to fully indemnify Micrel for any
damages resulting from such use or sale.
MICREL, Inc.
Phone: +1 (408) 944-0800
●
●
2180 Fortune Drive,
Fax: +1 (408) 474-1000
San Jose, California
95131
●
●
USA
●
Email: hbwhelp@micrel.com
www.micrel.com
______________________________________________________________________________________________________________________________________________
DSC2130 DSC2230 Page 6 MK-Q-B-P-D-12050106
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