MIC2184BM [MICREL]

Low Voltage Buck PWM Control IC Final Information; 低电压降压型PWM控制IC最终信息


型号：	MIC2184BM
厂家：	MICREL SEMICONDUCTOR
描述：	Low Voltage Buck PWM Control IC Final Information 低电压降压型PWM控制IC最终信息开关光电二极管信息通信管理
文件：	总12页 (文件大小：78K)
中文：	中文翻译
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MIC2184

Micrel

MIC2184

Low Voltage Buck PWM Control IC

Final Information

General Description

Features

Micrel’s MIC2184 is a high efficiency PWM buck control IC.

With its wide input voltage range of 2.9V to 14V, the MIC2184

can be used to efficiently step voltages down in 1- or 2-cell Li

Ion battery powered applications, as well as in fixed 3.3V, 5V,

or 12V systems.

• Input voltage range: 2.9V to 14V

• >90% efficiency

• Oscillator frequency of 400kHz

• Frequency divide-by-two pin

• Frequency sync to 600kHz

• FrequOut oscillator output allows simple charge pump

implementation in low voltage systems

• 1.245V reference output

• Front edge blanking

• 5Ω output driver

• Soft start

• PWM current mode control

• 1µA shutdown current

• Cycle-by-cycle current limiting

• Frequency foldback short circuit protection

• Adjustable under-voltage lockout

• 16 pin narrow-body SOIC and QSOP package options

Efficiencies over 90% are achievable over a wide range of

load conditions with the MIC2184’s PWM control scheme.

The operating frequency can be divided by two by raising the

FREQ/2pintoV . Thisallowstheusertooptimizeefficiency

versus board space. It also allows the MIC2184 to be exter-

nally synchronized to frequencies below its nominal 400KHz.

The MIC2184 features an oscillator output, FreqOut, which

can be used to implement a simple charge pump in low

voltage applications. The output of the charge pump can be

fed into the gate drive power circuitry via the V P pin,

allowing enhanced gate drive, hence higher efficiencies,

despite low input voltages.

Applications

• 3.3V to 2.5V/1.8V/1.5V conversion

• DC power distribution systems

• Wireless Modems

• ADSL line cards

• 1-and 2-cell Li Ion battery operated equipment

• Satellite Phones

MIC2184 features a 1µA shutdown mode, and a program-

mableundervoltagelockout, makingitwellsuitedforportable

applications.

The MIC2184 is available in 16 pin SOP and QSOP package

options with a junction temperture range range from –40°C

to +125°C.

Typical Application

V_IN= 3.3V

15mΩ

120µF (x2)

MIC2184 EFFICIENCY

VINP

6.3V

100

VINA

CSH

CSL

EN/UVLO

FreqOut

FREQ/2

VDD

OUTP

V_OUT

Si9803DY(x2)

2.5V @5A

MIC2184

4.7µH

= 3.3V

OUT

= 2.5V

= 200kHz

COMP

220µF(x2)

6.3V

PGND

VREF

OUTPUT CURRENT (A)

SYNC SGND

Adjustable Output Buck Converter

Micrel, Inc. • 1849 Fortune Drive • San Jose, CA 95131 • USA • tel + 1 (408) 944-0800 • fax + 1 (408) 944-0970 • http://www.micrel.com

December 10, 2001

MIC2184

Micrel

Ordering Information

Part Number

MIC2184BM

MIC2184BQS

Output Voltage

Frequency

400KHz

Junction Temp. Range

–40°C to +125°C

Package

Adjustable

16-lead SOP

16-lead QSOP

400KHz

–40°C to +125°C

Pin Configuration

VINA

16 VINP

15 FREQ/2

14 OUTP

13 VREF

12 PGND

11 SYNC

10 VDD

FreqOut

COMP

SGND

EN/UVLO

CSL

CSH

16 Lead SOIC

(M)

MIC2184

December 10, 2001

MIC2184

Micrel

Pin Description

Pin Number

Pin Name

Pin Function

VINA

Analog voltage input voltage to the circuit. This powers up the analog

sections of the die and does not need to be the same voltage as Pin 16

(V_INP).

FreqOut

This provides a digital signal output signal at half the switching frequency.

This signal swings from 0 to 3V, and can be used to drive an external

capacitive doubler to provide a higher voltage to the V_INP input.

Soft start reduces the inrush current and delays and slows the output voltage

rise time. A 5µA current source will charge the capacitor up to V_DD. A 1µF

capacitor will soft start the switching regulator in 1.5ms.

COMP

SGND

Compensation (Output): Internal error amplifier output. Connect to a

capacitor or series RC network to compensate the regulator’s control loop.

Small signal ground: must be routed separately from other grounds to the (-)

terminal of C_OUT

Feedback Input - the circuit regulates this pin to 1.245V.

EN/UVLO

Enable/UnderVoltage Lockout (input): A low level on this pin will power down

the device, reducing the quiescent current to under 5uA. This pin has two

separate thresholds, below 1.5V the output switching is disabled, and below

0.9V the part is forced into a complete micropower shutdown. The 1.5V

threshold functions as an accurate undervoltage lockout (UVLO) with 140mV

hysteresis.

CSL

CSH

The (-) input to the current limit comparator. A built in offset of 100mV

between CSH and CSL in conjunction with the current sense resistor sets

the current limit threshold level. This is also the (-) input to the current

amplifier.

The (+) input to the current limit comparator. A built in offset of 100mV

between CSH and CSL in conjunction with the current sense resistor sets

the current limit threshold level. This is also the (+) input to the current

amplifier.

VDD

3V internal linear-regulator output. V_DDis also the supply voltage bus for the

chip. Bypass to SGND with 1µF.

SYNC

Frequency Synchronization (Input): Connect an external clock signal to

synchronize the oscillator. Leading edge of signal above 1.5V starts the

switching cycle. Connect to SGND if not used.

PGND

VREF

OUTP

FREQ/2

VINP

MOSFET driver power ground, connects to source of synchronous MOSFET

and the (-) terminal of CIN.

The 1.245V voltage reference is available on this pin. A 0.1µF capacitor

should be connected from this pin to ground.

High current drive for high side P channel MOSFET. Voltage swing is from

ground to V_INP. On-resistance is typically 2.5Ω.

When this is low, the oscillator frequency is 400KHz. When this pin is raised

to V_DD, the oscillator frequency is 200KHz.

Power Input voltage to the circuit. The output gate drivers are powered from

this supply. The current sense resistor R_CSshould be connected as close as

possible to this pin.

December 10, 2001

MIC2184

Micrel

Absolute Maximum Ratings (Note 1)

Operating Ratings (Note 2)

Supply Voltage (V A, V P) .........................................15V

Supply Voltage (V A, V P) ........................ +2.9V to +14V

IN IN

Digital Supply Voltage (V ) ...........................................7V

Ambient Operating Temperature......... –40°C ≤ T ≤ +85°C

Comp Pin Voltage (V

)............................ –0.3V to +3V

Junction Temperature ....................... –40°C ≤ T ≤ +125°C

COMP

Feedback Pin Voltage (V ) .......................... –0.3V to +3V

Output Voltage Range...................................... 1.3V to 12V

PackageThermal Resistance

EN/UVLO

Enable Pin Voltage (V

) ..................... –0.3V to 15V

) ............... –0.3V to 1V

Current Sense Voltage (V

16-lead SOP ...............................................100°C/W

16-lead QSOP.............................................163°C/W

CSH– CSL

Sync Pin Voltage (V

) ................................ –0.3V to 7V

SYNC

Freq/2 Pin Voltage (V

) ............................ -0.3V to 7V

FREQ/2

Power Dissipation (P )

16 lead SOIC................................. 400mW @ T = 85°C

16 lead QSOP ............................... 245mW @ T = 80°C

Ambient Storage Temp ............................ –65°C to +150°C

ESD Rating, ............................................................. Note 3

Electrical Characteristics

V_INA = V_INP = V_CSH= 5V, V_OUT= 3.3V, V_EN/UVLO= 5V, V_FREQ/2= 0V, T_J= 25ºC, unless otherwise specified. Bold values indicate

–40ºC < T_J< +125ºC.

Parameter

Condition

Min

Typ

Max

Units

Regulation

Feedback Voltage Reference

(±1%)

(±2%)

1.233 1.245 1.257

1.22

1.27

Feedback Bias Current

0.04

0.9

% / V

Output Voltage Line Regulation

Output Voltage Load Regulation

Output Voltage Total Regulation

Input & V_DDSupply

5V ≤ V_IN≤ 12V

0mV < (V_CSH– V_CSL) < 75mV

5V ≤ V_INA ≤ 12V, 0mV < (V_CSH– V_CSL) < 75mV (±3%)

1.208

1.282

V_INA Input Current

0.7

1.0

µA

V_INP Input Current, Note 4

Shutdown Quiescent Current

(Excluding external MOSFET gate current)

V_EN/UVLO= 0V; (I_VINA+ I_VINP

)

0.5

Digital Supply Voltage (V_DD

)

I_L= 0

2.82

3.0

3.18

Digital Supply load regulation

Undervoltage Lockout

UVLO Hysteresis

I_L= 0 to 1mA

0.03

2.75

100

V_DDupper threshold (turn on threshold)

Reference Output(VREF)

Reference Voltage

(±1.5%)

1.226 1.245 1.264

(±2.5%)

1.213

1.276

Reference Voltage Line

Regulation

5V < V_INA < 12V

Reference Voltage Load

Regulation

0 < I_REF< 100µA

Enable/UVLO

Enable Input Threshold

UVLO Threshold

0.6

1.4

0.9

1.5

140

0.2

1.2

1.6

(Turn-on threshold)

V_EN/UVLO= 5V

UVLO Hysteresis

Enable Input Current

µA

MIC2184

December 10, 2001

MIC2184

Micrel

Parameter

Condiion

Min

Typ

Max

Units

Soft Start

Soft Start Current

µA

V/V

Current Limit

Current Limit Threshold Voltage

Error Amplifier

Voltage on CSH-CSL to trip current limit

100

Error Amplifier Gain

Current Amplifier

Current Amplifier Gain

Oscillator Section

Oscillator Frequency (f_O)

Maximum Duty Cycle

Minimum On Time

3.0

400

360

100

440

230

kHz

V_FB= 1.0V

V_FB= 1.5V

185

200

0.3

Freq/2 Frequency (f_O)

Frequency Foldback Threshold

Frequency Foldback Frequency

SYNC Threshold Level

SYNC Input Current

SYNC Minimum Pulse Width

SYNC Capture Range

FreqOut Output

V_FREQ/2= 5V

Measured on FB

170

0.6

kHz

1.4

0.1

2.2

µA

200

Note 5

f_O+15 %

600

kHz

FreqOut Frequency

FreqOut Current Drive

Note 6

Sink

f_O/ 2

kHz

Source

–6

Gate Drivers

Rise/Fall Time

C_L= 3300pF

1.8

1.6

2.6

2.4

Ω

Output Driver Impedance

Source; V_INP = 12V

Sink; V_INP = 12V

Source; V_INP = 5V

Sink; V_INP = 5V

3.5

Note 1: Absolute maximum ratings indicate limits beyond which damage to the component may occur. Electrical specifications do not apply when

operating the device outside of its operating ratings. The maximum allowable power dissipation is a function of the maximum junction

temperature, T (Max), the junction-to-ambient thermal resistance, θ , and the ambient temperature, T .

Note 2. The device is not guaranteed to function outside its operating rating.

Note 3. Devices are ESD sensitive. Handling precautions recommended.

Note 4: See application information for I(V P) vs. V P.

Note 5: See application information for limitations on maximum operating frequency.

Note 6: The frequency on FreqOut is half the frequency of the oscillator, or half the frequency of the external Sync signal.

December 10, 2001

MIC2184

Micrel

Typical Characteristics

Quiescent Current

vs. Input Voltage

Quiescent Current

vs. Temperature

vs. Input Voltage

4.5

1.4

1.2

1.0

0.8

0.6

0.4

0.2

3.10

3.05

3.00

2.95

2.90

2.85

2.80

400kHz

V_INA = V_IN

400kHz

I_Q= I_VINA+ I_VINP

3.5

200kHz

2.5

I_STANDBY

200kHz

1.5

I_Q= I_VINA+ I_VINP

V_INA = V_INP = 3.3V

I_STANDBY

0.5

-40 -20

0 20 40 60 80 100120140

INPUT VOLTAGE (V)

TEMPERATURE (°C)

Error Amp Reference Voltage

vs. Input Voltage

vs. Load

vs. Temperature

3.005

3.000

2.995

2.990

2.985

2.980

2.975

2.970

3.08

3.06

3.04

3.02

3.00

2.98

2.96

2.94

2.92

1.2451

V_INA = V_INP = 5V

1.2449

1.2447

1.2445

1.2443

1.2441

V_IN= 5V

0.2 0.4 0.6 0.8

1.2

-40 -20

20 40 60 80 100120140

10 12 14

LOAD CURRENT (mA)

TEMPERATURE (°C)

INPUT VOLTAGE (V)

Error Amp Reference Voltage

vs. Temperature

Frequency Variation

vs. Input Voltage

Frequency Variation vs.

Temperature

1.246

1.5

200kHz

400kHz

1.245

1.244

1.243

1.242

1.241

1.24

-1

0.5

-3

-5

-7

-0.5

-1

-9

-11

-13

-15

400kHz

-1.5

-2

V_IN= 3.3V

-40 -20

20 40 60 80 100120140

-50 -30 -10 10 30 50 70 90 110

10 12 14

TEMPERATURE (°C)

INPUT VOLTAGE (V)

Soft Start Current vs.

Temperature

Overcurrent Threshold

vs. Input Voltage

Overcurrent Threshold

vs. Temperature

102.0

100.0

98.0

96.0

94.0

92.0

90.0

102

V_IN= 3.3V

4.9

4.8

4.7

4.6

4.5

4.4

101

100

-40 -20

20 40 60 80 100120140

10 12 14

-40 -20

20 40 60 80 100120140

TEMPERATURE (°C)

INPUT VOLTAGE (V)

TEMPERATURE (°C)

MIC2184

December 10, 2001

MIC2184

Micrel

OUTP Drive Impedance vs.

Input Voltage

3.5

2.5

SINK

1.5

SOURCE

INPUT VOLTAGE (V)

December 10, 2001

MIC2184

Micrel

Functional Diagram

V_IN

C_IN

C_DECOUP

VINA

OVERCURRENT

COMPARATOR

VREF

1.245V

0.1V

CSH

CSL

EN/UVLO

R_SENSE

BIAS

GAIN

3.7

VDD 10

VDD

CURRENT

SENSE

AMP

16 VINP

fs/4

14 OUTP

CONTROL

V_OUT

SYNC ¹¹

C_OUT

FREQ/2 ¹⁵

OSC

RESET

12 PGND

SLOPE

COMPENSATION

FreqOut

∑

÷2

PWM

COMPARATOR

gm = 0.0002

gain = 20

V_REF

COMP

ERROR

AMP

100k

0.3V

fs/4

VREF ¹³

V_REF

FREQUENCY

FOLDBACK

SGND

Figure 1. MIC2184 Block Diagram

P-Channel MOSFET, Q1. Current flows from the input to the

output through the current sense resistor, MOSFET and

inductor. The current amplitude increases, controlled by the

inductor. The voltage developed across the current sense

Functional Characteristics

Controller Overview and Functional Description

The MIC2184 is a BiCMOS, switched mode, synchronous,

step down (buck) converter controller. It uses a P-Channel

MOSFET,whichallowsthecontrollertooperateat100%duty

cycle and eliminates the need for a high side drive bootstrap

circuit. Current mode control is used to achieve superior

transient line and load regulation. An internal corrective ramp

provides slope compensation for stable operation above a

50%dutycycle.Thecontrollerisoptimizedforhighefficiency,

high performance DC-DC converter applications.

resistor, R

, is amplified inside the MIC2184 and com-

SENSE

bined with an internal ramp for stability. This signal is com-

pared to the output of the error amplifier. When the current

signalequalstheerrorvoltagesignal,theP-channelMOSFET

isturnedoff.Theinductorcurrentflowsthroughthediode,D1.

At the beginning of the next switching cycle, the P-channel

MOSFET is turned on which turns off the diode, D1.

Figure 1 is a block diagram of the MIC2184 configured as a

synchronous buck converter. At the beginning of the switch-

ing cycle, the OUTP pin pulls low and turns on the high-side

MIC2184

December 10, 2001

MIC2184

Micrel

The MIC2184 controller is broken down into 7 functions.

Current Limit

The output current is detected by the voltage drop across the

external current sense resistor (R in Figure 1.). The

current sense resistor must be sized using the minimum

current limit threshold. The external components must be

designedtowithstandthemaximumcurrentlimit. Thecurrent

sense resistor value is calculated by the equation below:

• Control loop

• PWM operation

• Current mode control

• Current limit

• Reference, enable and UVLO

• FreqOut

SENSE

• MOSFET gate drive

• Oscillator and Sync

• Soft-start

MIN_ CURRENT _ SENSE_ THRESHOLD

R_SENSE

I_{OUT _MAX}

The maximum output current is:

Control Loop

MAX _ CURRENT _ SENSE_ THRESHOLD

R_SENSE

PWM Control Loop

I_{OUT _MAX}

The MIC2184 uses current mode control to regulate the

output voltage. This dual control loop method (illustrated in

Figure 2) senses the output voltage (outer loop) and the

inductor current (inner loop). It uses inductor current and

output voltage to determine the duty cycle of the buck

converter. Sampling the inductor current effectively removes

the inductor from the control loop, which simplifies compen-

sation.

The current sense pins CSH (pin 9) and CSL (pin 8) are noise

sensitive due to the low signal level and high input imped-

ance. The PCB traces should be short and routed close to

each other. A small (1nF) capacitor across the pins will

attenuate high frequency switching noise.

When the peak inductor current exceeds the current limit

threshold, the overcurrent comparator turns off the high side

MOSFET for the remainder of the switching cycle, effectively

decreasing the duty cycle. The output voltage drops as

additional load current is pulled from the converter. When the

voltageatthefeedbackpin(FB)reachesapproximately0.3V,

the circuit enters frequency foldback mode and the oscillator

frequency will drop to 1/4 of the switching frequency. This

limits the maximum output power delivered to the load under

a short circuit condition.

V_IN

Switching

Converter

V_OUT

Voltage

Divider

I_INDUCTOR

Switch

Driver

Reference, Enable and UVLO Circuits

V_ERROR

V_REF

The output drivers are enabled when the following conditions

are satisfied:

I_INDUCTOR

• The V voltage (pin 10) is greater than its

undervoltage threshold.

V_ERROR

• The voltage on the enable pin (pin 7) is greater

than the enable UVLO threshold.

The enable pin (pin 7) has two threshold levels, allowing the

MIC2184toshutdowninalowcurrentmode,orturnoffoutput

switching in standby mode. An enable pin voltage lower than

the shutdown threshold turns off all the internal circuitry and

places the MIC2184 in a micropower shutdown mode.

t_ON

t_PER

D = t_ON/t_PER

If the enable pin voltage is between the shutdown and

Figure 2. Current Mode Control Example

standby thresholds, the internal bias, V

and reference

voltages are turned on. The soft start pin is forced low by an

internal discharge MOSFET. The output drivers are inhibited

fromswitching. TheOUTPpinisinahighstateandtheOUTN

pin remains in a low state. Raising the enable voltage above

thestandbythresholdallowsthesoftstartcapacitortocharge

and enables the output drivers. The standby threshold is

specified in the electrical characteristics. A resistor divider

can be used with the enable pin to prevent the power supply

from turning on until a specified input voltage is reached. The

circuit in Figure 3 shows how to connect the resistors.

As shown in Figure 1, the inductor current is sensed by

measuring the voltage across the resistor, R

. A ramp is

SENSE

added to the amplified current sense signal to provide slope

compensation, which is required to prevent unstable opera-

tion at duty cycles greater than 50%.

A transconductance amplifier is used for the error amplifier,

which compares an attenuated sample of the output voltage

with a reference voltage. The output of the error amplifier is

the compensation pin (Comp), which is compared to the

current sense waveform in the PWM block. When the current

signal becomes greater than the error signal, the comparator

turns off the high side drive. The COMP pin provides access

to the output of the error amplifier and allows the use of

external components to stabilize the voltage loop.

December 10, 2001

MIC2184

Micrel

supply. The V P pin and CSH pin must be connected to the

MIC2184

1.5V

Typical

same potential.

V_IN

MOSFET Selection

The P-channel MOSFET must have a V threshold voltage

Bias

Circuitry

equal to or lower than the input voltage when used in a buck

converter topology. There is a limit to the maximum gate

charge the MIC2184 will drive. Higher gate charge MOSFET

will slow down the turn-on and turn-off time of the MOSFET.

Slower transition times will cause higher power dissipation in

the MOSFET due to higher switching transition losses.

EN/UVLO

(7)

140mV

Hysteresis

(typical)

Figure 3. UVLO Circuitry

The line voltage turn on trip point is:

TheMOSFETgatechargeisalsolimitedbypowerdissipation

in the MIC2184. The power dissipated by the gate drive

circuitry is calculated below:

_{INPUT _ENABLE}= V_THRESHOLD×

R1+R2

_GATE× V P × f_S

GATE_DRIVE

where:

where: Qgate is the total gate charge of both the N and P-

channel MOSFETs.

is the voltage level of the internal

THRESHOLD

comparator reference, typically 1.5V

f is the switching frequency

The input voltage hysteresis is equal to:

V P is the gate drive voltage at the V P pin

R1+R2

The graph in Figure 4 shows the total gate charge that can be

driven by the MIC2184 over the input voltage range, for

different values of switching frequency.

_{INPUT _HYST}= V_HYST×

where:

is the internal comparator hysteresis level,

Frequency vs.

Max. Gate Charge

HYST

typically 140mV.

-9

200x10

-9

is the hysteresis at the input voltage

180x10

INPUT_HYST

-9

160x10

The MIC2184 will be disabled when the input voltage drops

back down to:

200kHz

-9

140x10

120x10

100x10

80x10

60x10

40x10

20x10

300kHz

400kHz

INPUT_OFF

INPUT_ENABLE

500kHz

– V

INPUT_HYST

600kHz

)

HYST

– V

THRESHOLD

R1+R2

0x10

11 13 15 17

Either of 2 UVLO conditions will pull the soft start capacitor

low.

INPUT VOLTAGE (V)

Figure 4. MIC2184 Frequency vs Max. Gate Charge

Oscillator & Sync

• When the V voltage drops below its

undervoltage lockout level.

• When the enable pin drops below the its enable

Theinternaloscillatorisfreerunningandrequiresnoexternal

components. The f/2 pin allows the user to select from two

switchingfrequencies. Alowlevelsettheoscillatorfrequency

to 400kHz and a high level set the oscillator frequency to

200kHz. The maximum duty cycle for both frequencies is

100%. This is another advantage of using a P-channel

MOSFET for the high-side drive; it can continuously turned

on.

threshold

The internal bias circuit generates an internal 1.245V band-

gap reference voltage for the voltage error amplifier and a 3V

voltagefortheinternalcontrolcircuitry.TheV

pin(pin

REF

13) should be decoupled with a 0.1µf capacitor placed close

tothepin. TheV pinmustbedecoupledwitha1µFceramic

capacitor. The capacitor must be placed close to the V pin.

The other end of the capacitor must be connected directly to

the ground plane.

A frequency foldback mode is enabled if the voltage on the

feedback pin (pin 6) is less than 0.3V. In frequency foldback,

the oscillator frequency is reduced by approximately a factor

of 4. Frequency foldback is used to limit the energy delivered

to the output during a short circuit fault condition.

MOSFET Gate Drive

The MIC2184 is designed to drive a high side P-channel

MOSFET. The source pin of the P-channel MOSFET is

connected to the input of the power supply. It is turned on

when OUTP pulls the gate of the MOSFET low. The advan-

tage of using a P-channel MOSFET is that it does not require

a bootstrap circuit to boost the gate voltage higher than the

input, as would be required for an N-channel MOSFET.

The SYNC input (pin 11) lets the MIC2184 synchronize with

an external clock signal. The rising edge of the sync signal

generates a reset signal in the oscillator, which turns off the

low side gate drive output. The high side drive then turns on,

restarting the switching cycle. The sync signal is inhibited

when the controller operates in frequency foldback. The sync

signal frequency must be greater than the maximum speci-

The V P pin (pin 16) supplies the drive voltage to the gate

drive pin, OUTP. V P pin is usually connected to the input

MIC2184

December 10, 2001

MIC2184

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fiedfreerunningfrequencyoftheMIC2184. Ifthesynchroniz-

ing frequency is lower, double pulsing of the gate drive

outputs will occur. When not used, the sync pin must be

connected to ground.

Efficiency Considerations

Efficiency is the ratio of output power to input power. The

difference is dissipated as heat in the buck converter. Under

light output load, the significant contributors are:

The maximum recommended output switching frequency is

600kHz. Synchronizing to higher frequencies may be pos-

sible, however, higher power dissipation in the internal gate

drive circuits will occur. The MOSFET gates require charge

to turn on the device. The average current required by the

MOSFET gate increases with switching frequency.

• The V A supply current

• The V P supply current, which includes the current

required to switch the external MOSFET

• Core losses in the output inductor

To maximize efficiency at light loads:

• Use a low gate charge MOSFET or use the smallest

MOSFET, which is still adequate for maximum output

current.

Soft Start

Soft start reduces the power supply input surge current at

start up by controlling the output voltage risetime. The input

surge appears while the output capacitance is charged up. A

slower output risetime will draw a lower input surge current.

Soft start may also be used for power supply sequencing.

• Use a ferrite material for the inductor core, which has

less core loss than an MPP or iron power core.

Under heavy output loads the significant contributors to

power loss are (in approximate order of magnitude):

ThesoftstartvoltageisapplieddirectlytothePWMcompara-

tor. A5µAinternalcurrentsourceisusedtochargeupthesoft

start capacitor. The capacitor is discharged when either the

enable pin voltage drops below the standby threshold or the

• Resistive on time losses in the MOSFET

• Switching transition losses in the MOSFET

• Inductor resistive losses

• Current sense resistor losses

voltage drops below its UVLO level.

• Input capacitor resistive losses (due to the capacitors

ESR)

To minimize power loss under heavy loads:

The part switches at a low duty cycle when the soft start pin

voltage is zero. As the soft start voltage rises from 0V to 0.7V,

the duty cycle increases from the minimum duty cycle to the

operating duty cycle. The oscillator runs at the foldback

frequency (1/4 of the switching frequency) until the feedback

voltage rises above 0.3V. The risetime of the output is

dependent of the soft start capacitor output capacitance,

input and output voltage and load current.

• Use low on resistance MOSFETs. Use low threshold

logic level MOSFETs when the input voltage is below

5V. Multiplying the gate charge by the on resistance

gives a figure of merit, providing a good balance

between low load and high load efficiency.

• Slow transition times and oscillations on the voltage

and current waveforms dissipate more power during

the turn on and turn off of the MOSFET. A clean

layout will minimize parasitic inductance and capaci

tance in the gate drive and high current paths. This

will allow the fastest transition times and waveforms

without oscillations. Low gate charge MOSFETs will

transition faster than those with higher gate charge

requirements.

Voltage Setting Components

The MIC2184 requires two resistors to set the output voltage

as shown in Figure 5.

V_OUT

MIC2184

Voltage

Amplifier

Pin 6

• For the same size inductor, a lower value will have

fewer turns and therefore, lower winding resistance.

However, using too small of a value will require more

output capacitors to filter the output ripple, which will

force a smaller bandwidth, slower transient response

and possible instability under certain conditions.

V_REF

1.245V

Figure 5

• Lowering the current sense resistor value will de

crease the power dissipated in the resistor. However,

it will also increase the overcurrent limit and will

require larger MOSFETs and inductor components.

The output voltage is determined by the equation below.

_OUT= V_REF×1+

• Use low ESR input capacitors to minimize the power

Where: V

for the MIC2184 is typically 1.245V.

REF

dissipated in the capacitors ESR.

Lower values of R1 are preferred to prevent noise from

appearing on the FB pin. A typically recommended value is

10kΩ. If R1 is too small in value it will decrease the efficiency

of the power supply, especially at low output loads.

Once R1 is selected, R2 can be calculated with the following

formula.

V_REF×R1

R2=

V_OUT– V_REF

December 10, 2001

MIC2184

Micrel

Package Information

PIN 1

0.157 (3.99)

0.150 (3.81)

DIMENSIONS:

INCHES (MM)

0.020 (0.51)

REF

0.020 (0.51)

0.013 (0.33)

0.050 (1.27)

BSC

45°

0.0098 (0.249)

0.0040 (0.102)

0°–8°

0.050 (1.27)

0.016 (0.40)

0.394 (10.00)

0.386 (9.80)

SEATING

PLANE

0.0648 (1.646)

0.0434 (1.102)

0.244 (6.20)

0.228 (5.79)

16-Pin SOP (M)

PIN 1

DIMENSIONS:

INCHES (MM)

0.157 (3.99)

0.150 (3.81)

0.009 (0.2286)

REF

0.012 (0.30)

0.008 (0.20)

0.025 (0.635)

BSC

45°

0.0098 (0.249)

0.0075 (0.190)

0.0098 (0.249)

0.0040 (0.102)

8°

0°

0.196 (4.98)

0.189 (4.80)

0.050 (1.27)

0.016 (0.40)

SEATING 0.0688 (1.748)

PLANE

0.0532 (1.351)

0.2284 (5.801)

0.2240 (5.690)

16-Pin QSOP (QS)

MICREL INC. 1849 FORTUNE DRIVE SAN JOSE, CA 95131 USA

TEL + 1 (408) 944-0800 FAX + 1 (408) 944-0970 WEB http://www.micrel.com

This information is believed to be accurate and reliable, however no responsibility is assumed by Micrel for its use nor for any infringement of patents or

other rights of third parties resulting from its use. No license is granted by implication or otherwise under any patent or patent right of Micrel Inc.

MIC2184

December 10, 2001

MIC2184BM [MICREL]

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