MIC706 [MICREL]

Supervisory Circuits; 监控电路
MIC706
型号: MIC706
厂家: MICREL SEMICONDUCTOR    MICREL SEMICONDUCTOR
描述:

Supervisory Circuits
监控电路

监控
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中文:  中文翻译
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MIC705/6/7/8 µP Supervisory Circuits  
MIC705/6/7/8  
µP Supervisory Circuits  
Description  
Pin Configuration  
Top View  
The MIC705/MIC706/MIC707/MIC708 are inexpensive  
microprocessor supervisory circuits that monitor power  
supplies in microprocessor based systems. The circuit  
functions include a watchdog timer, microprocessor  
reset, power failure warning and a debounced manual  
reset input.  
N Package - 8 Lead Plastic DIP Package  
M Package - 8 Lead Plastic SOIC Package  
The MIC705 and MIC706 offer a watchdog timer  
function while the MIC707 and MIC708 have an active  
high reset output in addition to the active low reset  
output.  
Supply voltage monitor levels of 4.65V and 4.4V are  
available. The MIC705/MIC707 have a nominal reset  
threshold level of 4.65V while the MIC706 and MIC708  
have a 4.4V nominal reset threshold level. When the  
supply voltage drops below the respective reset  
threshold level, RESET is asserted.  
Features  
Debounced Manual Reset Input is  
TTL/CMOS Compatible  
·
Reset Pulse Width, 200ms  
·
Typical Applications  
Watchdog Timer, 1.6s (MIC705/MIC706)  
·
Automotive Systems  
·
4.4V or 4.65V Precision Voltage Monitor  
·
·
Intelligent Instruments  
·
Early Power Fail Warning or Low Battery  
Detect  
Critical Microprocessor Power Monitoring  
·
Printers  
·
Computers  
·
Controllers  
·
Typical Operating Circuit  
Ordering Information  
Part  
Package  
Temp. Range  
-40°C to +85°C  
-40°C to +85°C  
MIC70_N  
MIC70_M  
8-Lead PDIP  
8-Lead SOIC  
1
MIC705/6/7/8 µP Supervisory Circuits  
Absolute Maximum Ratings  
Terminal Voltage  
Operating Temperature Range  
V
. . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 6.0V  
MIC70_N, MIC70_M . . . . . . . . . . . . . . . . . -40°C to 85°C  
Storage Temperature Range . . . . . . . . . . . . .-65°C to 150°C  
Lead Temperature (Soldering - 10 sec.) . . . . . . . . . . . 300°C  
Power Dissipation (PDIP) . . . . . . . . . . . . . . . . . . . . 475mW  
Power Dissipation (SOIC) . . . . . . . . . . . . . . . . . . . . 400mW  
CC  
All Other Inputs . . . . . . . . . . . . -0.3V to (V  
Input Current  
+ 0.3V)  
CC  
V
Gnd. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25mA  
CC,  
Output Current (all outputs) . . . . . . . . . . . . . . . . . 20mA  
Stresses above those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent device failure. Functionality at or above these limits is not implied. Exposure to absolute  
maximum ratings for extended periods may affect device reliability. Operating ranges define those limits between which the functionality of the device is guaranteed.  
Electrical Characteristics  
V
= 4.75V to 5.5V for MIC705/MIC707, V  
= 4.5V to 5.5V for MIC706/MIC708, T = -40°C to 85°C unless otherwise noted.  
A
CC  
CC  
Parameter  
Conditions  
Min  
Typ  
Max  
Units  
Operating Voltage Range, V  
MIC70--  
MIC70--  
1.4  
5.5  
V
CC  
Supply Current  
60  
µA  
Reset Voltage Threshold  
MIC705, MIC707  
MIC706, MIC708  
4.50  
4.25  
4.65  
4.4  
4.75  
4.5  
V
Reset Threshold Hysteresis  
40  
mV  
ms  
V
Reset Pulse Width, t  
140  
200  
280  
RS  
RESET Output Voltage  
I
I
= 800µA  
V
V
- 1.5V  
Source  
= 3.2mA  
CC  
0.4  
0.3  
Sink  
MIC70--C, I  
= 50µA, V = 1.4V  
CC  
Sink  
RESET Output Voltage  
I
I
= 800µA  
- 1.5V  
V
Source  
= 1.2mA  
CC  
0.4  
Sink  
Watchdog Timeout Period, t  
1.0  
1.6  
2.25  
sec  
ns  
V
WD  
WDI Minimum Input Pulse, t  
WDI Threshold Voltage  
V
= 0.4V, V = 80% of V  
IH CC  
50  
WP  
IL  
V
V
V
= 5V  
= 5V  
3.5  
IH, CC  
V
0.8  
IL, CC  
WDI Input Current  
WDI = 0V  
WDI = V  
-150  
-50  
50  
µA  
CC  
150  
0.4  
WDO Output Voltage  
I
I
= 800µA  
V
- 1.5V  
CC  
V
Source  
= 1.2mA  
Sink  
2
MIC705/6/7/8 µP Supervisory Circuits  
Electrical Characteristics  
V
= 4.75V to 5.5V for MIC705/MIC707, V  
CC  
= 4.5V to 5.5V for MIC706/MIC708, T = -40°C to 85°C unless otherwise noted.  
A
CC  
Parameter  
Conditions  
MR = 0V  
Min  
Typ  
Max  
Units  
MR Pull-Up Current  
100  
250  
600  
µA  
MR Pulse Width, t  
150  
2.0  
nS  
V
MR  
MR Input Threshold  
V
V
0.8  
IL  
IH  
MR to Reset Output Delay, t  
PFI Input Threshold  
250  
1.3  
nS  
V
MD  
V
= 5V  
1.2  
-25  
CC  
1.25  
0.01  
PFI Input Current  
+25  
0.4  
nA  
V
PFO Output Voltage  
I
= 3.2mA  
= 5V, I  
Sink  
V
= 800µA  
V
- 1.5V  
CC  
CC  
Source  
3
MIC705/6/7/8 µP Supervisory Circuits  
Pin Functions  
Pin No.  
MIC705  
MIC707  
Pin Name  
MIC706  
MIC708  
MR  
1
1
Manual Reset Input forces RESET to assert when pulled below 0.8V.  
An internal pull-up current of 250µA on this input forces it high when left  
floating. This input can also be driven from TTL or CMOS logic.  
VCC  
GND  
PFI  
2
3
4
2
3
4
Primary supply input, +5V.  
IC ground pin, 0V reference.  
Power fail input. Internally connected to the power fail comparator  
which is referenced to 1.25V. The power fail output (PFO) remains  
high if PFI is above 1.25V. PFI should be connected to GND or V  
if the power fail comparator is not used.  
OUT  
PFO  
WDI  
5
6
5
Power fail output. The power fail comparator is independent of all other  
functions on this device.  
N/A  
Watchdog input. The WDI input monitors microprocessor activity, an  
internal watchdog timer resets itself with each transition on the  
watchdog input. If the WDI pin is held high or low for longer than the  
watchdog timeout period, WDO is forced to active low. The watchdog  
function can be disabled by floating the WDI pin.  
N/C  
N/A  
7
6
7
No Connect  
RESET  
RESET is asserted if either V  
goes below the reset threshold or by a  
CC  
low signal on the manual reset input (MR). RESET remains asserted  
for one reset timeout period (200ms) after V exceeds the reset  
CC  
threshold or after the manual reset pin transitions from low to high. The  
watchdog timer will not assert RESET unless WDO is connected to  
MR.  
WDO  
8
N/A  
Output for the watchdog timer. The watchdog timer resets itself with  
each transition on the watchdog input. If the WDI pin is held high or  
low for longer than the watchdog timeout period, WDO is forced low.  
WDO will also be forced low if V  
is below the reset threshold and  
CC  
returns to a valid level.  
will remain low until V  
CC  
RESET  
N/A  
8
RESET is the compliment of RESET and is asserted if either V  
goes  
CC  
below the reset threshold or by a low signal on the manual reset input  
(MR). RESET is suitable for microprocessors systems that use an  
active high reset.  
4
MIC705/6/7/8 µP Supervisory Circuits  
Block Diagram  
* 4.4V for MIC706  
Figure 1. MIC705/MIC706 Block Diagram  
µ
* 4.4V for MIC708  
Figure 2. MIC707/MIC708 Block Diagram  
5
MIC705/6/7/8 µP Supervisory Circuits  
Circuit Description  
Power Fail Warning  
An additional comparator which is independent of other  
functions on the MIC705/706/707/708 is provided for  
early warning of power failure. An external voltage  
The output of the watchdog timer (WDO) will remain  
high if WDI sees a valid transition within the watchdog  
timeout period or if WDI is left floating. If V falls  
CC  
below the reset threshold voltage then WDO goes low  
immediately regardless of WDI. Thus, if WDI is left  
floating, then WDO can be used as a low line indicator.  
Unregulated DC  
Microprocessor Reset  
R1  
The RESET pin is asserted whenever V  
the reset threshold voltage or when MR goes low. The  
reset pin remains asserted for a period of 200ms after  
falls below  
CC  
PFI  
+
PFO  
-
1.25V  
V
has risen above the reset threshold voltage and  
CC  
R2  
MR goes high. The reset function ensures the  
Figure 3. Power Fail Comparator  
divider can be used to compare unregulated DC to an  
internal 1.25V reference. The voltage divider ratio on  
the input of the power fail comparator (PFI) can be  
chosen so as to trip the power fail comparator a few  
milliseconds before V  
CC falls below the maximum reset  
threshold voltage. The output of the power fail  
comparator (PFO) can be used to interrupt the  
microprocessor when used in this mode and execute  
shut-down procedures prior to power loss.  
Figure 4. Reset Timing Diagram  
Watchdog Timer  
The microprocessor can be monitored by connecting  
the WDI pin (watchdog input) to a bus line or I/O line. If  
a transition doesn’t occur on the WDI pin within the  
microprocessor is properly reset and powers up into a  
known condition after a power failure. RESET will  
remain valid with V  
as low as 1.4V.  
CC  
watchdog timeout period, then WDO will go low.  
A
minimum pulse of 50ns or any transition low-to-high or  
high-to-low on the WDI pin will reset the watchdog timer.  
6
MIC705/6/7/8 µP Supervisory Circuits  
Alternate Source Cross Reference Guide  
MIC Direct  
Replacement  
MIC705N  
MIC705M  
MIC705N  
MIC705M  
MIC705N  
MIC705N  
MIC705M  
MIC706N  
MIC706M  
MIC706N  
MIC706N  
MIC706N  
MIC706M  
MIC707N  
MIC707M  
MIC707N  
MIC707M  
MIC707N  
MIC707N  
MIC707M  
MIC708N  
MIC708M  
MIC708N  
MIC708M  
MIC708N  
MIC708N  
MIC708M  
Industry P/N  
MAX705CPA  
MAX705CSA  
MAX705EPA  
MAX705ESA  
ADM705AN  
DS1705EPA  
DS1705ESA  
MAX706CPA  
MAX706CSA  
MAX706EPA  
ADM706AN  
DS1706EPA  
DS1706ESA  
MAX707CPA  
MAX707CSA  
MAX707EPA  
MAX707ESA  
ADM707AN  
DS1707EPA  
DS1707ESA  
MAX708CPA  
MAX708CSA  
MAX708EPA  
MAX708ESA  
ADM708AN  
DS1708EPA  
DS1708ESA  
7
MIC705/6/7/8 µP Supervisory Circuits  
Packaging Information  
M Package, 8-Pin Small Outline  
N Package, 8-Pin Plastic Dual-In-Line  
0.400  
0.370  
0.260  
0.240  
0.310  
0.290  
0.150  
0.035  
0.120  
0.015  
0.150  
0.125  
0.110  
0.090  
0.370  
0.300  
0.023  
0.015  
8

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