SY100H841LZC [MICREL]

3.3V SINGLE SUPPLY QUAD PECL-TO-TTL W/LATCHED OUTPUT ENABLE; 3.3V单电源四路PECL -TO -TTL W /输出锁存使能


型号：	SY100H841LZC
厂家：	MICREL SEMICONDUCTOR
描述：	3.3V SINGLE SUPPLY QUAD PECL-TO-TTL W/LATCHED OUTPUT ENABLE 3.3V单电源四路PECL -TO -TTL W /输出锁存使能输出元件
文件：	总5页 (文件大小：81K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

ClockWorks™

PRELIMINARY

SY10H841L

3.3V SINGLE SUPPLY QUAD

PECL-TO-TTL W/LATCHED

OUTPUT ENABLE

SY100H841L

DESCRIPTION

FEATURES

■ 3.3V power supply

The SY10/100H841L are single supply, low skew

translating 1:4 clock drivers.

■ Translates positive ECL to TTL (PECL-to-TTL)

■ 300ps pin-to-pin skew

The devices feature a 24mA TTL output stage, with

AC performance specified into a 20pF load capacitance.

A latch is provided on-chip. When LEN is LOW (or left

open, in which case it is pulled low by the internal pull-

downs) the latch is transparent. A HIGH on the enable

pin (EN) forces all outputs LOW.

As frequencies increase to 40MHz and above, precise

timing and shaping of clock signals becomes extremely

important. The H841 solves several clock distribution

problems such as minimizing skew (300ps), maximizing

clock fanout (24mA drive), and precise duty cycle control

through a proprietary differential internal design.

The 10K version is compatible with 10KH ECL logic

levels. The 100K version is compatible with 100K levels.

■ 500ps part-to-part skew

■ Differential internal design for increased noise

immunity and stable threshold inputs

■ VBB reference output

■ Single supply

■ Enable input

■ Latch enable input

■ Extra TTL and ECL power/ground pins to reduce

cross-talk/noise

■ High drive capability: 24mA each output

■ Fully compatible with industry standard 10K, 100K

I/O levels

■ Available in 16-pin SOIC package

PIN CONFIGURATION

BLOCK DIAGRAM

LEN

SOIC

Z16-1

VBB

PIN NAMES

D Q

Function

LEN

TTL Ground (0V)

TTL VCC (+3.3V)

ECL VCC (+3.3V)

ECL Ground (0V)

Signal Input (PECL)

D, D

VBB

Q0 - Q3

VBB Reference Output (PECL)

Signal Outputs (TTL)

Enable Input (PECL)

Latch Enable Input

LEN

Rev.: C

Amendment:/0

Issue Date: May, 1999

ClockWorks™

PRELIMINARY

SY10H841L

Micrel

SY100H841L

TRUTH TABLE

PIN DESCRIPTION

Symbol

LEN

Description

Latch Enable Input

LEN

Enable Input (PECL)

ECL Ground (0V)

ECL VCC (+3.3V)

Latch

ECL Signal Input (Non-inverting)

ECL Signal Input (Inverting)

VBB Reference Output (PECL)

TTL Ground (0V)

(1)

ABSOLUTE MAXIMUM RATINGS

VBB

Symbol

Rating

Value

Unit

Signal Output (TTL)

TTL Ground (0V)

VE (ECL)

VT (TTL)

Power Supply

Voltage

–0.5 to +7.0

Signal Output (TTL)

TTL VCC (+3.3V)

VI (ECL)

VOUT (TTL)

Input Voltage

0.0 to VEE

0.0 to VT

Tstore

Storage Temperature

Operating Temperature

–65 to +150

0 to +85

˚C

TTL VCC (+3.3V)

Signal Output (TTL)

TTL Ground (0V)

NOTE:

1. PermanentdevicedamagemayoccurifABSOLUTEMAXIMUMRATINGS

are exceeded. This is a stress rating only and functional operation is not

implied at conditions other than those detailed in the operational sections

ofthisdatasheet. ExposuretoABSOLUTEMAXIMUMRATlNGconditions

for extended periods may affect device reliability.

Signal Output (TTL)

DC CHARACTERISTICS

VT = VE = +3.0V to +3.6V

TA = 0°C

TA = +25°C

TA = +85°C

Symbol

Parameter

Power Supply Current

Min.

Max.

Min.

Max.

Min.

Max.

Unit

Condition

VE Pin

IEE

ECL

TTL

—

ICCH

ICCL

—

Total all VT pins

TTL DC ELECTRICAL CHARACTERISTICS

VT = VE = +3.0V to +3.6V

TA = 0°C

TA = +25°C

TA = +85°C

Symbol

VOH

Parameter

Min.

2.0

—

Max.

—

Min.

Max.

—

Min.

2.0

—

Max.

Unit

Condition

IOH = –3.0mA

IOL = 24mA

VOUT = 0V

Output HIGH Voltage

Output LOW Voltage

Output Short Circuit Current

2.0

—

0.5

—

VOL

0.5

—

0.5

—

IOS

–80

ClockWorks™

PRELIMINARY

SY10H841L

Micrel

SY100H841L

(1)

10H ECL DC ELECTRICAL CHARACTERISTICS

VT = VE = +3.0V to +3.6V

TA = 0°C

TA = +25°C

TA = +85°C

Symbol

IIH

Parameter

Min.

Max.

225

Min.

—

Max.

Min.

Max.

175

Unit

µA

Condition

Input HIGH Current

Input LOW Current

Input HIGH Voltage

Input LOW Voltage

Output Reference Voltage

—

175

—

IIL

0.5

—

0.5

—

VIH

2.130

1.350

1.920

2.460

1.820

2.030

2.170

1.350

1.950

2.490

1.820

2.050

2.240

1.350

1.990

2.580

1.855

2.110

VE = 3.3V

VIL

VBB

NOTE:

1. ECL VIH, VIL and VBB are referenced to VCCE and will vary 1:1 with the power supply. The levels shown are for IVT = IVO = VCCE = +3.3V.

(1)

100H ECL DC ELECTRICALCHARACTERISTICS

VT = VE = +3.0V to +3.6V

TA = 0°C

TA = +25°C

TA = +85°C

Symbol

IIH

Parameter

Min.

Max.

225

Min.

—

Max.

Min.

Max.

175

Unit

µA

Condition

—

Input HIGH Current

Input LOW Current

Input HIGH Voltage

Input LOW Voltage

Output Reference Voltage

—

175

—

IIL

0.5

—

0.5

—

VIH

2.135

1.490

1.920

2.420

1.825

2.040

2.135

1.490

1.920

2.420

1.825

2.040

2.135

1.490

1.920

2.420

1.825

2.040

VE = 3.3V

VIL

VBB

NOTE:

1. ECL VIH, VIL and VBB are referenced to VCCE and will vary 1:1 with the power supply. The levels shown are for IVT = IVO = VCCE = +3.3V.

AC CHARACTERISTICS

VT = VE = +3.0V to +3.6V

TA = 0°C

TA = +25°C

TA = +85°C

Symbol

Parameter

Propagation Delay

Min.

Max.

Min.

Max.

Min.

Max.

Unit

Condition

tPLH

tPHL

Q0–Q3

2.2

3.2

2.1

3.1

2.0

3.0

CL = 20pF

D to Output

tskpp

Part-to-Part Skew^(1,4)

Within-Device Skew^(2,4)

Within-Device Skew^(3,4)

Q0–Q3

—

0.5

0.3

3.2

—

0.5

0.3

3.1

—

0.5

0.3

3.0

CL = 20pF

tskew++

tskew– –

—

tPLH

tPHL

Propagation Delay

LEN to Q

2.2

2.1

2.0

tPLH

tPHL

Propagation Delay

EN to Output

Q0–Q3

2.2

—

3.2

1.5

2.1

—

3.1

1.5

2.0

—

3.0

1.5

CL = 20pF

Output Rise/Fall Time

1.0V to 2.0V

fMAX

—

Max. Input Frequency^(5,6)

Q0–Q3

160

1.5

—

160

1.5

—

160

1.5

—

MHz

CL = 20pF

Pulse Width

—

Recovery Time EN

Set-up Time D, EN

Hold Time D, EN

1.0

0.75

NOTES:

3. Within-Device Skew considering LOW-to-LOW transitions at common

VCC level.

1. Device-to-DeviceSkewconsideringHIGH-to-HIGHtransitionsatcommon

VCC level.

4. All skew parameters are guaranteed but not tested.

2. Within-Device Skew considering HIGH-to-HIGH transitions at common

VCC level.

5. Frequency at which output levels will meet a 0.8V to 2.0V minimum swing.

6. The fMAX value is specified as the minimum guaranteed maximum

frequency. Actual operational maximum frequency may be greater.

ClockWorks™

PRELIMINARY

SY10H841L

Micrel

SY100H841L

TTL SWITCHING CIRCUIT

CC & VCCO

USE 0.1µF CAPACITORS

FOR DECOUPLING.

PECL

TTL

50Ω COAX

DEVICE

UNDER

TEST

OUT

PULSE

GENERATOR

450Ω

50Ω COAX

USE OSCILLOSCOPE

INTERNAL 50Ω LOAD

FOR TERMINATION.

CH A

CH B

OSCILLOSCOPE

ECL/TTL PROPAGATION DELAY — SINGLE ENDED

50%

VIN

Tpd++

Tpd– –

1.5V

VOUT

ECL/TTL WAVEFORMS: RISE AND FALL TIMES

2.0V

0.8V

OUT

rise

Tfall

LPORGOIDCUDCITAGORADMERING CODE

Ordering

Code

Package

Type

Operating

Range

SY10H841LZC

Z16-1

Commercial

SY10H841LZCTR

SY100H841LZC

SY100H841LZCTR

ClockWorks™

PRELIMINARY

SY10H841L

Micrel

SY100H841L

16 LEAD SOIC .300" WIDE (Z16-1)

Rev. 03

MICREL-SYNERGY 3250 SCOTT BOULEVARD SANTA CLARA CA 95054 USA

TEL + 1 (408) 980-9191 FAX + 1 (408) 914-7878 WEB http://www.micrel.com

This information is believed to be accurate and reliable, however no responsibility is assumed by Micrel for its use nor for any infringement of patents or

other rights of third parties resulting from its use. No license is granted by implication or otherwise under any patent or patent right of Micrel Inc.

SY100H841LZC [MICREL]

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