SY100S811ZCTR [MICREL]
SINGLE SUPPLY 1:9 PECL/TTL-TO-PECL; 单电源1 ： 9 PECL / TTL - TO- PECL
| 型号： | SY100S811ZCTR |
| 厂家： | 
MICREL SEMICONDUCTOR |
| 描述： | SINGLE SUPPLY 1:9 PECL/TTL-TO-PECL |
| 文件： | 总5页 (文件大小：114K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SINGLE SUPPLY 1:9
PECL/TTL-TO-PECL
ClockWorks™
SY100S811
FEATURES
DESCRIPTION
■ PECL version of popular ECLinPS E111
■ Low skew
The SY100S811 is a low skew 1-to-9 PECL differential
driver designed for clock distribution in new, high-
performance PECL systems. It accepts either a PECL
clock input or a TTL input by using the TTL enable pin TEN.
When the TTL enable pin is HIGH, the TTL input is enabled
and the PECL input is disabled. When the enable pin is set
LOW, the TTL input is disabled and the PECL input is
enabled.
■ Guaranteed skew spec
■ VBB output
■ TTL enable input
■ Selectable TTL or PECL clock input
■ Single +5V supply
The device is specifically designed and produced for low
skew. The interconnect scheme and metal layout are
carefully optimized for minimal gate-to-gate skew within
the device. Wafer characterization and process control
ensure consistent distribution of propagation delay from lot
to lot. Since the S811 shares a common set of “basic”
processing with the other members of the ECLinPS family,
wafer characterization at the point of device personalization
allows for tighter control of parameters, including
propagation delay.
To ensure that the skew specification is met, it is
necessary that both sides of the differential output are
terminated into 50Ω, even if only one side is being used. ln
most applications, all nine differential pairs will be used
and, therefore, terminated. In the case where fewer than
nine pairs are used, it is necessary to terminate at least the
output pairs on the same package side (i.e. sharing the
same VCCO as the pair(s) being used on that side) in order
to maintain minimum skew.
■ Differential internal design
■ Similar pin configuration to E111
■ PECL I/O fully compatible with industry standard
■ Internal 75KΩ PECL input pull-down resistors
■ Available in 28-pin PLCC and SOIC packages
BLOCK DIAGRAM
Q0
Q0
Q1
Q1
Q2
Q2
Q3
Q3
Q4
Q4
Q5
Q5
Q6
Q6
Q7
Q7
Q8
Q8
E
E
IN
IN
0
1
The VBB output is intended for use as a reference
voltage for single-ended reception of PECL signals to that
device only. When using VBB for this purpose, it is
recommended that VBB is decoupled to VCC via a 0.01µF
capacitor.
T
IN
PIN CONFIGURATION
T
EN
25 24 23 22 21 20 19
VEE
TEN
26
27
28
1
18
17
16
15
14
13
12
Q3
Q3
EIN
Q4
TOP VIEW
PLCC
J28-1
VCC
VCCO
Q4
V
BB
2
EIN
VBB
TIN
3
Q5
4
Q5
5
6
7
8
9
10 11
Rev.: F
Amendment: /0
Issue Date: October, 1998
1
ClockWorks™
SY100S811
Micrel
PIN CONFIGURATION
TRUTH TABLE
TEN
L
EIN
TIN
X
Q
L
28
27
26
25
24
23
22
21
20
19
18
17
16
15
V
CC
1
2
E
IN
L
H
X
X
E
IN
TEN
L
X
H
L
3
V
BB
VEE
H
L
T
IN
4
H
H
H
Q
0
5
Q
8
8
Q
Q
0
1
6
Q
TOP VIEW
SOIC
Z28-1
PIN NAMES
7
VCCO
Q
7
8
V
CCO
Q
Q
1
2
Pin
EIN, EIN
TIN
Function
9
Q
7
Differential PECL Input Pair
TTL Input
10
11
12
13
14
Q
Q
6
6
Q
Q
2
3
TEN
TTL Input Enable
Differential PECL Outputs
VBB Output
Q0, Q0 – Q8, Q8
VBB
Q
Q
5
Q
Q
3
4
5
VCC
PECL VCC (+5.0V)
PECL Ground (0V)
VCCO
Q
4
VEE
PECL DC ELECTRICAL CHARACTERISTICS
VCC = VCCO = +5.0V ± 5%
TA = 0°C
TA = +25°C
TA = +85°C
Symbol
Parameter
Min.
Typ.
Max.
Min.
Typ.
Max.
Min.
Typ.
Max.
Unit
VBB
Output Reference(1)
Voltage
3.62
—
3.74
3.62
—
3.74
3.62
—
3.74
V
IIH
Input HIGH Current
Input LOW Current
Input HIGH Voltage(1)
Input LOW Voltage(1)
—
—
—
—
—
150
—
—
—
—
—
—
150
—
—
—
—
—
—
150
—
µA
µA
V
IIL
0.5
0.5
0.5
VIH
VIL
VOH
VOL
ICC
3.835
3.190
4.120
3.525
3.835
3.190
4.120
3.525
3.835
3.190
4.120
3.525
V
Output HIGH Voltage(2) VCC –1025 VCC –955 VCC –870 VCC –1025 VCC –955 VCC –870 VCC –1025 VCC –955 VCC –870 mV
Output LOW Voltage(2) VCC –1890 VCC –1705 VCC –1620 VCC –1890 VCC –1705 VCC –1620 VCC –1890 VCC –1705VCC –1620 mV
Power Supply(3)
Current
—
53
65
—
53
65
—
60
74
mA
NOTES:
1. VCC = VCCO = 5.0V
2. VIN = VIH (Max.) or VIL (Min.) Loading with 50Ω to VCC –2V.
3. All inputs and outputs open.
2
ClockWorks™
SY100S811
Micrel
TTL DC ELECTRICAL CHARACTERISTICS
VCC = VCCO = +5.0V ± 5%
TA = 0°C
TA = +25°C
TA = +85°C
Symbol
Parameter
Min.
Typ.
Max.
Min.
Typ.
Max.
Min.
Typ.
Max.
Unit
VIH
VIL
Input HIGH Voltage
Input LOW Voltage
2.0
—
—
—
—
0.8
2.0
—
—
—
—
0.8
2.0
—
—
—
—
0.8
V
V
IIH
Input HIGH Current(1),(2)
—
—
—
—
20
100
—
—
—
—
20
100
—
—
—
—
20
100
µA
IIL
Input LOW Current(3)
Input Clamp Voltage(4)
—
—
—
—
–0.6
–1.2
—
—
—
—
–0.6
–1.2
—
—
—
—
–0.6
–1.2
mA
V
VIK
NOTES:
1. VIN = 2.7V
2. VIN = 5.0V
3. VIN = 0.5V
4. IIN = -18mA
AC ELECTRICAL CHARACTERISTICS(1–6)
VCC = VCCO = +5.0V ± 5%
TA = 0°C
Typ.
TA = +25°C
TA = +85°C
Symbol
Parameter
Min.
Max.
Min.
Typ.
Max.
Min.
Typ.
Max.
Unit
tPLH
tPHL
Propagation Delay to Output(1)
EIN (differential)(2)
EIN (single-ended)(3)
TIN
ps
430
330
350
—
—
—
630
730
950
430
330
350
—
—
—
630
730
950
430
330
350
—
—
—
630
730
950
tskew
VPP
Within-Device skew(4)
—
25
—
50
—
—
25
—
50
—
—
25
—
50
—
ps
mV
V
Minimum PECL Input Swing(5)
PECL Common Mode Range(6)
250
–1.6
275
250
–1.6
275
250
–1.6
275
VCMR
—
–0.4
600
—
–0.4
600
—
–0.4
600
tr
tf
Output Rise/Fall Times
20% to 80%
375
375
375
ps
NOTES:
1. Part-to-part skew is defined as Max. — Min. value at the given temperature.
2. The differential propagation delay is defined as the delay from the crossing points of the differential input signals to the crossing point of the
differential output signals.
3. The single-ended propagation delay is defined as the delay from the 50% point of the input signal to the 50% point of the output signal.
4. The within-device skew is defined as the worst case difference between any two similar delay paths within a single device.
5. VPP (min.) is defined as the minimum input differential voltage which will cause no increase in the propagation delay. The VPP (min.) is AC limited for
the S811, as a differential input as low as 50mV will still produce full PECL levels at the output.
6. VCMR is defined as the range within which the VIH level may vary, with the device still meeting the propagation delay specification. The VIL level must
be such that the peak-to-peak voltage is less than 1.0V and greater than or equal to VPP (min.).
PRODUCT ORDERING CODE
Ordering
Code
Package
Type
Operating
Range
SY100S811JC
J28-1
J28-1
Z28-1
Z28-1
Commercial
Commercial
Commercial
Commercial
SY100S811JCTR
SY100S811ZC
SY100S811ZCTR
3
Micrel
28 LEAD PLCC (J28-1)
Rev. 03
4
Micrel
28 LEAD SOIC .300" WIDE (Z28-1)
Rev. 02
MICREL-SYNERGY 3250 SCOTT BOULEVARD SANTA CLARA CA 95054 USA
TEL + 1 (408) 980-9191 FAX + 1 (408) 914-7878 WEB http://www.micrel.com
This information is believed to be accurate and reliable, however no responsibility is assumed by Micrel for its use nor for any infringement of patents or
other rights of third parties resulting from its use. No license is granted by implication or otherwise under any patent or patent right of Micrel Inc.
© 2000 Micrel Incorporated
5
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