24C00-I/P_技术文档

24AA00/24LC00/24C00

128-Bit I²C^™Bus Serial EEPROM

Device Selection Table

Package Types

Device

VCC Range

Temp Range

8-PIN PDIP/SOIC

24AA00

24LC00

24C00

1.7-5.5

2.5-5.5

4.5-5.5

I

NC

Vss

1

2

3

4

8

7

6

5

VCC

NC

I,E

SCL

SDA

Features:

8-PIN TSSOP

• Single supply with operation down to 1.7V for

24AA00 devices, 2.5V for 24LC00 devices

1

8

7

6

5

NC

VCC

NC

2

3

4

• Low-power CMOS technology:

- Read current 500 μA, typical

NC

SCL

SDA

VSS

- Standby current 100 nA, typical

• 2-wire serial interface, I²C™ compatible

• Schmitt Trigger inputs for noise suppression

• Output slope control to eliminate ground bounce

• 100 kHz and 400 kHz clock compatibility

• Page write time 3 ms, typical

5-PIN SOT-23

DFN

VCC

NC

SCL

1

NC

VCC

NC

5

4

8

7

6

5

2

3

4

NC

VSS

2

3

SCL

SDA

NC

VSS

SDA

• Self-timed erase/write cycle

• ESD protection >4000V

• More than 1 million erase/write cycles

• Data retention >200 years

Block Diagram

HV Generator

• Factory programming available

• Packages include 8-lead PDIP, SOIC, TSSOP,

DFN and 5-lead SOT-23

I/O

Control

Logic

Memory

Control

Logic

EEPROM

Array

• Pb-free and RoHS compliant

• Temperature ranges available:

XDEC

- Industrial (I):

-40°C to +85°C

SCL

SDA

- Automotive (E): -40°C to +125°C

YDEC

Description:

VCC

VSS

Sense AMP

R/W Control

The Microchip Technology Inc. 24AA00/24LC00/

24C00 (24XX00*) is a 128-bit Electrically Erasable

PROM memory organized as 16 x 8 with a 2-wire

serial interface. Low-voltage design permits operation

down to 1.7 volts for the 24AA00 version, and every

version maintains a maximum standby current of only

1 μA and typical active current of only 500 μA. This

device was designed for where a small amount of

EEPROM is needed for the storage of calibration

values, ID numbers or manufacturing information, etc.

The 24XX00 is available in 8-pin PDIP, 8-pin SOIC

(3.90 mm), 8-pin TSSOP, 8-pin 2x3 DFN and the 5-pin

SOT-23 packages.

Pin Function Table

Name

Function

VSS

SDA

SCL

VCC

Ground

Serial Data

Serial Clock

+1.7V to 5.5V (24AA00)

+2.5V to 5.5V (24LC00)

+4.5V to 5.5V (24C00)

No Internal Connection

NC

*24XX00 is used in this document as a generic part number for

the 24AA00/24LC00/24C00 devices.

2

I C is a trademark of Philips Corporation.

DS21178G-page 1

24AA00/24LC00/24C00

1.0

ELECTRICAL CHARACTERISTICS

(†)

Absolute Maximum Ratings

VCC.............................................................................................................................................................................6.5V

All inputs and outputs w.r.t. VSS ......................................................................................................... -0.6V to VCC +1.0V

Storage temperature ...............................................................................................................................-65°C to +150°C

Ambient temperature with power applied................................................................................................-40°C to +125°C

ESD protection on all pins..........................................................................................................................................4 kV

† NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to

the device. This is a stress rating only and functional operation of the device at those or any other conditions

above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating

conditions for extended periods may affect device reliability.

TABLE 1-1:

DC CHARACTERISTICS

All Parameters apply across the

recommended operating ranges unless

otherwise noted

Industrial (I):

Automotive (E)

TA = -40°C to +85°C,

TA = -40°C to +125°C, VCC = 4.5V to 5.5V

VCC = 1.8V to 5.5V

Parameter

Symbol

Min.

Max.

Units

Conditions

SCL and SDA pins:

VIH

0.7 VCC

—

V

(Note)

High-level input voltage

Low-level input voltage

VIL

—

0.3 VCC

—

V

Hysteresis of Schmitt Trigger

inputs

VHYS

.05 VCC

VCC ≥ 2.5V (Note)

Low-level output voltage

VOL

—

0.4

V

IOL = 3.0 mA, VCC = 4.5V

IOL = 2.1 mA, VCC = 2.5V

Input leakage current

ILI

—

±1

10

μA

pF

VIN = VCC or VSS

Output leakage current

ILO

VOUT = VCC or VSS

Pin capacitance (all inputs/outputs)

CIN,

VCC = 5.0V (Note)

COUT

TA = 25°C, FCLK = 1 MHz

Operating current

ICC Write

ICC Read

ICCS

—

2

1

mA

μA

VCC = 5.5V, SCL = 400 kHz

VCC = 5.5V, SDA = SCL = VCC

Standby current

Note:

This parameter is periodically sampled and not 100% tested.

FIGURE 1-1:

BUS TIMING DATA

THIGH

TF

TR

TSU:STA

SCL

TSU:STO

THD:DAT

TSU:DAT

TLOW

THD:STA

SDA

IN

TSP

TBUF

TAA

SDA

OUT

DS21178G-page 2

24AA00/24LC00/24C00

TABLE 1-2:

AC CHARACTERISTICS

All Parameters apply across all

recommended operating ranges

unless otherwise noted

Industrial (I):

Automotive (E):

TA = -40°C to +85°C, VCC = 1.8V to 5.5V

TA = -40°C to +125°C, VCC = 4.5V to 5.5V

Parameter

Symbol

Min

Max

Units

Conditions

Clock frequency

FCLK

—

100

400

kHz

4.5V ≤ Vcc ≤ 5.5V (E Temp range)

1.7V ≤ Vcc ≤ 4.5V

4.5V ≤ Vcc ≤ 5.5V

Clock high time

Clock low time

THIGH

TLOW

TR

4000

600

—

ns

4.5V ≤ Vcc ≤ 5.5V (E Temp range)

1.7V ≤ Vcc ≤ 4.5V

4.5V ≤ Vcc ≤ 5.5V

4700

1300

—

4.5V ≤ Vcc ≤ 5.5V (E Temp range)

1.7V ≤ Vcc ≤ 4.5V

4.5V ≤ Vcc ≤ 5.5V

SDA and SCL rise time

(Note 1)

—

1000

300

4.5V ≤ Vcc ≤ 5.5V (E Temp range)

1.7V ≤ Vcc ≤ 4.5V

4.5V ≤ Vcc ≤ 5.5V

SDA and SCL fall time

Start condition hold time

TF

—

300

ns

(Note 1)

THD:STA

4000

600

—

4.5V ≤ Vcc ≤ 5.5V (E Temp range)

1.7V ≤ Vcc ≤ 4.5V

4.5V ≤ Vcc ≤ 5.5V

Start condition setup time

TSU:STA

4700

600

—

ns

4.5V ≤ Vcc ≤ 5.5V (E Temp range)

1.7V ≤ Vcc ≤ 4.5V

4.5V ≤ Vcc ≤ 5.5V

Data input hold time

Data input setup time

THD:DAT

TSU:DAT

0

—

ns

(Note 2)

250

100

—

4.5V ≤ Vcc ≤ 5.5V (E Temp range)

1.7V ≤ Vcc ≤ 4.5V

4.5V ≤ Vcc ≤ 5.5V

Stop condition setup time

TSU:STO

TAA

4000

600

—

ns

4.5V ≤ Vcc ≤ 5.5V (E Temp range)

1.7V ≤ Vcc ≤ 4.5V

4.5V ≤ Vcc ≤ 5.5V

Output valid from clock

(Note 2)

—

3500

900

4.5V ≤ Vcc ≤ 5.5V (E Temp range)

1.7V ≤ Vcc ≤ 4.5V

4.5V ≤ Vcc ≤ 5.5V

4.5V ≤ Vcc ≤ 5.5V (E Temp range)

1.7V ≤ Vcc ≤ 4.5V

4.5V ≤ Vcc ≤ 5.5V

Bus free time: Time the bus must TBUF

be free before a new transmis-

sion can start

4700

1300

—

Output fall time from VIH

minimum to VIL maximum

TOF

TSP

TWC

20+0.1

CB

250

ns

(Note 1), CB ≤ 100 pF

Input filter spike suppression

(SDA and SCL pins)

—

50

(Notes 1, 3)

Write cycle time

Endurance

—

4

ms

1M

—

cycles (Note 4)

Note 1: Not 100% tested. CB = total capacitance of one bus line in pF.

2: As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region

(minimum 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions.

3: The combined TSP and VHYS specifications are due to new Schmitt Trigger inputs which provide improved

noise spike suppression. This eliminates the need for a TI specification for standard operation.

4: This parameter is not tested but ensured by characterization. For endurance estimates in a specific

application, please consult the Total Endurance™ Model which can be obtained at www.microchip.com.

DS21178G-page 3

24AA00/24LC00/24C00

2.0

2.1

PIN DESCRIPTIONS

SDA Serial Data

4.0

BUS CHARACTERISTICS

The following bus protocol has been defined:

• Data transfer may be initiated only when the bus

is not busy.

This is a bidirectional pin used to transfer addresses

and data into and data out of the device. It is an open

drain terminal, therefore the SDA bus requires a pull-up

resistor to VCC (typical 10 kΩ for 100 kHz, 2 kΩ for

400 kHz).

• During data transfer, the data line must remain

stable whenever the clock line is high. Changes in

the data line while the clock line is high will be

interpreted as a Start or Stop condition.

For normal data transfer SDA is allowed to change only

during SCL low. Changes during SCL high are

reserved for indicating the Start and Stop conditions.

Accordingly, the following bus conditions have been

defined (Figure 4-1).

4.1

Bus Not Busy (A)

2.2

SCL Serial Clock

Both data and clock lines remain high.

This input is used to synchronize the data transfer from

and to the device.

4.2

Start Data Transfer (B)

A high-to-low transition of the SDA line while the clock

(SCL) is high determines a Start condition. All

commands must be preceded by a Start condition.

2.3

Noise Protection

The SCL and SDA inputs have Schmitt Trigger and

filter circuits which suppress noise spikes to assure

proper device operation even on a noisy bus.

4.3

Stop Data Transfer (C)

A low-to-high transition of the SDA line while the clock

(SCL) is high determines a Stop condition. All

operations must be ended with a Stop condition.

3.0

FUNCTIONAL DESCRIPTION

The 24XX00 supports a bidirectional 2-wire bus and

data transmission protocol. A device that sends data

onto the bus is defined as a transmitter, and a device

receiving data as a receiver. The bus has to be

controlled by a master device which generates the

Serial Clock (SCL), controls the bus access, and

generates the Start and Stop conditions, while the

24XX00 works as slave. Both master and slave can

operate as transmitter or receiver, but the master

device determines which mode is activated.

4.4

Data Valid (D)

The state of the data line represents valid data when,

after a Start condition, the data line is stable for the

duration of the high period of the clock signal.

The data on the line must be changed during the low

period of the clock signal. There is one bit of data per

clock pulse.

Each data transfer is initiated with a Start condition and

terminated with a Stop condition. The number of the

data bytes transferred between the Start and Stop

conditions is determined by the master device and is

theoretically unlimited.

DS21178G-page 4

24AA00/24LC00/24C00

The device that acknowledges has to pull down the

SDA line during the Acknowledge clock pulse in such a

way that the SDA line is stable low during the high

period of the acknowledge related clock pulse. Of

course, setup and hold times must be taken into

account. A master must signal an end of data to the

slave by not generating an Acknowledge bit on the last

byte that has been clocked out of the slave. In this

case, the slave must leave the data line high to enable

the master to generate the Stop condition (Figure 4-2).

4.5

Acknowledge

Each receiving device, when addressed, is obliged to

generate an acknowledge after the reception of each

byte. The master device must generate an extra clock

pulse which is associated with this Acknowledge bit.

Note:

The 24XX00 does not generate any

Acknowledge bits if an internal program-

ming cycle is in progress.

FIGURE 4-1:

DATA TRANSFER SEQUENCE ON THE SERIAL BUS

(A)

(B)

(C)

(D)

(C) (A)

SCL

SDA

Start

Condition

Stop

Condition

Address or

Acknowledge

Valid

Data

Allowed

to Change

FIGURE 4-2:

ACKNOWLEDGE TIMING

Acknowledge

Bit

1

2

3

4

5

6

7

8

9

1

2

3

SCL

SDA

Data from transmitter

Receiver must release the SDA line at this point

so the Transmitter can continue sending data.

Transmitter must release the SDA line at this point

allowing the Receiver to pull the SDA line low to

acknowledge the previous eight bits of data.

DS21178G-page 5

24AA00/24LC00/24C00

5.0

DEVICE ADDRESSING

6.0

6.1

WRITE OPERATIONS

Byte Write

After generating a Start condition, the bus master

transmits a control byte consisting of a slave address

and a Read/Write bit that indicates what type of

operation is to be performed. The slave address for the

24XX00 consists of a 4-bit device code ‘1010’ followed

by three “don’t care” bits.

Following the Start signal from the master, the device

code (4 bits), the “don’t care” bits (3 bits), and the R/W

bit (which is a logic low) are placed onto the bus by the

master transmitter. This indicates to the addressed

slave receiver that a byte with a word address will

follow after it has generated an Acknowledge bit during

the ninth clock cycle. Therefore, the next byte transmit-

ted by the master is the word address and will be

written into the Address Pointer of the 24XX00. Only

the lower four address bits are used by the device, and

the upper four bits are “don’t cares.” The 24XX00 will

acknowledge the address byte and the master device

will then transmit the data word to be written into the

addressed memory location. The 24XX00 acknowl-

edges again and the master generates a Stop

condition. This initiates the internal write cycle, and

during this time the 24XX00 will not generate Acknowl-

edge signals (Figure 7-2). After a byte Write command,

the internal address counter will not be incremented

and will point to the same address location that was just

written. If a Stop bit is transmitted to the device at any

point in the Write command sequence before the entire

sequence is complete, then the command will abort

and no data will be written. If more than 8 data bits are

transmitted before the Stop bit is sent, then the device

will clear the previously loaded byte and begin loading

the data buffer again. If more than one data byte is

transmitted to the device and a Stop bit is sent before a

full eight data bits have been transmitted, then the

Write command will abort and no data will be written.

The 24XX00 employs a VCC threshold detector circuit

which disables the internal erase/write logic if the VCC

is below 1.5V (24AA00 and 24LC00) or 3.8V (24C00)

at nominal conditions.

The last bit of the control byte determines the operation

to be performed. When set to a one a read operation is

selected, and when set to a zero a write operation is

selected (Figure 5-1). The 24XX00 monitors the bus for

its corresponding slave address all the time. It

generates an Acknowledge bit if the slave address was

true and it is not in a programming mode.

FIGURE 5-1:

CONTROLBYTEFORMAT

Read/Write Bit

Device Select

Bits

Don’t Care

Bits

S

1

0

1

0

x

x R/W ACK

Slave Address

Acknowledge Bit

Start Bit

DS21178G-page 6

24AA00/24LC00/24C00

FIGURE 7-1:

ACKNOWLEDGE

POLLING FLOW

7.0

ACKNOWLEDGE POLLING

Since the device will not acknowledge during a write

cycle, this can be used to determine when the cycle is

complete (this feature can be used to maximize bus

throughput). Once the Stop condition for a Write

command has been issued from the master, the device

initiates the internally timed write cycle. ACK polling

can be initiated immediately. This involves the master

sending a Start condition followed by the control byte

for a Write command (R/W = 0). If the device is still

busy with the write cycle, then no ACK will be returned.

If no ACK is returned, then the Start bit and control byte

must be re-sent. If the cycle is complete, then the

device will return the ACK and the master can then

proceed with the next Read or Write command. See

Figure 7-1 for flow diagram.

Send

Write Command

Send Stop

Condition to

Initiate Write Cycle

Send Start

Send Control Byte

with R/W = 0

Did Device

Acknowledge

(ACK = 0)?

No

Yes

FIGURE 7-2:

BYTE WRITE

S

T

A

R

T

S

T

O

P

BUS ACTIVITY

MASTER

Control

Byte

Word

Address

Data

SDA LINE

P

S

1

0

1

0

x

0

x

A

C

K

A

C

K

A

C

K

BUS ACTIVITY

x = “don’t care” bit

DS21178G-page 7

24AA00/24LC00/24C00

After the word address is sent, the master generates a

Start condition following the acknowledge. This termi-

nates the write operation, but not before the internal

Address Pointer is set. Then the master issues the

control byte again, but with the R/W bit set to a one.

The 24XX00 will then issue an acknowledge and trans-

mits the eight bit data word. The master will not

acknowledge the transfer, but does generate a Stop

condition and the device discontinues transmission

(Figure 8-2). After this command, the internal address

counter will point to the address location following the

one that was just read.

8.0

READ OPERATIONS

Read operations are initiated in the same way as write

operations with the exception that the R/W bit of the

slave address is set to one. There are three basic types

of read operations: current address read, random read

and sequential read.

8.1

Current Address Read

The 24XX00 contains an address counter that main-

tains the address of the last word accessed, internally

incremented by one. Therefore, if the previous read

access was to address n, the next current address read

operation would access data from address n + 1. Upon

receipt of the slave address with the R/W bit set to one,

the device issues an acknowledge and transmits the

eight-bit data word. The master will not acknowledge

the transfer, but does generate a Stop condition and the

device discontinues transmission (Figure 8-1).

8.3

Sequential Read

Sequential reads are initiated in the same way as a

random read except that after the device transmits the

first data byte, the master issues an acknowledge as

opposed to a Stop condition in a random read. This

directs the device to transmit the next sequentially

addressed 8-bit word (Figure 8-3).

8.2

Random Read

To provide sequential reads the 24XX00 contains an

internal Address Pointer which is incremented by one

at the completion of each read operation. This Address

Pointer allows the entire memory contents to be serially

read during one operation.

Random read operations allow the master to access

any memory location in a random manner. To perform

this type of read operation, first the word address must

be set. This is done by sending the word address to the

device as part of a write operation.

FIGURE 8-1:

CURRENT ADDRESS READ

S

T

S

BUS ACTIVITY

A

Control

Byte

T

Data

MASTER

R

O

P

T

SDA LINE

S 1 0 1 0 x x x 1

P

A

C

K

N

O

BUS ACTIVITY

A

C

K

x = “don’t care” bit

DS21178G-page 8

24AA00/24LC00/24C00

FIGURE 8-2:

RANDOM READ

S

T

A

R

T

S

T

A

R

T

S

T

O

P

BUS ACTIVITY

MASTER

Control

Byte

Word

Address(n)

Control

Byte

Data (n)

x x x x

P

S 1 0 1 0 x x x 0

S 1 0 1 0 x x x 1

SDA LINE

A

C

K

A

C

K

A

C

K

N

O

BUS ACTIVITY

A

C

K

x = “don’t care” bit

FIGURE 8-3:

SEQUENTIAL READ

S

T

O

P

BUS ACTIVITY

MASTER

Control

Byte

Data n

Data n + 1

Data n + 2

Data n + x

SDA LINE

P

A

C

K

A

C

K

A

C

K

A

C

K

N

O

BUS ACTIVITY

A

C

K

DS21178G-page 9

24AA00/24LC00/24C00

9.0

9.1

PACKAGING INFORMATION

Package Marking Information

8-Lead PDIP (300 mil)

Example:

24LC00

XXXXXXXX

T/XXXNNN

I/P

13F

e

3

YYWW

0527

8-Lead SOIC (3.90 mm)

Example:

24LC00I

XXXXXXXT

XXXXYYWW

e

3

SN

0527

NNN

13F

Example:

8-Lead TSSOP

XXXX

4L00

I527

13F

TYWW

NNN

Example:

8-Lead 2x3 DFN

204

527

13

XXX

YWW

NN

Example:

M03F

5-Lead SOT-23

XXNN

DS21178G-page 10

24AA00/24LC00/24C00

1st Line Marking Codes

SOT-23

Part Number

DFN

TSSOP

I Temp.

E Temp.

I Temp.

E Temp.

24AA00

4A00

4L00

4C00

B0NN

M0NN

D0NN

—

201

204

207

—

24LC00

24C00

Note:

E0NN

208

NN = Alphanumeric traceability code

Legend: XX...X Part number or part number code

T

Temperature (I, E)

Y

Year code (last digit of calendar year)

YY

WW

NNN

Year code (last 2 digits of calendar year)

Week code (week of January 1 is week ‘01’)

Alphanumeric traceability code (2 characters for small packages)

Pb-free JEDEC designator for Matte Tin (Sn)

e

3

Note:

For very small packages with no room for the Pb-free JEDEC designator

, the marking will only appear on the outer carton or reel label.

e

3

Note: In the event the full Microchip part number cannot be marked on one line, it will

be carried over to the next line, thus limiting the number of available

characters for customer-specific information.

Note:

Please visit www.microchip.com/Pbfree for the latest information on Pb-free conversion.

*Standard OTP marking consists of Microchip part number, year code, week code, and traceability code.

DS21178G-page 11

24AA00/24LC00/24C00

8-Lead Plastic Dual In-Line (P or PA) – 300 mil Body [PDIP]

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

N

NOTE 1

E1

3

1

2

D

E

A2

A

L

A1

c

e

eB

b1

b

Units

INCHES

Dimension Limits

MIN

NOM

8

MAX

Number of Pins

Pitch

N

e

.100 BSC

–

Top to Seating Plane

A

–

.210

.195

–

Molded Package Thickness

Base to Seating Plane

Shoulder to Shoulder Width

Molded Package Width

Overall Length

A2

A1

E

.115

.015

.290

.240

.348

.115

.008

.040

.014

–

.130

–

.310

.250

.365

.130

.010

.060

.018

–

.325

.280

.400

.150

.015

.070

.022

.430

E1

D

Tip to Seating Plane

Lead Thickness

L

c

Upper Lead Width

b1

b

Lower Lead Width

Overall Row Spacing §

eB

Notes:

1. Pin 1 visual index feature may vary, but must be located with the hatched area.

2. § Significant Characteristic.

3. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" per side.

4. Dimensioning and tolerancing per ASME Y14.5M.

BSC: Basic Dimension. Theoretically exact value shown without tolerances.

Microchip Technology Drawing C04-018B

DS21178G-page 12

24AA00/24LC00/24C00

8-Lead Plastic Small Outline (SN or OA) – Narrow, 3.90 mm Body [SOIC]

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

D

e

N

E

E1

NOTE 1

1

2

3

α

h

b

h

c

φ

A2

A

L

A1

L1

β

Units

MILLIMETERS

Dimension Limits

MIN

NOM

MAX

Number of Pins

Pitch

N

e

8

1.27 BSC

Overall Height

A

–

1.75

–

Molded Package Thickness

Standoff

A2

A1

E

1.25

0.10

–

§

–

0.25

Overall Width

6.00 BSC

Molded Package Width

Overall Length

Chamfer (optional)

Foot Length

E1

D

h

3.90 BSC

4.90 BSC

0.25

0.40

–

0.50

1.27

L

–

Footprint

L1

φ

1.04 REF

Foot Angle

0°

0.17

0.31

5°

–

8°

Lead Thickness

Lead Width

c

0.25

0.51

15°

b

Mold Draft Angle Top

Mold Draft Angle Bottom

α

β

5°

15°

Notes:

1. Pin 1 visual index feature may vary, but must be located within the hatched area.

2. § Significant Characteristic.

3. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.15 mm per side.

4. Dimensioning and tolerancing per ASME Y14.5M.

BSC: Basic Dimension. Theoretically exact value shown without tolerances.

REF: Reference Dimension, usually without tolerance, for information purposes only.

Microchip Technology Drawing C04-057B

DS21178G-page 13

24AA00/24LC00/24C00

8-Lead Plastic Thin Shrink Small Outline (ST) – 4.4 mm Body [TSSOP]

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

D

N

E

E1

NOTE 1

1

2

b

e

c

φ

A

A2

A1

L

L1

Units

MILLIMETERS

Dimension Limits

MIN

NOM

MAX

Number of Pins

Pitch

N

e

8

0.65 BSC

Overall Height

A

–

1.20

1.05

0.15

Molded Package Thickness

Standoff

A2

A1

E

0.80

0.05

1.00

–

Overall Width

6.40 BSC

Molded Package Width

Molded Package Length

Foot Length

E1

D

4.30

2.90

0.45

4.40

4.50

3.10

0.75

3.00

L

0.60

Footprint

L1

φ

1.00 REF

Foot Angle

0°

–

8°

Lead Thickness

c

0.09

0.20

0.30

Lead Width

b

0.19

Notes:

1. Pin 1 visual index feature may vary, but must be located within the hatched area.

2. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.15 mm per side.

3. Dimensioning and tolerancing per ASME Y14.5M.

BSC: Basic Dimension. Theoretically exact value shown without tolerances.

REF: Reference Dimension, usually without tolerance, for information purposes only.

Microchip Technology Drawing C04-086B

DS21178G-page 14

24AA00/24LC00/24C00

8-Lead Plastic Dual Flat, No Lead Package (MC) – 2x3x0.9 mm Body [DFN]

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

e

D

b

N

L

K

E2

E

EXPOSED PAD

NOTE 1

2

1

2

D2

BOTTOM VIEW

TOP VIEW

A

NOTE 2

A3

A1

Units

MILLIMETERS

Dimension Limits

MIN

NOM

8

MAX

Number of Pins

Pitch

N

e

0.50 BSC

0.90

Overall Height

Standoff

A

0.80

0.00

1.00

0.05

A1

A3

D

0.02

Contact Thickness

Overall Length

Overall Width

0.20 REF

2.00 BSC

3.00 BSC

–

E

Exposed Pad Length

Exposed Pad Width

Contact Width

Contact Length

Contact-to-Exposed Pad

D2

E2

b

1.30

1.50

0.18

0.30

0.20

1.75

1.90

0.30

0.50

–

0.25

L

0.40

K

–

Notes:

1. Pin 1 visual index feature may vary, but must be located within the hatched area.

2. Package may have one or more exposed tie bars at ends.

3. Package is saw singulated.

4. Dimensioning and tolerancing per ASME Y14.5M.

BSC: Basic Dimension. Theoretically exact value shown without tolerances.

REF: Reference Dimension, usually without tolerance, for information purposes only.

Microchip Technology Drawing C04-123B

DS21178G-page 15

24AA00/24LC00/24C00

5-Lead Plastic Small Outline Transistor (OT or CT) [SOT-23]

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

b

N

E

E1

3

2

1

e

e1

D

A2

c

A

φ

A1

L

L1

Units

MILLIMETERS

Dimension Limits

MIN

NOM

MAX

Number of Pins

Lead Pitch

N

e

5

0.95 BSC

Outside Lead Pitch

Overall Height

e1

A

1.90 BSC

0.90

0.89

0.00

2.20

1.30

2.70

0.10

0.35

0°

–

1.45

1.30

0.15

3.20

1.80

3.10

0.60

0.80

30°

Molded Package Thickness

Standoff

A2

A1

E

Overall Width

Molded Package Width

Overall Length

Foot Length

E1

D

L

Footprint

L1

φ

Foot Angle

Lead Thickness

Lead Width

c

0.08

0.20

0.26

0.51

b

Notes:

1. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.127 mm per side.

2. Dimensioning and tolerancing per ASME Y14.5M.

BSC: Basic Dimension. Theoretically exact value shown without tolerances.

Microchip Technology Drawing C04-091B

DS21178G-page 16

24AA00/24LC00/24C00

APPENDIX A: REVISION HISTORY

Revision E

Added DFN package.

Revision F (02/2007)

Revised Device Selection Table; Features Section;

Changed 1.8V to 1.7V; Revised Tables 1-1, 1-2;

Revised Product ID System; Replaced Package

Drawings; Replaced On-line Support page.

Revision G (03/2007)

Replaced Package Drawings (Rev. AM).

DS21178G-page 17

24AA00/24LC00/24C00

NOTES:

DS21178G-page 18

24AA00/24LC00/24C00

THE MICROCHIP WEB SITE

CUSTOMER SUPPORT

Microchip provides online support via our WWW site at

www.microchip.com. This web site is used as a means

to make files and information easily available to

customers. Accessible by using your favorite Internet

browser, the web site contains the following

information:

Users of Microchip products can receive assistance

through several channels:

• Distributor or Representative

• Local Sales Office

• Field Application Engineer (FAE)

• Technical Support

• Product Support – Data sheets and errata,

application notes and sample programs, design

resources, user’s guides and hardware support

documents, latest software releases and archived

software

• Development Systems Information Line

Customers

should

contact

their

distributor,

representative or field application engineer (FAE) for

support. Local sales offices are also available to help

customers. A listing of sales offices and locations is

included in the back of this document.

• General Technical Support – Frequently Asked

Questions (FAQ), technical support requests,

online discussion groups, Microchip consultant

program member listing

Technical support is available through the web site

at: http://support.microchip.com

• Business of Microchip – Product selector and

ordering guides, latest Microchip press releases,

listing of seminars and events, listings of

Microchip sales offices, distributors and factory

representatives

CUSTOMER CHANGE NOTIFICATION

SERVICE

Microchip’s customer notification service helps keep

customers current on Microchip products. Subscribers

will receive e-mail notification whenever there are

changes, updates, revisions or errata related to a

specified product family or development tool of interest.

To register, access the Microchip web site at

www.microchip.com, click on Customer Change

Notification and follow the registration instructions.

DS21178G-page 19

24AA00/24LC00/24C00

READER RESPONSE

It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip prod-

uct. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation

can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-4150.

Please list the following information, and use this outline to provide us with your comments about this document.

To:

Technical Publications Manager

Reader Response

Total Pages Sent ________

RE:

From:

Name

Company

Address

City / State / ZIP / Country

Telephone: (_______) _________ - _________

FAX: (______) _________ - _________

Application (optional):

Would you like a reply?

Y

N

24AA00/24LC00/24C00

DS21178G

Literature Number:

Device:

Questions:

1. What are the best features of this document?

2. How does this document meet your hardware and software development needs?

3. Do you find the organization of this document easy to follow? If not, why?

4. What additions to the document do you think would enhance the structure and subject?

5. What deletions from the document could be made without affecting the overall usefulness?

6. Is there any incorrect or misleading information (what and where)?

7. How would you improve this document?

DS21178G-page 20

24AA00/24LC00/24C00

PRODUCT IDENTIFICATION SYSTEM

To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.

X

/XX

PART NO.

Device

Examples:

a) 24AA00-I/P: Industrial Temperature,1.8V

PDIP package

Temperature Package

Range

b) 24AA00-I/SN: Industrial Temperature,

1.8V, SOIC package

2

Device:

24AA00:

24AA00T:

=

1.7V, 128 bit I C™ Serial EEPROM

2

1.7V, 128 bit I C Serial EEPROM

c)

24AA00T-I/OT: Industrial Temperature,

1.8V, SOT-23 package, tape and reel

(Tape and Reel)

2

24LC00:

24LC00T:

=

2.5V, 128 bit I C Serial EEPROM

d) 24LC00-I/P: Industrial Temperature,

2.5V, PDIP package

2

2.5V, 128 bit I C Serial EEPROM

(Tape and Reel)

5V, 128 bit I C™ Serial EEPROM

(Tape and Reel)

e) 24C00-E/SN: Extended Temperature,

5V, SOIC package

2

24C00:

24C00T:

=

2

f)

24LC00T-I/OT: Industrial Temperature,

2.5V, SOT-23 package, tape and reel

Temperature

Range:

I

E

=

-40°C to +85°C

-40°C to +125°C

Package:

P

= Plastic DIP (300 mil body), 8-lead

SN = Plastic SOIC (3.90 mm body), 8-lead

ST = Plastic TSSOP (4.4 mm), 8-lead

OT = SOT-23, 5-lead (Tape and Reel only)

MC = 2x3 DFN, 8-lead

DS21178G-page21

24AA00/24LC00/24C00

NOTES:

DS21178G-page 22

Note the following details of the code protection feature on Microchip devices:

•

Microchip products meet the specification contained in their particular Microchip Data Sheet.

•

Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the

intended manner and under normal conditions.

•

There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our

knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data

Sheets. Most likely, the person doing so is engaged in theft of intellectual property.

•

Microchip is willing to work with the customer who is concerned about the integrity of their code.

Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not

mean that we are guaranteeing the product as “unbreakable.”

Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our

products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts

allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.

Information contained in this publication regarding device

applications and the like is provided only for your convenience

and may be superseded by updates. It is your responsibility to

ensure that your application meets with your specifications.

MICROCHIP MAKES NO REPRESENTATIONS OR

WARRANTIES OF ANY KIND WHETHER EXPRESS OR

IMPLIED, WRITTEN OR ORAL, STATUTORY OR

OTHERWISE, RELATED TO THE INFORMATION,

INCLUDING BUT NOT LIMITED TO ITS CONDITION,

QUALITY, PERFORMANCE, MERCHANTABILITY OR

FITNESS FOR PURPOSE. Microchip disclaims all liability

arising from this information and its use. Use of Microchip

devices in life support and/or safety applications is entirely at

the buyer’s risk, and the buyer agrees to defend, indemnify and

hold harmless Microchip from any and all damages, claims,

suits, or expenses resulting from such use. No licenses are

conveyed, implicitly or otherwise, under any Microchip

intellectual property rights.

Trademarks

The Microchip name and logo, the Microchip logo, Accuron,

dsPIC, KEELOQ, KEELOQ logo, microID, MPLAB, PIC,

PICmicro, PICSTART, PRO MATE, PowerSmart, rfPIC, and

SmartShunt are registered trademarks of Microchip

Technology Incorporated in the U.S.A. and other countries.

AmpLab, FilterLab, Linear Active Thermistor, Migratable

Memory, MXDEV, MXLAB, PS logo, SEEVAL, SmartSensor

and The Embedded Control Solutions Company are

registered trademarks of Microchip Technology Incorporated

in the U.S.A.

Analog-for-the-Digital Age, Application Maestro, CodeGuard,

dsPICDEM, dsPICDEM.net, dsPICworks, ECAN,

ECONOMONITOR, FanSense, FlexROM, fuzzyLAB,

In-Circuit Serial Programming, ICSP, ICEPIC, Mindi, MiWi,

MPASM, MPLAB Certified logo, MPLIB, MPLINK, PICkit,

PICDEM, PICDEM.net, PICLAB, PICtail, PowerCal,

PowerInfo, PowerMate, PowerTool, REAL ICE, rfLAB,

rfPICDEM, Select Mode, Smart Serial, SmartTel, Total

Endurance, UNI/O, WiperLock and ZENA are trademarks of

Microchip Technology Incorporated in the U.S.A. and other

countries.

SQTP is a service mark of Microchip Technology Incorporated

in the U.S.A.

All other trademarks mentioned herein are property of their

respective companies.

Printed on recycled paper.

Microchip received ISO/TS-16949:2002 certification for its worldwide

headquarters, design and wafer fabrication facilities in Chandler and

Tempe, Arizona, Gresham, Oregon and Mountain View, California. The

Company’s quality system processes and procedures are for its PIC^®

MCUs and dsPIC^®DSCs, KEELOQ^®code hopping devices, Serial

EEPROMs, microperipherals, nonvolatile memory and analog

products. In addition, Microchip’s quality system for the design and

manufacture of development systems is ISO 9001:2000 certified.

DS21178G-page 23

WORLDWIDE SALES AND SERVICE

AMERICAS

ASIA/PACIFIC

EUROPE

Corporate Office

Asia Pacific Office

Suites 3707-14, 37th Floor

Tower 6, The Gateway

Habour City, Kowloon

Hong Kong

Tel: 852-2401-1200

Fax: 852-2401-3431

India - Bangalore

Tel: 91-80-4182-8400

Fax: 91-80-4182-8422

Austria - Wels

Tel: 43-7242-2244-39

Fax: 43-7242-2244-393

2355 West Chandler Blvd.

Chandler, AZ 85224-6199

Tel: 480-792-7200

Fax: 480-792-7277

Technical Support:

http://support.microchip.com

Web Address:

www.microchip.com

Denmark - Copenhagen

Tel: 45-4450-2828

Fax: 45-4485-2829

India - New Delhi

Tel: 91-11-4160-8631

Fax: 91-11-4160-8632

France - Paris

Tel: 33-1-69-53-63-20

Fax: 33-1-69-30-90-79

India - Pune

Tel: 91-20-2566-1512

Fax: 91-20-2566-1513

Australia - Sydney

Tel: 61-2-9868-6733

Fax: 61-2-9868-6755

Atlanta

Duluth, GA

Tel: 678-957-9614

Fax: 678-957-1455

Germany - Munich

Tel: 49-89-627-144-0

Fax: 49-89-627-144-44

Japan - Yokohama

Tel: 81-45-471- 6166

Fax: 81-45-471-6122

China - Beijing

Tel: 86-10-8528-2100

Fax: 86-10-8528-2104

Italy - Milan

Tel: 39-0331-742611

Fax: 39-0331-466781

Korea - Gumi

Tel: 82-54-473-4301

Fax: 82-54-473-4302

Boston

China - Chengdu

Tel: 86-28-8665-5511

Fax: 86-28-8665-7889

Westborough, MA

Tel: 774-760-0087

Fax: 774-760-0088

Netherlands - Drunen

Tel: 31-416-690399

Fax: 31-416-690340

Korea - Seoul

China - Fuzhou

Tel: 86-591-8750-3506

Fax: 86-591-8750-3521

Tel: 82-2-554-7200

Fax: 82-2-558-5932 or

82-2-558-5934

Chicago

Itasca, IL

Tel: 630-285-0071

Fax: 630-285-0075

Spain - Madrid

Tel: 34-91-708-08-90

Fax: 34-91-708-08-91

China - Hong Kong SAR

Tel: 852-2401-1200

Fax: 852-2401-3431

Malaysia - Penang

Tel: 60-4-646-8870

Fax: 60-4-646-5086

Dallas

Addison, TX

Tel: 972-818-7423

Fax: 972-818-2924

UK - Wokingham

Tel: 44-118-921-5869

Fax: 44-118-921-5820

China - Qingdao

Tel: 86-532-8502-7355

Fax: 86-532-8502-7205

Philippines - Manila

Tel: 63-2-634-9065

Fax: 63-2-634-9069

Detroit

Farmington Hills, MI

Tel: 248-538-2250

Fax: 248-538-2260

China - Shanghai

Tel: 86-21-5407-5533

Fax: 86-21-5407-5066

Singapore

Tel: 65-6334-8870

Fax: 65-6334-8850

Kokomo

Kokomo, IN

Tel: 765-864-8360

Fax: 765-864-8387

China - Shenyang

Tel: 86-24-2334-2829

Fax: 86-24-2334-2393

Taiwan - Hsin Chu

Tel: 886-3-572-9526

Fax: 886-3-572-6459

China - Shenzhen

Tel: 86-755-8203-2660

Fax: 86-755-8203-1760

Taiwan - Kaohsiung

Tel: 886-7-536-4818

Fax: 886-7-536-4803

Los Angeles

Mission Viejo, CA

Tel: 949-462-9523

Fax: 949-462-9608

China - Shunde

Tel: 86-757-2839-5507

Fax: 86-757-2839-5571

Taiwan - Taipei

Tel: 886-2-2500-6610

Fax: 886-2-2508-0102

Santa Clara

Santa Clara, CA

Tel: 408-961-6444

Fax: 408-961-6445

China - Wuhan

Tel: 86-27-5980-5300

Fax: 86-27-5980-5118

Thailand - Bangkok

Tel: 66-2-694-1351

Fax: 66-2-694-1350

Toronto

Mississauga, Ontario,

Canada

Tel: 905-673-0699

Fax: 905-673-6509

China - Xian

Tel: 86-29-8833-7250

Fax: 86-29-8833-7256

12/08/06

DS21178G-page 24


型号：	24C00-I/P
厂家：	MICROCHIP
描述：	128 Bit I2C Bus Serial EEPROM 128位I2C总线串行EEPROM 存储内存集成电路光电二极管可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟
文件：	总24页 (文件大小：364K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

24C00-I/P [MICROCHIP]

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