25C320TI/ST14 [MICROCHIP]

32K SPI Bus Serial EEPROM; 32K SPI总线串行EEPROM
25C320TI/ST14
型号: 25C320TI/ST14
厂家: MICROCHIP    MICROCHIP
描述:

32K SPI Bus Serial EEPROM
32K SPI总线串行EEPROM

可编程只读存储器 电动程控只读存储器 电可擦编程只读存储器
文件: 总24页 (文件大小:369K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
25AA320/25LC320/25C320  
32K SPIBus Serial EEPROM  
Device Selection Table  
Description:  
The Microchip Technology Inc. 25AA320/25LC320/  
Part  
Number  
VCC  
Range  
Max. Clock  
Frequency  
Temp.  
Ranges  
25C320 (25XX320*) are 32 Kbit serial Electrically  
Erasable PROMs. The memory is accessed via a  
simple Serial Peripheral Interface (SPI™) compatible  
serial bus. The bus signals required are a clock input  
(SCK) plus separate data in (SI) and data out (SO)  
lines. Access to the device is controlled through a Chip  
Select (CS) input.  
25AA320  
25LC320  
25C320  
1.8-5.5V  
2.5-5.5V  
4.5-5.5V  
1 MHz  
2 MHz  
3 MHz  
I
I,E  
I,E  
Features:  
Communication to the device can be paused via the  
hold pin (HOLD). While the device is paused,  
transitions on its inputs will be ignored, with the  
exception of Chip Select, allowing the host to service  
higher priority interrupts.  
• Low-power CMOS technology:  
- Write current: 3 mA maximum  
- Read current: 500 µA typical  
- Standby current: 500 nA typical  
• 4096 x 8 bit organization  
• 32 byte page  
Block Diagram  
Status  
• Write cycle time: 5 ms maximum  
• Self-timed erase and write cycles  
• Block write protection:  
HV Generator  
Register  
- Protect none, 1/4, 1/2 or all of array  
• Built-in write protection:  
EEPROM  
Memory  
- Power on/off data protection circuitry  
- Write enable latch  
I/O Control  
Logic  
Array  
Control  
Logic  
XDEC  
- Write-protect pin  
Page  
Latches  
• Sequential read  
• High reliability:  
- Endurance: 1M E/W cycles  
- Data retention: > 200 years  
- ESD protection: > 4000V  
• 8-pin PDIP, SOIC and TSSOP packages  
• 14-lead TSSOP package  
Temperature ranges supported:  
SI  
Y Decoder  
SO  
CS  
SCK  
Sense Amp.  
R/W Control  
HOLD  
WP  
- Industrial (I):  
-40°C to +85°C  
VCC  
VSS  
- Automotive (E):  
-40°C to +125°C  
Package Types  
PDIP, SOIC  
TSSOP  
TSSOP  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
VCC  
CS  
SO  
CS  
1
8
VCC  
1
8
7
HOLD  
VCC  
SCK  
SI  
HOLD  
NC  
NC  
2
3
4
SO  
WP  
VSS  
2
3
4
7
6
5
HOLD  
SCK  
SI  
NC  
NC  
NC  
WP  
6
5
CS  
SO  
VSS  
WP  
NC  
SCK  
SI  
8
VSS  
*25XX320 is used in this document as a generic part number for the 25AA320/25LC320/25C320 devices.  
2004 Microchip Technology Inc.  
DS21227E-page 1  
25AA320/25LC320/25C320  
1.0  
ELECTRICAL CHARACTERISTICS  
(†)  
Absolute Maximum Ratings  
VCC.............................................................................................................................................................................7.0V  
All inputs and outputs w.r.t. VSS ........................................................................................................ -0.6V to VCC + 1.0V  
Storage temperature .................................................................................................................................-65°C to 150°C  
Ambient temperature under bias...............................................................................................................-40°C to 125°C  
ESD protection on all pins..........................................................................................................................................4 kV  
† NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the  
device. This is a stress rating only and functional operation of the device at those or any other conditions above those  
indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for an  
extended period of time may affect device reliability.  
TABLE 1-1:  
DC CHARACTERISTICS  
Industrial (I): TA = -40°C to +85°C VCC = 1.8V to 5.5V  
Automotive (E):TA = -40°C to +125°C VCC = 2.5V to 5.5V  
DC CHARACTERISTICS  
Param.  
Sym.  
Characteristics  
Min.  
Max.  
Units  
Conditions  
VCC 2.7V (Note)  
No.  
D1  
VIH1  
High-level input  
voltage  
2.0  
0.7 VCC  
-0.3  
VCC+1  
VCC+1  
0.8  
V
V
V
V
V
D2  
D3  
D4  
D5  
VIH2  
VIL1  
VIL2  
VOL  
VCC< 2.7V (Note)  
Low-level input  
voltage  
VCC 2.7V (Note)  
VCC < 2.7V (Note)  
IOL = 1.0 mA, VCC < 2.5V  
-0.3  
0.3 VCC  
0.2  
Low-level output  
voltage  
D6  
VOH  
High-level output  
voltage  
VCC -0.5  
V
IOH = -400 µA  
D7  
D8  
ILI  
Input leakage current  
±1  
±1  
µA  
µA  
CS = VCC, VIN = VSS TO VCC  
CS = VCC, VOUT = VSS TO VCC  
ILO  
Output leakage  
current  
D9  
CINT  
Internal Capacitance  
(all inputs and  
outputs)  
7
pF  
TA = 25°C, CLK = 1.0 MHz,  
VCC = 5.0V (Note)  
D10  
ICC Read Operating Current  
1
500  
mA  
µA  
VCC = 5.5V; FCLK = 3.0 MHz;  
SO = Open  
VCC = 2.5V; FCLK = 2.0 MHz;  
SO = Open  
D11  
D12  
ICC Write  
5
3
mA  
mA  
VCC = 5.5V  
VCC = 2.5V  
ICCS  
Standby Current  
5
1
µA  
µA  
CS = VCC = 5.5V, Inputs tied to VCC or  
VSS  
CS = VCC = 2.5V, Inputs tied to VCC or  
VSS  
Note:  
This parameter is periodically sampled and not 100% tested.  
DS21227E-page 2  
2004 Microchip Technology Inc.  
25AA320/25LC320/25C320  
TABLE 1-2:  
AC CHARACTERISTICS  
Industrial (I):  
Automotive (E):  
TA = -40°C to +85°C  
TA = -40°C to +125°C  
VCC = 1.8V to 5.5V  
VCC = 2.5V to 5.5V  
AC CHARACTERISTICS  
Param.  
Sym.  
No.  
Characteristic  
Min.  
Max.  
Units  
Conditions  
1
2
3
FCLK  
TCSS  
TCSH  
Clock Frequency  
CS Setup Time  
CS Hold Time  
3
2
1
MHz  
MHz  
MHz  
VCC = 4.5V to 5.5V  
VCC = 2.5V to 5.5V  
VCC = 1.8V to 5.5V  
100  
250  
500  
ns  
ns  
ns  
VCC = 4.5V to 5.5V  
VCC = 2.5V to 5.5V  
VCC = 1.8V to 5.5V  
150  
250  
475  
ns  
ns  
ns  
VCC = 4.5V to 5.5V  
VCC = 2.5V to 5.5V  
VCC = 1.8V to 5.5V  
4
5
TCSD  
TSU  
CS Disable Time  
Data Setup Time  
500  
ns  
30  
50  
50  
ns  
ns  
ns  
VCC = 4.5V to 5.5V  
VCC = 2.5V to 5.5V  
VCC = 1.8V to 5.5V  
6
THD  
Data Hold Time  
50  
100  
100  
ns  
ns  
ns  
VCC = 4.5V to 5.5V  
VCC = 2.5V to 5.5V  
VCC = 1.8V to 5.5V  
7
8
9
TR  
TF  
CLK Rise Time  
CLK Fall Time  
Clock High Time  
2
2
µs  
µs  
(Note 1)  
(Note 1)  
THI  
150  
230  
475  
ns  
ns  
ns  
VCC = 4.5V to 5.5V  
VCC = 2.5V to 5.5V  
VCC = 1.8V to 5.5V  
10  
TLO  
Clock Low Time  
150  
230  
475  
ns  
ns  
ns  
VCC = 4.5V to 5.5V  
VCC = 2.5V to 5.5V  
VCC = 1.8V to 5.5V  
11  
12  
13  
TCLD  
TCLE  
TV  
Clock Delay Time  
Clock Enable Time  
50  
50  
ns  
ns  
Output Valid from  
Clock Low  
150  
230  
ns  
ns  
ns  
VCC = 4.5V to 5.5V  
VCC = 2.5V to 5.5V  
VCC = 1.8V to 5.5V  
14  
15  
THO  
TDIS  
Output Hold Time  
0
ns  
(Note 1)  
Output Disable Time  
200  
250  
ns  
ns  
ns  
VCC = 4.5V to 5.5V (Note 1)  
VCC = 2.5V to 5.5V (Note 1)  
VCC = 1.8V to 5.5V  
16  
17  
18  
19  
THS  
THH  
THZ  
THV  
HOLD Setup Time  
HOLD Hold Time  
100  
100  
200  
ns  
ns  
ns  
VCC = 4.5V to 5.5V  
VCC = 2.5V to 5.5V  
VCC = 1.8V to 5.5V  
100  
100  
200  
ns  
ns  
ns  
VCC = 4.5V to 5.5V  
VCC = 2.5V to 5.5V  
VCC = 1.8V to 5.5V  
HOLD Low to Output  
High-Z  
100  
150  
200  
ns  
ns  
ns  
VCC = 4.5V to 5.5V (Note 1)  
VCC = 2.5V to 5.5V (Note 1)  
VCC = 1.8V to 5.5V  
HOLD High to Output  
Valid  
100  
150  
200  
ns  
ns  
ns  
VCC = 4.5V to 5.5V  
VCC = 2.5V to 5.5V  
VCC = 1.8V to 5.5V  
20  
21  
TWC  
Internal Write Cycle  
Time  
5
ms  
Endurance  
1M  
E/W  
(Note 2)  
Cycles  
Note 1: This parameter is periodically sampled and not 100% tested.  
2: This parameter is not tested but established by characterization. For endurance estimates in a specific application,  
please consult the Total Endurance™ Model which can be obtained from Microchip’s web site at: www.microchip.com.  
2004 Microchip Technology Inc.  
DS21227E-page 3  
25AA320/25LC320/25C320  
FIGURE 1-1: HOLD TIMING  
CS  
17  
16  
16  
17  
SCK  
SO  
18  
19  
High-impedance  
don’t care  
n
n+2  
n+2  
n+1  
n
n-1  
5
n
n+1  
n
n-1  
SI  
HOLD  
FIGURE 1-2: SERIAL INPUT TIMING  
4
CS  
12  
2
11  
7
3
8
Mode 1,1  
Mode 0,0  
5
SCK  
SI  
6
MSB in  
LSB in  
High-impedance  
SO  
FIGURE 1-3: SERIAL OUTPUT TIMING  
CS  
3
9
10  
Mode 1,1  
Mode 0,0  
SCK  
13  
15  
ISB out  
14  
MSB out  
SO  
SI  
don’t care  
DS21227E-page 4  
2004 Microchip Technology Inc.  
25AA320/25LC320/25C320  
TABLE 1-3:  
AC Waveform:  
VLO = 0.2V  
AC TEST CONDITIONS  
FIGURE 1-4: AC TEST CIRCUIT  
VCC  
VHI = VCC - 0.2V  
(Note 1)  
(Note 2)  
2.25 KΩ  
VHI = 4.0V  
Timing Measurement Reference Level  
Input  
SO  
0.5 VCC  
0.5 VCC  
100 pF  
1.8 KΩ  
Output  
Note 1: For VCC 4.0V  
2: For VCC > 4.0V  
2004 Microchip Technology Inc.  
DS21227E-page 5  
25AA320/25LC320/25C320  
2.0  
PIN DESCRIPTIONS  
The descriptions of the pins are listed in Table 2-1.  
TABLE 2-1:  
PIN FUNCTION TABLE  
8-pin  
TSSOP  
14-lead  
TSSOP  
Name  
PDIP  
SOIC  
Description  
Chip Select Input  
CS  
SO  
NC  
1
2
1
2
3
4
1
2
Serial Data Output  
Not Connected  
3,4,5  
WP  
Vss  
SI  
3
4
3
4
5
6
6
Write-Protect Pin  
Ground  
7
5
5
7
8
9
Serial Data Input  
Serial Clock Input  
Not Connected  
SCK  
NC  
6
6
8
10,11,12  
HOLD  
Vcc  
7
8
7
8
1
2
13  
14  
Hold Input  
Supply Voltage  
The WP pin function is blocked when the WPEN bit in  
the Status register is low. This allows the user to install  
the 25XX320 in a system with WP pin grounded and  
still be able to write to the Status register. The WP pin  
functions will be enabled when the WPEN bit is set  
high.  
2.1  
Chip Select (CS)  
A low level on this pin selects the device. A high level  
deselects the device and forces it into Standby mode.  
However, a programming cycle which is already  
initiated or in progress will be completed, regardless of  
the CS input signal. If CS is brought high during a  
program cycle, the device will go into Standby mode as  
soon as the programming cycle is complete. When the  
device is deselected, SO goes to the high-impedance  
state, allowing multiple parts to share the same SPI  
bus. A low-to-high transition on CS after a valid write  
sequence initiates an internal write cycle. After power-  
up, a low level on CS is required prior to any sequence  
being initiated.  
2.4  
Serial Input (SI)  
The SI pin is used to transfer data into the device. It  
receives instructions, addresses, and data. Data is  
latched on the rising edge of the serial clock.  
2.5  
Serial Clock (SCK)  
The SCK is used to synchronize the communication  
between a master and the 25XX320. Instructions,  
addresses, or data present on the SI pin are latched on  
the rising edge of the clock input, while data on the SO  
pin is updated after the falling edge of the clock input.  
2.2  
Serial Output (SO)  
The SO pin is used to transfer data out of the 25XX320.  
During a read cycle, data is shifted out on this pin after  
the falling edge of the serial clock.  
2.6  
Hold (HOLD)  
The HOLD pin is used to suspend transmission to the  
25XX320 while in the middle of a serial sequence with-  
out having to re-transmit the entire sequence again. It  
must be held high any time this function is not being  
used. Once the device is selected and a serial  
sequence is underway, the HOLD pin may be pulled  
low to pause further serial communication without  
resetting the serial sequence. The HOLD pin must be  
brought low while SCK is low, otherwise the HOLD  
function will not be invoked until the next SCK high-to-  
low transition. The 25XX320 must remain selected dur-  
ing this sequence. The SI, SCK, and SO pins are in a  
high-impedance state during the time the device is  
paused and transitions on these pins will be ignored. To  
resume serial communication, HOLD must be brought  
high while the SCK pin is low, otherwise serial  
communication will not resume. Lowering the HOLD  
line at any time will tri-state the SO line.  
2.3  
Write-Protect (WP)  
This pin is used in conjunction with the WPEN bit in the  
Status register to prohibit writes to the nonvolatile bits  
in the Status register. When WP is low and WPEN is  
high, writing to the nonvolatile bits in the Status register  
is disabled. All other operations function normally.  
When WP is high, all functions, including writes to the  
nonvolatile bits in the Status register operate normally.  
If the WPEN bit is set, WP low during a Status register  
write sequence will disable writing to the Status  
register. If an internal write cycle has already begun,  
WP going low will have no effect on the write.  
DS21227E-page 6  
2004 Microchip Technology Inc.  
25AA320/25LC320/25C320  
3.3  
Write Sequence  
3.0  
3.1  
FUNCTIONAL DESCRIPTION  
Principles Of Operation  
Prior to any attempt to write data to the 25XX320, the  
write enable latch must be set by issuing the WREN  
instruction (Figure 3-4). This is done by setting CS low  
and then clocking out the proper instruction into the  
25XX320. After all eight bits of the instruction are  
transmitted, the CS must be brought high to set the  
write enable latch. If the write operation is initiated  
immediately after the WREN instruction without CS  
being brought high, the data will not be written to the  
array because the write enable latch will not have been  
properly set.  
The 25XX320 are 4096 byte Serial EEPROMs  
designed to interface directly with the Serial Peripheral  
Interface (SPI) port of many of today’s popular  
microcontroller  
families,  
including  
Microchip’s  
PIC16C6X/7X microcontrollers. It may also interface  
with microcontrollers that do not have a built-in SPI port  
by using discrete I/O lines programmed properly with  
the software.  
The 25XX320 contains an 8-bit instruction register. The  
device is accessed via the SI pin, with data being  
clocked in on the rising edge of SCK. The CS pin must  
be low and the HOLD pin must be high for the entire  
operation.  
Once the write enable latch is set, the user may  
proceed by setting the CS low, issuing a WRITE  
instruction, followed by the 16-bit address, with the four  
MSBs of the address being don’t care bits, and then the  
data to be written. Up to 32 bytes of data can be sent to  
the 25XX320 before a write cycle is necessary. The  
only restriction is that all of the bytes must reside in the  
same page. A page address begins with xxxx xxxx  
xxx00000and ends with xxxxxxxxxxx11111.  
If the internal address counter reaches xxxx xxxx  
xxx11111and the clock continues, the counter will  
roll back to the first address of the page and overwrite  
any data in the page that may have been written.  
Table 3-1 contains a list of the possible instruction  
bytes and format for device operation. All instructions,  
addresses and data are transferred MSB first, LSB last.  
Data is sampled on the first rising edge of SCK after CS  
goes low. If the clock line is shared with other  
peripheral devices on the SPI bus, the user can assert  
the HOLD input and place the 25XX320 in ‘HOLD’  
mode. After releasing the HOLD pin, operation will  
resume from the point when the HOLD was asserted.  
For the data to be actually written to the array, the CS  
must be brought high after the least significant bit (D0)  
of the nth data byte has been clocked in. If CS is  
brought high at any other time, the write operation will  
not be completed. Refer to Figure 3-2 and Figure 3-3  
for more detailed illustrations on the byte write  
sequence and the page write sequence respectively.  
While the write is in progress, the Status register may  
be read to check the status of the WPEN, WIP, WEL,  
BP1 and BP0 bits (Figure 3-6). A read attempt of a  
memory array location will not be possible during a  
write cycle. When the write cycle is completed, the  
write enable latch is reset.  
3.2  
Read Sequence  
The device is selected by pulling CS low. The 8-bit  
READ instruction is transmitted to the 25XX320 fol-  
lowed by the 16-bit address, with the four MSBs of the  
address being don’t care bits. After the correct READ  
instruction and address are sent, the data stored in the  
memory at the selected address is shifted out on the  
SO pin. The data stored in the memory at the next  
address can be read sequentially by continuing to pro-  
vide clock pulses. The internal address pointer is auto-  
matically incremented to the next higher address after  
each byte of data is shifted out. When the highest  
address is reached (0FFFh), the address counter rolls  
over to address 0000h allowing the read cycle to be  
continued indefinitely. The read operation is terminated  
by raising the CS pin (Figure 3-1).  
TABLE 3-1:  
INSTRUCTION SET  
Instruction Name  
READ  
Instruction Format  
Description  
Read data from memory array beginning at selected address  
Write data to memory array beginning at selected address  
Reset the write enable latch (disable write operations)  
Set the write enable latch (enable write operations)  
Read Status register  
0000 0011  
0000 0010  
0000 0100  
0000 0110  
0000 0101  
0000 0001  
WRITE  
WRDI  
WREN  
RDSR  
WRSR  
Write Status register  
2004 Microchip Technology Inc.  
DS21227E-page 7  
25AA320/25LC320/25C320  
FIGURE 3-1: READ SEQUENCE  
CS  
0
1
2
3
4
5
6
7
8
9 10 11  
21 22 23 24 25 26 27 28 29 30 31  
SCK  
SI  
instruction  
16-bit address  
1 15 14 13 12  
0
0
0
0
0
0
1
2
1
0
data out  
High-impedance  
7
6
5
4
3
2
1
0
SO  
FIGURE 3-2: BYTE WRITE SEQUENCE  
CS  
Twc  
0
1
2
3
4
5
6
7
8
9 10 11  
21 22 23 24 25 26 27 28 29 30 31  
data byte  
SCK  
SI  
instruction  
16-bit address  
15 14 13 12  
0
0
0
0
0
0
1
0
2
1
0
7
6
5
4
3
2
1
0
High-impedance  
SO  
FIGURE 3-3: PAGE WRITE SEQUENCE  
CS  
0
1
2
3
4
5
6
7
8
9
10 11  
21 22 23 24 25 26 27 28 29 30 31  
data byte 1  
SCK  
SI  
instruction  
16-bit address  
0
0
0
0
0
0
1
0 15 14 13 12  
2
1
0
7
6
5
4
3
2
1
0
CS  
32 33 34 35 36 37 38 39  
data byte 2  
41 42 43 44 45 46 47  
data byte 3  
40  
7
SCK  
SI  
data byte n (32 max)  
7
6
5
4
3
2
1
0
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
DS21227E-page 8  
2004 Microchip Technology Inc.  
25AA320/25LC320/25C320  
The following is a list of conditions under which the  
write enable latch will be reset:  
3.4  
Write Enable (WREN) and Write  
Disable (WRDI)  
• Power-up  
The 25XX320 contains a write enable latch.  
See  
WRDIinstruction successfully executed  
Table 3-3 for the Write-Protect Functionality Matrix.  
This latch must be set before any write operation will be  
completed internally. The WRENinstruction will set the  
latch, and the WRDIwill reset the latch.  
WRSRinstruction successfully executed  
WRITEinstruction successfully executed  
FIGURE 3-4: WRITE ENABLE SEQUENCE  
CS  
0
1
2
3
4
5
6
7
SCK  
SI  
0
0
0
0
0
1
1
0
High-impedance  
SO  
FIGURE 3-5: WRITE DISABLE SEQUENCE  
CS  
0
1
2
3
4
5
6
7
SCK  
SI  
0
0
0
0
0
0
1
0
High-impedance  
SO  
2004 Microchip Technology Inc.  
DS21227E-page 9  
25AA320/25LC320/25C320  
The Write Enable Latch (WEL) bit indicates the status  
of the write enable latch. When set to a ‘1’, the latch  
allows writes to the array, when set to a ‘0’, the latch  
prohibits writes to the array. The state of this bit can  
always be updated via the WREN or WRDI commands  
regardless of the state of write protection on the Status  
register. This bit is read-only.  
3.5  
Read Status Register Instruction  
(RDSR)  
The Read Status Register instruction (RDSR) provides  
access to the Status register. The Status register may  
be read at any time, even during a write cycle. The  
Status register is formatted as follows:  
The Block Protection (BP0 and BP1) bits indicate  
which blocks are currently write-protected. These bits  
are set by the user issuing the WRSRinstruction. These  
bits are nonvolatile.  
7
6
5
4
3
2
1
0
WPEN  
X
X
X
BP1  
BP0  
WEL  
WIP  
The Write-In-Process (WIP) bit indicates whether the  
25XX320 is busy with a write operation. When set to a  
1’, a write is in progress; when set to a ‘0’, no write is  
in progress. This bit is read-only.  
See Figure 3-6 for the RDSR timing sequence.  
FIGURE 3-6: READ STATUS REGISTER TIMING SEQUENCE  
CS  
0
1
2
3
4
5
6
7
8
9
10  
11  
12  
13  
14  
15  
SCK  
SI  
instruction  
0
0
0
0
0
1
0
1
data from Status register  
High-impedance  
SO  
7
6
5
4
3
2
1
0
DS21227E-page 10  
2004 Microchip Technology Inc.  
25AA320/25LC320/25C320  
When the chip is hardware write-protected, only writes  
3.6  
Write Status Register Instruction  
(WRSR)  
to nonvolatile bits in the Status register are disabled.  
See Table 3-3 for a matrix of functionality on the WPEN  
bit.  
The Write Status Register instruction (WRSR) allows the  
user to select one of four levels of protection for the  
array by writing to the appropriate bits in the Status  
register. The array is divided up into four segments.  
The user has the ability to write-protect none, one, two,  
or all four of the segments of the array. The partitioning  
is controlled as shown in Table 3-2.  
See Figure 3-7 for the WRSR timing sequence.  
TABLE 3-2:  
BP1  
ARRAY PROTECTION  
Array Addresses  
BP0  
Write-Protected  
The Write-Protect Enable (WPEN) bit is a nonvolatile  
bit that is available as an enable bit for the WP pin. The  
Write-Protect (WP) pin and the Write-Protect Enable  
(WPEN) bit in the Status register control the program-  
mable hardware write-protect feature. Hardware write  
protection is enabled when WP pin is low and the  
WPEN bit is high. Hardware write protection is disabled  
when either the WP pin is high or the WPEN bit is low.  
none  
0
0
0
1
upper 1/4  
(0C00h - 0FFFh)  
upper 1/2  
(0800h - 0FFFh)  
1
1
0
1
all  
(0000h - 0FFFh)  
FIGURE 3-7: WRITE STATUS REGISTER TIMING SEQUENCE  
CS  
0
1
2
3
4
5
6
7
8
9
10  
11  
12  
13  
14  
1
15  
0
SCK  
SI  
instruction  
data to Status register  
7
6
5
4
3
2
0
0
0
0
0
0
0
1
High-impedance  
SO  
2004 Microchip Technology Inc.  
DS21227E-page 11  
25AA320/25LC320/25C320  
3.7  
Data Protection  
3.8  
Power-On State  
The following protection has been implemented to  
prevent inadvertent writes to the array:  
The 25XX320 powers on in the following state:  
• The device is in low-power Standby mode  
• The write enable latch is reset on power-up  
(CS= 1)  
• A WRITE ENABLEinstruction must be issued to  
• The write enable latch is reset  
set the write enable latch  
• SO is in high-impedance state  
• After a byte write, page write or Status register  
write, the write enable latch is reset  
• A low level on CS is required to enter active state  
• CS must be set high after the proper number of  
clock cycles to start an internal write cycle  
• Access to the array during an internal write cycle  
is ignored and programming is continued  
.
TABLE 3-3:  
WPEN  
WRITE-PROTECT FUNCTIONALITY MATRIX  
WP  
WEL  
Protected Blocks  
Protected  
Unprotected Blocks  
Protected  
Status Register  
Protected  
Writable  
x
0
1
x
x
x
0
1
1
1
Protected  
Writable  
Low  
High  
Protected  
Writable  
Protected  
Writable  
Protected  
Writable  
DS21227E-page 12  
2004 Microchip Technology Inc.  
25AA320/25LC320/25C320  
4.0  
4.1  
PACKAGING INFORMATION  
Package Marking Information  
8-Lead PDIP (300 mil)  
Example:  
XXXXXXXX  
XXXXXNNN  
25LC320  
/PNNN  
YYWW  
YYWW  
8-Lead SOIC (150 mil)  
Example:  
XXXXXXXX  
XXXXYYWW  
NNN  
25LC320  
I/SNYYWW  
NNN  
Example:  
8-Lead TSSOP  
XXXX  
XYWW  
NNN  
5LBX  
IYWW  
NNN  
Example:  
14-Lead TSSOP  
XXXXXXXX  
YYWW  
25L32  
YYWW  
NNN  
NNN  
Legend: XX...X Customer specific information*  
Y
YY  
WW  
NNN  
Year code (last digit of calendar year)  
Year code (last 2 digits of calendar year)  
Week code (week of January 1 is week ‘01’)  
Alphanumeric traceability code  
Note: In the event the full Microchip part number cannot be marked on one line, it will  
be carried over to the next line thus limiting the number of available characters  
for customer specific information.  
*
Standard marking consists of Microchip part number, year code, week code, and traceability code. For  
device markings beyond this, certain price adders apply. Please check with your Microchip Sales Office.  
For QTP devices, any special marking adders are included in QTP price.  
2004 Microchip Technology Inc.  
DS21227E-page 13  
25AA320/25LC320/25C320  
8-Lead Plastic Dual In-line (P) – 300 mil (PDIP)  
E1  
D
2
n
1
α
E
A2  
A
L
c
A1  
β
B1  
B
p
eB  
Units  
INCHES*  
NOM  
MILLIMETERS  
Dimension Limits  
MIN  
MAX  
MIN  
NOM  
8
MAX  
n
p
Number of Pins  
Pitch  
8
.100  
.155  
.130  
2.54  
Top to Seating Plane  
A
.140  
.170  
3.56  
2.92  
3.94  
3.30  
4.32  
Molded Package Thickness  
Base to Seating Plane  
Shoulder to Shoulder Width  
Molded Package Width  
Overall Length  
A2  
A1  
E
.115  
.015  
.300  
.240  
.360  
.125  
.008  
.045  
.014  
.310  
5
.145  
3.68  
0.38  
7.62  
6.10  
9.14  
3.18  
0.20  
1.14  
0.36  
7.87  
5
.313  
.250  
.373  
.130  
.012  
.058  
.018  
.370  
10  
.325  
.260  
.385  
.135  
.015  
.070  
.022  
.430  
15  
7.94  
6.35  
9.46  
3.30  
0.29  
1.46  
0.46  
9.40  
10  
8.26  
6.60  
9.78  
3.43  
0.38  
1.78  
0.56  
10.92  
15  
E1  
D
Tip to Seating Plane  
Lead Thickness  
L
c
Upper Lead Width  
B1  
B
Lower Lead Width  
Overall Row Spacing  
Mold Draft Angle Top  
Mold Draft Angle Bottom  
§
eB  
α
β
5
10  
15  
5
10  
15  
* Controlling Parameter  
§ Significant Characteristic  
Notes:  
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed  
.010” (0.254mm) per side.  
JEDEC Equivalent: MS-001  
Drawing No. C04-018  
DS21227E-page 14  
2004 Microchip Technology Inc.  
25AA320/25LC320/25C320  
8-Lead Plastic Small Outline (SN) – Narrow, 150 mil (SOIC)  
E
E1  
p
D
2
1
B
n
h
α
45°  
c
A2  
A
φ
β
L
A1  
Units  
INCHES*  
NOM  
MILLIMETERS  
Dimension Limits  
MIN  
MAX  
MIN  
NOM  
8
MAX  
n
p
Number of Pins  
Pitch  
8
.050  
.061  
.056  
.007  
.237  
.154  
.193  
.015  
.025  
4
1.27  
Overall Height  
A
.053  
.069  
1.35  
1.32  
1.55  
1.42  
0.18  
6.02  
3.91  
4.90  
0.38  
0.62  
4
1.75  
Molded Package Thickness  
Standoff  
A2  
A1  
E
.052  
.004  
.228  
.146  
.189  
.010  
.019  
0
.061  
.010  
.244  
.157  
.197  
.020  
.030  
8
1.55  
0.25  
6.20  
3.99  
5.00  
0.51  
0.76  
8
§
0.10  
5.79  
3.71  
4.80  
0.25  
0.48  
0
Overall Width  
Molded Package Width  
Overall Length  
E1  
D
Chamfer Distance  
Foot Length  
h
L
φ
Foot Angle  
c
Lead Thickness  
Lead Width  
.008  
.013  
0
.009  
.017  
12  
.010  
.020  
15  
0.20  
0.33  
0
0.23  
0.42  
12  
0.25  
0.51  
15  
B
α
Mold Draft Angle Top  
Mold Draft Angle Bottom  
β
0
12  
15  
0
12  
15  
* Controlling Parameter  
§ Significant Characteristic  
Notes:  
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed  
.010” (0.254mm) per side.  
JEDEC Equivalent: MS-012  
Drawing No. C04-057  
2004 Microchip Technology Inc.  
DS21227E-page 15  
25AA320/25LC320/25C320  
8-Lead Plastic Thin Shrink Small Outline (ST) – 4.4 mm (TSSOP)  
E
E1  
p
D
2
1
n
B
α
A
c
A1  
A2  
φ
β
L
Units  
INCHES  
NOM  
MILLIMETERS*  
Dimension Limits  
MIN  
MAX  
MIN  
NOM  
8
MAX  
n
p
Number of Pins  
Pitch  
8
.026  
0.65  
Overall Height  
A
.043  
1.10  
0.95  
0.15  
6.50  
4.50  
3.10  
0.70  
8
Molded Package Thickness  
Standoff  
A2  
A1  
E
.033  
.035  
.004  
.251  
.173  
.118  
.024  
4
.037  
.006  
.256  
.177  
.122  
.028  
8
0.85  
0.05  
0.90  
0.10  
6.38  
4.40  
3.00  
0.60  
4
§
.002  
.246  
.169  
.114  
.020  
0
Overall Width  
6.25  
4.30  
2.90  
0.50  
0
Molded Package Width  
Molded Package Length  
Foot Length  
E1  
D
L
φ
Foot Angle  
c
Lead Thickness  
.004  
.007  
0
.006  
.010  
5
.008  
.012  
10  
0.09  
0.19  
0
0.15  
0.25  
5
0.20  
0.30  
10  
Lead Width  
B
α
β
Mold Draft Angle Top  
Mold Draft Angle Bottom  
0
5
10  
0
5
10  
* Controlling Parameter  
§ Significant Characteristic  
Notes:  
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed  
.005” (0.127mm) per side.  
JEDEC Equivalent: MO-153  
Drawing No. C04-086  
DS21227E-page 16  
2004 Microchip Technology Inc.  
25AA320/25LC320/25C320  
14-Lead Plastic Thin Shrink Small Outline (ST) – 4.4 mm (TSSOP)  
E
E1  
p
D
2
1
n
B
α
A
c
φ
A1  
A2  
β
L
Units  
INCHES  
NOM  
MILLIMETERS*  
Dimension Limits  
MIN  
MAX  
MIN  
NOM  
14  
MAX  
n
p
Number of Pins  
Pitch  
14  
.026  
0.65  
Overall Height  
A
.043  
1.10  
0.95  
0.15  
6.50  
4.50  
5.10  
0.70  
8
Molded Package Thickness  
Standoff  
A2  
A1  
E
.033  
.002  
.246  
.169  
.193  
.020  
0
.035  
.004  
.251  
.173  
.197  
.024  
4
.037  
.006  
.256  
.177  
.201  
.028  
8
0.85  
0.05  
0.90  
0.10  
6.38  
4.40  
5.00  
0.60  
4
§
Overall Width  
6.25  
4.30  
4.90  
0.50  
0
Molded Package Width  
Molded Package Length  
Foot Length  
E1  
D
L
φ
Foot Angle  
c
Lead Thickness  
.004  
.007  
0
.006  
.010  
5
.008  
.012  
10  
0.09  
0.19  
0
0.15  
0.25  
5
0.20  
0.30  
10  
Lead Width  
B
α
Mold Draft Angle Top  
Mold Draft Angle Bottom  
β
0
5
10  
0
5
10  
* Controlling Parameter  
§ Significant Characteristic  
Notes:  
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed  
.005” (0.127mm) per side.  
JEDEC Equivalent: MO-153  
Drawing No. C04-087  
2004 Microchip Technology Inc.  
DS21227E-page 17  
25AA320/25LC320/25C320  
APPENDIX A: REVISION HISTORY  
Revision D  
Corrections to Section 1.0, Electrical Characteristics.  
Revision E  
Revise Endurance from 100K to 1M.  
DS21227E-page 18  
2004 Microchip Technology Inc.  
25AA320/25LC320/25C320  
ON-LINE SUPPORT  
SYSTEMS INFORMATION AND  
UPGRADE HOT LINE  
Microchip provides on-line support on the Microchip  
World Wide Web site.  
The Systems Information and Upgrade Line provides  
system users a listing of the latest versions of all of  
Microchip's development systems software products.  
Plus, this line provides information on how customers  
can receive the most current upgrade kits. The Hot Line  
Numbers are:  
The web site is used by Microchip as a means to make  
files and information easily available to customers. To  
view the site, the user must have access to the Internet  
and a web browser, such as Netscape® or Microsoft®  
Internet Explorer. Files are also available for FTP  
download from our FTP site.  
1-800-755-2345 for U.S. and most of Canada, and  
1-480-792-7302 for the rest of the world.  
Connecting to the Microchip Internet  
Web Site  
042003  
The Microchip web site is available at the following  
URL:  
www.microchip.com  
The file transfer site is available by using an FTP  
service to connect to:  
ftp://ftp.microchip.com  
The web site and file transfer site provide a variety of  
services. Users may download files for the latest  
Development Tools, Data Sheets, Application Notes,  
User's Guides, Articles and Sample Programs. A vari-  
ety of Microchip specific business information is also  
available, including listings of Microchip sales offices,  
distributors and factory representatives. Other data  
available for consideration is:  
• Latest Microchip Press Releases  
Technical Support Section with Frequently Asked  
Questions  
• Design Tips  
• Device Errata  
• Job Postings  
• Microchip Consultant Program Member Listing  
• Links to other useful web sites related to  
Microchip Products  
• Conferences for products, Development Systems,  
technical information and more  
• Listing of seminars and events  
2004 Microchip Technology Inc.  
DS21227E-page 19  
25AA320/25LC320/25C320  
READER RESPONSE  
It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip prod-  
uct. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation  
can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-4150.  
Please list the following information, and use this outline to provide us with your comments about this document.  
To:  
Technical Publications Manager  
Reader Response  
Total Pages Sent ________  
RE:  
From:  
Name  
Company  
Address  
City / State / ZIP / Country  
Telephone: (_______) _________ - _________  
FAX: (______) _________ - _________  
Application (optional):  
Would you like a reply?  
Y
N
25AA320/25LC320/25C320  
DS21227E  
Literature Number:  
Device:  
Questions:  
1. What are the best features of this document?  
2. How does this document meet your hardware and software development needs?  
3. Do you find the organization of this document easy to follow? If not, why?  
4. What additions to the document do you think would enhance the structure and subject?  
5. What deletions from the document could be made without affecting the overall usefulness?  
6. Is there any incorrect or misleading information (what and where)?  
7. How would you improve this document?  
DS21227E-page 20  
2004 Microchip Technology Inc.  
25AA320/25LC320/25C320  
PRODUCT IDENTIFICATION SYSTEM  
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.  
Examples:  
PART NO.  
Device  
X
/XX  
a) 25LC320-I/SN: Industrial Temp.,  
SOIC package  
b) 25LC320T-I/SN: Tape and Reel,  
Industrial Temp., SOIC package  
c) 25LC320-E/SN: Extended Temp.,  
SOIC package  
Temperature  
Range  
Package  
Device:  
25AA320:  
25AA320T:  
32 Kbit 1.8V SPI Serial EEPROM  
32 Kbit 1.8V SPI Serial EEPROM  
(Tape and Reel)  
25AA320X  
32-bit 1.8V SPI Serial EEPROM  
in alternate pinout (ST only)  
d) 25C320-I/SN: Industrial Temp.,  
SOIC package  
25AA320XT 32-bit 1.8V SPI Serial EEPROM  
in alternate pinout Tape and Reel  
(ST only)  
e) 25C320T-I/SN: Tape and Reel,  
Industrial Temp., SOIC package  
f)  
25C320-I/ST: Industrial Temp.,  
TSSOP package  
25LC320:  
32 Kbit 2.5V SPI Serial EEPROM  
32 Kbit 2.5V SPI Serial EEPROM  
(Tape and Reel)  
25LC320T:  
g) 25C320-E/SN: Extended Temp.,  
SOIC package  
25LC320X  
32-bit 2.5V SPI Serial EEPROM  
in alternate pinout (ST only)  
25LC320XT 32-bit 2.5V SPI Serial EEPROM  
in alternate pinout Tape and Reel  
(ST only)  
25C320:  
25C320T:  
32 Kbit 5V SPI Serial EEPROM  
32 Kbit 5V SPI Serial EEPROM  
(Tape and Reel)  
25C320X  
32-bit 5V SPI Serial EEPROM  
in alternate pinout (ST only)  
32-bit 5V SPI Serial EEPROM  
in alternate pinout Tape and Reel  
(ST only)  
25C320XT  
Temperature  
Range:  
I
E
=
=
-40°C to +85°C  
-40°C to +125°C  
Package:  
P
SN  
=
=
Plastic DIP (300 mil body), 8-lead  
Plastic SOIC (150 mil body),  
8-lead  
ST  
=
Plastic TSSOP (4.4 mm body),  
8-lead  
ST14 =  
Plastic TSSOP (4.4 mm body),  
14-lead  
Sales and Support  
Data Sheets  
Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and  
recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following:  
1. Your local Microchip sales office  
2. The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277  
3. The Microchip Worldwide Site (www.microchip.com)  
Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using.  
New Customer Notification System  
Register on our web site (www.microchip.com/cn) to receive the most current information on our products.  
2004 Microchip Technology Inc.  
DS21227E-page 21  
25AA320/25LC320/25C320  
NOTES:  
DS21227E-page 22  
2004 Microchip Technology Inc.  
Note the following details of the code protection feature on Microchip devices:  
Microchip products meet the specification contained in their particular Microchip Data Sheet.  
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the  
intended manner and under normal conditions.  
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our  
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data  
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.  
Microchip is willing to work with the customer who is concerned about the integrity of their code.  
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not  
mean that we are guaranteeing the product as “unbreakable.”  
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our  
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts  
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.  
Information contained in this publication regarding device  
applications and the like is intended through suggestion only  
and may be superseded by updates. It is your responsibility to  
ensure that your application meets with your specifications.  
No representation or warranty is given and no liability is  
assumed by Microchip Technology Incorporated with respect  
to the accuracy or use of such information, or infringement of  
patents or other intellectual property rights arising from such  
use or otherwise. Use of Microchip’s products as critical  
components in life support systems is not authorized except  
with express written approval by Microchip. No licenses are  
conveyed, implicitly or otherwise, under any intellectual  
property rights.  
Trademarks  
The Microchip name and logo, the Microchip logo, Accuron,  
dsPIC, KEELOQ, microID, MPLAB, PIC, PICmicro, PICSTART,  
PRO MATE, PowerSmart, rfPIC, and SmartShunt are  
registered trademarks of Microchip Technology Incorporated  
in the U.S.A. and other countries.  
AmpLab, FilterLab, MXDEV, MXLAB, PICMASTER, SEEVAL,  
SmartSensor and The Embedded Control Solutions Company  
are registered trademarks of Microchip Technology  
Incorporated in the U.S.A.  
Analog-for-the-Digital Age, Application Maestro, dsPICDEM,  
dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR,  
FanSense, FlexROM, fuzzyLAB, In-Circuit Serial  
Programming, ICSP, ICEPIC, Migratable Memory, MPASM,  
MPLIB, MPLINK, MPSIM, PICkit, PICDEM, PICDEM.net,  
PICLAB, PICtail, PowerCal, PowerInfo, PowerMate,  
PowerTool, rfLAB, rfPICDEM, Select Mode, Smart Serial,  
SmartTel and Total Endurance are trademarks of Microchip  
Technology Incorporated in the U.S.A. and other countries.  
SQTP is a service mark of Microchip Technology Incorporated  
in the U.S.A.  
All other trademarks mentioned herein are property of their  
respective companies.  
© 2004, Microchip Technology Incorporated, Printed in the  
U.S.A., All Rights Reserved.  
Printed on recycled paper.  
Microchip received ISO/TS-16949:2002 quality system certification for  
its worldwide headquarters, design and wafer fabrication facilities in  
Chandler and Tempe, Arizona and Mountain View, California in  
October 2003. The Company’s quality system processes and  
procedures are for its PICmicro® 8-bit MCUs, KEELOQ® code hopping  
devices, Serial EEPROMs, microperipherals, nonvolatile memory and  
analog products. In addition, Microchip’s quality system for the design  
and manufacture of development systems is ISO 9001:2000 certified.  
2004 Microchip Technology Inc.  
DS21227E-page 23  
WORLDWIDE SALES AND SERVICE  
China - Beijing  
Singapore  
AMERICAS  
Corporate Office  
2355 West Chandler Blvd.  
Chandler, AZ 85224-6199  
Tel: 480-792-7200  
Fax: 480-792-7277  
Technical Support: 480-792-7627  
Web Address: www.microchip.com  
Unit 706B  
200 Middle Road  
Wan Tai Bei Hai Bldg.  
No. 6 Chaoyangmen Bei Str.  
Beijing, 100027, China  
Tel: 86-10-85282100  
Fax: 86-10-85282104  
#07-02 Prime Centre  
Singapore, 188980  
Tel: 65-6334-8870 Fax: 65-6334-8850  
Taiwan  
Kaohsiung Branch  
30F - 1 No. 8  
Min Chuan 2nd Road  
Kaohsiung 806, Taiwan  
Tel: 886-7-536-4816  
Fax: 886-7-536-4817  
China - Chengdu  
Rm. 2401-2402, 24th Floor,  
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No. 88 TIDU Street  
Chengdu 610016, China  
Tel: 86-28-86766200  
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Tel: 886-2-2717-7175 Fax: 886-2-2545-0139  
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China - Qingdao  
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Tel: 49-89-627-144-0  
Fax: 49-89-627-144-44  
Fax: 949-462-9608  
San Jose  
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Tel: 650-215-1444  
Italy  
India  
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Japan  
Fax: 650-961-0286  
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Fax: 39-0331-466781  
Netherlands  
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Tel: 31-416-690399  
Toronto  
6285 Northam Drive, Suite 108  
Mississauga, Ontario L4V 1X5, Canada  
Tel: 905-673-0699  
Yusen Shin Yokohama Building 10F  
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Yokohama, Kanagawa, 222-0033, Japan  
Tel: 81-45-471- 6166 Fax: 81-45-471-6122  
Fax: 905-673-6509  
Fax: 31-416-690340  
ASIA/PACIFIC  
Australia  
Microchip Technology Australia Pty Ltd  
Unit 32 41 Rawson Street  
Epping 2121, NSW  
Sydney, Australia  
Tel: 61-2-9868-6733  
Fax: 61-2-9868-6755  
United Kingdom  
505 Eskdale Road  
Winnersh Triangle  
Korea  
168-1, Youngbo Bldg. 3 Floor  
Samsung-Dong, Kangnam-Ku  
Seoul, Korea 135-882  
Wokingham  
Berkshire, England RG41 5TU  
Tel: 44-118-921-5869  
Fax: 44-118-921-5820  
Tel: 82-2-554-7200 Fax: 82-2-558-5932 or  
82-2-558-5934  
07/12/04  
DS21227E-page 24  
2004 Microchip Technology Inc.  

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