25LC020AT-I/SN [MICROCHIP]
2K SPI Bus Serial EEPROM; 2K SPI总线串行EEPROM型号: | 25LC020AT-I/SN |
厂家: | MICROCHIP |
描述: | 2K SPI Bus Serial EEPROM |
文件: | 总28页 (文件大小:467K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
25AA020A/25LC020A
2K SPI Bus Serial EEPROM
Device Selection Table
Part Number
VCC Range
Page Size
Temp. Ranges
Packages
25AA020A
25LC020A
1.8-5.5V
2.5-5.5V
16 Bytes
16 Bytes
I
P, MS, SN, ST, MC, OT
P, MS, SN, ST, MC, OT
I, E
Features:
Description:
• 10 MHz max. clock frequency
• Low-power CMOS technology:
- Max. Write Current: 5 mA at 5.5V, 10 MHz
- Read Current: 5 mA at 5.5V, 10 MHz
- Standby Current: 5 μA at 5.5V
• 256 x 8-bit organization
The Microchip Technology Inc. 25XX020A* is a 2 Kbit
Serial Electrically Erasable Programmable Read-Only
Memory (EEPROM). The memory is accessed via a
simple Serial Peripheral Interface™ (SPI) compatible
serial bus. The bus signals required are a clock input
(SCK) plus separate data in (SI) and data out (SO)
lines. Access to the device is controlled through a Chip
Select (CS) input.
• Write Page mode (up to 16 bytes)
• Sequential Read
Communication to the device can be paused via the
hold pin (HOLD). While the device is paused, transi-
tions on its inputs will be ignored, with the exception of
Chip Select, allowing the host to service higher priority
interrupts.
• Self-timed Erase and Write cycles (5 ms max.)
• Block Write protection:
- Protect none, 1/4, 1/2 or all of array
• Built-in Write protection:
The 25XX020A is available in standard packages
including 8-lead PDIP and SOIC, and advanced
packages including 8-lead MSOP, 8-lead TSSOP and
rotated TSSOP, 8-lead 2x3 DFN, and 6-lead SOT-23.
- Power-on/off data protection circuitry
- Write enable latch
- Write-protect pin
• High reliability:
Package Types (not to scale)
- Endurance: 1,000,000 Erase/Write cycles
- Data retention: > 200 years
- ESD protection: > 4000V
PDIP/SOIC
TSSOP/MSOP
(P, SN)
(ST, MS)
CS
SO
WP
VCC
1
2
3
4
8
7
6
5
1
2
3
4
8
7
6
5
CS
SO
WP
V
CC
• Temperature ranges supported:
- Industrial (I):
- Automotive (E):
HOLD
SCK
SI
HOLD
SCK
SI
-40°C to +85°C
-40°C to +125°C
VSS
VSS
• Pb-Free packages available
DFN
(MC)
SOT-23
(OT)
Pin Function Table
V
CC
1
1
2
3
6
5
4
8
CS
SO
SCK
V
DD
Name
Function
Chip Select Input
2
3
4
7
6
5
HOLD
SCK
SI
VSS
CS
SO
CS
SO
SI
WP
VSS
Serial Data Output
Write-Protect
Ground
WP
X-Rotated TSSOP
VSS
SI
(X/ST)
1
2
3
4
8
7
6
5
Serial Data Input
Serial Clock Input
Hold Input
HOLD
SCK
SI
VSS
VCC
SCK
HOLD
VCC
CS
SO
WP
Supply Voltage
*25XX020A is used in this document as a generic part number for the
25AA020A and the 25LC020A.
© 2006 Microchip Technology Inc.
Preliminary
DS21833C-page 1
25AA020A/25LC020A
1.0
ELECTRICAL CHARACTERISTICS
(†)
Absolute Maximum Ratings
VCC.............................................................................................................................................................................6.5V
All inputs and outputs w.r.t. VSS ......................................................................................................... -0.6V to VCC +1.0V
Storage temperature .................................................................................................................................-65°C to 150°C
Ambient temperature under bias...............................................................................................................-40°C to 125°C
ESD protection on all pins..........................................................................................................................................4 kV
† NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the
device. This is a stress rating only and functional operation of the device at those or any other conditions above those
indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for an
extended period of time may affect device reliability.
TABLE 1-1:
DC CHARACTERISTICS
Industrial (I):
Automotive (E):
TA = -40°C to +85°C
TA = -40°C to +125°C
VCC = 1.8V to 5.5V
VCC = 2.5V to 5.5V
DC CHARACTERISTICS
Param.
No.
Sym.
Characteristic
Min.
Max.
VCC +1
Units
Test Conditions
D001
VIH1
High-level Input
Voltage
0.7 VCC
V
D002
D003
D004
D005
D006
VIL1
VIL2
VOL
VOL
VOH
Low-level Input
Voltage
-0.3
-0.3
0.3 VCC
0.2 VCC
0.4
V
V
V
V
V
VCC ≥ 2.7V (Note 1)
VCC < 2.7V (Note 1)
IOL = 2.1 mA
Low-level Output
Voltage
—
—
0.2
IOL = 1.0 mA, VCC < 2.5V
IOH = -400 μA
High-level Output
Voltage
VCC -0.5
—
D007
D008
D009
ILI
Input Leakage
Current
—
—
—
±1
±1
7
μA
μA
pF
CS = VCC, VIN = VSS TO VCC
CS = VCC, VOUT = VSS TO VCC
ILO
CINT
Output Leakage
Current
Internal Capacitance
(all inputs and
outputs)
TA = 25°C, CLK = 1.0 MHz,
VCC = 5.0V (Note 1)
D010
ICC Read
—
—
5
mA
mA
VCC = 5.5V; FCLK = 10.0 MHz;
SO = Open
VCC = 2.5V; FCLK = 5.0 MHz;
SO = Open
Operating Current
Standby Current
2.5
D011
D012
ICC Write
ICCS
—
—
5
3
mA
mA
VCC = 5.5V
VCC = 2.5V
—
5
μA
CS = VCC = 5.5V, Inputs tied to VCC or
VSS, TA = +125°C
—
1
μA
CS = VCC = 2.5V, Inputs tied to VCC or
VSS, TA = +85°C
Note:
This parameter is periodically sampled and not 100% tested.
DS21833C-page 2
Preliminary
© 2006 Microchip Technology Inc.
25AA020A/25LC020A
TABLE 1-2:
AC CHARACTERISTICS
Industrial (I):
Automotive (E):
TA = -40°C to +85°C
TA = -40°C to +125°C
VCC = 1.8V to 5.5V
VCC = 2.5V to 5.5V
AC CHARACTERISTICS
Param.
Sym.
Characteristic
Min.
Max.
Units
Test Conditions
No.
1
2
3
FCLK Clock Frequency
—
—
—
10
5
3
MHz 4.5V ≤ VCC < 5.5V
MHz 2.5V ≤ VCC < 4.5V
MHz 1.8V ≤ VCC < 2.5V
TCSS CS Setup Time
TCSH CS Hold Time
TCSD CS Disable Time
50
100
150
—
—
—
ns
ns
ns
4.5V ≤ VCC < 5.5V
2.5V ≤ VCC < 4.5V
1.8V ≤ VCC < 2.5V
100
200
250
—
—
—
ns
ns
ns
4.5V ≤ VCC < 5.5V
2.5V ≤ VCC < 4.5V
1.8V ≤ VCC < 2.5V
4
5
50
—
ns
—
Tsu
Data Setup Time
10
20
30
—
—
—
ns
ns
ns
4.5V ≤ VCC < 5.5V
2.5V ≤ VCC < 4.5V
1.8V ≤ VCC < 2.5V
6
THD
Data Hold Time
20
40
50
—
—
—
ns
ns
ns
4.5V ≤ VCC < 5.5V
2.5V ≤ VCC < 4.5V
1.8V ≤ VCC < 2.5V
7
8
9
TR
TF
CLK Rise Time
CLK Fall Time
Clock High Time
—
—
2
2
μs
μs
(Note 1)
(Note 1)
THI
0.05
0.1
0.15
1000
1000
1000
μs
μs
μs
4.5V ≤ VCC < 5.5V
2.5V ≤ VCC < 4.5V
1.8V ≤ VCC < 2.5V
10
TLO
Clock Low Time
0.05
0.1
0.15
1000
1000
1000
μs
μs
μs
4.5V ≤ VCC < 5.5V
2.5V ≤ VCC < 4.5V
1.8V ≤ VCC < 2.5V
11
12
13
TCLD Clock Delay Time
50
50
—
—
ns
ns
—
—
TCLE
TV
Clock Enable Time
Output Valid from Clock
Low
—
—
—
50
100
160
ns
ns
ns
4.5V ≤ VCC < 5.5V
2.5V ≤ VCC < 4.5V
1.8V ≤ VCC < 2.5V
14
15
THO
TDIS
Output Hold Time
0
—
ns
(Note 1)
Output Disable Time
—
—
—
40
80
160
ns
ns
ns
4.5V ≤ VCC < 5.5V (Note 1)
2.5V ≤ VCC < 4.5V (Note 1)
1.8V ≤ VCC < 2.5V (Note 1)
16
THS
HOLD Setup Time
20
40
80
—
—
—
ns
ns
ns
4.5V ≤ VCC < 5.5V
2.5V ≤ VCC < 4.5V
1.8V ≤ VCC < 2.5V
Note 1: This parameter is periodically sampled and not 100% tested.
2: This parameter is not tested but ensured by characterization. For endurance estimates in a specific
application, please consult the Total Endurance™ Model which can be obtained from our web site:
www.Microchip.com.
3: TWC begins on the rising edge of CS after a valid write sequence and ends when the internal write cycle
is complete.
© 2006 Microchip Technology Inc.
Preliminary
DS21833C-page 3
25AA020A/25LC020A
TABLE 1-2:
AC CHARACTERISTICS (CONTINUED)
Industrial (I):
Automotive (E):
TA = -40°C to +85°C
TA = -40°C to +125°C
VCC = 1.8V to 5.5V
VCC = 2.5V to 5.5V
AC CHARACTERISTICS
Param.
Sym.
Characteristic
Min.
Max.
Units
Test Conditions
No.
17
THH
HOLD Hold Time
20
40
80
—
—
—
ns
ns
ns
4.5V ≤ VCC < 5.5V
2.5V ≤ VCC < 4.5V
1.8V ≤ VCC < 2.5V
18
19
THZ
THV
HOLD Low to Output
High-Z
30
60
160
—
—
—
ns
ns
ns
4.5V ≤ VCC < 5.5V (Note 1)
2.5V ≤ VCC < 4.5V (Note 1)
1.8V ≤ VCC < 2.5V (Note 1)
HOLD High to Output
Valid
30
60
160
—
—
—
ns
ns
ns
4.5V ≤ VCC < 5.5V
2.5V ≤ VCC < 4.5V
1.8V ≤ VCC < 2.5V
20
21
TWC
—
Internal Write Cycle Time
(byte or page)
—
5
ms
(Note 3)
Endurance
1M
—
E/W (NOTE 2)
Cycles
Note 1: This parameter is periodically sampled and not 100% tested.
2: This parameter is not tested but ensured by characterization. For endurance estimates in a specific
application, please consult the Total Endurance™ Model which can be obtained from our web site:
www.Microchip.com.
3: TWC begins on the rising edge of CS after a valid write sequence and ends when the internal write cycle
is complete.
TABLE 1-3:
AC Waveform:
VLO = 0.2V
AC TEST CONDITIONS
—
VHI = VCC - 0.2V
(Note 1)
(Note 2)
—
VHI = 4.0V
CL = 100 pF
Timing Measurement Reference Level
Input
0.5 VCC
0.5 VCC
Output
Note 1: For VCC ≤ 4.0V
2: For VCC > 4.0V
DS21833C-page 4
Preliminary
© 2006 Microchip Technology Inc.
25AA020A/25LC020A
FIGURE 1-1: HOLD TIMING
CS
17
17
16
16
SCK
18
19
high-impedance
n
SO
n + 2
n + 2
n + 1
n
n - 1
5
don’t care
n
n + 1
n
n - 1
SI
HOLD
FIGURE 1-2: SERIAL INPUT TIMING
4
CS
12
11
2
7
3
8
Mode 1,1
Mode 0,0
SCK
SI
5
6
MSB in
LSB in
high-impedance
SO
FIGURE 1-3: SERIAL OUTPUT TIMING
CS
3
9
10
Mode 1,1
SCK
Mode 0,0
13
15
ISB out
14
MSB out
SO
SI
don’t care
© 2006 Microchip Technology Inc.
Preliminary
DS21833C-page 5
25AA020A/25LC020A
After setting the write enable latch, the user may
proceed by driving CS low, issuing a WRITEinstruction,
followed by the remainder of the address, and then the
data to be written. Up to 16 bytes of data can be sent to
the device before a write cycle is necessary. The only
restriction is that all of the bytes must reside in the
same page. Additionally, a page address begins with
XXXX 0000and ends with XXXX 1111. If the internal
address counter reaches XXXX 1111and clock signals
continue to be applied to the chip, the address counter
will roll back to the first address of the page and over-
write any data that previously existed in those
locations.
2.0
2.1
FUNCTIONAL DESCRIPTION
Principles of Operation
The 25XX020A is
designed to interface directly with the Serial Peripheral
Interface (SPI) port of many of today’s popular
a 256-byte Serial EEPROM
microcontroller
families,
including
Microchip’s
PICmicro® microcontrollers. It may also interface with
microcontrollers that do not have a built-in SPI port by
using discrete I/O lines programmed properly in
software to match the SPI protocol.
The 25XX020A contains an 8-bit instruction register.
The device is accessed via the SI pin, with data being
clocked in on the rising edge of SCK. The CS pin must
be low and the HOLD pin must be high for the entire
operation.
Note:
Page write operations are limited to writing
bytes within a single physical page,
regardless of the number of bytes
actually being written. Physical page
boundaries start at addresses that are
integer multiples of the page buffer size (or
‘page size’) and, end at addresses that are
integer multiples of page size – 1. If a
Page Write command attempts to write
across a physical page boundary, the
result is that the data wraps around to the
beginning of the current page (overwriting
data previously stored there), instead of
being written to the next page as might be
expected. It is therefore necessary for the
application software to prevent page write
operations that would attempt to cross a
page boundary.
Table 2-1 contains a list of the possible instruction
bytes and format for device operation. All instructions,
addresses, and data are transferred MSb first, LSb last.
Data (SI) is sampled on the first rising edge of SCK
after CS goes low. If the clock line is shared with other
peripheral devices on the SPI bus, the user can assert
the HOLD input and place the 25XX020A in ‘HOLD’
mode. After releasing the HOLD pin, operation will
resume from the point when the HOLD was asserted.
2.2
Read Sequence
The device is selected by pulling CS low. The 8-bit
READ instruction is transmitted to the 25XX020A fol-
lowed by an 8-bit address. See Figure 2-1 for more
details.
For the data to be actually written to the array, the CS
must be brought high after the Least Significant bit (D0)
of the nth data byte has been clocked in. If CS is driven
high at any other time, the write operation will not be
completed. Refer to Figure 2-2 and Figure 2-3 for more
detailed illustrations on the byte write sequence and
the page write sequence respectively. While the write is
in progress, the STATUS register may be read to check
the status of the WIP, WEL, BP1 and BP0 bits
(Figure 2-6). Attempting to read a memory array
location will not be possible during a write cycle. Polling
the WIP bit in the STATUS register is recommended in
order to determine if a write cycle is in progress. When
the write cycle is completed, the write enable latch is
reset.
After the correct READinstruction and address are sent,
the data stored in the memory at the selected address
is shifted out on the SO pin. Data stored in the memory
at the next address can be read sequentially by
continuing to provide clock pulses to the slave. The
internal Address Pointer automatically increments to
the next higher address after each byte of data is
shifted out. When the highest address is reached
(FFh), the address counter rolls over to address 00h
allowing the read cycle to be continued indefinitely. The
read operation is terminated by raising the CS pin
(Figure 2-1).
2.3
Write Sequence
Prior to any attempt to write data to the 25XX020A, the
write enable latch must be set by issuing the WREN
instruction (Figure 2-4). This is done by setting CS low
and then clocking out the proper instruction into the
25XX020A. After all eight bits of the instruction are
transmitted, CS must be driven high to set the write
enable latch. If the write operation is initiated immedi-
ately after the WRENinstruction without CS driven high,
data will not be written to the array since the write
enable latch was not properly set.
DS21833C-page 6
Preliminary
© 2006 Microchip Technology Inc.
25AA020A/25LC020A
BLOCK DIAGRAM
STATUS
Register
HV Generator
EEPROM
Array
Memory
Control
Logic
X
I/O Control
Logic
Dec
Page Latches
Y Decoder
SI
SO
CS
SCK
Sense Amp.
R/W Control
HOLD
WP
VCC
VSS
TABLE 2-1:
INSTRUCTION SET
Instruction Name
Instruction Format
Description
READ
WRITE
0000 x011
0000 x010
0000 x100
0000 x110
0000 x101
0000 x001
Read data from memory array beginning at selected address
Write data to memory array beginning at selected address
Reset the write enable latch (disable write operations)
Set the write enable latch (enable write operations)
Read STATUS register
WRDI
WREN
RDSR
WRSR
Write STATUS register
x= don’t care
FIGURE 2-1:
READ SEQUENCE
CS
0
1
2
3
4
5
6
7
8
9 10 11
17
18
20
19 21 22 23
12
15 16
13 14
SCK
SI
Instruction
Address byte
1 A7 A6 A5 A4
A2 A1 A0
0
0
0
0
0
0
1
A3
data out
high-impedance
7
6
5
4
3
2
1
0
SO
© 2006 Microchip Technology Inc.
Preliminary
DS21833C-page 7
25AA020A/25LC020A
FIGURE 2-2:
BYTE WRITE SEQUENCE
CS
0
1
2
3
4
5
6
7
8
9 10 11
17
6
20
18 19
21 22 23
12 13 14 15 16
Twc
SCK
Instruction
Address byte
A7 A6 A5 A4
A2 A1
data byte
0
0
0
0
0
0
1
0
7
5
2
4
3
A3
0
A0
1
SI
high-impedance
SO
FIGURE 2-3:
PAGE WRITE SEQUENCE
CS
12
13
0
1
2
3
4
5
6
7
8
9
10 11
14 15 16 17 18
20 21 22 23
19
SCK
Address byte
Instruction
data byte 1
5
A3
A1
A0
0
0
0
0
0
0
1
0
A6 A5
A2
7
6
4
3
2
1
0
A4
A7
SI
CS
24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39
SCK
SI
data byte 2
data byte 3
data byte n (16 max)
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
DS21833C-page 8
Preliminary
© 2006 Microchip Technology Inc.
25AA020A/25LC020A
The following is a list of conditions under which the
write enable latch will be reset:
2.4
Write Enable (WREN) and Write
Disable (WRDI)
• Power-up
The 25XX020A contains a write enable latch. See
Table 2-4 for the Write-Protect Functionality Matrix.
This latch must be set before any write operation will be
completed internally. The WRENinstruction will set the
latch, and the WRDIwill reset the latch.
• WRDIinstruction successfully executed
• WRSRinstruction successfully executed
• WRITEinstruction successfully executed
• WP pin is brought low
FIGURE 2-4:
WRITE ENABLE SEQUENCE (WREN)
CS
SCK
SI
0
1
2
3
4
5
6
7
0
0
0
0
0
1
1
0
high-impedance
SO
FIGURE 2-5:
WRITE DISABLE SEQUENCE (WRDI)
CS
0
1
2
3
4
5
6
7
SCK
0
0
0
0
0
0
1
0
SI
high-impedance
SO
© 2006 Microchip Technology Inc.
Preliminary
DS21833C-page 9
25AA020A/25LC020A
The Write Enable Latch (WEL) bit indicates the status
of the write enable latch and is read-only. When set to
a ‘1’, the latch allows writes to the array, when set to a
‘0’, the latch prohibits writes to the array. The state of
this bit can always be updated via the WRENor WRDI
commands regardless of the state of write protection
on the STATUS register. These commands are shown
in Figure 2-4 and Figure 2-5.
2.5
Read Status Register Instruction
(RDSR)
The Read Status Register instruction (RDSR) provides
access to the STATUS register. See Figure 2-6 for the
RDSRtiming sequence. The STATUS register may be
read at any time, even during a write cycle. The
STATUS register is formatted as follows:
The Block Protection (BP0 and BP1) bits indicate
which blocks are currently write-protected. These bits
are set by the user issuing the WRSRinstruction, which
is shown in Figure 2-7. These bits are nonvolatile and
are described in more detail in Table 2-3.
TABLE 2-2:
STATUS REGISTER
7
–
X
6
–
X
5
–
X
4
–
X
3
2
1
0
W/R W/R
R
R
BP1 BP0 WEL WIP
W/R = writable/readable. R = read-only.
The Write-In-Process (WIP) bit indicates whether the
25XX020A is busy with a write operation. When set to
a ‘1’, a write is in progress, when set to a ‘0’, no write
is in progress. This bit is read-only.
FIGURE 2-6:
READ STATUS REGISTER TIMING SEQUENCE (RDSR)
CS
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
SCK
SI
instruction
0
0
0
0
0
1
0
1
data from STATUS register
high-impedance
7
6
5
4
3
2
1
0
SO
DS21833C-page 10
Preliminary
© 2006 Microchip Technology Inc.
25AA020A/25LC020A
TABLE 2-3:
BP1
ARRAY PROTECTION
2.6
Write Status Register Instruction
(WRSR)
Array Addresses
Write-Protected
BP0
The Write Status Register instruction (WRSR) allows
the user to write to the nonvolatile bits in the STATUS
register as shown in Table 2-2. See Figure 2-7 for the
WRSR timing sequence. Four levels of protection for
the array are selectable by writing to the appropriate
bits in the STATUS register. The user has the ability to
write-protect none, one, two, or all four of the
segments of the array as shown in Table 2-3.
none
0
0
0
1
upper 1/4
(C0h-FFh)
upper 1/2
(80h-FFh)
1
1
0
1
all
(00h-FFh)
FIGURE 2-7:
WRITE STATUS REGISTER TIMING SEQUENCE (WRSR)
CS
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
1
15
0
SCK
SI
instruction
data to STATUS register
7
6
5
4
3
2
0
0
0
0
0
0
0
1
high-impedance
SO
Note:
An internal write cycle (TWC) is initiated on the rising edge of CS after a valid write STATUS register
sequence.
© 2006 Microchip Technology Inc.
Preliminary
DS21833C-page 11
25AA020A/25LC020A
2.7
Data Protection
2.8
Power-On State
The following protection has been implemented to
prevent inadvertent writes to the array:
The 25XX020A powers on in the following state:
• The device is in low-power Standby mode
(CS= 1)
• The write enable latch is reset
• SO is in high-impedance state
• A high-to-low-level transition on CS is required to
enter active state
• The write enable latch is reset on power-up
• A write enable instruction must be issued to set
the write enable latch
• After a byte write, page write or STATUS register
write, the write enable latch is reset
• CS must be set high after the proper number of
clock cycles to start an internal write cycle
• Access to the array during an internal write cycle
is ignored and programming is continued
TABLE 2-4:
WRITE-PROTECT FUNCTIONALITY MATRIX
WP
(pin 3)
WEL
(SR bit 1)
Protected Blocks
Unprotected Blocks
STATUS Register
0 (low)
1 (high)
x
0
1
Protected
Protected
Protected
Protected
Protected
Writable
Protected
Protected
Writable
1 (high)
x = don’t care
DS21833C-page 12
Preliminary
© 2006 Microchip Technology Inc.
25AA020A/25LC020A
3.0
PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 3-1.
3.5
Serial Clock (SCK)
The SCK is used to synchronize the communication
between a master and the 25XX020A. Instructions,
addresses or data present on the SI pin are latched on
the rising edge of the clock input, while data on the SO
pin is updated after the falling edge of the clock input.
TABLE 3-1: PIN FUNCTION TABLE
PDIP, SOIC,
MSOP,
Rotated SOT-
Name
Function
TSSOP,
DFN
TSSOP
23
3.6
Hold (HOLD)
CS
SO
1
2
3
4
5
6
7
8
3
4
5
6
7
8
1
2
5
4
Chip Select Input
Serial Data Output
Write-Protect Pin
Ground
The HOLD pin is used to suspend transmission to the
25XX020A while in the middle of a serial sequence
without having to retransmit the entire sequence again.
It must be held high any time this function is not being
used. Once the device is selected and a serial
sequence is underway, the HOLD pin may be pulled
low to pause further serial communication without
resetting the serial sequence. The HOLD pin must be
brought low while SCK is low, otherwise the HOLD
function will not be invoked until the next SCK high-to-
low transition. The 25XX020A must remain selected
during this sequence. The SI, SCK and SO pins are in
a high-impedance state during the time the device is
paused and transitions on these pins will be ignored. To
resume serial communication, HOLD must be brought
high while the SCK pin is low, otherwise serial
communication will not resume. Lowering the HOLD
line at any time will tri-state the SO line.
WP
—
2
VSS
SI
3
Serial Data Input
Serial Clock Input
Hold Input
SCK
HOLD
VCC
1
—
6
Supply Voltage
3.1
Chip Select (CS)
A low level on this pin selects the device. A high level
deselects the device and forces it into Standby mode.
However, a programming cycle which is already
initiated or in progress will be completed, regardless of
the CS input signal. If CS is brought high during a
program cycle, the device will go into Standby mode as
soon as the programming cycle is complete. When the
device is deselected, SO goes to the high-impedance
state, allowing multiple parts to share the same SPI
bus. A low to high transition on CS after a valid write
sequence initiates an internal write cycle. After power-
up, a low level on CS is required prior to any sequence
being initiated.
3.2
Serial Output (SO)
The SO pin is used to transfer data out of the
25XX020A. During a read cycle, data is shifted out on
this pin after the falling edge of the serial clock.
3.3
Write-Protect (WP)
The WP pin is a hardware write-protect input pin.
When it is low, all writes to the array or STATUS reg-
ister are disabled, but any other operations function
normally. When WP is high, all functions, including
nonvolatile writes operate normally. At any time, when
WP is low, the write enable reset latch will be reset
and programming will be inhibited. However, if a write
cycle is already in progress, WP going low will not
change or disable the write cycle. See Table 2-4 for
the Write-Protect Functionality Matrix.
3.4
Serial Input (SI)
The SI pin is used to transfer data into the device. It
receives instructions, addresses and data. Data is
latched on the rising edge of the serial clock.
© 2006 Microchip Technology Inc.
Preliminary
DS21833C-page 13
25AA020A/25LC020A
4.0
4.1
PACKAGING INFORMATION
Package Marking Information
Example:
25AA020A
8-Lead PDIP
XXXXXXXX
T/XXXNNN
I/P
1L7
e
3
0627
YYWW
Example:
8-Lead SOIC
25AA02AI
XXXXXXXT
SN
0627
XXXXYYWW
e
3
1L7
NNN
Example:
8-Lead TSSOP
5A2A
I627
1L7
XXXX
TYWW
NNN
8-Lead MSOP (150 mil)
Example:
5L2AI
6271L7
XXXXXT
YWWNNN
1st Line Marking Codes
Part Number
TSSOP
DFN
I Temp.
MSOP
SOT-23
I Temp. E Temp.
Standard Rotated
E Temp.
—
—
22NN
5A2A
5L2A
A2AX
L2AX
5A2AT
411
414
25AA020A
25LC020A
5L2AT 25NN
26NN
415
Note: T = Temperature grade (I, E) NN = Alphanumeric traceability code
Legend: XX...X Customer-specific information
Y
Year code (last digit of calendar year)
YY
WW
NNN
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
e
3
Pb-free JEDEC designator for Matte Tin (Sn)
This package is Pb-free. The Pb-free JEDEC designator (
can be found on the outer packaging for this package.
*
)
3
e
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
DS21833C-page 14
Preliminary
© 2006 Microchip Technology Inc.
25AA020A/25LC020A
Package Marking Information (continued)
8-Lead 2X3 DFN
Example:
XXX
YWW
NN
411
627
L7
6-Lead SOT-23
Example:
22L7
XXNN
© 2006 Microchip Technology Inc.
Preliminary
DS21833C-page 15
25AA020A/25LC020A
8-Lead Plastic Dual In-line (P) – 300 mil (PDIP)
E1
D
2
n
1
α
E
A2
A
L
c
A1
β
B1
B
p
eB
Units
INCHES*
NOM
8
MILLIMETERS
Dimension Limits
MIN
MAX
MIN
NOM
8
MAX
n
p
Number of Pins
Pitch
.100
2.54
Top to Seating Plane
A
.140
.155
.130
.170
3.56
2.92
3.94
3.30
4.32
Molded Package Thickness
Base to Seating Plane
Shoulder to Shoulder Width
Molded Package Width
Overall Length
A2
A1
E
.115
.015
.300
.240
.360
.125
.008
.045
.014
.310
5
.145
3.68
0.38
7.62
6.10
9.14
3.18
0.20
1.14
0.36
7.87
5
.313
.250
.373
.130
.012
.058
.018
.370
10
.325
.260
.385
.135
.015
.070
.022
.430
15
7.94
6.35
9.46
3.30
0.29
1.46
0.46
9.40
10
8.26
6.60
9.78
3.43
0.38
1.78
0.56
10.92
15
E1
D
Tip to Seating Plane
Lead Thickness
L
c
Upper Lead Width
B1
B
Lower Lead Width
Overall Row Spacing
Mold Draft Angle Top
Mold Draft Angle Bottom
§
eB
α
β
5
10
15
5
10
15
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side.
JEDEC Equivalent: MS-001
Drawing No. C04-018
DS21833C-page 16
Preliminary
© 2006 Microchip Technology Inc.
25AA020A/25LC020A
8-Lead Plastic Small Outline (SN) – Narrow, 150 mil (SOIC)
E
E1
p
D
2
1
B
n
h
α
45°
c
A2
A
φ
β
L
A1
Units
INCHES*
MILLIMETERS
Dimension Limits
MIN
NOM
8
MAX
MIN
NOM
8
MAX
n
p
Number of Pins
Pitch
.050
1.27
Overall Height
A
.053
.061
.056
.007
.237
.154
.193
.015
.025
4
.069
1.35
1.32
1.55
1.42
0.18
6.02
3.91
4.90
0.38
0.62
4
1.75
Molded Package Thickness
Standoff
A2
A1
E
.052
.004
.228
.146
.189
.010
.019
0
.061
.010
.244
.157
.197
.020
.030
8
1.55
0.25
6.20
3.99
5.00
0.51
0.76
8
§
0.10
5.79
3.71
4.80
0.25
0.48
0
Overall Width
Molded Package Width
Overall Length
E1
D
Chamfer Distance
Foot Length
h
L
φ
Foot Angle
c
Lead Thickness
Lead Width
.008
.013
0
.009
.017
12
.010
.020
15
0.20
0.33
0
0.23
0.42
12
0.25
0.51
15
B
α
β
Mold Draft Angle Top
Mold Draft Angle Bottom
* Controlling Parameter
§ Significant Characteristic
Notes:
0
12
15
0
12
15
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side.
JEDEC Equivalent: MS-012
Drawing No. C04-057
© 2006 Microchip Technology Inc.
Preliminary
DS21833C-page 17
25AA020A/25LC020A
8-Lead Plastic Thin Shrink Small Outline (ST) – 4.4 mm (TSSOP)
E
E1
p
D
2
1
n
B
A
α
c
β
A2
A1
φ
L
Units
INCHES
NOM
MILLIMETERS
*
Dimension Limits
MIN
MAX
MIN
NOM
MAX
n
p
Number of Pins
Pitch
8
8
.026
0.65
1.05
0.90
0.10
6.38
4.40
3.00
0.60
Overall Height
A
A2
A1
E
.039
.041
.035
.004
.251
.173
.118
.024
.043
.037
.006
.256
.177
.122
.028
1.00
1.10
Molded Package Thickness
Standoff
.033
.002
.246
.169
.114
.020
0.85
0.05
6.25
4.30
2.90
0.50
0.95
0.15
6.50
4.50
3.10
0.70
Overall Width
Molded Package Width
Molded Package Length
Foot Length
E1
D
L
φ
Foot Angle
0°
4°
8°
0°
4°
8°
c
Lead Thickness
.004
.007
.006
.010
.008
.012
0.09
0.19
0.15
0.25
0.20
0.30
Lead Width
B
α
Mold Draft Angle Top
Mold Draft Angle Bottom
Controlling Parameter
0°
0°
5°
5°
10°
10°
0°
0°
5°
5°
10°
10°
β
*
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .005" (0.127mm) per side.
JEDEC Equivalent: MO-153
Drawing No. C04-086
Revised 07-21-05
DS21833C-page 18
Preliminary
© 2006 Microchip Technology Inc.
25AA020A/25LC020A
8-Lead Plastic Micro Small Outline Package (MS) (MSOP)
E
E1
p
D
2
1
n
B
α
c
φ
A2
A
L
F
A1
β
Units
INCHES
NOM
MILLIMETERS
*
Dimension Limits
MIN
MAX
MIN
NOM
MAX
n
p
Number of Pins
Pitch
8
8
.026 BSC
0.65 BSC
Overall Height
A
A2
A1
E
-
-
.043
-
-
1.10
0.95
0.15
Molded Package Thickness
Standoff
.030
.033
.037
.006
0.75
0.85
.000
-
0.00
-
Overall Width
.193 BSC
4.90 BSC
Molded Package Width
Overall Length
E1
D
.118 BSC
.118 BSC
3.00 BSC
3.00 BSC
Foot Length
L
.016
.024
.037 REF
.031
0.40
0.60
0.95 REF
0.80
Footprint (Reference)
Foot Angle
F
φ
0°
-
8°
0°
-
-
-
-
-
8°
c
Lead Thickness
Lead Width
.003
.009
.006
.012
.009
.016
0.08
0.22
0.23
0.40
B
α
β
Mold Draft Angle Top
Mold Draft Angle Bottom
5°
5°
-
15°
15°
5°
5°
15°
15°
-
*
Controlling Parameter
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" (0.254mm) per side.
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
See ASME Y14.5M
REF: Reference Dimension, usually without tolerance, for information purposes only.
See ASME Y14.5M
Revised 07-21-05
JEDEC Equivalent: MO-187
Drawing No. C04-111
© 2006 Microchip Technology Inc.
Preliminary
DS21833C-page 19
25AA020A/25LC020A
8-Lead Plastic Dual-Flat, No-Lead Package (MC) 2x3x0.9 mm Body (DFN) – Saw Singulated
D
b
p
n
L
K
E
E2
EXPOSED
METAL
PAD
(NOTE 2)
2
1
PIN 1
ID INDEX
AREA
DETAIL
D2
ALTERNATE
CONTACT
(
NOTE 1)
BOTTOM VIEW
CONFIGURATION
TOP VIEW
EXPOSED
TIE BAR
NOTE 3
A
A1
(
)
A3
Units
Dimension Limits
INCHES
NOM
MILLIMETERS*
MIN
MAX
MIN
NOM
MAX
n
e
Number of Pins
Pitch
8
8
.020 BSC
.035
0.50 BSC
Overall Height
Standoff
A
A1
A3
D
.031
.000
.039
0.80
0.90
0.02
0.20 REF.
1.00
.001
.008 REF.
.002
0.00
0.05
Contact Thickness
Overall Length
Overall Width
.079 BSC
.118 BSC
2.00 BSC
3.00 BSC
E
Exposed Pad Length
Exposed Pad Width
Contact Length §
D2
E2
L
.051
.059
.012
.008
.008
–
–
.069
.075
.020
1.30**
1.50**
0.30
–
–
1.75
1.90
0.50
.016
0.40
Contact-to-Exposed Pad
Contact Width
§
K
–
–
0.20
–
–
b
.010
.012
0.20
0.25
0.30
*
Controlling Parameter
** Not within JEDEC parameters
Significant Characteristic
Notes:
§
1. Pin 1 visual index feature may vary, but must be located within the hatched area.
2. Exposed pad may vary according to die attach paddle size.
3. Package may have one or more exposed tie bars at ends.
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
See ASME Y14.5M
REF: Reference Dimension, usually without tolerance, for information purposes only.
See ASME Y14.5M
JEDEC Equivalent MO-229 VCED-2
Revised 09-12-05
DWG No. C04-123
DS21833C-page 20
Preliminary
© 2006 Microchip Technology Inc.
25AA020A/25LC020A
6-Lead Plastic Small Outline Transistor (CH or OT) (SOT-23)
E
E1
B
p1
D
n
1
α
c
A
φ
A2
A1
β
L
Units
INCHES
*
MILLIMETERS
Dimension Limits
MIN
NOM
MAX
MIN
NOM
6
MAX
n
p
Number of Pins
Pitch
6
.038 BSC
.075 BSC
0.95 BSC
1.90 BSC
1.18
1.10
0.08
2.80
1.63
2.95
0.45
5
p1
Outside lead pitch
Overall Height
A
A2
A1
E
.035
.035
.000
.102
.046
.057
0.90
1.45
Molded Package Thickness
Standoff
.043
.003
.110
.064
.116
.018
.051
.006
.118
.069
.122
.022
10
0.90
0.00
2.60
1.50
2.80
0.35
1.30
0.15
3.00
1.75
3.10
0.55
Overall Width
Molded Package Width
Overall Length
E1
D
.059
.110
.014
Foot Length
L
φ
Foot Angle
0
5
0
10
c
Lead Thickness
Lead Width
.004
.014
.006
.017
.008
.020
10
0.09
0.35
0.15
0.43
5
0.20
0.50
B
α
Mold Draft Angle Top
Mold Draft Angle Bottom
0
0
5
5
0
0
10
10
β
10
5
*
Controlling Parameter
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .005" (0.127mm) per side.
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
See ASME Y14.5M
JEITA (formerly EIAJ) equivalent: SC-74A
Drawing No. C04-120
Revised 09-12-05
© 2006 Microchip Technology Inc.
Preliminary
DS21833C-page 21
25AA020A/25LC020A
APPENDIX A: REVISION HISTORY
Revision B
Corrections to Section 1.0, Electrical Characteristics.
Revision C
Added Packages SOT-23, DFN and X-rotated TSSOP;
Revised AC Char., Params. 9, 10; Revised Package
Legend.
DS21833C-page 22
Preliminary
© 2006 Microchip Technology Inc.
25AA020A/25LC020A
THE MICROCHIP WEB SITE
CUSTOMER SUPPORT
Microchip provides online support via our WWW site at
www.microchip.com. This web site is used as a means
to make files and information easily available to
customers. Accessible by using your favorite Internet
browser, the web site contains the following
information:
Users of Microchip products can receive assistance
through several channels:
• Distributor or Representative
• Local Sales Office
• Field Application Engineer (FAE)
• Technical Support
• Product Support – Data sheets and errata,
application notes and sample programs, design
resources, user’s guides and hardware support
documents, latest software releases and archived
software
• Development Systems Information Line
Customers
should
contact
their
distributor,
representative or field application engineer (FAE) for
support. Local sales offices are also available to help
customers. A listing of sales offices and locations is
included in the back of this document.
• General Technical Support – Frequently Asked
Questions (FAQ), technical support requests,
online discussion groups, Microchip consultant
program member listing
Technical support is available through the web site
at: http://support.microchip.com
• Business of Microchip – Product selector and
ordering guides, latest Microchip press releases,
listing of seminars and events, listings of
Microchip sales offices, distributors and factory
representatives
CUSTOMER CHANGE NOTIFICATION
SERVICE
Microchip’s customer notification service helps keep
customers current on Microchip products. Subscribers
will receive e-mail notification whenever there are
changes, updates, revisions or errata related to a
specified product family or development tool of interest.
To register, access the Microchip web site at
www.microchip.com, click on Customer Change
Notification and follow the registration instructions.
© 2006 Microchip Technology Inc.
Preliminary
DS21833C-page 21
25AA020A/25LC020A
READER RESPONSE
It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip prod-
uct. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation
can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-4150.
Please list the following information, and use this outline to provide us with your comments about this document.
To:
Technical Publications Manager
Reader Response
Total Pages Sent ________
RE:
From:
Name
Company
Address
City / State / ZIP / Country
Telephone: (_______) _________ - _________
FAX: (______) _________ - _________
Application (optional):
Would you like a reply?
Y
N
25AA020A/25LC020A
DS21833C
Literature Number:
Device:
Questions:
1. What are the best features of this document?
2. How does this document meet your hardware and software development needs?
3. Do you find the organization of this document easy to follow? If not, why?
4. What additions to the document do you think would enhance the structure and subject?
5. What deletions from the document could be made without affecting the overall usefulness?
6. Is there any incorrect or misleading information (what and where)?
7. How would you improve this document?
DS21833C-page 22
Preliminary
© 2006 Microchip Technology Inc.
25AA020A/25LC020A
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO.
Device
X
X
/XX
–
Examples:
Temperature
Tape & Reel
Package
a)
25AA020A-I/MS = 2k-bit, 16-byte page, 1.8V
Serial EEPROM, Industrial temp., MSOP
package
b)
25AA020AT-I/SN = 2k-bit, 16-byte page, 1.8V
Serial EEPROM, Industrial temp., Tape & Reel,
SOIC package
Device:
25AA020A 2k-Bit, 1.8V, 16 Byte Page, SPI Serial EEPROM
25LC020A 2k-Bit, 2.5V, 16 Byte Page, SPI Serial EEPROM
c)
d)
e)
25LC020AT-I/SN = 2k-bit, 16-byte page, 2.5V
Serial EEPROM, Industrial temp., Tape & Reel,
SOIC package
Tape & Reel:
Blank
T
=
=
Standard packaging
Tape & Reel
25LC020AT-I/ST = 2k-bit, 16-byte page, 2.5V
Serial EEPROM, Industrial temp., Tape & Reel,
TSSOP package
Temperature
Range:
I
E
=
=
-40°C to+85°C
-40°C to+125°C
25LC020AT-E/SN = 2k-bit, 16-byte page, 2.5V
serial EEPROM, Extended temp., Tape & Reel,
SOIC Package
Package:
MS
P
SN
ST
MC
OT
=
=
=
=
=
=
Plastic MSOP (Micro Small Outline), 8-lead
Plastic DIP (300 mil body), 8-lead
Plastic SOIC (150 mil body), 8-lead
TSSOP, 8-lead
2x3 DFN, 8-lead
SOT-23, 6-lead (Tape and Reel only)
Sales and Support
Data Sheets
Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and
recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following:
1. Your local Microchip sales office
2. The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277
3. The Microchip Worldwide Site (www.microchip.com)
Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using.
New Customer Notification System
Register on our web site (www.microchip.com/cn) to receive the most current information on our products.
© 2006 Microchip Technology Inc.
Preliminary
DS21833C-page 23
25AA020A/25LC020A
NOTES:
DS21833C-page 24
Preliminary
© 2006 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR WAR-
RANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED,
WRITTEN OR ORAL, STATUTORY OR OTHERWISE,
RELATED TO THE INFORMATION, INCLUDING BUT NOT
LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE,
MERCHANTABILITY OR FITNESS FOR PURPOSE.
Microchip disclaims all liability arising from this information and
its use. Use of Microchip devices in life support and/or safety
applications is entirely at the buyer’s risk, and the buyer agrees
to defend, indemnify and hold harmless Microchip from any and
all damages, claims, suits, or expenses resulting from such
use. No licenses are conveyed, implicitly or otherwise, under
any Microchip intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, Accuron,
dsPIC, KEELOQ, microID, MPLAB, PIC, PICmicro, PICSTART,
PRO MATE, PowerSmart, rfPIC, and SmartShunt are
registered trademarks of Microchip Technology Incorporated
in the U.S.A. and other countries.
AmpLab, FilterLab, Migratable Memory, MXDEV, MXLAB,
SEEVAL, SmartSensor and The Embedded Control Solutions
Company are registered trademarks of Microchip Technology
Incorporated in the U.S.A.
Analog-for-the-Digital Age, Application Maestro, dsPICDEM,
dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR,
FanSense, FlexROM, fuzzyLAB, In-Circuit Serial
Programming, ICSP, ICEPIC, Linear Active Thermistor,
MPASM, MPLIB, MPLINK, MPSIM, PICkit, PICDEM,
PICDEM.net, PICLAB, PICtail, PowerCal, PowerInfo,
PowerMate, PowerTool, Real ICE, rfLAB, rfPICDEM, Select
Mode, Smart Serial, SmartTel, Total Endurance, UNI/O,
WiperLock and Zena are trademarks of Microchip Technology
Incorporated in the U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2006, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
Microchip received ISO/TS-16949:2002 quality system certification for
its worldwide headquarters, design and wafer fabrication facilities in
Chandler and Tempe, Arizona and Mountain View, California in
October 2003. The Company’s quality system processes and
procedures are for its PICmicro® 8-bit MCUs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
© 2006 Microchip Technology Inc.
Preliminary
DS21833C-page 25
WORLDWIDE SALES AND SERVICE
AMERICAS
ASIA/PACIFIC
ASIA/PACIFIC
EUROPE
Corporate Office
Australia - Sydney
Tel: 61-2-9868-6733
Fax: 61-2-9868-6755
India - Bangalore
Tel: 91-80-2229-0061
Fax: 91-80-2229-0062
Austria - Wels
Tel: 43-7242-2244-399
Fax: 43-7242-2244-393
2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7200
Fax: 480-792-7277
Technical Support:
http://support.microchip.com
Web Address:
www.microchip.com
China - Beijing
Tel: 86-10-8528-2100
Fax: 86-10-8528-2104
Denmark - Copenhagen
Tel: 45-4450-2828
Fax: 45-4485-2829
India - New Delhi
Tel: 91-11-5160-8631
Fax: 91-11-5160-8632
China - Chengdu
Tel: 86-28-8676-6200
Fax: 86-28-8676-6599
France - Paris
Tel: 33-1-69-53-63-20
Fax: 33-1-69-30-90-79
India - Pune
Tel: 91-20-2566-1512
Fax: 91-20-2566-1513
Atlanta
China - Fuzhou
Tel: 86-591-8750-3506
Fax: 86-591-8750-3521
Germany - Munich
Tel: 49-89-627-144-0
Fax: 49-89-627-144-44
Japan - Yokohama
Tel: 81-45-471- 6166
Fax: 81-45-471-6122
Alpharetta, GA
Tel: 770-640-0034
Fax: 770-640-0307
Italy - Milan
Tel: 39-0331-742611
Fax: 39-0331-466781
China - Hong Kong SAR
Tel: 852-2401-1200
Fax: 852-2401-3431
Korea - Gumi
Tel: 82-54-473-4301
Fax: 82-54-473-4302
Boston
Westborough, MA
Tel: 774-760-0087
Fax: 774-760-0088
Netherlands - Drunen
Tel: 31-416-690399
Fax: 31-416-690340
China - Qingdao
Tel: 86-532-8502-7355
Fax: 86-532-8502-7205
Korea - Seoul
Tel: 82-2-554-7200
Fax: 82-2-558-5932 or
82-2-558-5934
Chicago
Itasca, IL
Tel: 630-285-0071
Fax: 630-285-0075
Spain - Madrid
Tel: 34-91-708-08-90
Fax: 34-91-708-08-91
China - Shanghai
Tel: 86-21-5407-5533
Fax: 86-21-5407-5066
Malaysia - Penang
Tel: 60-4-646-8870
Fax: 60-4-646-5086
Dallas
Addison, TX
Tel: 972-818-7423
Fax: 972-818-2924
UK - Wokingham
Tel: 44-118-921-5869
Fax: 44-118-921-5820
China - Shenyang
Tel: 86-24-2334-2829
Fax: 86-24-2334-2393
Philippines - Manila
Tel: 63-2-634-9065
Fax: 63-2-634-9069
Detroit
China - Shenzhen
Farmington Hills, MI
Tel: 248-538-2250
Fax: 248-538-2260
Tel: 86-755-8203-2660
Fax: 86-755-8203-1760
Singapore
Tel: 65-6334-8870
Fax: 65-6334-8850
China - Shunde
Tel: 86-757-2839-5507
Fax: 86-757-2839-5571
Kokomo
Kokomo, IN
Tel: 765-864-8360
Fax: 765-864-8387
Taiwan - Hsin Chu
Tel: 886-3-572-9526
Fax: 886-3-572-6459
China - Wuhan
Tel: 86-27-5980-5300
Fax: 86-27-5980-5118
Taiwan - Kaohsiung
Tel: 886-7-536-4818
Fax: 886-7-536-4803
Los Angeles
Mission Viejo, CA
Tel: 949-462-9523
Fax: 949-462-9608
China - Xian
Tel: 86-29-8833-7250
Fax: 86-29-8833-7256
Taiwan - Taipei
Tel: 886-2-2500-6610
Fax: 886-2-2508-0102
San Jose
Mountain View, CA
Tel: 650-215-1444
Fax: 650-961-0286
Thailand - Bangkok
Tel: 66-2-694-1351
Fax: 66-2-694-1350
Toronto
Mississauga, Ontario,
Canada
Tel: 905-673-0699
Fax: 905-673-6509
10/31/05
DS21833C-page 26
Preliminary
© 2006 Microchip Technology Inc.
相关型号:
©2020 ICPDF网 联系我们和版权申明