27C256-90IP [MICROCHIP]

256K (32K x 8) CMOS EPROM; 256K ( 32K ×8 ) CMOS EPROM
27C256-90IP
型号: 27C256-90IP
厂家: MICROCHIP    MICROCHIP
描述:

256K (32K x 8) CMOS EPROM
256K ( 32K ×8 ) CMOS EPROM

可编程只读存储器 电动程控只读存储器
文件: 总12页 (文件大小:70K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
27C256  
256K (32K x 8) CMOS EPROM  
FEATURES  
PACKAGE TYPES  
TSOP  
• High speed performance  
OE  
A11  
A9  
1
2
3
4
5
6
7
28  
27  
26  
25  
24  
23  
22  
A10  
CE  
D7  
D6  
D5  
D4  
D3  
- 90 ns access time available  
• CMOS Technology for low power consumption  
- 20 mA Active current  
A8  
A13  
A14  
VCC  
- 100 µA Standby current  
• Factory programming available  
• Auto-insertion-compatible plastic packages  
• Auto ID aids automated programming  
• Separate chip enable and output enable controls  
• High speed “express” programming algorithm  
• Organized 32K x 8: JEDEC standard pinouts  
- 28-pin Dual-in-line package  
VPP  
A12  
8
9
21  
20  
19  
18  
17  
16  
15  
VSS  
D2  
D1  
D0  
A0  
A1  
A2  
A7 10  
A6 11  
A5 12  
A4 13  
A3 14  
PLCC  
- 32-pin PLCC Package  
5
29  
28  
27  
26  
25  
24  
23  
22  
21  
A6  
A5  
A4  
A3  
A2  
A1  
A0  
NC  
O0  
A8  
A9  
6
- 28-pin SOIC package  
7
A11  
NC  
OE  
A10  
CE  
O7  
O6  
- 28-pin Thin Small Outline Package (TSOP)  
- 28-pin Very Small Outline Package (VSOP)  
- Tape and reel  
8
9
10  
11  
12  
13  
• Data Retention > 200 years  
• Available for the following temperature ranges:  
- Commercial:  
- Industrial:  
0˚C to +70˚C  
DIP/SOIC  
-40˚C to +85˚C  
-40˚C to +125˚C  
- Automotive:  
VPP  
1
28  
27  
26  
25  
24  
23  
22  
21  
20  
19  
18  
17  
16  
15  
VCC  
A14  
A13  
A8  
A12  
A7  
A6  
A5  
A4  
A3  
A2  
A1  
A0  
O0  
O1  
O2  
VSS  
2
DESCRIPTION  
3
4
5
A9  
The Microchip Technology Inc. 27C256 is a CMOS  
256K bit electrically Programmable Read Only Memory  
(EPROM). The device is organized as 32K words by 8  
bits (32K bytes). Accessing individual bytes from an  
address transition or from power-up (chip enable pin  
going low) is accomplished in less than 90 ns. This very  
high speed device allows the most sophisticated micro-  
processors to run at full speed without the need for  
WAIT states. CMOS design and processing enables  
this part to be used in systems where reduced power  
consumption and reliability are requirements.  
6
A11  
OE  
A10  
CE  
O7  
7
8
9
10  
11  
12  
13  
14  
O6  
O5  
O4  
O3  
VSOP  
OE  
A11  
A9  
A8  
A13  
A14  
22  
23  
24  
25  
26  
27  
A10  
21  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
10  
9
CE  
O7  
O6  
O5  
O4  
O3  
VSS  
O2  
O1  
O0  
A0  
A1  
A2  
A complete family of packages is offered to provide the  
most flexibility in applications. For surface mount appli-  
cations, PLCC, SOIC, VSOP or TSOP packaging is  
available. Tape and reel packaging is also available for  
PLCC or SOIC packages.  
28  
1
VCC  
VPP  
2
3
4
5
6
7
A12  
A7  
A6  
A5  
A4  
A3  
8
1996 Microchip Technology Inc.  
DS11001L-page 1  
This document was created with FrameMaker 4 0 4  
27C256  
TABLE 1-1:  
Name  
PIN FUNCTION TABLE  
Function  
1.0  
ELECTRICAL CHARACTERISTICS  
1.1  
Maximum Ratings*  
VCC and input voltages w.r.t. VSS........-0.6V to +7.25V  
A0-A14  
CE  
Address Inputs  
Chip Enable  
VPP voltage w.r.t. VSS during  
programming .......................................-0.6V to +14.0V  
OE  
Output Enable  
Programming Voltage  
Data Output  
Voltage on A9 w.r.t. VSS ......................-0.6V to +13.5V  
Output voltage w.r.t. VSS ............... -0.6V to VCC +1.0V  
Storage temperature .......................... -65˚C to +150˚C  
Ambient temp. with power applied ..... -65˚C to +125˚C  
VPP  
O0 - O7  
VCC  
+5V Power Supply  
Ground  
*Notice: Stresses above those listed under “Maximum Ratings”  
may cause permanent damage to the device. This is a stress rat-  
ing only and functional operation of the device at those or any  
other conditions above those indicated in the operation listings of  
this specification is not implied. Exposure to maximum rating con-  
ditions for extended periods may affect device reliability.  
VSS  
NC  
No Connection; No Internal Connec-  
tion  
NU  
Not Used; No External Connection Is  
Allowed  
TABLE 1-2:  
READ OPERATION DC CHARACTERISTICS  
VCC = +5V (±10%)  
Commercial:  
Industrial:  
Tamb = 0˚C to +70˚C  
Tamb = -40˚C to +85˚C  
Tamb = -40°C to +125°C  
Extended (Automotive):  
Parameter  
Part*  
Status  
Symbol  
Min.  
Max. Units  
Conditions  
Input Voltages  
all  
Logic "1"  
Logic "0"  
VIH  
VIL  
2.0  
-0.5  
VCC+1  
0.8  
V
V
Input Leakage  
all  
all  
ILI  
-10  
2.4  
10  
µA VIN = 0 to VCC  
Output Voltages  
Logic "1"  
Logic "0"  
VOH  
VOL  
V
V
IOH = -400 µA  
IOL = 2.1 mA  
0.45  
10  
6
Output Leakage  
all  
all  
ILO  
-10  
µA VOUT = 0V to VCC  
Input Capacitance  
CIN  
pF VIN = 0V; Tamb = 25°C;  
f = 1 MHz  
Output Capacitance  
all  
COUT  
12  
pF VOUT = 0V; Tamb = 25°C;  
f = 1 MHz  
Power Supply Current,  
Active  
C
I,E  
TTL input  
TTL input  
ICC1  
ICC2  
20  
25  
mA VCC = 5.5V; VPP = VCC  
mA f = 1 MHz;  
OE = CE = VIL;  
IOUT = 0 mA;  
VIL = -0.1 to 0.8V;  
VIH = 2.0 to VCC;  
Note 1  
Power Supply Current,  
Standby  
C
I, E  
all  
TTL input  
TTL input  
CMOS input  
ICC(S)  
2
3
100  
mA  
mA  
µA CE = VCC ± 0.2V  
IPP Read Current  
VPP Read Voltage  
all  
all  
Read Mode  
Read Mode  
IPP  
VPP  
100  
µA VPP = 5.5V  
V
VCC-0.7 VCC  
* Parts: C=Commercial Temperature Range; I, E=Industrial and Extended Temperature Ranges  
Note 1: Typical active current increases .75 mA per MHz up to operating frequency for all temperature ranges.  
DS11001L-page 2  
1996 Microchip Technology Inc.  
27C256  
TABLE 1-3:  
READ OPERATION AC CHARACTERISTICS  
AC Testing Waveform:  
Output Load:  
VIH = 2.4V and VIL = 0.45V; VOH = 2.0V VOL = 0.8V  
1 TTL Load + 100 pF  
Input Rise and Fall Times: 10 ns  
Ambient Temperature: Commercial:  
Tamb = 0˚C to +70˚C  
Industrial:  
Tamb = -40˚C to +85˚C  
Automotive:  
Tamb = -40°C to +125°C  
27C256-90* 27C256-10* 27C256-12 27C256-15 27C256-20  
Min Max Min Max Min Max Min Max Min Max  
Parameter  
Sym  
Units Conditions  
Address to Output  
Delay  
tACC  
90  
100  
120  
150  
200  
ns CE=OE =VIL  
CE to Output Delay  
OE to Output Delay  
tCE  
0
90  
40  
30  
0
100  
45  
0
120  
55  
0
150  
65  
0
200  
75  
ns  
ns  
ns  
OE = VIL  
CE = VIL  
tOE  
tOFF  
CE or OE to O/P  
High Impedance  
30  
35  
50  
55  
Output Hold from  
tOH  
0
0
0
0
0
ns  
Address CE or OE,  
whichever goes first  
* -10, -90 AC Testing Waveform: VIH = 2.4V and VIL = .45V; VOH = 1.5V and VOL = 1.5V  
Output Load: 1 TTL Load + 30pF  
FIGURE 1-1: READ WAVEFORMS  
VIH  
Address Valid  
Address  
CE  
VIL  
VIH  
VIL  
tCE(2)  
VIH  
VIL  
OE  
tOFF(1,3)  
tOH  
tOE(2)  
VOH  
VOL  
Outputs  
O0 - O7  
High Z  
High Z  
Valid Output  
tACC  
Notes: (1) tOFF is specified for OE or CE, whichever occurs first  
(2) OE may be delayed up to tCE - tOE after the falling edge of CE without impact on tCE  
(3) This parameter is sampled and is not 100% tested.  
1996 Microchip Technology Inc.  
DS11001L-page 3  
27C256  
TABLE 1-4:  
PROGRAMMING DC CHARACTERISTICS  
Ambient Temperature: Tamb = 25°C ± 5°C  
VCC = 6.5V ± 0.25V, VPP = VH = 13.0V ± 0.25V  
Parameter  
Status  
Symbol  
Min  
Max.  
Units  
Conditions  
Input Voltages  
Logic”1”  
Logic”0”  
VIH  
VIL  
2.0  
-0.1  
VCC+1  
0.8  
V
V
Input Leakage  
ILI  
-10  
2.4  
10  
µA  
VIN = 0V to VCC  
Output Voltages  
Logic”1”  
Logic”0”  
VOH  
VOL  
V
V
IOH = -400 µA  
IOL = 2.1 mA  
0.45  
20  
VCC Current, program & verify  
VPP Current, program  
ICC2  
IPP2  
VH  
mA  
mA  
V
Note 1  
Note 1  
25  
A9 Product Identification  
11.5  
12.5  
Note 1: VCC must be applied simultaneously or before VPP and removed simultaneously or after VPP  
TABLE 1-5:  
PROGRAMMING AC CHARACTERISTICS  
for Program, Program Verify  
and Program Inhibit Modes  
AC Testing Waveform: VIH=2.4V and VIL=0.45V; VOH=2.0V; VOL=0.8V  
Output Load: 1 TTL Load + 100pF  
Ambient Temperature: Tamb=25°C ± 5°C  
VCC= 6.5V ± 0.25V, VPP = VH = 13.0V ± 0.25V  
Parameter  
Symbol  
Min. Max. Units  
Remarks  
Address Set-Up Time  
Data Set-Up Time  
Data Hold Time  
tAS  
tDS  
2
2
µs  
µs  
µs  
µs  
ns  
µs  
µs  
µs  
µs  
µs  
ns  
tDH  
2
Address Hold Time  
Float Delay (2)  
tAH  
0
tDF  
0
130  
VCC Set-Up Time  
Program Pulse Width (1)  
CE Set-Up Time  
tVCS  
tPW  
tCES  
tOES  
tVPS  
tOE  
2
95  
2
105  
100 µs typical  
OE Set-Up Time  
2
VPP Set-Up Time  
Data Valid from OE  
2
100  
Note 1: For express algorithm, initial programming width tolerance is 100 µs ±5%.  
2: This parameter is only sampled and not 100% tested. Output float is defined as the point where data is no  
longer driven (see timing diagram).  
DS11001L-page 4  
1996 Microchip Technology Inc.  
27C256  
FIGURE 1-2: PROGRAMMING WAVEFORMS  
Program  
Verify  
VIH  
Address  
Data  
Address Stable  
VIL  
VIH  
VIL  
tAS  
t DS  
tAH  
High Z  
Data Stable  
tDH  
Data Out Valid  
tDF  
(1)  
13.0V(2)  
5.0V  
6.5V(2)  
5.0V  
VIH  
VPP  
VCC  
CE  
tVPS  
tVCS  
VIL  
tOES  
tPW  
tOE  
(1)  
VIH  
OE  
VIL  
Notes:  
(1) tDF and tOE are characteristics of the device but must be accommodated by the programmer  
(2) VCC = 6.5 V ±0.25V, VPP = VH = 13.0V ±0.25V for express algorithm  
TABLE 1-6:  
MODES  
Operation Mode  
CE  
OE  
VPP  
A9  
O0 - O7  
Read  
VIL  
VIL  
VIH  
VIH  
VIH  
VIL  
VIL  
VIL  
VIH  
VIL  
VIH  
X
VCC  
VH  
X
X
DOUT  
DIN  
Program  
Program Verify  
Program Inhibit  
Standby  
VH  
X
DOUT  
VH  
X
High Z  
VCC  
VCC  
VCC  
X
High Z  
Output Disable  
Identity  
VIH  
VIL  
X
High Z  
VH  
Identity Code  
X = Don’t Care  
1.2  
Read Mode  
For Read operations, if the addresses are stable, the  
address access time (tACC) is equal to the delay from  
CE to output (tCE). Data is transferred to the output  
after a delay from the falling edge of OE (tOE).  
(See Timing Diagrams and AC Characteristics)  
Read Mode is accessed when:  
a) the CE pin is low to power up (enable) the chip  
b) the OE pin is low to gate the data to the output  
pins  
1996 Microchip Technology Inc.  
DS11001L-page 5  
27C256  
1.3  
Standby Mode  
1.7  
Verify  
The standby mode is defined when the CE pin is high  
(VIH) and a program mode is not defined.  
After the array has been programmed it must be veri-  
fied to ensure all the bits have been correctly pro-  
grammed. This mode is entered when all the following  
conditions are met:  
When these conditions are met, the supply current will  
drop from 20 mA to 100 µA.  
a) VCC is at the proper level,  
b) VPP is at the proper VH level,  
c) the CE line is high, and  
d) the OE line is low.  
1.4  
Output Enable  
This feature eliminates bus contention in multiple bus  
microprocessor systems and the outputs go to a high  
impedance when the following condition is true:  
1.8  
Inhibit  
• The OE pin is high and the program mode is not  
defined.  
When programming multiple devices in parallel with dif-  
ferent data, only CE need be under separate control to  
each device. By pulsing the CE line low on a particular  
device, that device will be programmed; all other  
devices with CE held high will not be programmed with  
the data, although address and data will be available on  
their input pins.  
1.5  
Erase Mode (U.V. Windowed Versions)  
Windowed products offer the ability to erase the mem-  
ory array. The memory matrix is erased to the all 1’s  
state when exposed to ultraviolet light. To ensure com-  
2
plete erasure, a dose of 15 watt-second/cm is  
required. This means that the device window must be  
placed within one inch and directly underneath an ultra-  
violet lamp with a wavelength of 2537 Angstroms,  
intensity of 12,000µW/cm for approximately 20 min-  
utes.  
1.9  
Identity Mode  
In this mode specific data is output which identifies the  
manufacturer as Microchip Technology Inc. and device  
type. This mode is entered when Pin A9 is taken to VH  
(11.5V to 12.5V). The CE and OE lines must be at VIL.  
A0 is used to access any of the two non-erasable bytes  
whose data appears on O0 through O7.  
2
1.6  
Programming Mode  
The Express Algorithm has been developed to improve  
on the programming throughput times in a production  
environment. Up to ten 100-microsecond pulses are  
applied until the byte is verified. No overprogramming  
is required. A flowchart of the express algorithm is  
shown in Figure 1-3.  
Pin  
Identity  
Input  
A0  
Output  
H
e
x
0 O O O O O O O  
7
6
5
4
3
2
1
0
Programming takes place when:  
a) VCC is brought to the proper voltage,  
b) VPP is brought to the proper VH level,  
c) the OE pin is high, and  
Manufacturer  
Device Type*  
VIL  
VIH  
0
1
0
0
1
0
0
0
1
1
0
1
0
0
1
0
29  
8C  
* Code subject to change  
d) the CE pin is low.  
Since the erased state is “1” in the array, programming  
of “0” is required. The address to be programmed is set  
via pins A0-A14 and the data to be programmed is pre-  
sented to pins O0-O7. When data and address are sta-  
ble, a low going pulse on the CE line programs that  
location.  
DS11001L-page 6  
1996 Microchip Technology Inc.  
27C256  
FIGURE 1-3: PROGRAMMING EXPRESS ALGORITHM  
Conditions:  
Start  
Tamb = 25˚C ±5˚C  
VCC = 6.5 ±0.25V  
VPP = 13.0 ±0.25V  
ADDR = First Location  
VCC = 6.5V  
VPP = 13.0V  
X = 0  
Program one 100 µs pulse  
Increment X  
Verify  
Byte  
Pass  
Fail  
No  
Yes  
Device  
Failed  
X = 10 ?  
Last  
Address?  
Yes  
No  
Increment Address  
VCC = VPP = 4.5V, 5.5V  
All  
Yes  
No  
bytes  
= original  
data?  
Device  
Passed  
Device  
Failed  
1996 Microchip Technology Inc.  
DS11001L-page 7  
27C256  
NOTES:  
DS11001L-page 8  
1996 Microchip Technology Inc.  
27C256  
NOTES:  
1996 Microchip Technology Inc.  
DS11001L-page 9  
27C256  
NOTES:  
DS11001L-page 10  
1996 Microchip Technology Inc.  
27C256  
27C256 Product Identification System  
To order or to obtain information (e.g., on pricing or delivery), please use listed part numbers, and refer to factory or listed sales offices.  
27C256 – 90  
I
/TS  
Package:  
L
P
SO  
TS  
VS  
=
=
=
=
=
Plastic Leaded Chip Carrier  
Plastic DIP (Mil 600)  
Plastic SOIC (Mil 300)  
Thin Small Outline Package (TSOP) 8x20mm  
Very Small Outline Package (VSOP) 8x13.4mm  
Temperature  
Range:  
Blank  
=
=
=
0˚C to +70˚C  
-40˚C to +85˚C  
-40˚C to +125˚C  
I
E
Access  
Time:  
90  
10  
12  
15  
20  
=
=
=
=
=
90 ns  
100 ns  
120 ns  
150 ns  
200 ns  
Device  
27C256  
256K (32K x 8) CMOS EPROM  
1996 Microchip Technology Inc.  
DS11001L-page 11  
WORLDWIDE SALES & SERVICE  
AMERICAS  
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9/3/96  
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Tel: 714 263-1888 Fax: 714 263-1338  
NewYork  
Microchip Technmgy Inc.  
150 Motor Parkway, Suite 416  
Hauppauge, NY 11788  
Tel: 516 273-5305 Fax: 516 273-5335  
San Jose  
Microchip Technology Inc.  
2107 North First Street, Suite 590  
San Jose, CA 95131  
Tel: 408 436-7950 Fax: 408 436-7955  
Toronto  
Microchip Technology Inc.  
5925 Airport Road, Suite 200  
Mississauga, Ontario L4V 1W1, Canada  
Tel: 905 405-6279 Fax: 905 405-6253  
All rights reserved. 1996, Microchip Technology Incorporated, USA. 9/96  
Printed on recycled paper.  
Information contained in this publication regarding device applications and the like is intended through suggestion only and may be superseded by updates. No repre-  
sentation or warranty is given and no liability is assumed by Microchip Technology Incorporated with respect to the accuracy or use of such information, or infringement  
of patents or other intellectual property rights arising from such use or otherwise. Use of Microchip’s products as critical components in life support systems is not autho-  
rized except with express written approval by Microchip. No licenses are conveyed, implicitly or otherwise, under any intellectual property rights. The Microchip logo and  
name are registered trademarks of Microchip Technology Inc. All rights reserved. All other trademarks mentioned herein are the property of their respective companies.  
DS11001L-page 12  
1996 Microchip Technology Inc.  

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