93AA56CT-I/STG [MICROCHIP]
128 X 16 MICROWIRE BUS SERIAL EEPROM, PDSO8, 4.40 MM, ROHS COMPLIANT, PLASTIC, TSSOP-8;型号: | 93AA56CT-I/STG |
厂家: | MICROCHIP |
描述: | 128 X 16 MICROWIRE BUS SERIAL EEPROM, PDSO8, 4.40 MM, ROHS COMPLIANT, PLASTIC, TSSOP-8 可编程只读存储器 电动程控只读存储器 电可擦编程只读存储器 时钟 光电二极管 内存集成电路 |
文件: | 总24页 (文件大小:486K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
93AA56A/B/C, 93LC56A/B/C,
93C56A/B/C
2K Microwire®-Compatible Serial EEPROM
Device Selection Table
Part Number
VCC Range
ORG Pin
Word Size
Temp Ranges
Packages
93AA56A
93AA56B
93LC56A
93LC56B
93C56A
1.8-5.5
1.8-5-5
2.5-5.5
2.5-5.5
4.5-5.5
4.5-5.5
1.8-5.5
2.5-5.5
4.5-5.5
No
No
8-bit
16-bit
I
P, SN, ST, MS, OT
P, SN, ST, MS, OT
P, SN, ST, MS, OT
P, SN, ST, MS, OT
P, SN, ST, MS, OT
P, SN, ST, MS, OT
P, SN, ST, MS
I
No
8-bit
I, E
I, E
I, E
I, E
I
No
16-bit
No
8-bit
93C56B
No
16-bit
93AA56C
93LC56C
93C56C
Yes
Yes
Yes
8 or 16-bit
8 or 16-bit
8 or 16-bit
I, E
I, E
P, SN, ST, MS
P, SN, ST, MS
Features
Description
• Low power CMOS technology
The Microchip Technology Inc. 93XX56A/B/C devices
are 2K bit low voltage serial Electrically Erasable
PROMs (EEPROM). Word-selectable devices such as
the 93AA56C, 93LC56C or 93C56C are dependent
upon external logic levels driving the ORG pin to set
word size. For dedicated 8-bit communication, the
93AA56A, 93LC56A or 93C56A devices are available,
while the 93AA56B, 93LC56B and 93C56B devices
provide dedicated 16-bit communication. Advanced
CMOS technology makes these devices ideal for low
power, non-volatile memory applications. The entire
93XX Series is available in standard packages includ-
ing 8-lead PDIP and SOIC, and advanced packaging
including 8-lead MSOP, 6-lead SOT-23, and 8-lead
TSSOP. Pb-free (Pure Matte Sn) finish is also
available.
• ORG pin to select word size for ‘56C version
• 256 x 8-bit organization ‘A’ ver. devices (no ORG)
• 128 x 16-bit organization ‘B’ ver. devices (no
ORG)
• Self-timed ERASE/WRITE cycles (including
auto-erase)
• Automatic ERAL before WRAL
• Power on/off data protection circuitry
• Industry standard 3-wire serial I/O
• Device status signal (READY/BUSY)
• Sequential READ function
• 1,000,000 E/W cycles
• Data retention > 200 years
• Temperature ranges supported:
Package Types (not to scale)
- Industrial (I)
-40°C to +85°C
-40°C to +125°C
ROTATED SOIC
(ex: 93LC56BX)
PDIP/SOIC
(P, SN)
- Automotive (E)
NC
Pin Function Table
1
2
3
4
8
7
6
5
ORG*
CS
CLK
DI
VCC
1
2
3
4
8
7
6
5
VCC
VSS
NC
CS
DO
DI
Name
Function
ORG*
CLK
DO
VSS
CS
CLK
DI
Chip Select
Serial Data Clock
Serial Data Input
Serial Data Output
Ground
TSSOP/MSOP
(ST, MS)
SOT-23
(OT)
1
2
3
4
8
7
6
5
DO
VSS
CS
CLK
DI
V
CC
1
2
3
6
5
4
DO
V
CC
NC
ORG*
VSS
CS
DO
VSS
NC
No internal connection
Memory Configuration
Power Supply
DI
CLK
* ORG pin is NC on A/B devices
Microwire is a registered trademark of National Semiconductor.
ORG
VCC
2003 Microchip Technology Inc.
DS21794A-page 1
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C
1.0
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings†
VCC.............................................................................................................................................................................7.0V
All inputs and outputs w.r.t. VSS ......................................................................................................... -0.6V to VCC +1.0V
Storage temperature ...............................................................................................................................-65°C to +150°C
Ambient temperature with power applied................................................................................................-40°C to +125°C
ESD protection on all pins ......................................................................................................................................................≥ 4 kV
†NOTICE: Stresses above those listed under “Maximum ratings” may cause permanent damage to the device. This
is a stress rating only and functional operation of the device at those or any other conditions above those indicated in
the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods
may affect device reliability.
DC CHARACTERISTICS
VCC = range by device (see Table on Page 1)
Industrial (I): TAMB = -40°C to +85°C
Automotive (E): TAMB = -40°C to +125°C
All parameters apply over the specified
ranges unless otherwise noted.
Param.
Symbol
Parameter
Min
Typ
Max
Units
Conditions
VCC ≥ 2.7V
VCC < 2.7V
No.
D1
VIH1
VIH2
High level input voltage
Low level input voltage
Low level output voltage
High level output voltage
2.0
0.7 VCC
—
—
VCC +1
VCC +1
V
V
D2
D3
D4
VIL1
VIL2
-0.3
-0.3
—
—
0.8
0.2 VCC
V
V
VCC ≥ 2.7V
VCC < 2.7V
Vol1
Vol2
—
—
—
—
0.4
0.2
V
V
IOL = 2.1 mA, VCC = 4.5V
IOL = 100 µA, VCC = 2.5V
VOH1
VOH2
2.4
VCC - 0.2
—
—
—
—
V
V
IOH = -400 µA, VCC = 4.5V
IOH = -100 µA, VCC = 2.5V
D5
D6
D7
ILI
Input leakage current
Output leakage current
—
—
—
—
—
—
10
10
7
µA
µA
pF
VIN = VSS to VCC
ILO
VOUT = VSS to VCC
CIN,
Pin capacitance (all inputs/
outputs)
VIN/VOUT = 0V (Note 1)
COUT
TAMB = 25°C, FCLK = 1 MHz
D8
D9
ICC write Write current
—
—
—
500
2
—
mA
µA
FCLK = 3 MHz, Vcc = 5.5V
FCLK = 2 MHz, Vcc = 2.5V
ICC read Read current
—
—
—
—
—
1
mA
µA
µA
FCLK = 3 MHz, VCC = 5.5V
FCLK = 2 MHz, VCC = 3.0V
FCLK = 2 MHz, VCC = 2.5V
500
—
100
D10
D11
ICCS
Standby current
—
—
—
—
1
5
µA
µA
I – Temp
E – Temp
CLK = Cs = 0V
ORG = DI = VSS or VCC
(Note 2) (Note 3)
VPOR
VCC voltage detect
93AA56A/B/C, 93LC56A/B/C
93C56A/B/C
—
—
1.5V
3.8V
—
—
V
V
(Note 1)
Note 1: This parameter is periodically sampled and not 100% tested.
2: ORG pin not available on ‘A’ or ‘B’ versions.
3: READY/BUSY status must be cleared from DO, see Section 3.4.
DS21794A-page 2
2003 Microchip Technology Inc.
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C
AC CHARACTERISTICS
VCC = range by device (see Table on Page 1)
Industrial (I): TAMB = -40°C to +85°C
Automotive (E): TAMB = -40°C to +125°C
All parameters apply over the specified
ranges unless otherwise noted.
Param.
No.
Symbol
Parameter
Clock frequency
Min
Max
Units
Conditions
A1
FCLK
—
3
2
1
MHz 4.5V ≤ VCC < 5.5V, 93XX56C only
MHz 2.5V ≤ VCC < 5.5V
MHz 1.8V ≤ VCC < 2.5V
A2
A3
A4
TCKH
TCKL
TCSS
Clock high time
200
250
450
—
—
—
ns
ns
ns
4.5V ≤ VCC < 5.5V, 93XX56C only
2.5V ≤ VCC < 5.5V
1.8V ≤ VCC < 2.5V
Clock low time
100
200
450
ns
ns
ns
4.5V ≤ VCC < 5.5V, 93XX56C only
2.5V ≤ VCC < 5.5V
1.8V ≤ VCC < 2.5V
Chip select setup time
50
ns
ns
ns
4.5V ≤ VCC < 5.5V
2.5V ≤ VCC < 4.5V
1.8V ≤ VCC < 2.5V
100
250
A5
A6
A7
TCSH
TCSL
TDIS
Chip select hold time
Chip select low time
Data input setup time
0
—
—
—
ns
ns
1.8V ≤ VCC < 5.5V
1.8V ≤ VCC < 5.5V
250
50
ns
ns
ns
4.5V ≤ VCC < 5.5V, 93XX56C only
2.5V ≤ VCC < 5.5V
1.8V ≤ VCC < 2.5V
100
250
A8
A9
TDIH
Data input hold time
50
—
ns
ns
ns
4.5V ≤ VCC < 5.5V, 93XX56C only
2.5V ≤ VCC < 5.5V
1.8V ≤ VCC < 2.5V
100
250
TPD
Data output delay time
—
200
250
400
ns
ns
ns
4.5V ≤ VCC < 5.5V, CL = 100 pF
2.5V ≤ VCC < 4.5V, CL = 100 pF
1.8V ≤ VCC < 2.5V, CL = 100 pF
A10
A11
TCZ
TSV
Data output disable time
Status valid time
—
—
100
200
ns
ns
4.5V ≤ VCC < 5.5V, (Note 1)
1.8V ≤ VCC < 4.5V, (Note 1)
200
300
500
ns
ns
ns
4.5V ≤ VCC < 5.5V, CL = 100 pF
2.5V ≤ VCC < 4.5V, CL = 100 pF
1.8V ≤ VCC < 2.5V, CL = 100 pF
A12
A13
TWC
TWC
Program cycle time
—
—
6
ms
ERASE/WRITE mode (AA and LC
versions)
2
ms
ERASE/WRITE mode
(93C versions)
A14
A15
A16
TEC
TWL
—
—
—
6
ms
ms
ERAL mode, 4.5V ≤ VCC ≤ 5.5V
WRAL mode, 4.5V ≤ VCC ≤ 5.5V
15
—
Endurance
1M
cycles 25°C, VCC = 5.0V, (Note 2)
Note 1: This parameter is periodically sampled and not 100% tested.
2: This application is not tested but ensured by characterization. For endurance estimates in a specific
application, please consult the Total Endurance Model which may be obtained on www.microchip.com.
2003 Microchip Technology Inc.
DS21794A-page 3
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C
FIGURE 1-1:
SYNCHRONOUS DATA TIMING
VIH
VIL
VIH
CS
TCSS
TCKH
TCKL
TCSH
CLK
DI
VIL
TDIS
TDIH
VIH
VIL
TCZ
TCZ
TPD
TPD
VOH
DO
(READ)
VOL
VOH
TSV
DO
(PROGRAM)
STATUS VALID
VOL
Note: TSV is relative to CS.
TABLE 1-1: INSTRUCTION SET FOR X 16 ORGANIZATION (93XX56B OR 93XX56C WITH ORG = 1)
Instruction
SB Opcode
Address
Data In
Data Out Req. CLK Cycles
ERASE
ERAL
1
1
1
1
1
1
1
11
00
00
00
10
01
00
X
1
0
1
X
X
0
A6 A5 A4 A3 A2 A1 A0
—
—
—
—
—
(RDY/BSY)
(RDY/BSY)
HIGH-Z
11
11
11
11
27
27
27
0
0
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
EWDS
EWEN
READ
WRITE
WRAL
HIGH-Z
A6 A5 A4 A3 A2 A1 A0
D15 – D0
A6 A5 A4 A3 A2 A1 A0 D15 – D0 (RDY/BSY)
D15 – D0 (RDY/BSY)
1
X
X
X
X
X
X
TABLE 1-2: INSTRUCTION SET FOR X 8 ORGANIZATION (93XX56A OR 93XX56C WITH ORG = 0)
Req. CLK
Cycles
Instruction
SB Opcode
Address
Data In
Data Out
ERASE
ERAL
1
1
1
1
1
1
1
11
00
00
00
10
01
00
X
1
0
1
X
X
0
A7 A6 A5 A4 A3 A2 A1 A0
—
—
—
—
—
(RDY/BSY)
(RDY/BSY)
HIGH-Z
12
12
12
12
20
20
20
0
0
1
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
EWDS
EWEN
READ
WRITE
WRAL
HIGH-Z
A7 A6 A5 A4 A3 A2 A1 A0
D7 – D0
A7 A6 A5 A4 A3 A2 A1 A0 D7 – D0 (RDY/BSY)
D7 – D0 (RDY/BSY)
1
X
X
X
X
X
X
X
DS21794A-page 4
2003 Microchip Technology Inc.
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C
2.2
Data In/Data Out (DI/DO)
2.0
FUNCTIONAL DESCRIPTION
It is possible to connect the Data In and Data Out pins
together. However, with this configuration it is possible
for a “bus conflict” to occur during the “dummy zero”
that precedes the READ operation, if A0 is a logic
HIGH level. Under such a condition the voltage level
seen at Data Out is undefined and will depend upon the
relative impedances of Data Out and the signal source
driving A0. The higher the current sourcing capability of
A0, the higher the voltage at the Data Out pin. In order
to limit this current, a resistor should be connected
between DI and DO.
When the ORG* pin is connected to VCC, the (x16)
organization is selected. When it is connected to
ground, the (x8) organization is selected. Instructions,
addresses and write data are clocked into the DI pin on
the rising edge of the clock (CLK). The DO pin is
normally held in a HIGH-Z state except when reading
data from the device, or when checking the READY/
BUSY status during a programming operation. The
READY/BUSY status can be verified during an Erase/
Write operation by polling the DO pin; DO low indicates
that programming is still in progress, while DO high
indicates the device is ready. DO will enter the HIGH-Z
state on the falling edge of CS.
2.3
Data Protection
All modes of operation are inhibited when VCC is below
a typical voltage of 1.5V for '93AA' and '93LC' devices
or 3.8V for '93C' devices.
2.1
START Condition
The START bit is detected by the device if CS and DI
are both HIGH with respect to the positive edge of CLK
for the first time.
The EWEN and EWDS commands give additional
protection against accidentally programming during
normal operation.
Before a START condition is detected, CS, CLK, and DI
may change in any combination (except to that of a
START condition), without resulting in any device
operation (READ, WRITE, ERASE, EWEN, EWDS,
ERAL, or WRAL). As soon as CS is HIGH, the device
is no longer in Standby mode.
Note: For added protection, an EWDS command
should be performed after every write
operation.
After power-up, the device is automatically in the
EWDS mode. Therefore, an EWENinstruction must be
performed before the initial ERASEor WRITEinstruction
can be executed.
An instruction following a START condition will only be
executed if the required opcode, address and data bits
for any particular instruction are clocked in.
Block Diagram
VCC
VSS
Address
Decoder
Memory
Array
Address
Counter
DO
Output
Buffer
Data Register
DI
Mode
Decode
Logic
ORG*
CS
Clock
Register
CLK
*ORG input is not available on A/B devices
2003 Microchip Technology Inc.
DS21794A-page 5
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C
The DO pin indicates the READY/BUSY status of the
2.4
ERASE
device if CS is brought high after a minimum of 250 ns
low (TCSL). DO at logical “0” indicates that program-
ming is still in progress. DO at logical “1” indicates that
the register at the specified address has been erased
and the device is ready for another instruction.
The ERASEinstruction forces all data bits of the speci-
fied address to the logical “1” state. CS is brought low
following the loading of the last address bit. This falling
edge of the CS pin initiates the self-timed program-
ming cycle, except on ‘93C’ devices where the rising
edge of CLK before the last address bit initiates the
write cycle.
Note:
Issuing a START bit and then taking CS low
will clear the READY/BUSY status from
DO.
FIGURE 2-1:
ERASE TIMING FOR 93AA AND 93LC DEVICES
TCSL
CS
CHECK STATUS
CLK
1
1
AN
AN-1 AN-2
A0
•••
DI
1
TSV
TCZ
HIGH-Z
BUSY
READY
DO
HIGH-Z
TWC
FIGURE 2-2:
ERASE TIMING FOR 93C DEVICES
TCSL
CS
CHECK STATUS
CLK
1
1
AN
AN-1 AN-2
A0
•••
DI
1
TSV
TCZ
HIGH-Z
BUSY
READY
DO
HIGH-Z
TWC
DS21794A-page 6
2003 Microchip Technology Inc.
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C
The DO pin indicates the READY/BUSY status of the
device, if CS is brought high after a minimum of 250 ns
low (TCSL).
2.5
ERASE ALL (ERAL)
The Erase All (ERAL) instruction will erase the entire
memory array to the logical “1” state. The ERAL cycle
is identical to the ERASE cycle, except for the different
opcode. The ERAL cycle is completely self-timed and
commences at the falling edge of the CS, except on
‘93C’ devices where the rising edge of CLK before the
last data bit initiates the write cycle. Clocking of the
CLK pin is not necessary after the device has entered
the ERAL cycle.
Note:
Issuing a START bit and then taking CS low
will clear the READY/BUSY status from
DO.
VCC must be ≥ 4.5V for proper operation of ERAL.
FIGURE 2-3:
ERAL TIMING FOR 93AA AND 93LC DEVICES
TCSL
CS
CHECK STATUS
CLK
1
0
0
1
0
X
X
DI
•••
TSV
TCZ
HIGH-Z
BUSY
READY
DO
HIGH-Z
VCC must be ≥ 4.5V for proper operation of ERAL.
TEC
FIGURE 2-4:
ERAL TIMING FOR 93C DEVICES
TCSL
CS
CHECK STATUS
CLK
1
0
0
1
0
X
X
DI
•••
TSV
TCZ
HIGH-Z
BUSY
READY
DO
HIGH-Z
TEC
2003 Microchip Technology Inc.
DS21794A-page 7
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C
2.6
ERASE/WRITE DISABLE And ENABLE (EWDS/EWEN)
The 93XX56A/B/C powers up in the ERASE/WRITE
Disable (EWDS) state. All Programming modes must be
preceded by an ERASE/WRITE Enable (EWEN) instruc-
tion. Once the EWENinstruction is executed, program-
ming remains enabled until an EWDS instruction is
executed or Vcc is removed from the device. To protect
against accidental data disturbance, the EWDSinstruc-
tion can be used to disable all ERASE/WRITE
functions and should follow all programming opera-
tions. Execution of a READinstruction is independent of
both the EWENand EWDSinstructions.
FIGURE 2-5:
EWDS TIMING
TCSL
CS
CLK
•••
1
0
0
0
0
X
X
DI
FIGURE 2-6:
EWEN TIMING
TCSL
CS
CLK
•••
1
0
0
1
1
X
X
DI
devices) output string. The output data bits will toggle on
the rising edge of the CLK and are stable after the spec-
ified time delay (TPD). Sequential read is possible when
CS is held high. The memory data will automatically cycle
to the next register and output sequentially.
2.7
READ
The READ instruction outputs the serial data of the
addressed memory location on the DO pin. A dummy
zero bit precedes the 8-bit (If ORG pin is low or A-Version
devices) or 16-bit (If ORG pin is high or B-version
FIGURE 2-7:
READ TIMING
CS
CLK
DI
•••
A0
An
1
1
0
HIGH-Z
DO
0
Dx
D0
Dx
D0
Dx
D0
•••
•••
•••
DS21794A-page 8
2003 Microchip Technology Inc.
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C
The DO pin indicates the READY/BUSY status of the
device, if CS is brought high after a minimum of 250 ns
2.8
WRITE
The WRITEinstruction is followed by 8 bits (If ORG is
low or A-version devices) or 16 bits (If ORG pin is high
or B-version devices) of data which are written into the
specified address. For 93AA56A/B/C and 93LC56A/B/C
devices, after the last data bit is clocked into DI, the
falling edge of CS initiates the self-timed auto-erase and
programming cycle. For 93C56A/B/C devices, the self-
timed auto-erase and programming cycle is initiated by
the rising edge of CLK on the last data bit.
low (TCSL). DO at logical “0” indicates that program-
ming is still in progress. DO at logical “1” indicates that
the register at the specified address has been written
with the data specified and the device is ready for
another instruction.
Note:
Issuing a START bit and then taking CS low
will clear the READY/BUSY status from
DO.
FIGURE 2-8:
WRITE TIMING FOR 93AA AND 93LC DEVICES
TCSL
CS
CLK
DI
0
1
1
An
A0
Dx
D0
•••
•••
TSV
TCZ
HIGH-Z
BUSY
READY
DO
HIGH-Z
Twc
FIGURE 2-9:
WRITE TIMING FOR 93C DEVICES
TCSL
CS
CLK
DI
0
1
1
An
A0
Dx
D0
•••
•••
TSV
TCZ
HIGH-Z
BUSY
READY
DO
HIGH-Z
Twc
2003 Microchip Technology Inc.
DS21794A-page 9
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C
automatic ERAL cycle for the device. Therefore, the
WRALinstruction does not require an ERALinstruction
but the chip must be in the EWEN status.
2.9
WRITE ALL (WRAL)
The Write All (WRAL) instruction will write the entire
memory array with the data specified in the command.
For 93AA56A/B/C and 93LC56A/B/C devices, after the
last data bit is clocked into DI, the falling edge of CS
initiates the self-timed auto-erase and programming
cycle. For 93C56A/B/C devices, the self-timed auto-
erase and programming cycle is initiated by the rising
edge of CLK on the last data bit. Clocking of the CLK
pin is not necessary after the device has entered the
WRAL cycle. The WRAL command does include an
The DO pin indicates the READY/BUSY status of the
device if CS is brought high after a minimum of 250 ns
low (TCSL).
Note:
Issuing a START bit and then taking CS low
will clear the READY/BUSY status from
DO.
VCC must be ≥ 4.5V for proper operation of WRAL.
FIGURE 2-10:
WRAL TIMING FOR 93AA AND 93LC DEVICES
TCSL
CS
CLK
DI
0
0
1
X
1
0
•••
Dx
•••
X
D0
TSV
TCZ
HIGH-Z
BUSY
READY
DO
HIGH-Z
TWL
VCC must be ≥ 4.5V for proper operation of WRAL.
FIGURE 2-11:
WRAL TIMING FOR 93C DEVICES
TCSL
CS
CLK
DI
0
0
1
X
1
0
•••
Dx
•••
X
D0
TSV
TCZ
HIGH-Z
BUSY
READY
DO
HIGH-Z
TWL
DS21794A-page 10
2003 Microchip Technology Inc.
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C
3.0
PIN DESCRIPTIONS
TABLE 3-1:
PIN DESCRIPTIONS
SOIC/PDIP/
MSOP/TSSOP
Name
SOT-23
Rotated SOIC
Function
CS
1
2
3
4
5
6
5
4
3
4
5
6
7
8
Chip Select
Serial Clock
Data In
CLK
DI
3
DO
1
Data Out
Ground
VSS
2
ORG/NC
N/A
Organization / 93XX56C
No Internal Connection / 93XX56A/B
NC
7
8
N/A
6
1
2
No Internal Connection
Power Supply
VCC
3.1
Chip Select (CS)
3.3
Data In (DI)
A high level selects the device; a low level deselects
the device and forces it into Standby mode. However, a
programming cycle which is already in progress will be
completed, regardless of the Chip Select (CS) input
signal. If CS is brought low during a program cycle, the
device will go into Standby mode as soon as the
programming cycle is completed.
Data In (DI) is used to clock in a START bit, opcode,
address and data synchronously with the CLK input.
3.4
Data Out (DO)
Data Out (DO) is used in the READ mode to output
data synchronously with the CLK input (TPD after the
positive edge of CLK).
CS must be low for 250 ns minimum (TCSL) between
consecutive instructions. If CS is low, the internal
control logic is held in a RESET status.
This pin also provides READY/BUSY status informa-
tion during ERASE and WRITE cycles. READY/BUSY
status information is available on the DO pin if CS is
brought high after being low for minimum chip select
low time (TCSL) and an ERASE or WRITE operation
has been initiated.
3.2
Serial Clock (CLK)
The Serial Clock is used to synchronize the communi-
cation between a master device and the 93XX series
device. Opcodes, address and data bits are clocked in
on the positive edge of CLK. Data bits are also clocked
out on the positive edge of CLK.
The status signal is not available on DO, if CS is held
low during the entire ERASE or WRITE cycle. In this
case, DO is in the HIGH-Z mode. If status is checked
after the ERASE/WRITE cycle, the data line will be high
to indicate the device is ready.
CLK can be stopped anywhere in the transmission
sequence (at high or low level) and can be continued
anytime with respect to clock high time (TCKH) and
clock low time (TCKL). This gives the controlling master
freedom in preparing opcode, address and data.
Note:
Issuing a START bit and then taking CS low
will clear the READY/BUSY status from
DO.
CLK is a “Don't Care” if CS is low (device deselected).
If CS is high, but the START condition has not been
detected (DI = 0), any number of clock cycles can be
received by the device without changing its status (i.e.,
waiting for a START condition).
3.5
Organization (ORG)
When the ORG pin is connected to VCC or Logic HI, the
(x16) memory organization is selected. When the ORG
pin is tied to VSS or Logic LO, the (x8) memory
organization is selected. For proper operation, ORG
must be tied to a valid logic level.
CLK cycles are not required during the self-timed
WRITE (i.e., auto ERASE/WRITE) cycle.
93XX56A devices are always x8 organization and
93XX56B devices are always x16 organization.
After detection of a START condition the specified
number of clock cycles (respectively low to high transi-
tions of CLK) must be provided. These clock cycles are
required to clock in all required opcode, address and
data bits before an instruction is executed. CLK and DI
then become don't care inputs waiting for a new START
condition to be detected.
2003 Microchip Technology Inc.
DS21794A-page 11
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C
4.0
PACKAGING INFORMATION
4.1
Package Marking Information
MSOP 1st Line Marking Codes
Pb-free
8-Lead MSOP (150 mil)
Example:
Device
std mark
mark
3L56BI
2281L7
93AA56A
93AA56B
93AA56C
93LC56A
93LC56B
93LC56C
93C56A
XXXXXXT
YWWNNN
3A56AT
3A56BT
3A56CT
3L56AT
3L56BT
3L56CT
3C56AT
3C56BT
3C56CT
GA56AT
GA56BT
GA56CT
GL56AT
GL56BT
GL56CT
GC56AT
93C56B
93C56C
GC56BT
GC56CT
Example:
6-Lead SOT-23
T = blank for commercial, “I” for Industrial,
“E” for Extended.
2EL7
XXNN
SOT23 Marking Codes
Device
I-temp
E-temp
Example:
8-Lead PDIP
93AA56A
93AA56B
93LC56A
93LC56B
93C56A
2BNN
2LNN
2ENN
2PNN
2HNN
2TNN
–
–
93LC56B
I/P 1L7
2FNN
2RNN
2JNN
2UNN
XXXXXXXX
XXXXXNNN
0228
YYWW
93C56B
Pb-free topside mark is same; Pb-free
noted only on carton label.
Example:
8-Lead SOIC
93LC56B
I/SN 0228
XXXXXXXX
TSSOP 1st Line Marking Codes
Pb-free
XXXXYYWW
1L7
NNN
Device
std mark
mark
93AA56A
93AA56B
93AA56C
93LC56A
93LC56B
93LC56C
93C56A
A56A
A56B
A56C
L56A
L56B
L56C
C56A
C56B
C56C
GABA
GABB
GABC
GLBA
GLBB
GLBC
GCBA
Example:
8-Lead TSSOP
L56B
I228
1L7
XXXX
TYWW
NNN
93C56B
93C56C
GCBB
GCBC
Temperature grade is marked on line 2.
Legend: XX...X Part number
T Temperature
Blank Commercial
I
Industrial
Extended
E
YY
Year code (last 2 digits of calendar year) except TSSOP
and MSOP which use only the last 1 digit
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
WW
NNN
Note: Custom marking available.
DS21794A-page 12
2003 Microchip Technology Inc.
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C
8-Lead Plastic Micro Small Outline Package (MS) (MSOP)
E
E1
p
D
2
B
n
1
α
A2
A
c
φ
A1
(F)
L
β
Units
Dimension Limits
INCHES
NOM
MILLIMETERS*
MIN
MAX
MIN
NOM
8
MAX
n
p
Number of Pins
Pitch
8
.026 BSC
0.65 BSC
Overall Height
A
A2
A1
E
-
-
.043
-
-
0.85
-
1.10
Molded Package Thickness
Standoff
.030
.000
.033
-
.037
.006
0.75
0.95
0.15
0.00
Overall Width
.193 TYP.
4.90 BSC
Molded Package Width
Overall Length
Foot Length
E1
D
.118 BSC
.118 BSC
3.00 BSC
3.00 BSC
L
.016
.024
.037 REF
.031
0.40
0.60
0.95 REF
0.80
Footprint (Reference)
Foot Angle
F
φ
c
0°
.003
.009
5°
-
8°
.009
.016
15°
0°
0.08
0.22
5°
-
-
-
-
-
8°
0.23
0.40
15°
Lead Thickness
Lead Width
.006
B
α
β
.012
Mold Draft Angle Top
Mold Draft Angle Bottom
*Controlling Parameter
Notes:
-
-
5°
15°
5°
15°
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not
exceed .010" (0.254mm) per side.
JEDEC Equivalent: MO-187
Drawing No. C04-111
2003 Microchip Technology Inc.
DS21794A-page 13
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C
6-Lead Plastic Small Outline Transistor (CH) (SOT23)
E
E1
B
p1
D
n
1
α
c
A
A2
φ
A1
L
β
Units
INCHES*
NOM
MILLIMETERS
Dimension Limits
MIN
MAX
MIN
NOM
6
MAX
n
p
Number of Pins
Pitch
6
.038
.075
.046
.043
.003
.110
.064
.116
.018
5
0.95
1.90
p1
Outside lead pitch (basic)
Overall Height
A
A2
A1
E
.035
.057
0.90
0.90
1.18
1.10
0.08
2.80
1.63
2.95
0.45
5
1.45
1.30
0.15
3.00
1.75
3.10
0.55
10
Molded Package Thickness
Standoff
.035
.000
.102
.059
.110
.014
0
.051
.006
.118
.069
.122
.022
10
0.00
2.60
1.50
2.80
0.35
0
Overall Width
Molded Package Width
Overall Length
Foot Length
E1
D
L
φ
Foot Angle
c
Lead Thickness
Lead Width
.004
.014
0
.006
.017
5
.008
.020
10
0.09
0.35
0
0.15
0.43
5
0.20
0.50
10
B
α
β
Mold Draft Angle Top
Mold Draft Angle Bottom
*Controlling Parameter
Notes:
0
5
10
0
5
10
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not
exceed .005" (0.127mm) per side.
JEITA (formerly EIAJ) equivalent: SC-74A
Drawing No. C04-120
DS21794A-page 14
2003 Microchip Technology Inc.
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C
8-Lead Plastic Dual In-line (P) – 300 mil (PDIP)
E1
D
2
n
1
α
E
A2
A
L
c
A1
β
B1
B
p
eB
Units
INCHES*
NOM
MILLIMETERS
Dimension Limits
MIN
MAX
MIN
NOM
8
MAX
n
p
Number of Pins
Pitch
8
.100
.155
.130
2.54
Top to Seating Plane
A
.140
.170
3.56
2.92
3.94
3.30
4.32
Molded Package Thickness
Base to Seating Plane
Shoulder to Shoulder Width
Molded Package Width
Overall Length
A2
A1
E
.115
.015
.300
.240
.360
.125
.008
.045
.014
.310
5
.145
3.68
0.38
7.62
6.10
9.14
3.18
0.20
1.14
0.36
7.87
5
.313
.250
.373
.130
.012
.058
.018
.370
10
.325
.260
.385
.135
.015
.070
.022
.430
15
7.94
6.35
9.46
3.30
0.29
1.46
0.46
9.40
10
8.26
6.60
9.78
3.43
0.38
1.78
0.56
10.92
15
E1
D
Tip to Seating Plane
Lead Thickness
L
c
Upper Lead Width
B1
B
Lower Lead Width
Overall Row Spacing
Mold Draft Angle Top
Mold Draft Angle Bottom
§
eB
α
β
5
10
15
5
10
15
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-001
Drawing No. C04-018
2003 Microchip Technology Inc.
DS21794A-page 15
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C
8-Lead Plastic Small Outline (SN) – Narrow, 150 mil (SOIC)
E
E1
p
D
2
B
n
1
h
α
45°
c
A2
A
φ
β
L
A1
Units
INCHES*
NOM
MILLIMETERS
Dimension Limits
MIN
MAX
MIN
NOM
8
MAX
n
p
Number of Pins
Pitch
8
.050
.061
.056
.007
.237
.154
.193
.015
.025
4
1.27
Overall Height
A
.053
.069
1.35
1.32
1.55
1.42
0.18
6.02
3.91
4.90
0.38
0.62
4
1.75
Molded Package Thickness
Standoff
A2
A1
E
.052
.004
.228
.146
.189
.010
.019
0
.061
.010
.244
.157
.197
.020
.030
8
1.55
0.25
6.20
3.99
5.00
0.51
0.76
8
§
0.10
5.79
3.71
4.80
0.25
0.48
0
Overall Width
Molded Package Width
Overall Length
E1
D
Chamfer Distance
Foot Length
h
L
φ
Foot Angle
c
Lead Thickness
Lead Width
.008
.013
0
.009
.017
12
.010
.020
15
0.20
0.33
0
0.23
0.42
12
0.25
0.51
15
B
α
β
Mold Draft Angle Top
Mold Draft Angle Bottom
0
12
15
0
12
15
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-012
Drawing No. C04-057
DS21794A-page 16
2003 Microchip Technology Inc.
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C
8-Lead Plastic Thin Shrink Small Outline (ST) – 4.4 mm (TSSOP)
E
E1
p
D
2
1
n
B
α
A
c
A1
A2
φ
β
L
Units
INCHES
NOM
MILLIMETERS*
Dimension Limits
MIN
MAX
MIN
NOM
8
MAX
n
p
Number of Pins
Pitch
8
.026
0.65
Overall Height
A
.043
1.10
Molded Package Thickness
Standoff
A2
A1
E
.033
.035
.004
.251
.173
.118
.024
4
.037
.006
.256
.177
.122
.028
8
0.85
0.05
0.90
0.10
6.38
4.40
3.00
0.60
4
0.95
0.15
6.50
4.50
3.10
0.70
8
§
.002
.246
.169
.114
.020
0
Overall Width
6.25
4.30
2.90
0.50
0
Molded Package Width
Molded Package Length
Foot Length
E1
D
L
φ
Foot Angle
c
Lead Thickness
.004
.007
0
.006
.010
5
.008
.012
10
0.09
0.19
0
0.15
0.25
5
0.20
0.30
10
Lead Width
B
α
β
Mold Draft Angle Top
Mold Draft Angle Bottom
0
5
10
0
5
10
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.005” (0.127mm) per side.
JEDEC Equivalent: MO-153
Drawing No. C04-086
2003 Microchip Technology Inc.
DS21794A-page 17
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C
NOTES:
DS21794A-page 18
2003 Microchip Technology Inc.
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C
ON-LINE SUPPORT
SYSTEMS INFORMATION AND
UPGRADE HOT LINE
Microchip provides on-line support on the Microchip
World Wide Web site.
The Systems Information and Upgrade Line provides
system users a listing of the latest versions of all of
Microchip's development systems software products.
Plus, this line provides information on how customers
can receive the most current upgrade kits.The Hot Line
Numbers are:
The web site is used by Microchip as a means to make
files and information easily available to customers. To
view the site, the user must have access to the Internet
®
®
and a web browser, such as Netscape or Microsoft
Internet Explorer. Files are also available for FTP
download from our FTP site.
1-800-755-2345 for U.S. and most of Canada, and
1-480-792-7302 for the rest of the world.
Connecting to the Microchip Internet
Web Site
042003
The Microchip web site is available at the following
URL:
www.microchip.com
The file transfer site is available by using an FTP ser-
vice to connect to:
ftp://ftp.microchip.com
The web site and file transfer site provide a variety of
services. Users may download files for the latest
Development Tools, Data Sheets, Application Notes,
User's Guides, Articles and Sample Programs. A vari-
ety of Microchip specific business information is also
available, including listings of Microchip sales offices,
distributors and factory representatives. Other data
available for consideration is:
• Latest Microchip Press Releases
• Technical Support Section with Frequently Asked
Questions
• Design Tips
• Device Errata
• Job Postings
• Microchip Consultant Program Member Listing
• Links to other useful web sites related to
Microchip Products
• Conferences for products, Development Systems,
technical information and more
• Listing of seminars and events
2003 Microchip Technology Inc.
DS21794A-page 19
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C
READER RESPONSE
It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip prod-
uct. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation
can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-4150.
Please list the following information, and use this outline to provide us with your comments about this document.
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RE:
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FAX: (______) _________ - _________
Application (optional):
Would you like a reply?
Y
N
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C
DS21794A
Literature Number:
Device:
Questions:
1. What are the best features of this document?
2. How does this document meet your hardware and software development needs?
3. Do you find the organization of this document easy to follow? If not, why?
4. What additions to the document do you think would enhance the structure and subject?
5. What deletions from the document could be made without affecting the overall usefulness?
6. Is there any incorrect or misleading information (what and where)?
7. How would you improve this document?
DS21794A-page 20
2003 Microchip Technology Inc.
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
/XX
X
PART NO.
Device
X
X
X
Examples:
a)
b)
c)
93AA56C-I/MS: 2K, 256x8 or 128x16 Serial
Package
Lead Finish
Tape & Reel Temperature
Range
Pinout
EEPROM, MSOP package, 1.8V
93AA56B-I/MS: 2K, 128x16 Serial EEPROM,
MSOP package, 1.8V
93AA56AT-I/OT: 2K, 256x8 Serial EEPROM,
SOT-23 package, tape and reel, 1.8V
Device
93AA56A: 2K 1.8V Microwire Serial EEPROM
93AA56B: 2K 1.8V Microwire Serial EEPROM
93AA56C: 2K 1.8V Microwire Serial EEPROM w/ORG
d)
93AA56CT-I/MS: 2K, 256x8 or 128x16 Serial
EEPROM, MSOP package, tape and reel, 1.8V
93LC56A: 2K 2.5V Microwire Serial EEPROM
93LC56B: 2K 2.5V Microwire Serial EEPROM
93LC56C: 2K 2.5V Microwire Serial EEPROM w/ORG
a)
b)
c)
93LC56A-I/MS: 2K, 256x8 Serial EEPROM,
MSOP package, 2.5V
93C56A: 2K 5.0V Microwire Serial EEPROM
93C56B: 2K 5.0V Microwire Serial EEPROM
93C56C: 2K 5.0V Microwire Serial EEPROM w/ORG
93LC56BT-I/OT: 2K, 128x16 Serial EEPROM,
SOT-23 package, tape and reel, 2.5V
93LC56B-I/MS: 2K, 128x16 Serial EEPROM,
MSOP package, 2.5V
Pinout:
Blank
X
=
=
Standard pinout
Rotated pinout
d)
93LC56BXT-I/SNG: 2K, 128x16 Serial
EEPROM, SOIC package, rotated pinout,
Industrial temperature, Pb-free finish, 2.5V
Tape & Reel:
Temperature Range
Package
Blank
T
=
=
Standard packaging
Tape & Reel
a)
b)
c)
93C56B-I/MS: 2K, 128x16 Serial EEPROM,
MSOP package, 5.0V
93C56C-I/MS: 2K, 256x8 or 128x16 Serial
EEPROM, MSOP package, 5.0V
I
E
=
=
-40°C to +85°C
-40°C to +125°C
93C56AT-I/OT: 2K, 256x8 Serial EEPROM,
SOT-23 package, tape and reel, 5.0V
MS
OT
P
SN
ST
=
=
=
=
=
Plastic MSOP (Micro Small outline, 8-lead)
SOT-23, 6-lead (Tape & Reel only)
Plastic DIP (300 mil body), 8-lead
Plastic SOIC (150 mil body), 8-lead
TSSOP, 8-lead
Lead Finish:
Blank
G
=
=
Standard 63% / 37% SnPb
Pure Matte Sn
Sales and Support
Data Sheets
Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences
and recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of
the following:
1. Your local Microchip sales office
2. The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277
3. The Microchip Worldwide Site (www.microchip.com)
Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using.
New Customer Notification System
Register on our web site (www.microchip.com/cn) to receive the most current information on our products.
2003 Microchip Technology Inc.
DS21794A-page 21
93AA56A/B/C, 93LC56A/B/C, 93C56A/B/C
NOTES:
DS21794A-page 22
2003 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is intended through suggestion only
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications. No
representation or warranty is given and no liability is assumed by
Microchip Technology Incorporated with respect to the accuracy
or use of such information, or infringement of patents or other
intellectual property rights arising from such use or otherwise.
Use of Microchip’s products as critical components in life
support systems is not authorized except with express written
approval by Microchip. No licenses are conveyed, implicitly or
otherwise, under any intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, KEELOQ,
MPLAB, PIC, PICmicro, PICSTART, PRO MATE and
PowerSmart are registered trademarks of Microchip Technology
Incorporated in the U.S.A. and other countries.
FilterLab, microID, MXDEV, MXLAB, PICMASTER, SEEVAL
and The Embedded Control Solutions Company are registered
trademarks of Microchip Technology Incorporated in the U.S.A.
Accuron, Application Maestro, dsPIC, dsPICDEM,
dsPICDEM.net, ECONOMONITOR, FanSense, FlexROM,
fuzzyLAB, In-Circuit Serial Programming, ICSP, ICEPIC,
microPort, Migratable Memory, MPASM, MPLIB, MPLINK,
MPSIM, PICC, PICkit, PICDEM, PICDEM.net, PowerCal,
PowerInfo, PowerMate, PowerTool, rfLAB, rfPIC, Select Mode,
SmartSensor, SmartShunt, SmartTel and Total Endurance are
trademarks of Microchip Technology Incorporated in the U.S.A.
and other countries.
Serialized Quick Turn Programming (SQTP) is a service mark of
Microchip Technology Incorporated in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2003, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
Microchip received QS-9000 quality system
certification for its worldwide headquarters,
design and wafer fabrication facilities in
Chandler and Tempe, Arizona in July 1999
and Mountain View, California in March 2002.
The Company’s quality system processes and
procedures are QS-9000 compliant for its
®
PICmicro 8-bit MCUs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals,
non-volatile memory and analog products. In
addition, Microchip’s quality system for the
design and manufacture of development
systems is ISO 9001 certified.
2003 Microchip Technology Inc.
DS21794A - page 23
WORLDWIDE SALES AND SERVICE
Japan
Microchip Technology Japan K.K.
Benex S-1 6F
3-18-20, Shinyokohama
Kohoku-Ku, Yokohama-shi
Kanagawa, 222-0033, Japan
Tel: 81-45-471- 6166 Fax: 81-45-471-6122
AMERICAS
ASIA/PACIFIC
Corporate Office
2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7200 Fax: 480-792-7277
Technical Support: 480-792-7627
Web Address: http://www.microchip.com
Australia
Microchip Technology Australia Pty Ltd
Marketing Support Division
Suite 22, 41 Rawson Street
Epping 2121, NSW
Australia
Tel: 61-2-9868-6733 Fax: 61-2-9868-6755
Korea
Atlanta
Microchip Technology Korea
168-1, Youngbo Bldg. 3 Floor
Samsung-Dong, Kangnam-Ku
Seoul, Korea 135-882
China - Beijing
3780 Mansell Road, Suite 130
Alpharetta, GA 30022
Tel: 770-640-0034 Fax: 770-640-0307
Microchip Technology Consulting (Shanghai)
Co., Ltd., Beijing Liaison Office
Unit 915
Tel: 82-2-554-7200 Fax: 82-2-558-5934
Boston
Bei Hai Wan Tai Bldg.
Singapore
2 Lan Drive, Suite 120
Westford, MA 01886
Tel: 978-692-3848 Fax: 978-692-3821
No. 6 Chaoyangmen Beidajie
Beijing, 100027, No. China
Tel: 86-10-85282100 Fax: 86-10-85282104
Microchip Technology Singapore Pte Ltd.
200 Middle Road
#07-02 Prime Centre
Singapore, 188980
Tel: 65-6334-8870 Fax: 65-6334-8850
Chicago
China - Chengdu
333 Pierce Road, Suite 180
Itasca, IL 60143
Tel: 630-285-0071 Fax: 630-285-0075
Microchip Technology Consulting (Shanghai)
Co., Ltd., Chengdu Liaison Office
Rm. 2401-2402, 24th Floor,
Ming Xing Financial Tower
No. 88 TIDU Street
Taiwan
Microchip Technology (Barbados) Inc.,
Taiwan Branch
11F-3, No. 207
Tung Hua North Road
Taipei, 105, Taiwan
Tel: 886-2-2717-7175 Fax: 886-2-2545-0139
Dallas
4570 Westgrove Drive, Suite 160
Addison, TX 75001
Tel: 972-818-7423 Fax: 972-818-2924
Chengdu 610016, China
Tel: 86-28-86766200 Fax: 86-28-86766599
China - Fuzhou
Detroit
Tri-Atria Office Building
32255 Northwestern Highway, Suite 190
Farmington Hills, MI 48334
Tel: 248-538-2250 Fax: 248-538-2260
Microchip Technology Consulting (Shanghai)
Co., Ltd., Fuzhou Liaison Office
Unit 28F, World Trade Plaza
No. 71 Wusi Road
Fuzhou 350001, China
Tel: 86-591-7503506 Fax: 86-591-7503521
EUROPE
Austria
Microchip Technology Austria GmbH
Durisolstrasse 2
A-4600 Wels
Kokomo
2767 S. Albright Road
Kokomo, Indiana 46902
Tel: 765-864-8360 Fax: 765-864-8387
China - Hong Kong SAR
Austria
Microchip Technology Hongkong Ltd.
Unit 901-6, Tower 2, Metroplaza
223 Hing Fong Road
Kwai Fong, N.T., Hong Kong
Tel: 852-2401-1200 Fax: 852-2401-3431
Tel: 43-7242-2244-399
Fax: 43-7242-2244-393
Denmark
Microchip Technology Nordic ApS
Regus Business Centre
Lautrup hoj 1-3
Los Angeles
18201 Von Karman, Suite 1090
Irvine, CA 92612
Tel: 949-263-1888 Fax: 949-263-1338
China - Shanghai
Microchip Technology Consulting (Shanghai)
Co., Ltd.
Room 701, Bldg. B
Far East International Plaza
No. 317 Xian Xia Road
Shanghai, 200051
Ballerup DK-2750 Denmark
Tel: 45 4420 9895 Fax: 45 4420 9910
Phoenix
2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7966 Fax: 480-792-4338
France
Microchip Technology SARL
Parc d’Activite du Moulin de Massy
43 Rue du Saule Trapu
Batiment A - ler Etage
91300 Massy, France
Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79
San Jose
Microchip Technology Inc.
2107 North First Street, Suite 590
San Jose, CA 95131
Tel: 86-21-6275-5700 Fax: 86-21-6275-5060
China - Shenzhen
Microchip Technology Consulting (Shanghai)
Co., Ltd., Shenzhen Liaison Office
Rm. 1812, 18/F, Building A, United Plaza
No. 5022 Binhe Road, Futian District
Shenzhen 518033, China
Tel: 408-436-7950 Fax: 408-436-7955
Germany
Microchip Technology GmbH
Steinheilstrasse 10
D-85737 Ismaning, Germany
Tel: 49-89-627-144-0
Fax: 49-89-627-144-44
Toronto
6285 Northam Drive, Suite 108
Mississauga, Ontario L4V 1X5, Canada
Tel: 905-673-0699 Fax: 905-673-6509
Tel: 86-755-82901380 Fax: 86-755-82966626
China - Qingdao
Rm. B505A, Fullhope Plaza,
Italy
No. 12 Hong Kong Central Rd.
Qingdao 266071, China
Tel: 86-532-5027355 Fax: 86-532-5027205
Microchip Technology SRL
Via Quasimodo, 12
20025 Legnano (MI)
Milan, Italy
India
Microchip Technology Inc.
India Liaison Office
Marketing Support Division
Divyasree Chambers
1 Floor, Wing A (A3/A4)
No. 11, O’Shaugnessey Road
Bangalore, 560 025, India
Tel: 91-80-2290061 Fax: 91-80-2290062
Tel: 39-0331-742611 Fax: 39-0331-466781
United Kingdom
Microchip Ltd.
505 Eskdale Road
Winnersh Triangle
Wokingham
Berkshire, England RG41 5TU
Tel: 44 118 921 5869 Fax: 44-118 921-5820
03/25/03
DS21794A-page 24
2003 Microchip Technology Inc.
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