93LC46A-TI/MSG_技术文档

Not recommended for new designs –

Please use 93LC46C, 93LC56C or 93LC66C.

93LC46/56/66

1K/2K/4K 2.5V Microwire Serial EEPROM

Features:

Package Types

PDIP/SOIC

• Single supply with programming operation down

to 2.5V

• Low-power CMOS technology

CS

CLK

DI

VCC

NU

1

2

3

4

8

7

6

5

• 100 µA typical active read current at 2.5V

• 3 µA typical standby current at 2.5V

ORG

VSS

• ORG pin selectable memory configuration

• 128 x 8- or 64 x 16-bit organization (93LC46)

• 256 x 8- or 128 x 16-bit organization (93LC56)

• 512 x 8 or 256 x 16 bit organization (93LC66)

DO

ROTATED SOIC

NU

VCC

CS

ORG

VSS

DO

DI

1

2

3

4

8

7

6

5

• Self-timed erase and write cycles

(including auto-erase)

• Automatic ERAL before WRAL

• Power on/off data protection circuitry

• Industry standard 3-wire serial I/O

• Device status signal during erase/write cycles

• Sequential read function

CLK

Block Diagram

• 1,000,000 E/W cycles ensured

• Data retention > 200 years

VCC

VSS

• 8-pin PDIP/SOIC

(SOIC in JEDEC standards)

Address

Decoder

Memory

Array

• Temperature ranges supported:

- Industrial (I):

-40°C to +85°C

Address

Counter

Description:

DO

Output

Buffer

Data Register

The Microchip Technology Inc. 93LC46/56/66 are 1K,

2K and 4K low voltage serial Electrically Erasable

PROMs (EEPROM). The device memory is configured

as x8 or x16 bits depending on the external logic of

levels of the ORG pin. Advanced CMOS technology

makes these devices ideal for low power nonvolatile

memory applications. The 93LC Series is available in

standard 8-pin PDIP and surface mount SOIC

packages. The rotated pin-out 93LC46X/56X/66X are

offered in the “SN” package only.

DI

Mode

Decode

Logic

ORG

CS

Clock

Register

CLK

 2004 Microchip Technology Inc.

DS21712B-page 1

93LC46/56/66

1.0

ELECTRICAL CHARACTERISTICS

(†)

Absolute Maximum Ratings

VCC.............................................................................................................................................................................6.5V

All inputs and outputs w.r.t. VSS ........................................................................................................ -0.6V to VCC + 1.0V

Storage temperature ...............................................................................................................................-65°C to +150°C

Ambient temperature with power applied................................................................................................-40°C to +125°C

ESD protection on all pins ......................................................................................................................................................≥ 4 kV

† NOTICE: Stresses above those listed under “Maximum ratings” may cause permanent damage to the device. This

is a stress rating only and functional operation of the device at those or any other conditions above those indicated in

the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods

may affect device reliability.

DC CHARACTERISTICS

VCC = +2.5V to +5.5V

DC CHARACTERISTICS

Industrial (I): TA = -40°C to +85°C

Param.

No.

Sym

VIH1

Characteristic

Min

Typ

Max

Units

Conditions

VCC ≥ 2.7V

D1

High-level input voltage

2.0

0.7 VCC

-0.3

—

VCC +1

0.8

V

VIH2

VIL1

VIL2

VOL1

VOL2

VOH1

VOH2

ILI

VCC ≥ 2.7V

D2

D3

D4

Low-level input voltage

Low-level output voltage

High-level output voltage

V

VCC ≥ 2.7V

0.2 VCC

0.4

V

VCC ≥ 2.7V

V

IOL = 2.1 mA, VCC = 4.5V

IOL = 100 µA, VCC = 2.5V

IOL = 400 µA, VCC = 4.5V

IOL = 100 µA, VCC = 2.5V

VIN = 0.1V to VCC

VOUT = 0.1V to VCC

—

0.3

V

2.4

—

V

VCC -0.2

—

V

D5

D6

D7

Input leakage current

Output leakage current

±10

7

µA

pF

ILO

—

CIN,

Pin capacitance

—

VIN/VOUT = 0V (Note 1 & 2)

COUT

(all inputs/outputs)

TA = 25°C, FCLK = 1 MHz

D8

D9

ICC write Operating current

ICC read

—

3

mA

FCLK = 2 MHz, VCC = 5.5V

(Note 2)

—

100

1

500

—

mA

µA

F^CLK= 2 MHz, VCC = 5.5V

F^CLK= 1 MHz, VCC = 3.0V

F^CLK= 1 MHz, VCC = 2.5V

D10

ICCS

Standby current

—

3

100

30

—

µA

CLK = CS = 0V; VCC = 5.5V

CLK = CS = 0V; VCC = 3.0V

CLK = CS = 0V; VCC = 2.5V

ORG, DI = VSS or VCC

Note 1: This parameter is tested at TA = 25°C and FCLK = 1 MHz.

2: This parameter is periodically sampled and not 100% tested.

DS21712B-page 2

 2004 Microchip Technology Inc.

93LC46/56/66

AC CHARACTERISTICS

VCC = +2.5V to +5.5V

Industrial (I): TA = -40°C to +85°C

AC CHARACTERISTICS

Param.

Sym

Characteristic

Min

Typ

Max

Units

Conditions

No.

1

FCLK

Clock frequency

—

2

1

MHz VCC ≥ 4.5V

MHz VCC < 4.5V

2

3

4

5

6

7

8

9

TCKH

TCKL

TCSS

TCSH

TCSL

TDIS

TDIH

TPD

TCZ

Clock high time

250

50

—

4

—

ns

Clock low time

Chip select setup time

Chip select hold time

Chip select low time

Data input setup time

Data input hold time

Data output delay time

Data output disable time

Status valid time

—

ns

ms

Relative to CLK

0

—

Relative to CLK

250

100

—

Relative to CLK

—

Relative to CLK

400

100

500

10

15

30

1M

CL = 100 pF

10

11

12

13

14

15

—

CL = 100 pf (Note 2)

CL = 100 pF

TSV

—

TWC

TEC

Program cycle time

—

Erase/Write mode

ERAL mode (VCC=5V ±10%)

WRAL mode (VCC=5V ±10%)

—

8

TWL

—

16

—

Endurance

1M

cycles 25°C, VCC = 5.0V, Block

mode (Note 3)

Note 1: This parameter is tested at TA = 25°C and FCLK = 1 MHz.

2: This parameter is periodically sampled and not 100% tested.

3: This parameter is not tested but ensured by characterization. For endurance estimates in a specific

application, please consult the Total Endurance^™Model which can be obtained from Microchip’s web site

at: www.microchip.com.

FIGURE 1-1:

SYNCHRONOUS DATA TIMING

VIH

VIL

VIH

CS

4

7

2

3

5

CLK

VIL

8

VIH

VIL

DI

10

9

VOH

DO

(Read)

VOL

VOH

11

DO

(Write)

Status Valid

VOL

 2004 Microchip Technology Inc.

DS21712B-page 3

93LC46/56/66

TABLE 1-1:

Instruction

INSTRUCTION SET FOR 93LC46: ORG = 1 (X 16 ORGANIZATION)

Req. CLK

Cycles

SB

Opcode

Address

Data In

Data Out

READ

EWEN

ERASE

ERAL

WRITE

WRAL

EWDS

1

10

00

11

00

01

00

A5 A4 A3 A2 A1 A0

1 1 XXXX

—

D15 - D0

High-Z

25

9

A5 A4 A3 A2 A1 A0

1 0 XXXX

—

(RDY/BSY)

High-Z

9

—

9

A5 A4 A3 A2 A1 A0

0 1 XXXX

D15 - D0

—

25

9

0 0 XXXX

TABLE 1-2:

Instruction

INSTRUCTION SET FOR 93LC46: ORG = 0 (X 8 ORGANIZATION)

Req. CLK

Cycles

SB

Opcode

Address

Data In

Data Out

READ

EWEN

ERASE

ERAL

WRITE

WRAL

EWDS

1

10

00

11

00

01

00

A6 A5 A4 A3 A2 A1 A0

1 1 X X X X X

—

D7 - D0

High-Z

18

10

18

10

A6 A5 A4 A3 A2 A1 A0

1 0 X X X X X

—

(RDY/BSY)

High-Z

—

A6 A5 A4 A3 A2 A1 A0

0 1 X X X X X

D7 - D0

—

0 0 X X X X X

TABLE 1-3:

INSTRUCTION SET FOR 93LC56: ORG = 1 (X 16 ORGANIZATION)

Instruction

SB

Opcode

Address

Data In

Data Out

Req. CLK

Cycles

READ

EWEN

ERASE

ERAL

WRITE

WRAL

EWDS

1

10

00

11

00

01

00

X A6 A5 A4 A3 A2 A1 A0

1 1 X X X X X X

—

D15 - D0

High-Z

27

11

27

11

X A6 A5 A4 A3 A2 A1 A0

1 0 X X X X X X

—

(RDY/BSY)

High-Z

—

X A6 A5 A4 A3 A2 A1 A0

0 1 X X X X X X

D15 - D0

—

0 0 X X X X X X

TABLE 1-4:

Instruction

INSTRUCTION SET FOR 93LC56: ORG = 0 (X 8 ORGANIZATION)

Req. CLK

Cycles

SB

Opcode

Address

Data In

Data Out

READ

EWEN

ERASE

ERAL

WRITE

WRAL

EWDS

1

10

00

11

00

01

00

X A7 A6 A5 A4 A3 A2 A1 A0

1 1 X X X X X X X

—

D7 - D0

High-Z

20

12

20

12

X A7 A6 A5 A4 A3 A2 A1 A0

1 0 X X X X X X X

—

(RDY/BSY)

High-Z

—

X A7 A6 A5 A4 A3 A2 A1 A0

0 1 X X X X X X X

D7 - D0

—

0 0 X X X X X X X

DS21712B-page 4

 2004 Microchip Technology Inc.

93LC46/56/66

TABLE 1-5:

Instruction

INSTRUCTION SET FOR 93LC66: ORG = 1 (X 16 ORGANIZATION)

Req. CLK

Cycles

SB

Opcode

Address

Data In

Data Out

READ

EWEN

ERASE

ERAL

WRITE

WRAL

EWDS

1

10

00

11

00

01

00

A7 A6 A5 A4 A3 A2 A1 A0

1 1 X X X X X X

—

D15 - D0

High-Z

27

11

27

11

A7 A6 A5 A4 A3 A2 A1 A0

1 0 X X X X X X

—

(RDY/BSY)

High-Z

—

A7 A6 A5 A4 A3 A2 A1 A0

0 1 X X X X X X

D15 - D0

—

0 0 X X X X X X

TABLE 1-6:

Instruction

INSTRUCTION SET FOR 93LC66: ORG = 0 (X 8 ORGANIZATION)

Req. CLK

Cycles

SB

Opcode

Address

Data In

Data Out

READ

EWEN

ERASE

ERAL

WRITE

WRAL

EWDS

1

10

00

11

00

01

00

A8 A7 A6 A5 A4 A3 A2 A1 A0

1 1 X X X X X X X

—

D7 - D0

High-Z

20

12

20

12

A8 A7 A6 A5 A4 A3 A2 A1 A0

1 0 X X X X X X X

—

(RDY/BSY)

High-Z

—

A8 A7 A6 A5 A4 A3 A2 A1 A0

0 1 X X X X X X X

D7 - D0

—

0 0 X X X X X X X

 2004 Microchip Technology Inc.

DS21712B-page 5

93LC46/56/66

After power-up, the device is automatically in the

EWDS mode. Therefore, an EWEN instruction must be

performed before any ERASE or WRITE instruction can

be executed.

2.0

FUNCTIONAL DESCRIPTION

When the ORG pin is connected to VCC, the (x16)

organization is selected. When it is connected to

ground, the (x8) organization is selected. Instruc-

tions, addresses and write data are clocked into the

DI pin on the rising edge of the clock (CLK). The DO

pin is normally held in a high-Z state except when

reading data from the device, or when checking the

Ready/Busy status during a programming operation.

The Ready/Busy status can be verified during an

erase/write operation by polling the DO pin; DO low

indicates that programming is still in progress, while

DO high indicates the device is ready. The DO will

enter the high-Z state on the falling edge of the CS.

2.4

Read

The READ instruction outputs the serial data of the

addressed memory location on the DO pin. A dummy

zero bit precedes the 16-bit (x16 organization) or 8-bit

(x8 organization) output string. The output data bits will

toggle on the rising edge of the CLK and are stable

after the specified time delay (TPD). Sequential read is

possible when CS is held high. The memory data will

automatically cycle to the next register and output

sequentially.

2.1

Start Condition

2.5

Erase/Write Enable and Disable

(EWEN, EWDS)

The Start bit is detected by the device if CS and DI are

both high with respect to the positive edge of CLK for

the first time.

The 93LC46/56/66 power up in the Erase/Write Disable

(EWDS) state. All programming modes must be

preceded by an Erase/Write Enable (EWEN) instruction.

Once the EWEN instruction is executed, programming

remains enabled until an EWDS instruction is executed

or VCC is removed from the device. To protect against

accidental data disturb, the EWDS instruction can be

used to disable all erase/write functions and should

follow all programming operations. Execution of a READ

instruction is independent of both the EWEN and EWDS

instructions.

Before a Start condition is detected, CS, CLK and DI

may change in any combination (except to that of a

Start condition), without resulting in any device opera-

tion (Read, Write, Erase, EWEN, EWDS, ERAL and

WRAL). As soon as CS is high, the device is no longer

in the Standby mode.

An instruction following a Start condition will only be

executed if the required amount of opcode, address

and data bits for any particular instruction is clocked in.

After execution of an instruction (i.e., clock in or out of

the last required address or data bit) CLK and DI

become “don't care” bits until a new Start condition is

detected.

2.6

Erase

The ERASE instruction forces all data bits of the speci-

fied address to the logical “1” state. CS is brought low

following the loading of the last address bit. This falling

edge of the CS pin initiates the self-timed programming

cycle.

2.2

Data In/Data Out (DI/DO)

It is possible to connect the Data In and Data Out pins

together. However, with this configuration it is possible

for a “bus conflict” to occur during the “dummy zero”

that precedes the read operation, if A0 is a logic high

level. Under such a condition the voltage level seen at

Data Out is undefined and will depend upon the relative

impedances of Data Out and the signal source driving

A0. The higher the current sourcing capability of A0,

the higher the voltage at the Data Out pin.

The DO pin indicates the Ready/Busy status of the

device if CS is brought high after a minimum of 250 ns

low (TCSL). DO at logical “0” indicates that program-

ming is still in progress. DO at logical “1” indicates that

the register at the specified address has been erased

and the device is ready for another instruction.

The erase cycle takes 4 ms per word typical.

2.3

Data Protection

During power-up, all programming modes of operation

are inhibited until VCC has reached a level greater than

1.4V. During power-down, the source data protection

circuitry acts to inhibit all programming modes when

VCC has fallen below 1.4V at nominal conditions.

The EWEN and EWDS commands give additional

protection against accidentally programming during

normal operation.

DS21712B-page 6

 2004 Microchip Technology Inc.

93LC46/56/66

The DO pin indicates the Ready/Busy status of the

device if CS is brought high after a minimum of 250 ns

low (TCSL) and before the entire write cycle is complete.

2.7

Write

The WRITE instruction is followed by 16 bits (or by 8

bits) of data which are written into the specified

address. After the last data bit is put on the DI pin,

CS must be brought low before the next rising edge

of the CLK clock. This falling edge of CS initiates the

self-timed auto-erase and programming cycle.

The ERAL cycle takes (8 ms typical).

2.9

Write All (WRAL)

The WRAL instruction will write the entire memory array

with the data specified in the command. The WRAL

cycle is completely self-timed and commences at the

falling edge of the CS. Clocking of the CLK pin is not

necessary after the device has entered the self clock-

ing mode. The WRAL command does include an auto-

matic ERAL cycle for the device. Therefore, the WRAL

instruction does not require an ERAL instruction but the

chip must be in the EWEN status. The WRAL instruction

is ensured at 5V ±10%.

The DO pin indicates the Ready/Busy status of the

device if CS is brought high after a minimum of 250 ns

low (TCSL) and before the entire write cycle is complete.

DO at logical “0” indicates that programming is still in

progress. DO at logical “1” indicates that the register at

the specified address has been written with the data

specified and the device is ready for another

instruction.

The write cycle takes 4 ms per word typical.

The DO pin indicates the Ready/Busy status of the

device if CS is brought high after a minimum of 250 ns

low (Tcsl).

2.8

Erase All (ERAL)

The ERAL instruction will erase the entire memory array

to the logical “1” state. The ERAL cycle is identical to

the ERASE cycle except for the different opcode. The

ERAL cycle is completely self-timed and commences

at the falling edge of the CS. Clocking of the CLK pin is

not necessary after the device has entered the self

clocking mode. The ERAL instruction is ensured at 5V

±10%.

The WRAL cycle takes 16 ms typical.

FIGURE 2-1:

READ TIMING

CS

CLK

DI

A0

An •••

1

0

High-Z

DO

0

Dx ••• D0 Dx

••• D0 Dx

••• D0

 2004 Microchip Technology Inc.

DS21712B-page 7

93LC46/56/66

FIGURE 2-2:

EWEN TIMING

6

CS

1

0

1

X

•••

X

DI

FIGURE 2-3:

CS

EWDS TIMING

6

CLK

•••

1

0

X

DI

FIGURE 2-4:

WRITE TIMING

6

CS

CLK

0

1

An

A0 Dx

D0

•••

DI

11

High-Z

Busy

Ready

DO

12

DS21712B-page 8

 2004 Microchip Technology Inc.

93LC46/56/66

FIGURE 2-5:

WRAL TIMING

6

CS

CLK

DI

1

X

1

0

•••

Dx

•••

0

X

D0

0

10

11

High-Z

Busy

Ready

DO

High-Z

14

Ensured by Characterization at VCC = 4.5V to +5.5V.

FIGURE 2-6:

ERASE TIMING

6

CS

Check Status

CLK

DI

1

An

An-1 An-2

•••

A0

1

11

10

High-Z

DO

Busy

Ready

High-Z

12

FIGURE 2-7:

ERAL TIMING

6

CS

Check Status

CLK

DI

1

0

1

0

X

•••

11

10

High-Z

DO

Busy

Ready

High-Z

Ensured by Characterization at Vcc = 4.5V to +5.5V.

13

 2004 Microchip Technology Inc.

DS21712B-page 9

93LC46/56/66

3.0

PIN DESCRIPTION

The descriptions of the pins are listed in Table 3-1.

TABLE 3-1:

Name

PIN FUNCTION TABLE

PDIP

ROTATED

TSSOP

SOIC

Description

CS

1

2

3

4

5

6

7

8

1

2

3

4

5

6

7

8

3

4

5

6

7

8

1

2

Chip Select

CLK

DI

Serial Data Clock

Serial Data Input

Serial Data Output

Ground

DO

VSS

ORG

NU

Memory Configuration

Not Utilized

Vcc

+1.8V to 5.5V Power Supply

3.1

Chip Select (CS)

Note:

CS must go low between consecutive

instructions.

A high level selects the device. A low level deselects

the device and forces it into Standby mode. However, a

programming cycle which is already initiated and/or in

progress will be completed, regardless of the CS input

signal. If CS is brought low during a program cycle, the

device will go into Standby mode as soon as the

programming cycle is completed.

3.3

Data In (DI)

Data In is used to clock in a Start bit, opcode, address

and data synchronously with the CLK input.

3.4

Data Out (DO)

CS must be low for 250 ns minimum (TCSL) between

consecutive instructions. If CS is low, the internal

control logic is held in a Reset status.

Data Out is used in the Read mode to output data syn-

chronously with the CLK input (TPD after the positive

edge of CLK).

3.2

Serial Clock (CLK)

This pin also provides Ready/Busy status information

during erase and write cycles. Ready/Busy status infor-

mation is available on the DO pin if CS is brought high

after being low for minimum chip select low time (TCSL)

and an erase or write operation has been initiated.

The serial clock is used to synchronize the communica-

tion between a master device and the 93LC46/56/66.

Opcode, address and data bits are clocked in on the

positive edge of CLK. Data bits are also clocked out on

the positive edge of CLK.

The Status signal is not available on DO, if CS is held

low or high during the entire write or erase cycle. In all

other cases DO is in the High-Z mode. If status is

checked after the write/erase cycle, a pull-up resistor

on DO is required to read the Ready signal.

CLK can be stopped anywhere in the transmission

sequence (at high or low level) and can be continued

anytime with respect to clock high time (TCKH) and

clock low time (TCKL). This gives the controlling master

freedom in preparing opcode, address and data.

3.5

Organization (ORG)

CLK is a “don't care” if CS is low (device deselected). If

CS is high, but Start condition has not been detected,

any number of clock cycles can be received by the

device without changing its status (i.e., waiting for Start

condition).

When ORG is connected to VCC, the (x16) memory

organization is selected. When ORG is tied to VSS, the

(x8) memory organization is selected. ORG can only be

floated for clock speeds of 1 MHz or less for the (x16)

memory organization. For clock speeds greater than

1 MHz, ORG must be tied to VCC or VSS.

CLK cycles are not required during the self-timed write

(i.e., auto erase/write) cycle.

After detection of a Start condition the specified number

of clock cycles (respectively low-to-high transitions of

CLK) must be provided. These clock cycles are required

to clock in all required opcode, address and data bits

before an instruction is executed (see instruction set

truth table). CLK and DI then become “don't care” inputs

waiting for a new Start condition to be detected.

DS21712B-page 10

 2004 Microchip Technology Inc.

93LC46/56/66

4.0

4.1

PACKAGING INFORMATION

Package Marking Information

8-Lead PDIP (300 mil)

Example:

XXXXXXXX

XXXXXNNN

93LC46

I/PNNN

YYWW

8-Lead SOIC (150 mil)

Example:

XXXXXXXX

93LC46

XXXXYYWW

I/SNYYWW

NNN

8-Lead Rotated SOIC (150 mil)

Example:

XXXXXXXX

93LC46X

XXXXYYWW

I/SNYYWW

NNN

Legend: XX...X Customer specific information*

YY

WW

NNN

Year code (last 2 digits of calendar year)

Week code (week of January 1 is week ‘01’)

Alphanumeric traceability code

Note: In the event the full Microchip part number cannot be marked on one line, it will

be carried over to the next line thus limiting the number of available characters

for customer specific information.

*

Standard OTP marking consists of Microchip part number, year code, week code, and traceability code.

 2004 Microchip Technology Inc.

DS21712B-page 11

93LC46/56/66

8-Lead Plastic Dual In-line (P) – 300 mil (PDIP)

E1

D

2

n

1

α

E

A2

A

L

c

A1

β

B1

B

p

eB

Units

INCHES*

NOM

MILLIMETERS

Dimension Limits

MIN

MAX

MIN

NOM

8

MAX

n

p

Number of Pins

Pitch

8

.100

.155

.130

2.54

Top to Seating Plane

A

.140

.170

3.56

2.92

3.94

3.30

4.32

Molded Package Thickness

Base to Seating Plane

Shoulder to Shoulder Width

Molded Package Width

Overall Length

A2

A1

E

.115

.015

.300

.240

.360

.125

.008

.045

.014

.310

5

.145

3.68

0.38

7.62

6.10

9.14

3.18

0.20

1.14

0.36

7.87

5

.313

.250

.373

.130

.012

.058

.018

.370

10

.325

.260

.385

.135

.015

.070

.022

.430

15

7.94

6.35

9.46

3.30

0.29

1.46

0.46

9.40

10

8.26

6.60

9.78

3.43

0.38

1.78

0.56

10.92

15

E1

D

Tip to Seating Plane

Lead Thickness

L

c

Upper Lead Width

B1

B

Lower Lead Width

Overall Row Spacing

Mold Draft Angle Top

Mold Draft Angle Bottom

§

eB

α

β

5

10

15

5

10

15

* Controlling Parameter

§ Significant Characteristic

Notes:

Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed

.010” (0.254mm) per side.

JEDEC Equivalent: MS-001

Drawing No. C04-018

DS21712B-page 12

 2004 Microchip Technology Inc.

93LC46/56/66

8-Lead Plastic Small Outline (SN) – Narrow, 150 mil (SOIC)

E

E1

p

D

2

B

n

1

h

α

45×

c

A2

A

f

β

L

A1

Units

INCHES*

NOM

MILLIMETERS

Dimension Limits

MIN

MAX

MIN

NOM

MAX

n

p

Number of Pins

Pitch

8

.050

.061

.056

.007

.237

.154

.193

.015

.025

4

1.27

1.55

1.42

0.18

6.02

3.91

4.90

0.38

0.62

4

Overall Height

A

.053

.069

1.35

1.75

Molded Package Thickness

Standoff

A2

A1

E

.052

.004

.228

.146

.189

.010

.019

0

.061

.010

.244

.157

.197

.020

.030

8

1.32

0.10

5.79

3.71

4.80

0.25

0.48

0

1.55

0.25

6.20

3.99

5.00

0.51

0.76

8

§

Overall Width

Molded Package Width

Overall Length

E1

D

h

Chamfer Distance

Foot Length

L

f

Foot Angle

c

Lead Thickness

Lead Width

.008

.013

0

.009

.017

12

.010

.020

15

0.20

0.33

0

0.23

0.42

12

0.25

0.51

15

B

α

Mold Draft Angle Top

Mold Draft Angle Bottom

β

0

12

15

0

12

15

* Controlling Parameter

§ Significant Characteristic

Notes:

Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed

.010” (0.254mm) per side.

JEDEC Equivalent: MS-012

Drawing No. C04-057

 2004 Microchip Technology Inc.

DS21712B-page 13

93LC46/56/66

APPENDIX A: REVISION HISTORY

Revision B

Added note to page 1 header (Not recommended for

new designs).

Updated document format.

DS21712B-page 14

 2004 Microchip Technology Inc.

93LC46/56/66

ON-LINE SUPPORT

SYSTEMS INFORMATION AND

UPGRADE HOT LINE

Microchip provides on-line support on the Microchip

World Wide Web site.

The Systems Information and Upgrade Line provides

system users a listing of the latest versions of all of

Microchip's development systems software products.

Plus, this line provides information on how customers

can receive the most current upgrade kits. The Hot Line

Numbers are:

The web site is used by Microchip as a means to make

files and information easily available to customers. To

view the site, the user must have access to the Internet

and a web browser, such as Netscape^®or Microsoft^®

Internet Explorer. Files are also available for FTP

download from our FTP site.

1-800-755-2345 for U.S. and most of Canada, and

1-480-792-7302 for the rest of the world.

Connecting to the Microchip Internet

Web Site

042003

The Microchip web site is available at the following

URL:

www.microchip.com

The file transfer site is available by using an FTP

service to connect to:

ftp://ftp.microchip.com

The web site and file transfer site provide a variety of

services. Users may download files for the latest

Development Tools, Data Sheets, Application Notes,

User's Guides, Articles and Sample Programs. A vari-

ety of Microchip specific business information is also

available, including listings of Microchip sales offices,

distributors and factory representatives. Other data

available for consideration is:

• Latest Microchip Press Releases

• Technical Support Section with Frequently Asked

Questions

• Design Tips

• Device Errata

• Job Postings

• Microchip Consultant Program Member Listing

• Links to other useful web sites related to

Microchip Products

• Conferences for products, Development Systems,

technical information and more

• Listing of seminars and events

 2004 Microchip Technology Inc.

DS21712B-page 15

93LC46/56/66

READER RESPONSE

It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip prod-

uct. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation

can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-4150.

Please list the following information, and use this outline to provide us with your comments about this document.

To:

Technical Publications Manager

Reader Response

Total Pages Sent ________

RE:

From:

Name

Company

Address

City / State / ZIP / Country

Telephone: (_______) _________ - _________

FAX: (______) _________ - _________

Application (optional):

Would you like a reply?

Y

N

93LC46/56/66

DS21712B

Literature Number:

Device:

Questions:

1. What are the best features of this document?

2. How does this document meet your hardware and software development needs?

3. Do you find the organization of this document easy to follow? If not, why?

4. What additions to the document do you think would enhance the structure and subject?

5. What deletions from the document could be made without affecting the overall usefulness?

6. Is there any incorrect or misleading information (what and where)?

7. How would you improve this document?

DS21712B-page 16

 2004 Microchip Technology Inc.

93LC46/56/66

PRODUCT IDENTIFICATION SYSTEM

To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.

PART NO.

Device

X

/XX

XXX

Examples:

Temperature

Range

Package

Pattern

a) 93LC46-I/P: 1K, 128x8 or 64x16 Serial

EEPROM, PDIP package

b) 93LC46-I/SN: 1K, 128x8 or 64x16 Serial

EEPROM, SOIC package

Device

93LC46: 1K 2.5V Microwire Serial EEPROM

93LC46X: 1K 2.5V Microwire Serial EEPROM in

alternate pinouts (SN package only)

93LC46T: 1K 2.5V Microwire Serial EEPROM

(Tape and Reel)

c) 93LC46T-I/SN: 1K, 128x8 or 64x16

Serial EEPROM, SOIC package, tape

and reel

d) 93LC46X-I/SN: 1K, 128x8 or 64x16

Serial EEPROM, Rotated SOIC package

93LC46XT: 1K 2.5V Microwire Serial EEPROM

(Tape and Reel)

e) 93LC56-I/P: 2K, 256x8 or 128x16 Serial

EEPROM, PDIP package

93LC56: 2K 2.5V Microwire Serial EEPROM

93LC56X: 2K 2.5V Microwire Serial EEPROM in

alternate pinouts (SN package only)

93LC56T: 2K 2.5V Microwire Serial EEPROM

(Tape and Reel)

f)

93LC56-I/SN: 2K, 256x8 or 128x16

Serial EEPROM, SOIC package

g) 93LC56T-I/SN: 2K, 256x8 or 128x16

Serial EEPROM, SOIC package, tape

and reel

93LC56XT:2K 2.5V Microwire Serial EEPROM

(Tape and Reel)

h) 93LC56X-I/SN: 2K, 256x8 or 128x16

Serial EEPROM, Rotated SOIC package

93LC66: 4K 2.5V Microwire Serial EEPROM

93LC66X: 4K 2.5V Microwire Serial EEPROM in

alternate pinouts (SN package only)

93LC66T: 4K 2.5V Microwire Serial EEPROM

(Tape and Reel)

i)

93LC66-I/P: 4K, 512x8 or 256x16 Serial

EEPROM, PDIP package

j)

93LC66-I/SN: 4K, 512x8 or 256x16

Serial EEPROM, SOIC package

93LC66XT: 4K 2.5V Microwire Serial EEPROM

(Tape and Reel)

k) 93LC66T-I/SN: 4K, 512x8 or 256x16

Serial EEPROM, SOIC package, tape

and reel

Temperature

Range

I

= -40°C to +85°C

l)

93LC66X-I/SN: 4K, 512x8 or 256x16

Serial EEPROM, Rotated SOIC package

Package

P

SN

=

Plastic DIP (300 mil body), 8-lead

Plastic SOIC (150 mil body), 8-lead

Sales and Support

Data Sheets

Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and

recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following:

1. Your local Microchip sales office

2. The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277

3. The Microchip Worldwide Site (www.microchip.com)

Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using.

New Customer Notification System

Register on our web site (www.microchip.com/cn) to receive the most current information on our products.

 2004 Microchip Technology Inc.

DS21712B-page 17

93LC46/56/66

NOTES:

DS21712B-page 18

 2004 Microchip Technology Inc.

Note the following details of the code protection feature on Microchip devices:

•

Microchip products meet the specification contained in their particular Microchip Data Sheet.

•

Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the

intended manner and under normal conditions.

•

There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our

knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data

Sheets. Most likely, the person doing so is engaged in theft of intellectual property.

•

Microchip is willing to work with the customer who is concerned about the integrity of their code.

Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not

mean that we are guaranteeing the product as “unbreakable.”

Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our

products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts

allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.

Information contained in this publication regarding device

applications and the like is intended through suggestion only

and may be superseded by updates. It is your responsibility to

ensure that your application meets with your specifications.

No representation or warranty is given and no liability is

assumed by Microchip Technology Incorporated with respect

to the accuracy or use of such information, or infringement of

patents or other intellectual property rights arising from such

use or otherwise. Use of Microchip’s products as critical

components in life support systems is not authorized except

with express written approval by Microchip. No licenses are

conveyed, implicitly or otherwise, under any intellectual

property rights.

Trademarks

The Microchip name and logo, the Microchip logo, Accuron,

dsPIC, KEELOQ, microID, MPLAB, PIC, PICmicro, PICSTART,

PRO MATE, PowerSmart, rfPIC, and SmartShunt are

registered trademarks of Microchip Technology Incorporated

in the U.S.A. and other countries.

AmpLab, FilterLab, MXDEV, MXLAB, PICMASTER, SEEVAL,

SmartSensor and The Embedded Control Solutions Company

are registered trademarks of Microchip Technology

Incorporated in the U.S.A.

Analog-for-the-Digital Age, Application Maestro, dsPICDEM,

dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR,

FanSense, FlexROM, fuzzyLAB, In-Circuit Serial

Programming, ICSP, ICEPIC, Migratable Memory, MPASM,

MPLIB, MPLINK, MPSIM, PICkit, PICDEM, PICDEM.net,

PICLAB, PICtail, PowerCal, PowerInfo, PowerMate,

PowerTool, rfLAB, rfPICDEM, Select Mode, Smart Serial,

SmartTel and Total Endurance are trademarks of Microchip

Technology Incorporated in the U.S.A. and other countries.

SQTP is a service mark of Microchip Technology Incorporated

in the U.S.A.

All other trademarks mentioned herein are property of their

respective companies.

Printed on recycled paper.

Microchip received ISO/TS-16949:2002 quality system certification for

its worldwide headquarters, design and wafer fabrication facilities in

Chandler and Tempe, Arizona and Mountain View, California in

October 2003. The Company’s quality system processes and

procedures are for its PICmicro^®8-bit MCUs, KEELOQ^®code hopping

devices, Serial EEPROMs, microperipherals, nonvolatile memory and

analog products. In addition, Microchip’s quality system for the design

and manufacture of development systems is ISO 9001:2000 certified.

 2004 Microchip Technology Inc.

DS21712B-page 19

WORLDWIDE SALES AND SERVICE

China - Beijing

Singapore

AMERICAS

Corporate Office

2355 West Chandler Blvd.

Chandler, AZ 85224-6199

Tel: 480-792-7200

Fax: 480-792-7277

Technical Support: 480-792-7627

Web Address: www.microchip.com

Unit 706B

200 Middle Road

Wan Tai Bei Hai Bldg.

No. 6 Chaoyangmen Bei Str.

Beijing, 100027, China

Tel: 86-10-85282100

Fax: 86-10-85282104

#07-02 Prime Centre

Singapore, 188980

Tel: 65-6334-8870 Fax: 65-6334-8850

Taiwan

Kaohsiung Branch

30F - 1 No. 8

Min Chuan 2nd Road

Kaohsiung 806, Taiwan

Tel: 886-7-536-4816

Fax: 886-7-536-4817

China - Chengdu

Rm. 2401-2402, 24th Floor,

Ming Xing Financial Tower

No. 88 TIDU Street

Chengdu 610016, China

Tel: 86-28-86766200

Atlanta

3780 Mansell Road, Suite 130

Alpharetta, GA 30022

Tel: 770-640-0034

Fax: 770-640-0307

Taiwan

Taiwan Branch

Fax: 86-28-86766599

Boston

11F-3, No. 207

China - Fuzhou

Unit 28F, World Trade Plaza

No. 71 Wusi Road

Fuzhou 350001, China

Tel: 86-591-7503506

Fax: 86-591-7503521

2 Lan Drive, Suite 120

Westford, MA 01886

Tel: 978-692-3848

Fax: 978-692-3821

Tung Hua North Road

Taipei, 105, Taiwan

Tel: 886-2-2717-7175 Fax: 886-2-2545-0139

Taiwan

Taiwan Branch

13F-3, No. 295, Sec. 2, Kung Fu Road

Hsinchu City 300, Taiwan

Tel: 886-3-572-9526

Chicago

333 Pierce Road, Suite 180

Itasca, IL 60143

Tel: 630-285-0071

Fax: 630-285-0075

China - Hong Kong SAR

Unit 901-6, Tower 2, Metroplaza

223 Hing Fong Road

Kwai Fong, N.T., Hong Kong

Tel: 852-2401-1200

Fax: 852-2401-3431

Fax: 886-3-572-6459

Dallas

EUROPE

Austria

Durisolstrasse 2

A-4600 Wels

Austria

Tel: 43-7242-2244-399

Fax: 43-7242-2244-393

Denmark

Regus Business Centre

Lautrup hoj 1-3

Ballerup DK-2750 Denmark

Tel: 45-4420-9895 Fax: 45-4420-9910

France

Parc d’Activite du Moulin de Massy

43 Rue du Saule Trapu

Batiment A - ler Etage

91300 Massy, France

Tel: 33-1-69-53-63-20

Fax: 33-1-69-30-90-79

16200 Addison Road, Suite 255

Addison Plaza

China - Shanghai

Room 701, Bldg. B

Far East International Plaza

No. 317 Xian Xia Road

Shanghai, 200051

Addison, TX 75001

Tel: 972-818-7423

Fax: 972-818-2924

Detroit

Tel: 86-21-6275-5700

Fax: 86-21-6275-5060

Tri-Atria Office Building

32255 Northwestern Highway, Suite 190

Farmington Hills, MI 48334

Tel: 248-538-2250

China - Shenzhen

Rm. 1812, 18/F, Building A, United Plaza

No. 5022 Binhe Road, Futian District

Shenzhen 518033, China

Tel: 86-755-82901380

Fax: 86-755-8295-1393

China - Shunde

Fax: 248-538-2260

Kokomo

2767 S. Albright Road

Kokomo, IN 46902

Tel: 765-864-8360

Fax: 765-864-8387

Room 401, Hongjian Building, No. 2

Fengxiangnan Road, Ronggui Town, Shunde

District, Foshan City, Guangdong 528303, China

Tel: 86-757-28395507 Fax: 86-757-28395571

Los Angeles

25950 Acero St., Suite 200

Mission Viejo, CA 92691

Tel: 949-462-9523

Germany

China - Qingdao

Rm. B505A, Fullhope Plaza,

No. 12 Hong Kong Central Rd.

Qingdao 266071, China

Tel: 86-532-5027355 Fax: 86-532-5027205

Steinheilstrasse 10

D-85737 Ismaning, Germany

Tel: 49-89-627-144-0

Fax: 49-89-627-144-44

Fax: 949-462-9608

San Jose

1300 Terra Bella Avenue

Mountain View, CA 94043

Tel: 650-215-1444

Italy

India

Via Salvatore Quasimodo, 12

20025 Legnano (MI)

Milan, Italy

Divyasree Chambers

1 Floor, Wing A (A3/A4)

No. 11, O’Shaugnessey Road

Bangalore, 560 025, India

Tel: 91-80-22290061 Fax: 91-80-22290062

Japan

Fax: 650-961-0286

Tel: 39-0331-742611

Fax: 39-0331-466781

Netherlands

Waegenburghtplein 4

NL-5152 JR, Drunen, Netherlands

Tel: 31-416-690399

Toronto

6285 Northam Drive, Suite 108

Mississauga, Ontario L4V 1X5, Canada

Tel: 905-673-0699

Yusen Shin Yokohama Building 10F

3-17-2, Shin Yokohama, Kohoku-ku,

Yokohama, Kanagawa, 222-0033, Japan

Tel: 81-45-471- 6166 Fax: 81-45-471-6122

Fax: 905-673-6509

Fax: 31-416-690340

ASIA/PACIFIC

Australia

Microchip Technology Australia Pty Ltd

Unit 32 41 Rawson Street

Epping 2121, NSW

Sydney, Australia

Tel: 61-2-9868-6733

Fax: 61-2-9868-6755

United Kingdom

505 Eskdale Road

Winnersh Triangle

Korea

168-1, Youngbo Bldg. 3 Floor

Samsung-Dong, Kangnam-Ku

Seoul, Korea 135-882

Wokingham

Berkshire, England RG41 5TU

Tel: 44-118-921-5869

Fax: 44-118-921-5820

Tel: 82-2-554-7200 Fax: 82-2-558-5932 or

82-2-558-5934

07/12/04

DS21712B-page 20

 2004 Microchip Technology Inc.


型号：	93LC46A-TI/MSG
厂家：	MICROCHIP
描述：	128 X 8 MICROWIRE BUS SERIAL EEPROM, PDSO8, LEAD FREE, PLASTIC, MO-187, MSOP-8 可编程只读存储器电动程控只读存储器电可擦编程只读存储器
文件：	总20页 (文件大小：330K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

93LC46A-TI/MSG [MICROCHIP]

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