93LC66A-E/SN_技术文档

93AA66A/B/C, 93LC66A/B/C,

93C66A/B/C

4K Microwire Compatible Serial EEPROM

Device Selection Table

Part Number

VCC Range

ORG Pin

Word Size

Temp Ranges

Packages

93AA66A

93AA66B

93LC66A

93LC66B

93C66A

1.8-5.5

1.8-5-5

2.5-5.5

4.5-5.5

1.8-5.5

2.5-5.5

4.5-5.5

No

8-bit

16-bit

I

P, SN, ST, MS, OT, MC

P, SN, ST, MS, MC

I

No

8-bit

I, E

I

No

16-bit

No

8-bit

93C66B

No

16-bit

93AA66C

93LC66C

93C66C

Yes

8 or 16-bit

I, E

P, SN, ST, MS, MC

Features:

Description:

• Low-power CMOS technology

The Microchip Technology Inc. 93XX66A/B/C devices

are 4K bit low-voltage serial Electrically Erasable

PROMs (EEPROM). Word-selectable devices such as

the 93AA66C, 93LC66C or 93C66C are dependent

upon external logic levels driving the ORG pin to set

word size. For dedicated 8-bit communication, the

93XX66A devices are available, while the 93XX66B

devices provide dedicated 16-bit communication.

Advanced CMOS technology makes these devices

ideal for low-power, nonvolatile memory applications.

The entire 93XX Series is available in standard

packages including 8-lead PDIP and SOIC, and

advanced packaging including 8-lead MSOP, 6-lead

SOT-23, 8-lead 2x3 DFN and 8-lead TSSOP. Pb-free

(Pure Matte Sn) finish is available.

• ORG pin to select word size for ‘66C’ version

• 512 x 8-bit organization ‘A’ ver. devices (no ORG)

• 256 x 16-bit organization ‘B’ ver. devices (no

ORG)

• Self-timed erase/write cycles (including

auto-erase)

• Automatic ERAL before WRAL

• Power-on/off data protection circuitry

• Industry standard 3-wire serial I/O

• Device Status signal (Ready/Busy)

• Sequential read function

• 1,000,000 E/W cycles

• Data retention > 200 years

• Temperature ranges supported:

- Industrial (I)

-40°C to +85°C

-40°C to +125°C

- Automotive (E)

Pin Function Table

Name

Function

CS

Chip Select

CLK

DI

Serial Data Clock

Serial Data Input

Serial Data Output

Ground

DO

VSS

NC

No internal connection

Memory Configuration

Power Supply

ORG

VCC

DS21795C-page 1

93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C

Package Types (not to scale)

ROTATED SOIC

PDIP/SOIC

(ex: 93LC46BX)

(P, SN)

NC

1

2

3

4

8

7

6

5

ORG*

CS

CLK

DI

VCC

NC

ORG

1

2

3

4

8

7

6

5

VCC

VSS

CS

DO

DI

*

CLK

DO

VSS

TSSOP/MSOP

(ST, MS)

SOT-23

(OT)

1

2

3

4

8

7

6

5

CS

CLK

DI

1

6

V

CC

NC

DO

V

CC

2

5

ORG*

VSS

CS

DO

VSS

3

4

DI

CLK

DFN

CS 1

VCC

8

7 NC

2

3

4

CLK

DI

DO

ORG*

VSS

6

5

* ORG pin is NC on A/B devices

DS21795C-page 2

93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C

1.0

ELECTRICAL CHARACTERISTICS

(†)

Absolute Maximum Ratings

VCC.............................................................................................................................................................................7.0V

All inputs and outputs w.r.t. VSS ..........................................................................................................-0.6V to VCC +1.0V

Storage temperature ...............................................................................................................................-65°C to +150°C

Ambient temperature with power applied................................................................................................-40°C to +125°C

ESD protection on all pins ......................................................................................................................................................≥ 4 kV

† NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the

device. This is a stress rating only and functional operation of the device at those or any other conditions above those

indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for

extended periods may affect device reliability.

TABLE 1-1:

DC CHARACTERISTICS

All parameters apply over the specified

ranges unless otherwise noted.

Industrial (I):

TA = -40°C to +85°C, VCC = +1.8V to +5.5V

Automotive (E): TA = -40°C to +125°C, VCC = +2.5V to +5.5V

Param.

No.

Symbol

Parameter

Min

Typ

Max

Units

Conditions

D1

VIH1

VIH2

High-level input voltage

2.0

0.7 VCC

—

VCC +1

V

VCC ≥ 2.7V

VCC < 2.7V

D2

D3

D4

VIL1

VIL2

Low-level input voltage

Low-level output voltage

High-level output voltage

-0.3

—

0.8

0.2 VCC

V

VCC ≥ 2.7V

VCC < 2.7V

VOL1

VOL2

—

0.4

0.2

V

IOL = 2.1 mA, VCC = 4.5V

IOL = 100 μA, VCC = 2.5V

VOH1

VOH2

2.4

VCC - 0.2

—

V

IOH = -400 μA, VCC = 4.5V

IOH = -100 μA, VCC = 2.5V

D5

D6

D7

ILI

Input leakage current

Output leakage current

—

±1

7

μA

pF

VIN = VSS or VCC

ILO

VOUT = VSS or VCC

CIN,

COUT

Pin capacitance (all inputs/

outputs)

VIN/VOUT = 0V (Note 1)

TA = 25°C, FCLK = 1 MHz

D8

D9

ICC write Write current

—

500

2

—

mA

μA

FCLK = 3 MHz, Vcc = 5.5V

FCLK = 2 MHz, Vcc = 2.5V

ICC read Read current

—

100

1

500

—

mA

μA

FCLK = 3 MHz, VCC = 5.5V

FCLK = 2 MHz, VCC = 3.0V

FCLK = 2 MHz, VCC = 2.5V

D10

D11

ICCS

Standby current

—

1

5

μA

I – Temp

E – Temp

CLK = Cs = 0V

ORG = DI = VSS or VCC

(Note 2) (Note 3)

VPOR

VCC voltage detect

93AA66A/B/C, 93LC66A/B/C

93C66A/B/C

—

1.5V

3.8V

—

V

(Note 1)

Note 1: This parameter is periodically sampled and not 100% tested.

2: ORG pin not available on ‘A’ or ‘B’ versions.

3: Ready/Busy status must be cleared from DO, see Section 3.4 "Data Out (DO)".

DS21795C-page 3

93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C

TABLE 1-2:

AC CHARACTERISTICS

All parameters apply over the specified

ranges unless otherwise noted.

Industrial (I):

TA = -40°C to +85°C, VCC = +1.8V to +5.5V

Automotive (E): TA = -40°C to +125°C, VCC = +2.5V to +5.5V

Param.

No.

Symbol

Parameter

Clock frequency

Min

Max

Units

Conditions

A1

FCLK

—

3

2

1

MHz 4.5V ≤ VCC < 5.5V, 93XX66C only

MHz 2.5V ≤ VCC < 5.5V

MHz 1.8V ≤ VCC < 2.5V

A2

A3

A4

TCKH

TCKL

TCSS

Clock high time

200

250

450

—

ns

4.5V ≤ VCC < 5.5V, 93XX66C only

2.5V ≤ VCC < 5.5V

1.8V ≤ VCC < 2.5V

Clock low time

100

200

450

ns

4.5V ≤ VCC < 5.5V, 93XX66C only

2.5V ≤ VCC < 5.5V

1.8V ≤ VCC < 2.5V

Chip Select setup time

50

100

250

ns

4.5V ≤ VCC < 5.5V

2.5V ≤ VCC < 4.5V

1.8V ≤ VCC < 2.5V

A5

A6

A7

TCSH

TCSL

TDIS

Chip Select hold time

Chip Select low time

Data input setup time

0

—

ns

1.8V ≤ VCC < 5.5V

250

50

100

250

ns

4.5V ≤ VCC < 5.5V, 93XX66C only

2.5V ≤ VCC < 5.5V

1.8V ≤ VCC < 2.5V

A8

A9

TDIH

TPD

Data input hold time

50

100

250

—

ns

4.5V ≤ VCC < 5.5V, 93XX66C only

2.5V ≤ VCC < 5.5V

1.8V ≤ VCC < 2.5V

Data output delay time

—

200

250

400

ns

4.5V ≤ VCC < 5.5V, CL = 100 pF

2.5V ≤ VCC < 4.5V, CL = 100 pF

1.8V ≤ VCC < 2.5V, CL = 100 pF

A10

A11

TCZ

TSV

Data output disable time

Status valid time

—

100

200

ns

4.5V ≤ VCC < 5.5V, (Note 1)

1.8V ≤ VCC < 4.5V, (Note 1)

200

300

500

ns

4.5V ≤ VCC < 5.5V, CL = 100 pF

2.5V ≤ VCC < 4.5V, CL = 100 pF

1.8V ≤ VCC < 2.5V, CL = 100 pF

A12

A13

TWC

Program cycle time

—

6

ms

Erase/Write mode (AA and LC

versions)

2

ms

Erase/Write mode

(93C versions)

A14

A15

A16

TEC

TWL

—

6

ms

ERAL mode, 4.5V ≤ VCC ≤ 5.5V

WRAL mode, 4.5V ≤ VCC ≤ 5.5V

15

—

Endurance

1M

cycles 25°C, VCC = 5.0V, (Note 2)

Note 1: This parameter is periodically sampled and not 100% tested.

2: This application is not tested but ensured by characterization. For endurance estimates in a specific

application, please consult the Total Endurance™ Model which may be obtained from Microchip’s web site

at www.microchip.com.

DS21795C-page 4

93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C

FIGURE 1-1:

SYNCHRONOUS DATA TIMING

VIH

VIL

VIH

CS

TCSS

TCKH

TCKL

TCSH

CLK

VIL

TDIS

TDIH

VIH

VIL

DI

TCZ

TPD

VOH

DO

(Read)

VOL

VOH

TSV

DO

(Program)

Status Valid

VOL

Note: TSV is relative to CS.

TABLE 1-3: INSTRUCTION SET FOR X 16 ORGANIZATION (93XX66B OR 93XX66C WITH ORG = 1)

Instruction

SB Opcode

Address

Data In

Data Out Req. CLK Cycles

ERASE

ERAL

EWDS

EWEN

READ

WRITE

WRAL

1

11

00

10

01

00

A7 A6 A5 A4 A3 A2 A1 A0

1 0 X X X X X X

0 0 X X X X X X

1 1 X X X X X X

A7 A6 A5 A4 A3 A2 A1 A0

—

(RDY/BSY)

High-Z

11

27

High-Z

D15 – D0

A7 A6 A5 A4 A3 A2 A1 A0 D15 – D0 (RDY/BSY)

0 1 X X X X X X D15 – D0 (RDY/BSY)

TABLE 1-4: INSTRUCTION SET FOR X 8 ORGANIZATION (93XX66A OR 93XX66C WITH ORG = 0)

Req. CLK

Cycles

Instruction

SB Opcode

Address

Data In

Data Out

ERASE

ERAL

EWDS

EWEN

READ

WRITE

WRAL

1

11

00

10

01

00

A8 A7 A6 A5 A4 A3 A2 A1 A0

1 0 X X X X X X X

0 0 X X X X X X X

1 1 X X X X X X X

A8 A7 A6 A5 A4 A3 A2 A1 A0

—

(RDY/BSY)

High-Z

12

20

High-Z

D7 – D0

A8 A7 A6 A5 A4 A3 A2 A1 A0 D7 – D0 (RDY/BSY)

0 1 X X X X X X X D7 – D0 (RDY/BSY)

DS21795C-page 5

93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C

2.2

Data In/Data Out (DI/DO)

2.0

FUNCTIONAL DESCRIPTION

It is possible to connect the Data In and Data Out pins

together. However, with this configuration it is possible

for a “bus conflict” to occur during the “dummy zero”

that precedes the read operation, if A0 is a logic high

level. Under such a condition the voltage level seen at

Data Out is undefined and will depend upon the relative

impedances of Data Out and the signal source driving

A0. The higher the current sourcing capability of A0,

the higher the voltage at the Data Out pin. In order to

limit this current, a resistor should be connected

between DI and DO.

When the ORG* pin is connected to VCC, the (x16)

organization is selected. When it is connected to

ground, the (x8) organization is selected. Instructions,

addresses and write data are clocked into the DI pin on

the rising edge of the clock (CLK). The DO pin is

normally held in a High-Z state except when reading

data from the device, or when checking the Ready/

Busy status during a programming operation. The

Ready/Busy status can be verified during an Erase/

Write operation by polling the DO pin; DO low indicates

that programming is still in progress, while DO high

indicates the device is ready. DO will enter the High-Z

state on the falling edge of CS.

2.3

Data Protection

All modes of operation are inhibited when VCC is below

a typical voltage of 1.5V for ‘93AA’ and ‘93LC’ devices

or 3.8V for ‘93C’ devices.

2.1

Start Condition

The Start bit is detected by the device if CS and DI are

both high with respect to the positive edge of CLK for

the first time.

The EWEN and EWDS commands give additional

protection against accidentally programming during

normal operation.

Before a Start condition is detected, CS, CLK and DI

may change in any combination (except to that of a

Start condition), without resulting in any device

operation (Read, Write, Erase, EWEN, EWDS, ERAL

or WRAL). As soon as CS is high, the device is no

longer in Standby mode.

Note: For added protection, an EWDS command

should be performed after every write

operation.

After power-up, the device is automatically in the

EWDS mode. Therefore, an EWENinstruction must be

performed before the initial ERASEor WRITEinstruction

can be executed.

An instruction following a Start condition will only be

executed if the required opcode, address and data bits

for any particular instruction are clocked in.

Block Diagram

Note:

When preparing to transmit an instruction,

either the CLK or DI signal levels must be

at a logic low as CS is toggled active high.

VCC

VSS

Address

Decoder

Memory

Array

Address

Counter

DO

Output

Buffer

Data Register

DI

Mode

Decode

Logic

ORG*

CS

Clock

Register

CLK

*ORG input is not available on A/B devices

DS21795C-page 6

93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C

The DO pin indicates the Ready/Busy status of the

device if CS is brought high after a minimum of 250 ns

2.4

Erase

The ERASEinstruction forces all data bits of the speci-

fied address to the logical ‘1’ state. CS is brought low

following the loading of the last address bit. This falling

edge of the CS pin initiates the self-timed program-

ming cycle, except on ‘93C’ devices where the rising

edge of CLK before the last address bit initiates the

write cycle.

low (TCSL). DO at logical ‘0’ indicates that programming

is still in progress. DO at logical ‘1’ indicates that the

register at the specified address has been erased and

the device is ready for another instruction.

Note:

Issuing a Start bit and then taking CS low

will clear the Ready/Busy status from DO.

FIGURE 2-1:

ERASE TIMING FOR 93AA AND 93LC DEVICES

TCSL

CS

Check Status

CLK

DI

1

AN

AN-1 AN-2 •••

A0

TSV

TCZ

High-Z

Busy

Ready

DO

High-Z

TWC

FIGURE 2-2:

ERASE TIMING FOR 93C DEVICES

TCSL

CS

Check Status

CLK

DI

1

AN

AN-1 AN-2 •••

A0

TSV

TCZ

High-Z

Busy

Ready

DO

High-Z

TWC

DS21795C-page 7

93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C

The DO pin indicates the Ready/Busy status of the

device, if CS is brought high after a minimum of 250 ns

low (TCSL).

2.5

Erase All (ERAL)

The Erase All (ERAL) instruction will erase the entire

memory array to the logical ‘1’ state. The ERAL cycle

is identical to the erase cycle, except for the different

opcode. The ERAL cycle is completely self-timed and

commences at the falling edge of the CS, except on

‘93C’ devices where the rising edge of CLK before the

last data bit initiates the write cycle. Clocking of the

CLK pin is not necessary after the device has entered

the ERAL cycle.

Note:

Issuing a Start bit and then taking CS low

will clear the Ready/Busy status from DO.

VCC must be ≥ 4.5V for proper operation of ERAL.

FIGURE 2-3:

ERAL TIMING FOR 93AA AND 93LC DEVICES

TCSL

CS

Check Status

CLK

DI

1

0

1

0

x

•••

TSV

TCZ

High-Z

Busy

Ready

DO

High-Z

VCC must be ≥ 4.5V for proper operation of ERAL.

TEC

FIGURE 2-4:

ERAL TIMING FOR 93C DEVICES

TCSL

CS

Check Status

CLK

DI

1

0

1

0

x

•••

TSV

TCZ

High-Z

Busy

Ready

DO

High-Z

TEC

DS21795C-page 8

93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C

To protect against accidental data disturbance, the

EWDSinstruction can be used to disable all erase/write

functions and should follow all programming opera-

2.6

Erase/Write Disable and

Enable(EWDS/EWEN)

The 93XX66A/B/C powers up in the Erase/Write

Disable (EWDS) state. All Programming modes must be

preceded by an Erase/Write Enable (EWEN) instruction.

Once the EWEN instruction is executed, programming

remains enabled until an EWDSinstruction is executed

or Vcc is removed from the device.

tions. Execution of a READinstruction is independent of

both the EWENand EWDSinstructions.

FIGURE 2-5:

EWDS TIMING

TCSL

CS

CLK

DI

•••

1

0

x

FIGURE 2-6:

EWEN TIMING

TCSL

CS

CLK

DI

•••

1

0

1

x

devices) output string. The output data bits will toggle on

the rising edge of the CLK and are stable after the

specified time delay (TPD). Sequential read is possible

when CS is held high. The memory data will automati-

cally cycle to the next register and output sequentially.

2.7

Read

The READ instruction outputs the serial data of the

addressed memory location on the DO pin. A dummy

zero bit precedes the 8-bit (If ORG pin is low or A-Version

devices) or 16-bit (If ORG pin is high or B-version

FIGURE 2-7:

READ TIMING

CS

CLK

DI

•••

A0

An

1

0

High-Z

DO

0

Dx

D0

Dx

D0

Dx

D0

•••

DS21795C-page 9

93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C

The DO pin indicates the Ready/Busy status of the

2.8

Write

device, if CS is brought high after a minimum of 250 ns

low (TCSL). DO at logical ‘0’ indicates that programming

is still in progress. DO at logical ‘1’ indicates that the

register at the specified address has been written with

the data specified and the device is ready for another

instruction.

The WRITEinstruction is followed by 8 bits (If ORG is

low or A-version devices) or 16 bits (If ORG pin is high

or B-version devices) of data which are written into the

specified address. For 93AA66A/B/C and 93LC66A/B/C

devices, after the last data bit is clocked into DI, the

falling edge of CS initiates the self-timed auto-erase and

programming cycle. For 93C66A/B/C devices, the self-

timed auto-erase and programming cycle is initiated by

the rising edge of CLK on the last data bit.

Note:

Issuing a Start bit and then taking CS low

will clear the Ready/Busy status from DO.

FIGURE 2-8:

WRITE TIMING FOR 93AA AND 93LC DEVICES

TCSL

CS

CLK

DI

0

1

An

A0

Dx

D0

•••

TSV

TCZ

High-Z

Busy

Ready

DO

High-Z

TWC

FIGURE 2-9:

WRITE TIMING FOR 93C DEVICES

TCSL

CS

CLK

DI

0

1

An

A0

Dx

D0

•••

TSV

TCZ

High-Z

Busy

Ready

DO

High-Z

TWC

DS21795C-page 10

93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C

The DO pin indicates the Ready/Busy status of the

device if CS is brought high after a minimum of 250 ns

2.9

Write All (WRAL)

The Write All (WRAL) instruction will write the entire

memory array with the data specified in the command.

For 93AA66A/B/C and 93LC66A/B/C devices, after the

last data bit is clocked into DI, the falling edge of CS

initiates the self-timed auto-erase and programming

cycle. For 93C66A/B/C devices, the self-timed auto-

erase and programming cycle is initiated by the rising

edge of CLK on the last data bit. Clocking of the CLK

pin is not necessary after the device has entered the

WRAL cycle. The WRAL command does include an

automatic ERAL cycle for the device. Therefore, the

WRALinstruction does not require an ERALinstruction,

but the chip must be in the EWEN status.

low (TCSL).

Note:

Issuing a Start bit and then taking CS low

will clear the Ready/Busy status from DO.

VCC must be ≥ 4.5V for proper operation of WRAL.

FIGURE 2-10:

WRAL TIMING FOR 93AA AND 93LC DEVICES

TCSL

CS

CLK

0

1

x

1

•••

Dx

•••

DI

x

D0

TSV

TCZ

High-Z

Busy Ready

DO

High-Z

TWL

VCC must be ≥ 4.5V for proper operation of WRAL.

FIGURE 2-11:

WRAL TIMING FOR 93C DEVICES

TCSL

CS

CLK

DI

0

1

x

1

0

•••

Dx

•••

x

D0

TSV

TCZ

High-Z

Busy Ready

DO

High-Z

TWL

DS21795C-page 11

93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C

3.0

PIN DESCRIPTIONS

TABLE 3-1:

Name

PIN DESCRIPTIONS

SOIC/PDIP/

MSOP/TSSOP/

DFN

SOT-23

Rotated SOIC

Function

CS

1

2

3

4

5

6

5

4

3

4

5

6

7

8

Chip Select

Serial Clock

Data In

CLK

DI

3

DO

1

Data Out

Ground

VSS

2

ORG/NC

N/A

Organization / 93XX66C

No Internal Connection / 93XX66A/B

NC

7

8

N/A

6

1

2

No Internal Connection

Power Supply

VCC

data bits before an instruction is executed. CLK and DI

then become “don’t care” inputs waiting for a new Start

condition to be detected.

3.1

Chip Select (CS)

A high level selects the device; a low level deselects

the device and forces it into Standby mode. However, a

programming cycle which is already in progress will be

completed, regardless of the Chip Select (CS) input

signal. If CS is brought low during a program cycle, the

device will go into Standby mode as soon as the

programming cycle is completed.

3.3

Data In (DI)

Data In (DI) is used to clock in a Start bit, opcode,

address and data synchronously with the CLK input.

3.4

Data Out (DO)

CS must be low for 250 ns minimum (TCSL) between

consecutive instructions. If CS is low, the internal

control logic is held in a Reset status.

Data Out (DO) is used in the Read mode to output data

synchronously with the CLK input (TPD after the posi-

tive edge of CLK).

3.2

Serial Clock (CLK)

This pin also provides Ready/Busy status information

during erase and write cycles. Ready/Busy status infor-

mation is available on the DO pin if CS is brought high

after being low for minimum Chip Select Low Time

(TCSL) and an erase or write operation has been

initiated.

The Serial Clock is used to synchronize the communi-

cation between a master device and the 93XX series

device. Opcodes, address and data bits are clocked in

on the positive edge of CLK. Data bits are also clocked

out on the positive edge of CLK.

CLK can be stopped anywhere in the transmission

sequence (at high or low level) and can be continued

anytime with respect to Clock High Time (TCKH) and

Clock Low Time (TCKL). This gives the controlling

master freedom in preparing opcode, address and

data.

The Status signal is not available on DO, if CS is held

low during the entire erase or write cycle. In this case,

DO is in the High-Z mode. If status is checked after the

erase/write cycle, the data line will be high to indicate

the device is ready.

Note:

Issuing a Start bit and then taking CS low

will clear the Ready/Busy status from DO.

CLK is a “don’t care” if CS is low (device deselected). If

CS is high, but the Start condition has not been

detected (DI = 0), any number of clock cycles can be

received by the device without changing its status (i.e.,

waiting for a Start condition).

3.5

Organization (ORG)

When the ORG pin is connected to VCC or Logic HI, the

(x16) memory organization is selected. When the ORG

pin is tied to VSS or Logic LO, the (x8) memory

organization is selected. For proper operation, ORG

must be tied to a valid logic level.

CLK cycles are not required during the self-timed write

(i.e., auto erase/write) cycle.

After detection of a Start condition the specified number

of clock cycles (respectively low-to-high transitions of

CLK) must be provided. These clock cycles are

required to clock in all required opcode, address and

93XX66A devices are always x8 organization and

93XX66B devices are always x16 organization.

DS21795C-page 12

93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C

4.0

4.1

PACKAGING INFORMATION

Package Marking Information

8-Lead MSOP (150 mil)

Example:

3L66BI

5281L7

XXXXXXT

YWWNNN

Example:

3EL7

6-Lead SOT-23

XXNN

Example:

93LC66B

8-Lead PDIP

XXXXXXXX

T/XXXNNN

I/P

1L7

e

3

0528

YYWW

Example:

93LC66BI

8-Lead SOIC

XXXXXXXT

SN

0528

3

e

XXXXYYWW

1L7

NNN

Example:

8-Lead TSSOP

L66B

I528

1L7

XXXX

TYWW

NNN

Example:

8-Lead 2x3 DFN

374

528

L7

XXX

YWW

NN

DS21795C-page 13

93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C

1st Line Marking Codes

Part Number

SOT-23

DFN

TSSOP

MSOP

I Temp.

E Temp.

—

I Temp.

361

E Temp.

—

93AA66A

93AA66B

93AA66C

93LC66A

93LC66B

93LC66C

93C66A

A66A

A66B

A66C

L66A

L66B

L66C

C66A

C66B

C66C

3A66AT

3A66BT

3A66CT

3L66AT

3L66BT

3L66CT

3C66AT

3C66BT

3C66CT

3BNN

3LNN

—

371

—

381

—

3ENN

3PNN

—

3FNN

3RNN

—

364

365

375

385

368

378

388

374

384

3HNN

3TNN

—

3JNN

3UNN

—

367

93C66B

377

93C66C

387

Note:

T = Temperature grade (I, E)

NN = Alphanumeric traceability code

Legend: XX...X Part number or part number code

T

Temperature (I, E)

Y

Year code (last digit of calendar year)

YY

WW

NNN

Year code (last 2 digits of calendar year)

Week code (week of January 1 is week ‘01’)

Alphanumeric traceability code (2 characters for small packages)

Pb-free JEDEC designator for Matte Tin (Sn)

e

3

Note: For very small packages with no room for the Pb-free JEDEC designator

, the marking will only appear on the outer carton or reel label.

e

3

Note: In the event the full Microchip part number cannot be marked on one line, it will

be carried over to the next line, thus limiting the number of available

characters for customer-specific information.

DS21795C-page 14

93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C

8-Lead Plastic Micro Small Outline Package (MS) (MSOP)

E

E1

p

D

2

B

n

1

α

A2

A

c

φ

A1

(F)

L

β

Units

Dimension Limits

INCHES

NOM

MILLIMETERS*

MIN

MAX

MIN

NOM

8

MAX

n

p

Number of Pins

Pitch

8

.026 BSC

0.65 BSC

Overall Height

A

A2

A1

E

-

.043

-

0.85

-

1.10

Molded Package Thickness

Standoff

.030

.033

.037

0.75

0.95

0.15

.000

-

.006

0.00

Overall Width

.193 TYP.

4.90 BSC

Molded Package Width

Overall Length

Foot Length

E1

D

.118 BSC

3.00 BSC

L

.016

.024

.037 REF

.031

0.40

0.60

0.95 REF

0.80

Footprint (Reference)

Foot Angle

F

φ

c

0°

.003

.009

5°

-

8°

.009

.016

15°

0°

0.08

0.22

5°

-

8°

0.23

0.40

15°

Lead Thickness

Lead Width

.006

B

α

β

.012

Mold Draft Angle Top

Mold Draft Angle Bottom

*Controlling Parameter

Notes:

-

5°

15°

5°

15°

Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not

exceed .010" (0.254mm) per side.

JEDEC Equivalent: MO-187

Drawing No. C04-111

DS21795C-page 15

93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C

6-Lead Plastic Small Outline Transistor (OT) (SOT-23)

E

E1

B

p1

D

n

1

α

c

A

A2

φ

A1

L

β

Units

INCHES*

NOM

MILLIMETERS

Dimension Limits

MIN

MAX

MIN

NOM

6

MAX

n

p

Number of Pins

Pitch

6

.038

.075

.046

.043

.003

.110

.064

.116

.018

5

0.95

1.90

p1

Outside lead pitch (basic)

Overall Height

A

A2

A1

E

.035

.057

0.90

1.18

1.10

0.08

2.80

1.63

2.95

0.45

5

1.45

1.30

0.15

3.00

1.75

3.10

0.55

10

Molded Package Thickness

Standoff

.035

.000

.102

.059

.110

.014

0

.051

.006

.118

.069

.122

.022

10

0.00

2.60

1.50

2.80

0.35

0

Overall Width

Molded Package Width

Overall Length

Foot Length

E1

D

L

φ

Foot Angle

c

Lead Thickness

Lead Width

.004

.014

0

.006

.017

5

.008

.020

10

0.09

0.35

0

0.15

0.43

5

0.20

0.50

10

B

α

β

Mold Draft Angle Top

Mold Draft Angle Bottom

*Controlling Parameter

Notes:

0

5

10

0

5

10

Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not

exceed .005" (0.127mm) per side.

JEITA (formerly EIAJ) equivalent: SC-74A

Drawing No. C04-120

DS21795C-page 16

93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C

8-Lead Plastic Dual In-line (P) – 300 mil (PDIP)

E1

D

2

n

1

α

E

A2

A

L

c

A1

β

B1

B

p

eB

Units

INCHES*

NOM

MILLIMETERS

Dimension Limits

MIN

MAX

MIN

NOM

8

MAX

n

p

Number of Pins

Pitch

8

.100

.155

.130

2.54

Top to Seating Plane

A

.140

.170

3.56

2.92

3.94

3.30

4.32

Molded Package Thickness

Base to Seating Plane

Shoulder to Shoulder Width

Molded Package Width

Overall Length

A2

A1

E

.115

.015

.300

.240

.360

.125

.008

.045

.014

.310

5

.145

3.68

0.38

7.62

6.10

9.14

3.18

0.20

1.14

0.36

7.87

5

.313

.250

.373

.130

.012

.058

.018

.370

10

.325

.260

.385

.135

.015

.070

.022

.430

15

7.94

6.35

9.46

3.30

0.29

1.46

0.46

9.40

10

8.26

6.60

9.78

3.43

0.38

1.78

0.56

10.92

15

E1

D

Tip to Seating Plane

Lead Thickness

L

c

Upper Lead Width

B1

B

Lower Lead Width

Overall Row Spacing

Mold Draft Angle Top

Mold Draft Angle Bottom

§

eB

α

β

5

10

15

5

10

15

* Controlling Parameter

§ Significant Characteristic

Notes:

Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed

.010” (0.254mm) per side.

JEDEC Equivalent: MS-001

Drawing No. C04-018

DS21795C-page 17

93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C

8-Lead Plastic Small Outline (SN) – Narrow, 150 mil (SOIC)

E

E1

p

D

2

B

n

1

h

α

45°

c

A2

A

φ

β

L

A1

Units

INCHES*

NOM

MILLIMETERS

Dimension Limits

MIN

MAX

MIN

NOM

8

MAX

n

p

Number of Pins

Pitch

8

.050

.061

.056

.007

.237

.154

.193

.015

.025

4

1.27

Overall Height

A

.053

.069

1.35

1.32

1.55

1.42

0.18

6.02

3.91

4.90

0.38

0.62

4

1.75

Molded Package Thickness

Standoff

A2

A1

E

.052

.004

.228

.146

.189

.010

.019

0

.061

.010

.244

.157

.197

.020

.030

8

1.55

0.25

6.20

3.99

5.00

0.51

0.76

8

§

0.10

5.79

3.71

4.80

0.25

0.48

0

Overall Width

Molded Package Width

Overall Length

E1

D

Chamfer Distance

Foot Length

h

L

φ

Foot Angle

c

Lead Thickness

Lead Width

.008

.013

0

.009

.017

12

.010

.020

15

0.20

0.33

0

0.23

0.42

12

0.25

0.51

15

B

α

β

Mold Draft Angle Top

Mold Draft Angle Bottom

0

12

15

0

12

15

* Controlling Parameter

§ Significant Characteristic

Notes:

Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed

.010” (0.254mm) per side.

JEDEC Equivalent: MS-012

Drawing No. C04-057

DS21795C-page 18

93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C

8-Lead Plastic Thin Shrink Small Outline (ST) – 4.4 mm (TSSOP)

E

E1

p

D

2

1

n

B

α

A

c

A1

A2

φ

β

L

Units

INCHES

NOM

MILLIMETERS*

Dimension Limits

MIN

MAX

MIN

NOM

8

MAX

n

p

Number of Pins

Pitch

8

.026

0.65

Overall Height

A

.043

1.10

Molded Package Thickness

Standoff

A2

A1

E

.033

.035

.004

.251

.173

.118

.024

4

.037

.006

.256

.177

.122

.028

8

0.85

0.05

0.90

0.10

6.38

4.40

3.00

0.60

4

0.95

0.15

6.50

4.50

3.10

0.70

8

§

.002

.246

.169

.114

.020

0

Overall Width

6.25

4.30

2.90

0.50

0

Molded Package Width

Molded Package Length

Foot Length

E1

D

L

φ

Foot Angle

c

Lead Thickness

.004

.007

0

.006

.010

5

.008

.012

10

0.09

0.19

0

0.15

0.25

5

0.20

0.30

10

Lead Width

B

α

β

Mold Draft Angle Top

Mold Draft Angle Bottom

0

5

10

0

5

10

* Controlling Parameter

§ Significant Characteristic

Notes:

Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed

.005” (0.127mm) per side.

JEDEC Equivalent: MO-153

Drawing No. C04-086

DS21795C-page 19

93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C

8-Lead Plastic Dual Flat No Lead Package (MC) 2x3x0.9 mm Body (DFN) – Saw Singulated

p

D

b

n

L

E

E2

EXPOSED

METAL

PAD

2

1

PIN 1

ID INDEX

AREA

D2

(NOTE 2)

BOTTOM VIEW

TOP VIEW

A

A1

A3

EXPOSED

TIE BAR

(NOTE 1)

Units

Dimension Limits

INCHES

NOM

8

MILLIMETERS*

NOM

MIN

MAX

MIN

MAX

n

p

Number of Pins

Pitch

8

.020 BSC

0.50 BSC

0.90

Overall Height

Standoff

A

A1

A3

D

.031

.035

.001

.008 REF.

.039

.002

0.80

0.00

1.00

.000

0.02

0.05

Contact Thickness

Overall Length

0.20 REF.

2.00 BSC

--

.079 BSC

--

(Note 3)

Exposed Pad Length

Overall Width

D2

E

.055

.064

1.39

1.62

.118 BSC

--

3.00 BSC

--

(Note 3)

Exposed Pad Width

Contact Width

E2

b

.047

.008

.012

.071

.012

.020

1.20

0.20

0.30

1.80

0.30

0.50

.010

0.25

Contact Length

L

.016

0.40

*Controlling Parameter

Notes:

1. Package may have one or more exposed tie bars at ends.

2. Pin 1 visual index feature may vary, but must be located within the hatched area.

3. Exposed pad dimensions vary with paddle size.

4. JEDEC equivalent: MO-229

Drawing No. C04-123

Revised 05/24/04

DS21795C-page 20

93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C

APPENDIX A: REVISION HISTORY

Revision B

Corrections to Section 1.0, Electrical Characteristics.

Section 4.1, 6-Lead SOT-23 package to OT.

Revision C

Added DFN package.

DS21795C-page 21

93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C

NOTES:

DS21795C-page 22

93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C

THE MICROCHIP WEB SITE

CUSTOMER SUPPORT

Microchip provides online support via our WWW site at

www.microchip.com. This web site is used as a means

to make files and information easily available to

customers. Accessible by using your favorite Internet

browser, the web site contains the following

information:

Users of Microchip products can receive assistance

through several channels:

• Distributor or Representative

• Local Sales Office

• Field Application Engineer (FAE)

• Technical Support

• Product Support – Data sheets and errata,

application notes and sample programs, design

resources, user’s guides and hardware support

documents, latest software releases and archived

software

• Development Systems Information Line

Customers

should

contact

their

distributor,

representative or field application engineer (FAE) for

support. Local sales offices are also available to help

customers. A listing of sales offices and locations is

included in the back of this document.

• General Technical Support – Frequently Asked

Questions (FAQ), technical support requests,

online discussion groups, Microchip consultant

program member listing

Technical support is available through the web site

at: http://support.microchip.com

• Business of Microchip – Product selector and

ordering guides, latest Microchip press releases,

listing of seminars and events, listings of

Microchip sales offices, distributors and factory

representatives

In addition, there is

a

Development Systems

Information Line which lists the latest versions of

Microchip’s development systems software products.

This line also provides information on how customers

can receive currently available upgrade kits.

The Development Systems Information Line

numbers are:

CUSTOMER CHANGE NOTIFICATION

SERVICE

1-800-755-2345 – United States and most of Canada

1-480-792-7302 – Other International Locations

Microchip’s customer notification service helps keep

customers current on Microchip products. Subscribers

will receive e-mail notification whenever there are

changes, updates, revisions or errata related to a

specified product family or development tool of interest.

To register, access the Microchip web site at

www.microchip.com, click on Customer Change

Notification and follow the registration instructions.

DS21795C-page 23

93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C

READER RESPONSE

It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip prod-

uct. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation

can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-4150.

Please list the following information, and use this outline to provide us with your comments about this document.

To:

Technical Publications Manager

Reader Response

Total Pages Sent ________

RE:

From:

Name

Company

Address

City / State / ZIP / Country

Telephone: (_______) _________ - _________

FAX: (______) _________ - _________

Application (optional):

Would you like a reply?

Y

N

93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C

DS21795C

Literature Number:

Device:

Questions:

1. What are the best features of this document?

2. How does this document meet your hardware and software development needs?

3. Do you find the organization of this document easy to follow? If not, why?

4. What additions to the document do you think would enhance the structure and subject?

5. What deletions from the document could be made without affecting the overall usefulness?

6. Is there any incorrect or misleading information (what and where)?

7. How would you improve this document?

DS21795C-page 24

93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C

PRODUCT IDENTIFICATION SYSTEM

To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.

/XX

X

PART NO.

Device

X

Examples:

a)

b)

c)

93AA66C-I/MS: 4K, 512x8 or 256x16 Serial

EEPROM, MSOP package, 1.8V

93AA66B-I/MS: 4K, 256x16 Serial EEPROM,

MSOP package, 1.8V

Package

Lead Finish

Tape & Reel Temperature

Range

Pinout

93AA66AT-I/OT: 4K, 512x8 Serial EEPROM,

SOT-23 package, tape and reel, 1.8V

Device:

93AA66A: 4K 1.8V Microwire Serial EEPROM

93AA66B: 4K 1.8V Microwire Serial EEPROM

93AA66C: 4K 1.8V Microwire Serial EEPROM w/ORG

d)

93AA66CT-I/MS: 4K, 512x8 or 256x16 Serial

EEPROM, MSOP package, tape and reel, 1.8V

93LC66A: 4K 2.5V Microwire Serial EEPROM

93LC66B: 4K 2.5V Microwire Serial EEPROM

93LC66C: 4K 2.5V Microwire Serial EEPROM w/ORG

a)

b)

93LC66A-I/MS: 4K, 512x8 Serial EEPROM,

MSOP package, 2.5V

93LC66BT-I/OT: 4K, 256x16 Serial EEPROM,

SOT-23 package, tape and reel, 2.5V

93C66A: 4K 5.0V Microwire Serial EEPROM

93C66B: 4K 5.0V Microwire Serial EEPROM

93C66C: 4K 5.0V Microwire Serial EEPROM w/ORG

c)

93LC66B-I/MS: 4K, 256x16 Serial EEPROM,

MSOP package, 2.5V

Pinout:

Blank

X

=

Standard pinout

Rotated pinout

a)

b)

c)

93C66B-I/MS: 4K, 256x16 Serial EEPROM,

MSOP package, 5.0V

93C66C-I/MS: 4K, 512x8 or 256x16 Serial

EEPROM, MSOP package, 5.0V

93C66AT-I/OT: 4K, 512x8 Serial EEPROM,

SOT-23 package, tape and reel, 5.0V

Tape & Reel:

Blank

T

=

Standard packaging

Tape & Reel

Temperature Range:

Package:

I

E

=

-40°C to +85°C

-40°C to +125°C

MS

OT

P

SN

ST

MC

=

Plastic MSOP (Micro Small outline, 8-lead)

SOT-23, 6-lead (Tape & Reel only)

Plastic DIP (300 mil body), 8-lead

Plastic SOIC (150 mil body), 8-lead

TSSOP, 8-lead

2x3 DFN, 8-lead

Lead Finish:

Blank

G

=

Pb-free – Matte Tin (see Note 1)

Pb-free – Matte Tin only

Note 1: Most products manufactured after January 2005 will have a Matte Tin (Pb-free) finish. Most products manufactured

before January 2005 will have a finish of approximately 63% Sn and 37% Pb (Sn/Pb).

Please visit www.microchip.com for the latest information on Pb-free conversion, including conversion date codes.

Sales and Support

Data Sheets

Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences

and recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of

the following:

1. Your local Microchip sales office

2. The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277

3. The Microchip Worldwide Site (www.microchip.com)

Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using.

New Customer Notification System

Register on our web site (www.microchip.com/cn) to receive the most current information on our products.

DS21795C-page 25

93AA66A/B/C, 93LC66A/B/C, 93C66A/B/C

NOTES:

DS21795C-page 26

Note the following details of the code protection feature on Microchip devices:

•

Microchip products meet the specification contained in their particular Microchip Data Sheet.

•

Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the

intended manner and under normal conditions.

•

There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our

knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data

Sheets. Most likely, the person doing so is engaged in theft of intellectual property.

•

Microchip is willing to work with the customer who is concerned about the integrity of their code.

Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not

mean that we are guaranteeing the product as “unbreakable.”

Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our

products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts

allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.

Information contained in this publication regarding device

applications and the like is provided only for your convenience

and may be superseded by updates. It is your responsibility to

ensure that your application meets with your specifications.

MICROCHIP MAKES NO REPRESENTATIONS OR WAR-

RANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED,

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RELATED TO THE INFORMATION, INCLUDING BUT NOT

LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE,

MERCHANTABILITY OR FITNESS FOR PURPOSE.

Microchip disclaims all liability arising from this information and

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written approval by Microchip. No licenses are conveyed,

implicitly or otherwise, under any Microchip intellectual property

rights.

Trademarks

The Microchip name and logo, the Microchip logo, Accuron,

dsPIC, KEELOQ, microID, MPLAB, PIC, PICmicro, PICSTART,

PRO MATE, PowerSmart, rfPIC, and SmartShunt are

registered trademarks of Microchip Technology Incorporated

in the U.S.A. and other countries.

AmpLab, FilterLab, Migratable Memory, MXDEV, MXLAB,

PICMASTER, SEEVAL, SmartSensor and The Embedded

Control Solutions Company are registered trademarks of

Microchip Technology Incorporated in the U.S.A.

Analog-for-the-Digital Age, Application Maestro, dsPICDEM,

dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR,

FanSense, FlexROM, fuzzyLAB, In-Circuit Serial

Programming, ICSP, ICEPIC, MPASM, MPLIB, MPLINK,

MPSIM, PICkit, PICDEM, PICDEM.net, PICLAB, PICtail,

PowerCal, PowerInfo, PowerMate, PowerTool, rfLAB,

rfPICDEM, Select Mode, Smart Serial, SmartTel, Total

Endurance and WiperLock are trademarks of Microchip

Technology Incorporated in the U.S.A. and other countries.

SQTP is a service mark of Microchip Technology Incorporated

in the U.S.A.

All other trademarks mentioned herein are property of their

respective companies.

Printed on recycled paper.

Microchip received ISO/TS-16949:2002 quality system certification for

its worldwide headquarters, design and wafer fabrication facilities in

Chandler and Tempe, Arizona and Mountain View, California in

October 2003. The Company’s quality system processes and

procedures are for its PICmicro^®8-bit MCUs, KEELOQ^®code hopping

devices, Serial EEPROMs, microperipherals, nonvolatile memory and

analog products. In addition, Microchip’s quality system for the design

and manufacture of development systems is ISO 9001:2000 certified.

DS21795C-page 27

WORLDWIDE SALES AND SERVICE

AMERICAS

ASIA/PACIFIC

EUROPE

Corporate Office

Australia - Sydney

Tel: 61-2-9868-6733

Fax: 61-2-9868-6755

India - Bangalore

Tel: 91-80-2229-0061

Fax: 91-80-2229-0062

Austria - Weis

Tel: 43-7242-2244-399

Fax: 43-7242-2244-393

2355 West Chandler Blvd.

Chandler, AZ 85224-6199

Tel: 480-792-7200

Fax: 480-792-7277

Technical Support:

http://support.microchip.com

Web Address:

www.microchip.com

China - Beijing

Tel: 86-10-8528-2100

Fax: 86-10-8528-2104

Denmark - Ballerup

Tel: 45-4450-2828

Fax: 45-4485-2829

India - New Delhi

Tel: 91-11-5160-8631

Fax: 91-11-5160-8632

China - Chengdu

Tel: 86-28-8676-6200

Fax: 86-28-8676-6599

France - Massy

Tel: 33-1-69-53-63-20

Fax: 33-1-69-30-90-79

Japan - Kanagawa

Tel: 81-45-471- 6166

Fax: 81-45-471-6122

Atlanta

China - Fuzhou

Tel: 86-591-8750-3506

Fax: 86-591-8750-3521

Germany - Ismaning

Tel: 49-89-627-144-0

Fax: 49-89-627-144-44

Korea - Seoul

Alpharetta, GA

Tel: 770-640-0034

Fax: 770-640-0307

Tel: 82-2-554-7200

Fax: 82-2-558-5932 or

82-2-558-5934

Italy - Milan

Tel: 39-0331-742611

Fax: 39-0331-466781

China - Hong Kong SAR

Tel: 852-2401-1200

Fax: 852-2401-3431

Boston

Singapore

Tel: 65-6334-8870

Fax: 65-6334-8850

Westborough, MA

Tel: 774-760-0087

Fax: 774-760-0088

Netherlands - Drunen

Tel: 31-416-690399

Fax: 31-416-690340

China - Shanghai

Tel: 86-21-5407-5533

Fax: 86-21-5407-5066

China - Shenyang

Tel: 86-24-2334-2829

Fax: 86-24-2334-2393

Taiwan - Kaohsiung

Tel: 886-7-536-4818

Fax: 886-7-536-4803

Chicago

Itasca, IL

Tel: 630-285-0071

Fax: 630-285-0075

England - Berkshire

Tel: 44-118-921-5869

Fax: 44-118-921-5820

Taiwan - Taipei

Tel: 886-2-2500-6610

Fax: 886-2-2508-0102

Dallas

Addison, TX

China - Shenzhen

Tel: 86-755-8203-2660

Fax: 86-755-8203-1760

Tel: 972-818-7423

Fax: 972-818-2924

Taiwan - Hsinchu

Tel: 886-3-572-9526

Fax: 886-3-572-6459

China - Shunde

Detroit

Tel: 86-757-2839-5507

Fax: 86-757-2839-5571

Farmington Hills, MI

Tel: 248-538-2250

Fax: 248-538-2260

China - Qingdao

Tel: 86-532-502-7355

Fax: 86-532-502-7205

Kokomo

Kokomo, IN

Tel: 765-864-8360

Fax: 765-864-8387

Los Angeles

Mission Viejo, CA

Tel: 949-462-9523

Fax: 949-462-9608

San Jose

Mountain View, CA

Tel: 650-215-1444

Fax: 650-961-0286

Toronto

Mississauga, Ontario,

Canada

Tel: 905-673-0699

Fax: 905-673-6509

03/01/05

DS21795C-page 28


型号：	93LC66A-E/SN
厂家：	MICROCHIP
描述：	4K Microwire Compatible Serial EEPROM 4K的Microwire兼容串行EEPROM 可编程只读存储器电动程控只读存储器电可擦编程只读存储器
文件：	总28页 (文件大小：424K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

93LC66A-E/SN [MICROCHIP]

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