AT25080B-MEHL-T [MICROCHIP]
EEPROM, 1KX8, Serial;
| 型号： | AT25080B-MEHL-T |
| 厂家： | 
MICROCHIP |
| 描述： | EEPROM, 1KX8, Serial 可编程只读存储器 电动程控只读存储器 电可擦编程只读存储器 时钟 内存集成电路 |
| 文件： | 总25页 (文件大小：945K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
AT25080B and AT25160B
SPI Serial EEPROMs
8K (1,024 x 8) and 16K (2,048 x 8)
DATASHEET
Features
Serial Peripheral Interface (SPI) Compatible
Supports SPI Modes 0 (0,0) and 3 (1,1)
̶
Datasheet Describes Mode 0 Operation
Low-voltage and Standard-voltage Operation
1.8 (VCC = 1.8V to 5.5V)
̶
20MHz Clock Rate (5V)
32-byte Page Mode
Block Write Protection
̶
Protect 1/4, 1/2, or Entire Array
Write Protect (WP) Pin and Write Disable Instructions for Both Hardware and
Software Data Protection
Self-timed Write Cycle (5ms max)
High Reliability
̶
̶
Endurance: 1,000,000 Write Cycles
Data Retention: 100 Years
Green (Pb/Halide-free/RoHS Compliant) Packaging Options
Die Sales: Wafer Form, Tape and Reel, and Bumped Wafers
Description
The Atmel® AT25080B/160B provides 8,192/16,384 bits of Serial Electrically-
Erasable Programmable Read-Only Memory (EEPROM) organized as
1,024/2,048 words of 8 bits each. The device is optimized for use in many
industrial and commercial applications where low-power and low-voltage
operation are essential. The AT25080B/160B is available in space-saving 8-lead
JEDEC SOIC, 8-lead TSSOP, 8-pad UDFN, 8-pad XDFN, 8-ball VFBGA, and
8-ball WLCSP packages.
The AT25080B/160B is enabled through the Chip Select pin (CS) and accessed
via a 3-wire interface consisting of Serial Data Input (SI), Serial Data Output (SO),
and Serial Clock (SCK). All programming cycles are completely self-timed, and no
separate erase cycle is required before write.
Block Write protection is enabled by programming the status register with one of
four blocks of write protection. Separate program enable and program disable
instructions are provided for additional data protection. Hardware data protection
is provided via the WP pin to protect against inadvertent write attempts to the
status register. The HOLD pin may be used to suspend any serial communication
without resetting the serial sequence.
Atmel-5228G-SEEPROM-AT25080B-160B-Datasheet_012015
1.
Pin Configurations and Pinouts
Table 1.
Pin Configurations
8-lead TSSOP
(Top View)
8-lead SOIC
(Top View)
Pin Name Function
CS
SO
VCC
1
2
3
4
8
7
6
5
1
2
3
4
8
7
6
5
CS
SO
WP
VCC
CS
Chip Select
HOLD
SCK
SI
HOLD
SCK
SI
WP
GND
HOLD
SCK
SO
Ground
GND
GND
Suspends Serial Input
Serial Data Clock
Serial Data Output
Serial Data Input
Write Protect
8-ball VFBGA
(Top View)
8-pad UDFN/XDFN
(Top View)
SI
1
2
3
4
8
7
6
5
CS
SO
VCC
CS
SO
WP
VCC
1
2
3
4
8
7
6
5
WP
VCC
HOLD
SCK
SI
HOLD
SCK
SI
WP
Power Supply
GND
GND
8-ball WLSCP
(Top View)
GND
SO
SI
WP
SCK
VCC
HOLD
CS
Note: Drawings are not to scale.
2.
Absolute Maximum Ratings*
*Notice: Stresses beyond those listed under “Absolute
Operating Temperature . . . . . . . . . . .-55C to +125C
Maximum Ratings” may cause permanent damage
to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect device
reliability.
Storage Temperature . . . . . . . . . . . . .-65°C to +150°C
Voltage on Any Pin
with Respect to Ground . . . . . . . . . . . . -1.0V to +7.0V
Maximum Operating Voltage . . . . . . . . . . . . . . . 6.25V
DC Output Current . . . . . . . . . . . . . . . . . . . . . . .5.0mA
2
AT25080B/160B [DATASHEET]
Atmel-5228G-SEEPROM-AT25080B-160B-Datasheet_012015
3.
Block Diagram
Figure 3-1.
Block Diagram
VCC
GND
Status
Register
Memory Array
1,024/2,048 x 8
Address
Decoder
Data
Register
SI
Output
Buffer
Mode
Decode
Logic
CS
WP
Clock
Generator
SO
SCK
HOLD
AT25080B/160B [DATASHEET]
Atmel-5228G-SEEPROM-AT25080B-160B-Datasheet_012015
3
4.
Memory Organization
4.1
Pin Capacitance
Table 4-1.
Applicable over recommended operating range from TA = 25C, f = 1.0MHz, VCC = +5.0V (unless otherwise noted).
Pin Capacitance(1)
Symbol
COUT
CIN
Test Conditions
Max
8
Units
pF
Conditions
VOUT = 0V
VIN = 0V
Output Capacitance (SO)
Input Capacitance (CS, SCK, SI, WP, HOLD)
6
pF
Note:
1. This parameter is characterized and is not 100% tested.
4.2
DC Characteristics
Table 4-2.
DC Characteristics
Applicable over recommended operating range from TAI = -40°C to +85°C, VCC = 1.7V to 5.5V (unless otherwise noted).
Symbol Parameter
Test Condition
Min
1.8
2.5
4.5
Typ
Max
5.5
5.5
5.5
Units
VCC1
VCC2
VCC3
Supply Voltage
V
V
V
Supply Voltage
Supply Voltage
VCC = 5.0V at 20MHz,
SO = Open and Read
ICC1
ICC2
ICC3
Supply Current
Supply Current
Supply Current
7.5
4.0
4.0
10.0
10.0
6.0
mA
mA
mA
VCC = 5.0V at 20MHz,
SO = Open, Read, and Write
VCC = 5.0V at 5MHz,
SO = Open, Read, and Write
ISB1
ISB2
ISB3
IIL
Standby Current
Standby Current
Standby Current
Input Leakage
VCC = 1.8V, CS = VCC
VCC = 2.5V, CS = VCC
VCC = 5.0V, CS = VCC
VIN = 0V to VCC
< 0.1
0.3
6.0(2)
7.0(2)
μA
μA
μA
μA
μA
V
2.0
10.0(2)
3.0
-3.0
-3.0
IOL
Output Leakage
VIN = 0V to VCC, TAC = 0°C to 70°C
3.0
(1)
VIL
Input Low-voltage
Input High-voltage
Output Low-voltage
Output High-voltage
Output Low-voltage
Output High-voltage
-0.6
VCC x 0.3
VCC + 0.5
0.4
(1)
VIH
VCC x 0.7
V
VOL1
VOH1
VOL2
VOH2
IOL = 3.0mA
3.6V VCC 5.5V
V
IOH = 1.6mA
VCC - 0.8
VCC - 0.2
V
IOL = 0.15mA
1.8V VCC 3.6V
0.2
V
IOH = 100μA
V
Notes: 1. VIL min and VIH max are reference only and are not tested.
2. Worst case measured at 85C.
4
AT25080B/160B [DATASHEET]
Atmel-5228G-SEEPROM-AT25080B-160B-Datasheet_012015
4.3
AC Characteristics
Table 4-3.
AC Characteristics
Applicable over recommended operating range from TAI = -40C to +85C, VCC = as specified,
CL = 1 TTL gate and 100pF (unless otherwise noted).
Symbol
Parameter
Voltage
Min
Max
Units
4.5 to 5.5
2.5 to 5.5
1.8 to 5.5
0
0
0
20
10
5
fSCK
SCK Clock Frequency
MHz
4.5 to 5.5
2.5 to 5.5
1.8 to 5.5
2
2
2
tRI
Input Rise Time
Input Fall Time
μs
μs
4.5 to 5.5
2.5 to 5.5
1.8 to 5.5
2
2
2
tFI
20
40
4.5 to 5.5
2.5 to 5.5
1.8 to 5.5
tWH
SCK High Time
SCK Low Time
ns
ns
80
20
40
4.5 to 5.5
2.5 to 5.5
1.8 to 5.5
tWL
80
4.5 to 5.5
2.5 to 5.5
1.8 to 5.5
25
50
100
tCS
tCSS
tCSH
tSU
tH
CS High Time
ns
ns
ns
ns
ns
4.5 to 5.5
2.5 to 5.5
1.8 to 5.5
25
50
100
CS Setup Time
CS Hold Time
4.5 to 5.5
2.5 to 5.5
1.8 to 5.5
25
50
100
4.5 to 5.5
2.5 to 5.5
1.8 to 5.5
5
10
20
Data In Setup Time
Data In Hold Time
HOLD Setup Time
HOLD Hold Time
4.5 to 5.5
2.5 to 5.5
1.8 to 5.5
5
10
20
4.5 to 5.5
2.5 to 5.5
1.8 to 5.5
5
10
20
tHD
4.5 to 5.5
2.5 to 5.5
1.8 to 5.5
5
10
20
tCD
ns
ns
20
40
4.5 to 5.5
2.5 to 5.5
1.8 to 5.5
0
0
0
tV
Output Valid
80
AT25080B/160B [DATASHEET]
Atmel-5228G-SEEPROM-AT25080B-160B-Datasheet_012015
5
Table 4-3.
AC Characteristics (Continued)
Applicable over recommended operating range from TAI = -40C to +85C, VCC = as specified,
CL = 1 TTL gate and 100pF (unless otherwise noted).
Symbol
Parameter
Voltage
Min
Max
Units
4.5 to 5.5
2.5 to 5.5
1.8 to 5.5
0
0
0
tHO
Output Hold Time
ns
4.5 to 5.5
2.5 to 5.5
1.8 to 5.5
0
0
0
25
50
100
tLZ
HOLD to Output Low Z
HOLD to Output High Z
Output Disable Time
ns
ns
ns
ms
4.5 to 5.5
2.5 to 5.5
1.8 to 5.5
40
80
200
tHZ
4.5 to 5.5
2.5 to 5.5
1.8 to 5.5
40
80
200
tDIS
4.5 to 5.5
2.5 to 5.5
1.8 to 5.5
5
5
5
tWC
Write Cycle Time
Write
Cycles
Endurance(1)
3.3V, 25°C, Page Mode
1M
Note:
1. This parameter is characterized and is not 100% tested.
6
AT25080B/160B [DATASHEET]
Atmel-5228G-SEEPROM-AT25080B-160B-Datasheet_012015
5.
Serial Interface Description
Table 5-1.
Interface
Serial Interface Description
Description
Master
The device that generates the Serial Clock.
Because the Serial Clock pin (SCK) is always an input, the AT25080B/160B always operates
as a slave.
Slave
The AT25080B/160B has separate pins designated for data transmission (SO) and
reception (SI).
Transmitter/Receiver
MSB
The Most Significant Bit (MSB) is the first bit transmitted and received.
After the device is selected with CS going low, the first byte will be received. This byte contains
the opcode that defines the operations to be performed.
Serial Opcode
Invalid Opcode
Chip Select
If an invalid opcode is received, no data will be shifted into the AT25080B/160B, and the serial
output pin (SO) will remain in a high-impedance state until the falling edge of CS is detected.
This will reinitialize the serial communication.
The AT25080B/160B is selected when the CS pin is low. When the device is not selected, data
will not be accepted via the SI pin, and the Serial Output pin (SO) will remain in a
high-impedance state.
The HOLD pin is used in conjunction with the CS pin to select the AT25080B/160B. When the
device is selected and a serial sequence is underway, Hold can be used to pause the serial
communication with the master device without resetting the serial sequence. To pause, the
HOLD pin must be brought low while the SCK pin is low. To resume serial communication, the
HOLD pin is brought high while the SCK pin is low (SCK may still toggle during Hold). Inputs to
the SI pin will be ignored while the SO pin is in the high impedance state.
Hold
The Write Protect pin (WP) allows normal Read and Write operations when held high. When
the WP pin is brought low and WPEN bit is one, all write operations to the status register are
inhibited. When the WP is low while CS is low, it will interrupt a Write to the status register. If
the internal write cycle has already been initiated, WP going low will have no effect on any
Write operation to the status register. The WP pin function is blocked when the WPEN bit in the
status register is zero. This will allow the user to install the AT25080B/160B in a system with
the WP pin tied to ground, and it will be able to write to the status register. All WP pin functions
are enabled when the WPEN bit is set to one.
Write Protect
AT25080B/160B [DATASHEET]
Atmel-5228G-SEEPROM-AT25080B-160B-Datasheet_012015
7
Figure 5-1.
SPI Serial Interface
Master:
Slave:
Microcontroller
Data Out (MOSI)
Data In (MISO)
Serial Clock (SPI CK)
SS0
AT25080B/160B
SI
SO
SCK
CS
SS1
SI
SS2
SO
SCK
CS
SS3
SI
SO
SCK
CS
SI
SO
SCK
CS
8
AT25080B/160B [DATASHEET]
Atmel-5228G-SEEPROM-AT25080B-160B-Datasheet_012015
6.
Functional Description
The AT25080B/160B is designed to interface directly with the synchronous Serial Peripheral Interface (SPI) of
the 6805 and 68HC11 microcontroller series.
The AT25080B/160B utilizes an 8-bit instruction register. The list of instructions and their operation codes are
contained in the table below. All instructions, addresses, and data are transferred with the MSB first and starts
with a high-to-low CS transition.
Table 6-1.
Instruction Set for the AT25080B/160B
Instruction Name
Instruction Format
0000 X110
Operation
WREN
WRDI
RDSR
WRSR
Read
Set Write Enable Latch
Reset Write Enable Latch
Read Status Register
Write Status Register
Read Data from Memory Array
Write Data to Memory Array
0000 X100
0000 X101
0000 X001
0000 X011
Write
0000 X010
Write Enable (WREN): The device will power up in the Write Disable state when VCC is applied. All
programming instructions must therefore be preceded by a Write Enable instruction.
Write Disable (WRDI): To protect the device against inadvertent writes, the WRDI instruction disables all
programming modes. The WRDI instruction is independent of the status of the WP pin.
Read Status Register (RDSR): The RDSR instruction provides access to the status register. The Ready/Busy
and Write Enable status of the device can be determined by the RDSR instruction. Similarly, the Block Write
Protection bits indicate the extent of protection employed. These bits are set by using the WRSR instruction.
Table 6-2.
Status Register Format
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
WPEN
X
X
X
BP1
BP0
WEN
RDY
Table 6-3.
Bit
Read Status Register Bit Definition
Definition
If zero, it indicates the device is ready.
Bit 0 (RDY)
Bit 1 (WEN)
If one, it indicates the write cycle is in progress.
If zero, it indicates the device is not write enabled.
If one, it indicates the device is write enabled.
Bit 2 (BP0)
Bit 3 (BP1)
Bits 4 to 6
See Table 6-4 on page 10.
See Table 6-4.
These are zeros when device is not in an internal write cycle.
See Table 6-5 on page 10
Bit 7 (WPEN)
Bits 0 to 7
These are ones during an internal write cycle.
AT25080B/160B [DATASHEET]
Atmel-5228G-SEEPROM-AT25080B-160B-Datasheet_012015
9
Write Status Register (WRSR): The WRSR instruction allows the user to select one of four levels of protection.
The AT25080B/160B is divided into four array segments. One-quarter (1/4), one-half (1/2), or all of the memory
segments can be protected. Any of the data within any selected segment will be read-only. The block write
protection levels and corresponding status register control bits are shown in Table 6-4.
The three bits BP0, BP1, and WPEN are nonvolatile cells that have the same properties and functions as the
regular memory cells (e.g., WREN, tWC, RDSR).
Table 6-4.
Block Write Protect Bits
Status Register Bits
Array Addresses Protected
AT25080B AT25160B
None None
Level
BP1
BP0
0
0
0
1
1
0
1
0
1
1(1/4)
0300 03FF
0200 03FF
0000 03FF
0600 07FF
0400 07FF
0000 07FF
2(1/2)
3(All)
The WRSR instruction allows the user to enable or disable the Write Protect (WP) pin through the use of the
Write Protect Enable (WPEN) bit. Hardware Write protection is enabled when the WP pin is low and the WPEN
bit is one. Hardware Write protection is disabled when either the WP pin is high or the WPEN bit is zero. When
the device is hardware write protected, writes to the status register, including the block protect bits and the
WPEN bit, and the block-protected sections in the memory array are disabled. Writes are only allowed to
sections of the memory that are not block-protected.
Note: When the WPEN bit is Hardware Write protected, it cannot be changed back to zero as long as the WP
pin is held low.
Table 6-5.
WPEN Operation
Protected
Blocks
Unprotected
Blocks
Status
Register
WPEN
WP
X
WEN
0
0
1
1
X
X
0
1
0
1
0
1
Protected
Protected
Protected
Protected
Protected
Protected
Protected
Writeable
Protected
Writeable
Protected
Writeable
Protected
Writeable
Protected
Protected
Protected
Writeable
X
Low
Low
High
High
10
AT25080B/160B [DATASHEET]
Atmel-5228G-SEEPROM-AT25080B-160B-Datasheet_012015
Read Sequence (Read): Reading the AT25080B/160B via the Serial Output (SO) pin requires the following
sequence. After the CS line is pulled low to select a device, the read opcode is transmitted via the SI line
followed by the byte address to be read (A15 to A0, see Table 6-6). Upon completion, any data on the SI line will
be ignored. The data (D7 to D0) at the specified address is then shifted out onto the SO line. If only one byte is
to be read, the CS line should be driven high after the data comes out. The read sequence can be continued
since the byte address is automatically incremented and data will continue to be shifted out. When the highest
address is reached, the address counter will roll-over to the lowest address allowing the entire memory to be
read in one continuous read cycle.
Write Sequence (Write): In order to program the AT25080B/160B, two separate instructions must be executed.
First, the device must be write enabled via the WREN instruction, and then a Write instruction can be
executed. The address of the memory location(s) to be programmed must be outside the protected address field
location selected by the block write protection level. During an internal write cycle, all commands will be ignored
except the RDSR instruction.
A Write instruction requires the following sequence. After the CS line is pulled low to select the device, the Write
opcode is transmitted via the SI line followed by the byte address (A15 to A0) and the data (D7 to D0) to be
programmed (see Table 6-6). Programming will start after the CS pin is brought high. The low-to-high transition
of the CS pin must occur during the SCK low-time immediately after clocking in the D0 (LSB) data bit.
The Ready/Busy status of the device can be determined by initiating a RDSR instruction. If Bit 0 is one, the write
cycle is still in progress. If Bit 0 is zero, the write cycle has ended. Only the RDSR instruction is enabled during
the write programming cycle.
The AT25080B/160B is capable of a 32-byte Page Write operation. After each byte of data is received, the five
low-order address bits are internally incremented by one; the high-order bits of the address will remain constant.
If more than 32 bytes of data are transmitted, the address counter will roll-over and the previously written data
will be overwritten. The AT25080B/160B is automatically returned to the write disable state at the completion of
a write cycle.
Note: If the device is not write-enabled (WREN), the device will ignore the Write instruction and will return to
the standby state when CS is brought high. A new CS falling edge is required to reinitiate the serial
communication.
Table 6-6.
Address Key
Address
AN
AT25080B
A9 – A0
AT25160B
A10 – A0
Don’t Care Bits
A15 – A10
A15 – A11
AT25080B/160B [DATASHEET]
Atmel-5228G-SEEPROM-AT25080B-160B-Datasheet_012015
11
7.
Timing Diagrams
Figure 7-1.
Synchronous Data Timing (for Mode 0)
tCS
VIH
CS
VIL
tCSS
tCSH
VIH
tWH
tWL
SCK
VIL
tSU
tH
VIH
Valid In
SI
VIL
tHO
tDIS
tV
VOH
HI-Z
HI-Z
SO
VOL
Figure 7-2.
WREN Timing
CS
SCK
SI
WREN Opcode
HI-Z
SO
Figure 7-3.
WRDI Timing
CS
SCK
SI
WRDI Opcode
HI-Z
SO
12
AT25080B/160B [DATASHEET]
Atmel-5228G-SEEPROM-AT25080B-160B-Datasheet_012015
Figure 7-4.
RDSR Timing
CS
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
SCK
SI
Instruction
Data Out
High-impedance
SO
7
6
5
4
3
2
1
0
MSB
Figure 7-5.
WRSR Timing
CS
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
SCK
SI
Data In
Instruction
7
6
5
4
3
2
1
0
High-impedance
SO
Figure 7-6.
Read Timing
CS
0
1
2
3
4
5
6
7
8
9
10 11 20 21 22 23 24 25 26 27 28 29 30 31
SCK
SI
Byte Address
...
Instruction
15 14 13
3
2
1
0
Data Out
High-impedance
SO
7
6
5
4
3
2
1
0
MSB
AT25080B/160B [DATASHEET]
Atmel-5228G-SEEPROM-AT25080B-160B-Datasheet_012015
13
Figure 7-7.
Write Timing
CS
0
1
2
3
4
5
6
7
8
9 10 11 20 21 22 23 24 25 26 27 28 29 30 31
SCK
SI
Byte Address
Data In
...
Instruction
15 14 13
3
2
1
0
7
6
5
4
3
2
1
0
High-impedance
SO
Figure 7-8.
HOLD Timing
CS
tCD
tCD
SCK
HOLD
SO
tHD
tHD
tHZ
tLZ
14
AT25080B/160B [DATASHEET]
Atmel-5228G-SEEPROM-AT25080B-160B-Datasheet_012015
8.
Ordering Code Detail
A T 2 5 0 8 0 B - S S H L x x - B
Atmel Designator
Product Family
Shipping Carrier Option
B
T
E
= Bulk (Tubes)
= Tape and Reel, Standard Quantity Option
= Tape and Reel, Expanded Quantity Option
25 = Standard SPI
Serial EEPROM
Product Variation
xx
= Applies to select packages only.
See ordering code table for
variation details.
Device Density
080 = 8-kilobit
160 = 16-kilobit
Operating Voltage
L
= 1.8V to 5.5V
Device Revision
Packaged Device Grade or
Wafer/Die Thickness
H
= Green, NiPdAu Lead Finish
Temperature Range -40°C to +85°C
= Green, Matte Sn Lead Finish
Temperature Range -40°C to +85°C
= 11mil Wafer Thickness
U
11
Package Option
SS = JEDEC SOIC
X
= TSSOP
MA = UDFN
ME = XDFN
C
U
= VFBGA
= WLCSP
WWU = Wafer Unsawn
WDT = Die in Tape and Reel
AT25080B/160B [DATASHEET]
Atmel-5228G-SEEPROM-AT25080B-160B-Datasheet_012015
15
9.
Part Markings
AT25080B and AT25160B: Package Marking Information
8-lead TSSOP
8-lead SOIC
8-pad UDFN
2.0 x 3.0 mm Body
ATHYWW
AAAAAAA
###
ATMLHYWW
###%
AAAAAAAA
###% @
H%@
YXX
@
8-pad XDFN
8-ball VFBGA
8-ball WLCSP
1.8 x 2.2 mm Body
1.5 x 2.0 mm Body
@U
###
YXX
###
###U
YMXX
YXX
PIN 1
Note 1:
designates pin 1
Note 2: Package drawings are not to scale
Catalog Number Truncation
AT25080B
AT25160B
Truncation Code ###: 58B
Truncation Code ###: 5AB
Date Codes
Voltages
Y = Year
M = Month
WW = Work Week of Assembly
% = Minimum Voltage
4: 2014
5: 2015
6: 2016
7: 2017
8: 2018
9: 2019
0: 2020
1: 2021
A: January
B: February
...
02: Week 2
04: Week 4
...
L: 1.8V min
L: December
52: Week 52
Country of Assembly
Lot Number
AAA...A = Atmel Wafer Lot Number
Grade/Lead Finish Material
@ = Country of Assembly
H: Industrial/NiPdAu
Trace Code
Atmel Truncation
XX = Trace Code (Atmel Lot Numbers Correspond to Code)
Example: AA, AB.... YZ, ZZ
AT: Atmel
ATM: Atmel
ATML: Atmel
6/10/14
TITLE
DRAWING NO.
25080-160BSM
REV.
25080-160BSM, AT25080B and AT25160B Package Marking
Package Mark Contact:
Information
B
DL-CSO-Assy_eng@atmel.com
16
AT25080B/160B [DATASHEET]
Atmel-5228G-SEEPROM-AT25080B-160B-Datasheet_012015
10. Ordering Information
Delivery Information
Operation
Range
Atmel Ordering Code
AT25080B-SSHL-B
AT25080B-SSHL-T
AT25080B-XHL-B
AT25080B-XHL-T
Lead Finish
Package
Form
Quantity
Bulk (Tubes)
Tape and Reel
Bulk (Tubes)
100 per Tube
4,000 per Reel
100 per Tube
5,000 per Reel
5,000 per Reel
8S1
8X
NiPdAu
(Lead-free/Halogen-free)
Tape and Reel
Tape and Reel
Industrial
Temperature
(-40 to 85C)
AT25080B-MAHL-T
AT25080B-MAHL-E
AT25080B-MEHL-T
AT25080B-CUL-T
8MA2
Tape and Reel 15,000 per Reel
8ME1
8U3-1
Tape and Reel
Tape and Reel
Tape and Reel
5,000 per Reel
5,000 per Reel
5,000 per Reel
SnAgCu
(Lead-free/Halogen-free)
AT25080B-UUL0B-T(1)
AT25080B-WWU11L(2)
8U-12
N/A
Wafer Sale
Note 2
AT25160B-SSHL-B
AT25160B-SSHL-T
AT25160B-XHL-B
Bulk (Tubes)
Tape and Reel
Bulk (Tubes)
100 per Tube
4,000 per Reel
100 per Tube
5,000 per Reel
5,000 per Reel
8S1
8X
NiPdAu
(Lead-free/Halogen-free)
AT25160B-XHL-T
Tape and Reel
Tape and Reel
Industrial
Temperature
(-40 to 85C)
AT25160B-MAHL-T
AT25160B-MAHL-E
AT25160B-MEHL-T
AT25160B-CUL-T
8MA2
Tape and Reel 15,000 per Reel
8ME1
8U3-1
Tape and Reel
Tape and Reel
Tape and Reel
5,000 per Reel
5,000 per Reel
5,000 per Reel
SnAgCu
(Lead-free/Halogen-free)
AT25160B-UUL0B-T(1)
AT25160B-WWU11L(2)
Notes: 1. WLCSP Package:
8U-12
N/A
Wafer Sale
Note 2
This device includes a backside coating to increase product robustness.
CAUTION: Exposure to ultraviolet (UV) light can degrade the data stored in the EEPROM cells.
Therefore, customers who use a WLCSP product must ensure that exposure to ultraviolet light
does not occur.
2. Contact Atmel Sales for Wafer sales.
Package Type
8S1
8-lead, 0.150” wide, Plastic Gull Wing Small Outline (JEDEC SOIC)
8X
8-lead, 4.4mm body, Plastic Thin Shrink Small Outline Package (TSSOP)
8-pad, 2.0mm x 3.0mm x 0.6mm body, Thermally Enhanced Plastic Ultra Thin Dual Flat Dual No Lead (UDFN)
8-pad 1.8mm x 2.2mm body, Extra Thin DFN (XDFN)
8MA2
8ME1
8U3-1
8U-12
8-ball, 1.50mm x 2.00mm body, 0.50mm pitch, Very Thin, Fine-Pitch Ball Grid Array (VFBGA)
8-ball, 5 x 3 grid array, 0.40mm pitch, Wafer Level Chip Scale Package (WLCSP)
AT25080B/160B [DATASHEET]
Atmel-5228G-SEEPROM-AT25080B-160B-Datasheet_012015
17
11. Packaging Information
11.1 8S1 — 8-lead JEDEC SOIC
C
1
E
E1
L
N
Ø
TOP VIEW
END VIEW
e
b
COMMON DIMENSIONS
(Unit of Measure = mm)
A
MIN
1.35
0.10
MAX
1.75
0.25
NOM
–
–
NOTE
SYMBOL
A1
A
A1
b
0.31
0.17
4.80
3.81
5.79
–
0.51
0.25
5.05
3.99
6.20
C
D
E1
E
e
–
–
D
–
–
SIDE VIEW
Notes: This drawing is for general information only.
Refer to JEDEC Drawing MS-012, Variation AA
for proper dimensions, tolerances, datums, etc.
1.27 BSC
L
0.40
0°
–
–
1.27
8°
Ø
6/22/11
DRAWING NO. REV.
8S1
TITLE
GPC
8S1, 8-lead (0.150” Wide Body), Plastic Gull Wing
Small Outline (JEDEC SOIC)
SWB
G
Package Drawing Contact:
packagedrawings@atmel.com
18
AT25080B/160B [DATASHEET]
Atmel-5228G-SEEPROM-AT25080B-160B-Datasheet_012015
11.2 8X — 8-lead TSSOP
C
1
Pin 1 indicator
this corner
E1
E
L1
N
L
Top View
End View
A
b
A1
COMMON DIMENSIONS
(Unit of Measure = mm)
e
A2
D
SYMBOL
MIN
-
NOM
-
MAX
1.20
0.15
1.05
3.10
NOTE
2, 5
A
Side View
A1
A2
D
0.05
0.80
2.90
-
Notes: 1. This drawing is for general information only.
1.00
Refer to JEDEC Drawing MO-153, Variation AA, for proper
dimensions, tolerances, datums, etc.
3.00
2. Dimension D does not include mold Flash, protrusions or gate
burrs. Mold Flash, protrusions and gate burrs shall not exceed
0.15mm (0.006in) per side.
E
6.40 BSC
4.40
E1
b
4.30
0.19
4.50
0.30
3, 5
4
3. Dimension E1 does not include inter-lead Flash or protrusions.
Inter-lead Flash and protrusions shall not exceed 0.25mm
(0.010in) per side.
4. Dimension b does not include Dambar protrusion.
Allowable Dambar protrusion shall be 0.08mm total in excess
of the b dimension at maximum material condition. Dambar
cannot be located on the lower radius of the foot. Minimum
space between protrusion and adjacent lead is 0.07mm.
5. Dimension D and E1 to be determined at Datum Plane H.
0.25
e
0.65 BSC
0.60
L
0.45
0.09
0.75
0.20
L1
C
1.00 REF
-
2/27/14
TITLE
GPC
TNR
DRAWING NO.
REV.
8X, 8-lead 4.4mm Body, Plastic Thin
Shrink Small Outline Package (TSSOP)
8X
E
Package Drawing Contact:
packagedrawings@atmel.com
AT25080B/160B [DATASHEET]
Atmel-5228G-SEEPROM-AT25080B-160B-Datasheet_012015
19
11.3 8MA2 — 8-pad UDFN
E
1
8
7
6
5
Pin 1 ID
2
3
4
D
C
TOP VIEW
E2
SIDE VIEW
A2
A
A1
b (8x)
8
1
2
3
4
COMMON DIMENSIONS
(Unit of Measure = mm)
7
6
5
Pin#1 ID
D2
MIN
0.50
MAX
0.60
NOM
0.55
NOTE
SYMBOL
A
A1
A2
D
0.0
-
0.02
-
0.05
0.55
2.10
1.60
3.10
1.40
0.30
e (6x)
L (8x)
BOTTOM VIEW
K
1.90
1.40
2.90
1.20
0.18
2.00
D2
E
1.50
3.00
Notes:
1. This drawing is for general information only. Refer to
Drawing MO-229, for proper dimensions, tolerances,
datums, etc.
E2
b
1.30
0.25
3
2. The Pin #1 ID is a laser-marked feature on Top View.
3. Dimensions b applies to metallized terminal and is
measured between 0.15 mm and 0.30 mm from the
terminal tip. If the terminal has the optional radius on
the other end of the terminal, the dimension should
not be measured in that radius area.
C
1.52 REF
0.35
L
0.30
0.20
0.40
-
e
0.50 BSC
-
K
4. The Pin #1 ID on the Bottom View is an orientation
feature on the thermal pad.
11/26/14
TITLE
DRAWING NO.
REV.
GPC
8MA2, 8-pad 2 x 3 x 0.6mm Body, Thermally
YNZ
8MA2
G
Package Drawing Contact:
packagedrawings@atmel.com
Enhanced Plastic Ultra Thin Dual Flat No-Lead
Package (UDFN)
20
AT25080B/160B [DATASHEET]
Atmel-5228G-SEEPROM-AT25080B-160B-Datasheet_012015
11.4 8ME1 — 8-pad XDFN
D
7
5
4
6
3
8
E
PIN #1 ID
2
1
A1
Top View
A
Side View
e1
b
L
COMMON DIMENSIONS
(Unit of Measure = mm)
SYMBOL
MIN
–
NOM
–
MAX
0.40
0.05
1.90
2.30
0.25
NOTE
A
A1
D
E
0.10
PIN #1 ID
0.00
1.70
2.10
0.15
–
1.80
0.15
2.20
b
0.20
b
e
0.40 TYP
1.20 REF
0.30
e
e1
L
0.35
0.26
End View
9/10/2012
TITLE
DRAWING NO.
REV.
GPC
8ME1, 8-pad (1.80mm x 2.20mm body) Extra Thin DFN
(XDFN)
8ME1
B
DTP
Package Drawing Contact:
packagedrawings@atmel.com
AT25080B/160B [DATASHEET]
Atmel-5228G-SEEPROM-AT25080B-160B-Datasheet_012015
21
11.5 8U3-1 — 8-ball VFBGA
E
D
2.
b
PIN 1 BALL PAD CORNER
A1
A2
A
TOP VIEW
SIDE VIEW
PIN 1 BALL PAD CORNER
4
3
1
2
d
(d1)
6
5
8
7
COMMON DIMENSIONS
(Unit of Measure - mm)
e
(e1)
SYMBOL
NOM
MIN
MAX
NOTE
2
0.73
0.09
0.40
0.20
0.79
0.85
0.19
0.50
0.30
A
A1
A2
b
BOTTOM VIEW
8 SOLDER BALLS
0.14
0.45
Notes:
0.25
1. This drawing is for general information only.
1.50 BSC
2.0 BSC
0.50 BSC
0.25 REF
1.00 BSC
0.25 REF
D
E
2. Dimension ‘b’ is measured at maximum solder ball diameter.
3. Solder ball composition shall be 95.5Sn-4.0Ag-.5Cu.
e
e1
d
d1
6/11/13
REV.
TITLE
DRAWING NO.
8U3-1
GPC
GXU
8U3-1, 8-ball, 1.50mm x 2.00mm body, 0.50mm pitch,
Very Thin, Fine-Pitch Ball Grid Array Package (VFBGA)
F
Package Drawing Contact:
packagedrawings@atmel.com
22
AT25080B/160B [DATASHEET]
Atmel-5228G-SEEPROM-AT25080B-160B-Datasheet_012015
11.6 8U-12 — 8-ball WLCSP
TOP VIEW
BALL SIDE
1
1
3
2
2
3
A1 CORNER
A
A1 CORNER
A
e2
e1
B
C
B
C
E
D
E
D
E
d2
d1
-B-
D
-A-
k 0.015 (4X)
db (4X)
d0.015 C
d0.05 C A B
v
SIDE VIEW
A3
A2
A
-C-
k 0.075 C
SEATING PLANE
COMMON DIMENSIONS
(Unit of Measure = mm)
A1
MIN
MAX
TYP
NOTE
SYMBOL
A
A1
A2
A3
D
0.313
0.094
0.175
0.334
-
0.355
0.124
0.225
PIN ASSIGNMENT MATRIX
1
2
n/a
3
0.200
0.025 REF
A
B
C
D
E
GND
n/a
SI
n/a
Contact Atmel for details
WP
n/a
d1
d2
E
0.693
SO
n/a
SCK
n/a
0.400
Contact Atmel for details
0.400
HOLD
n/a
CS
Vcc
e1
e2
b
0.400
0.148
0.168
0.188
9/15/14
TITLE
8U-12, 8-ball, 0.40 mm Pitch, 5 x 3 Array,
Wafer Level Chip Scale Package (WLCSP) with BSC
DRAWING NO.
REV.
GPC
GZA
8U-12
B
Package Drawing Contact:
packagedrawings@atmel.com
AT25080B/160B [DATASHEET]
Atmel-5228G-SEEPROM-AT25080B-160B-Datasheet_012015
23
12. Revision History
Doc. Rev.
Date
Comments
Add the AT25080B-MAHL-E and AT25160B-MAHL-E package options.
Update the 8MA2 and 8U-12 package drawings and the ordering information.
5228G
01/2015
Add WLSCP package option.
5228F
07/2014
Update 8X, 8MA2, 8ME1, and 8U3-1 package drawings.
Update template, Atmel logos, disclaimer page.
5228E
5228D
5228C
5228B
5228A
03/2012
04/2010
08/2009
07/2008
09/2007
Update 8A2 to 8X and 8S1, 8MA2, 8U3-1 package drawings.
Update Ordering Code Detail and Ordering Information.
Change Catalog Scheme and add Marking Details.
Change ‘Endurance’ parameter on page 6.
Initial document release.
24
AT25080B/160B [DATASHEET]
Atmel-5228G-SEEPROM-AT25080B-160B-Datasheet_012015
X X
X X X X
Atmel Corporation
1600 Technology Drive, San Jose, CA 95110 USA
T: (+1)(408) 441.0311
F: (+1)(408) 436.4200
|
www.atmel.com
© 2015 Atmel Corporation. / Rev.: Atmel-5228G-SEEPROM-AT25080B-160B-Datasheet_012015.
Atmel®, Atmel logo and combinations thereof, Enabling Unlimited Possibilities®, and others are registered trademarks or trademarks of Atmel Corporation in U.S. and
other countries. Other terms and product names may be trademarks of others.
DISCLAIMER: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right
is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN THE ATMEL TERMS AND CONDITIONS OF SALES LOCATED ON THE
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