ATA663211-GBQW [MICROCHIP]
LIN Transceiver;
| 型号： | ATA663211-GBQW |
| 厂家： | 
MICROCHIP |
| 描述： | LIN Transceiver |
| 文件： | 总28页 (文件大小：541K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ATA663211
LIN Transceiver
Features
Description
• ISO 26262 Functional Safety Ready
• Supply Voltage up to 40V
The ATA663211 device is a fully integrated LIN
transceiver designed in compliance with the LIN
specification 2.0, 2.1, 2.2, 2.2A and SAEJ2602-2. It
interfaces the LIN protocol handler and the physical
layer. The device is designed to handle the low-speed
data communication in convenience electronics, for
example, in vehicles. Improved slope control at the LIN
bus ensures data communication up to 20 Kbaud.
Sleep mode guarantees minimal current consumption
even in the case of a floating bus line or a short circuit
on the LIN bus to GND.
• Operating Voltage VVS = 5V to 28V
• Very Low Supply Current
- Sleep mode: Typically 9 A
- Fail-Safe mode: Typically 80 A
- Normal mode: Typically 250 A
• Fully Compatible with 3.3V and 5V Devices
• LIN Physical Layer according to LIN 2.0, 2.1, 2.2,
2.2A and SAEJ2602-2
Note:
The current LIN standards use the
terminology "Master" and "Slave”.
• Wake-Up Capability through LIN bus (100 s
Dominant)
The LIN standard groups have decided
that the terms "Commander" and
"Responder" will be used in future.
• External Wake Up through WKin pin (100 s Low
Level)
• INH Output to Control an External Voltage
Regulator or to Switch the Commander Pull-Up
Package Types
• Wake-Up Source Recognition
• TXD Time-Out Timer
ATA663211
8-Lead VDFN
• Bus Pin is Overtemperature and Short-Circuit
Protected vs. GND and Battery
RXD
EN
INH
VS
1
8
• Advanced EMC and ESD Performance
2
3
4
7
6
5
EP
9
• Fulfills the OEM “Hardware Requirements for LIN
in Automotive Applications Rev.1.3”
LIN
GND
WKin
TXD
• Interference and Damage Protection according to
ISO7637
• Qualified according to AEC-Q100 and AEC-Q006
ATA663211
8-Lead SOIC
• Package: 8-Lead VDFN, 8-Lead SOIC, with
Wettable Flanks (Moisture Sensitivity Level 1)
RXD
EN
INH
VS
1
2
8
7
WKin
TXD
LIN
3
4
6
5
GND
*Includes Exposed Thermal Pad (EP);
see Table 1-4.
2019-2021 Microchip Technology Inc.
DS20006191D-page 1
ATA663211
ATA663211 Block Diagram
7
VS
ATA663211
RXD
1
Receiver
-
+
6
LIN
RF-Filter
Wake-up bus timer
Slew rate control
Short-circuit and
overtemperature
protection
TXD
TXD
Time-out
Timer
4
VS
Normal/
Control
Fail-safe
Unit
VS
Mode
with
5
GND
Mode
Selection
Sleep
Mode
WKin
3
Wake-up
Timer
2
8
EN
INH
DS20006191D-page 2
2019-2021 Microchip Technology Inc.
ATA663211
1.0
1.1
FUNCTIONAL DESCRIPTION
Physical Layer Compatibility
Since the LIN physical layer is independent of higher
LIN layers (for example, LIN protocol layer), all nodes
with a LIN physical layer according to revision 2.x can
be mixed with LIN physical layer nodes based on
earlier versions (for instance, LIN 1.0, LIN 1.1,LIN 1.2,
LIN 1.3) without any restrictions.
1.2
Operating Modes
FIGURE 1-1:
ATA663211 OPERATING MODES
a: VVS > VVS_th_U_F_up (2.4V)ꢀ
b: VVS < VVS_th_U_)Bdown (1.9V)ꢀ
Unpowered Mode
c: Bus wake-up event (LIN)ꢀ
d: -
All circuitry OFF
e: VVS < VVS_th_N_F_down (3.9V)ꢀꢀ
f: VVS > VVS_th_F_N_up (4.9V)ꢀ
g: Local WAKE event (WKin)
a
b
Fail-safe Mode
(c + g) & f
Communication: OFFꢀ
Wake-up Signalingꢀ
Undervoltage Signalingꢀ
INH output switched ON
EN = 0
7;'ꢀ ꢀꢁ
±
ꢂꢀIꢀꢃꢄꢅ
EN = 1
& f
b
e
EN = 1
& f
Go to sleep
Sleep Mode
Normal Mode
Communication: OFF
INH output switched OFF
Communication: ON
command EN = 0 INH output switched ON
Note 1: Condition f is valid for VS ramp up; at VS ramp down condition e is valid instead of f.
TABLE 1-1:
ATA663211 OPERATING MODES
Operating Mode Transceiver
INH
LIN
TXD
RXD
Fail-Safe
OFF
ON
Recessive
Signaling fail-safe sources
(see Table 1-2)
Normal
ON
ON
TXD-dependent
Recessive
Follows data transmission
Sleep/Unpowered
OFF
OFF
Low
High Ohmic
2019-2021 Microchip Technology Inc.
DS20006191D-page 3
ATA663211
1.2.1
NORMAL MODE
1.2.3
FAIL-SAFE MODE
This is the normal transmitting and receiving mode of
the LIN Interface, in accordance with LIN specification
2.x.
The device automatically switches to Fail-Safe mode at
system power-up or after a wake-up event. The INH
output is switched on and the LIN transceiver is
switched off. The IC stays in this mode until EN is
switched to high. The IC then changes to Normal
mode. During Fail-Safe mode the TXD pin is an output,
and, together with the RXD output pin, signals the
fail-safe source.
1.2.2
SLEEP MODE
A falling edge at EN switches the IC into Sleep mode.
While in Sleep mode, the transmission path is disabled
and the device is in Low-Power mode. Supply current
from VBAT is typically 9 A. In Sleep mode the INH pin
is switched off. The internal termination resistor
between the LIN pin and VS pin is disabled. Only a
weak pull-up current (typical 10 A) between the LIN
pin and VS pin is present. Sleep mode can be activated
independently from the actual level on the LIN or WKin
pin.
If the device enters Fail-Safe mode coming from the
Normal mode (EN = 1) due to a VS undervoltage
condition (VVS < VVS_th_N_F_down), it is possible to
switch into Sleep mode by a falling edge at the EN
input. With this feature, the current consumption is
further reduced.
A wake-up event from Sleep mode is signaled to the
microcontroller using the RXD pin and the TXD pin. A
VS undervoltage condition is also signaled at these two
pins. The coding is shown in Table 1-2.
If the TXD pin is short-circuited to GND, it is possible to
switch to Sleep mode though EN after t > tdom
.
TABLE 1-2:
Fail-Safe Sources
LIN wake-up (LIN pin)
SIGNALING IN FAIL-SAFE MODE
TXD
RXD
Low
Low
High
Low
High
Low
Local wake-up (WKin pin)
VSth (battery) undervoltage
detection VVS < 3.9V
Note 1: Assuming an external pull-up resistor (typical 5 k) has been added on pin TXD to the power supply of the
microcontroller.
1.3.2
LOCAL WAKE UP THROUGH WKIN
PIN
1.3
Wake-Up Scenarios from Sleep
Mode
A falling edge at the WKin pin followed by a low level
maintained for a certain period of time (>tWKin) result in
a local wake-up request and the device switches to
Fail-Safe mode. The INH pin is activated (switches to
VS) and the internal LIN termination resistor is
switched on. The local wake-up request is indicated by
a low level at the TXD pin and a high level at the RXD
pin, generating an interrupt for the microcontroller.
Even when the WKin pin is low, it is possible to switch
to Sleep mode via the EN pin. In this case, the wake-up
signal has to be switched to high >10 s before the
negative edge at WKin starts a new local wake-up
request.
1.3.1
REMOTE WAKE UP THROUGH LIN
BUS
1.3.1.1
Remote Wake-up from Sleep Mode
A voltage lower than the LIN pre-wake detection VLINL
at the LIN pin activates the internal LIN receiver and
starts the wake-up detection timer. A falling edge at the
LIN pin, followed by a dominant bus level maintained
for a certain period of time (>tbus) and following a rising
edge at the LIN pin result in a remote wake-up request
and the device switches to Fail-Safe mode. The INH
pin is activated (switches to VS) and the internal LIN
termination resistor is switched on. The remote
wake-up request is indicated by a low level at pin RXD
and interrupts the microcontroller.
DS20006191D-page 4
2019-2021 Microchip Technology Inc.
ATA663211
FIGURE 1-2:
LIN WAKE-UP FROM SLEEP MODE
Fail-safe Mode
Normal Mode
Bus wake-up filtering time
(tBUS
)
LIN bus
High
INH
RXD
TXD
Low or floating
Low
Low (strong pull-down)
External
voltage
regulator
On state
Off state
Regulator wake-up time delay
EN High
EN
Node in sleep state
Microcontroller start-up
delay time
FIGURE 1-3:
LOCAL WAKE-UP FROM WAKE-UP SWITCH
Fail-safe Mode
Normal Mode
WKin
INH
State change
High
High
Low or floating
RXD
TXD
Low (strong pull-down)
On state
Wake filtering time
WKin
External
voltage
regulator
Off state
Regulator wake-up time delay
EN High
EN
Node in sleep state
Microcontroller start-up
delay time
2019-2021 Microchip Technology Inc.
DS20006191D-page 5
ATA663211
added on pin TXD to the power supply of the
microcontroller. These flags are reset immediately if the
microcontroller sets pin EN to high and the IC is in
Normal mode.
1.3.3
WAKE-UP SOURCE RECOGNITION
The device can distinguish between different wake-up
sources. The wake-up source can be read on the TXD
and RXD pin in Fail-Safe mode according to Table 1-3,
if an external pull-up resistor (typically 5 k) has been
TABLE 1-3:
SIGNALING IN FAIL-SAFE MODE
Fail-Safe Sources
TXD
RXD
LIN wake up (LIN pin)
Low
Low
High
Low
High
Low
Local wake up (WKin pin)
VSth (battery) undervoltage detection (VVS < 3.9V)
Note 1: Assuming an external pull-up resistor (typical 5 k) has been added on pin TXD to the power supply of the
microcontroller.
1.4
Behavior under Low Supply
Voltage Condition
After the battery voltage has been connected to the
application circuit, the voltage at the VS pin increases
according to the block capacitor used in the application
(see Figure “ATA663211 Block Diagram”). If VVS is
higher than the minimum VS operation threshold
VVS_th_U_F_up, the IC mode changes from Unpowered
mode to Fail-Safe mode, the INH output is switched on
and the LIN transceiver can be activated.
If, during Sleep mode, the voltage level of VVS drops
below the under-voltage detection threshold
VVS_th_N_F_down (typically 4.3V), the operation mode is
not changed and no wake up is possible. Only if the
supply voltage on the VS pin drops below the VS
operation threshold VVS_th_U_F_down (typically 2.05V),
does the IC switch to Unpowered mode.
If, during Normal mode, the voltage level on the VS pin
drops below the VS undervoltage detection threshold
VVS_th_N_F_down (typically 4.3V), the IC switches to
Fail-Safe mode. This means that the LIN transceiver is
disabled in order to avoid malfunctions or false bus
messages. If the supply voltage VVS drops further
below the VS operation threshold VVS_th_U_F_down
(typically 2.05V), the IC switches to Unpowered mode
and the INH output switches off.
DS20006191D-page 6
2019-2021 Microchip Technology Inc.
ATA663211
1.5
Pin Descriptions
The descriptions of the pins are listed in Table 1-4.
TABLE 1-4:
Pin
PIN FUNCTIONING TABLE
Symbol
RXD
Function
1
2
3
4
5
6
7
8
Receive data output
Enables Normal mode if the input is high
EN
WKin
TXD
GND
LIN
High-voltage input for local wake-up request. If not needed, connect directly to VS
Transmit data input
Ground, heat slug
LIN bus line input/output
Supply voltage
VS
INH
Battery-related high-side switch output for controlling an external voltage regulator or to
switch off the LIN Commander pull-up resistor; switched on after a wake-up request
Backside
EP
Heat slug, internally connected to the GND pin (only for the VDFN8 package)
1.5.1
OUTING PIN (RXD)
1.5.4
INPUT/OUTPUT (TXD)
In Normal mode, this pin reports the state of the LIN
bus to the microcontroller. LIN high (Recessive state) is
indicated by a high level at RXD; LIN low (Dominant
state) is indicated by a low level at RXD.
In Normal mode, the TXD pin is the microcontroller
interface for controlling the state of the LIN output. TXD
must be pulled to ground in order to drive the LIN bus
low. If TXD is high, the LIN output transistor is turned off
and the bus is in the Recessive state. If the TXD pin
stays at GND level while switching into Normal mode,
it must be pulled to high level longer than 10 s before
the LIN driver can be activated. This feature prevents
the bus line from being accidentally driven to Dominant
state after Normal mode has been activated (also in
case of a short circuit at TXD to GND). During Fail-Safe
mode, this pin is used as output and signals the
fail-safe source.
The output is an open drain; it is compatible with a 3.3V
or 5V power supply. The AC characteristics are defined
by an external pull-up resistor of 4.7 k to 5V and a
load capacitor of 20 pF.
In Unpowered mode, RXD is switched off.
1.5.2
ENABLE INPUT PIN (EN)
The enable input pin controls the operating mode of the
device. If EN is high, the circuit is in Normal mode, with
transmission paths from TXD to LIN and from LIN to
RXD both active.
The TXD pin provides a pull-down resistor in order to
have a defined level if TXD is disconnected.
An internal timer prevents the bus line from being
driven permanently in the Dominant state. If TXD is
forced to low longer than tdom > 20 ms, the LIN bus
driver is switched to the Recessive state. Nevertheless,
when switching to Sleep mode, the actual level at the
TXD pin is relevant.
If EN is switched to low while TXD is still high, the
device is forced to Sleep mode. This means that no
data transmission is possible and current consumption
is reduced to IVSsleep typical 9 A.
The EN pin provides a pull-down resistor to force the
transceiver into Recessive mode if EN is disconnected.
To reactivate the LIN bus driver, switch TXD to high
(>10 s).
1.5.3
WKIN PIN
1.5.5
GROUND PIN (GND)
This pin is a high-voltage input used for waking up the
device from Sleep mode. It is usually connected to an
external switch in the application to generate a local
wake up. A pull-up current source with typically 10 A
is implemented. The voltage threshold for a wake-up
signal is typically 2V below the VVS voltage.
The IC does not affect the LIN bus in the event of GND
disconnection. It is able to handle a ground shift of up
to 11.5% of VVS
.
If a local wake up is not needed in the application, the
WKin pin can be connected directly to the VS pin.
2019-2021 Microchip Technology Inc.
DS20006191D-page 7
ATA663211
1.5.6
BUS PIN (LIN)
1.5.7
SUPPLY PIN (VS)
A low-side driver with internal current limitation and
thermal shutdown as well as an internal pull-up resistor
according to LIN specification 2.x is implemented. The
voltage range is from -27V to +40V. This pin exhibits no
reverse current from the LIN bus to VS, even in the
event of a GND shift or VBat disconnection. The LIN
receiver thresholds comply with the LIN protocol
specification.
LIN operating voltage is VS = 5V to 28V. Undervoltage
detection is implemented to disable transmission if VS
falls below typical 4.5V, in order to avoid false bus
messages. After switching on VVS, the IC starts in
Fail-Safe mode and the INH output is switched on.
The supply current in Sleep mode is typically 9 A.
1.5.8
INHIBIT OUTPUT PIN (INH)
The fall time (from recessive to dominant) and the rise
time (from dominant to recessive) are slope-controlled.
This pin is used to control an external voltage regulator
or to switch the LIN Commander pull-up resistor
ON/OFF in case the device is used in a Commander
node. The inhibit pin provides an internal switch toward
the VS pin which is protected by temperature monitor-
ing. If the device is in normal or Fail-Safe mode, the
inhibit high-side switch is turned on. When the device is
in Sleep mode, the inhibit switch is turned off, thus dis-
abling the voltage regulator or other connected external
devices.
During a short circuit at LIN to VBat, the output limits the
output current to IBUS_LIM
. Due to the power
dissipation, the chip temperature exceeds Toff and the
LIN output is switched off. The chip cools down and
after a hysteresis of Thys, switches the output on again.
RXD stays on high because LIN is high.
During a short circuit from LIN to GND, the IC can be
switched into Sleep mode and even in this case the
current consumption is lower than 100 A. If the short
circuit disappears, the IC starts with a remote wake up.
A wake-up event on the LIN bus or at the WKin pin
switches the INH pin to the VS level. After a system
power-up (VVS rises from zero), the INH pin switches to
the VVS level automatically.
The reverse current is <2 A at pin LIN during loss of
VBat. This is optimal behavior for bus systems where
some nodes are supplied from battery or ignition.
1.6
Typical Applications
FIGURE 1-4:
ATA663211 TYPICAL APPLICATION CIRCUIT
D1
VBAT
C1
12V
10ꢀμF/50V
5V
VCC
C4
2.2ꢀμF
C5
R7
4.7ꢀkΩ
R4
10ꢀkΩ
D2
100ꢀnF
&RPPDQGHU node
pull up
R2
1kΩ
VCC
RXD
EN
INH
VS
ATA663211
DFN8
3 x 3
C2
100ꢀnF
Microcontroller
GND
R3 WKin
LIN
GND
LIN
2.7ꢀkΩ
C3
220ꢀpF
TXD
GND
(xternal
wake-
switch
S1
DS20006191D-page 8
2019-2021 Microchip Technology Inc.
ATA663211
2.0
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings †
Supply Voltage (VVS) ................................................................................................................................. -0.3V to +40V
Logic Pins:
Voltage Levels (RXD, TXD, EN, NRES) (VLogic)....................................................................................... -0.3V to +5.5V
Output DC currents (ILogic)...................................................................................................................... -5 mA to +5 mA
LIN
DC Voltage.................................................................................................................................................. -27V to +40V
Pulse time <500 ms .................................................................................................................................... -27V to +43V
INH
DC Voltage....................................................................................................................................... -0.3V to (VS + 0.3V)
DC Voltage........................................................................................................................................ -100 mA to +30 mA
WKin voltage levels
DC Voltage (VWKIN).................................................................................................................................... -0.3V to +40V
Transient voltage according to ISO7637 (coupling 1 nF, with 2.7K serial resistor)................................. -150V to +100V
ESD according to IBEE LIN EMC; test specification 1.0 following IEC 61000-4-2
Pin VS, LIN to GND, WKin (with external circuitry according to applications diagram) ...........................................±6 kV
ESD HBM following STM5.1 with 1.5 k/100 pF
Pin VS, LIN, INH to GND ........................................................................................................................................ ±6 kV
Pin WKin to GND .................................................................................................................................................... ±5 kV
HBM ESD ANSI/ESD-STM5.1 JESD22-A114 AEC-Q100 (002) ............................................................................. ±3 kV
CDM ESD STM 5.3.1............................................................................................................................................. ±750V
Machine Model ESD AEC-Q100-RevF(003).......................................................................................................... ±200V
Virtual Junction Temperature (TVJ) ........................................................................................................ -40°C to +150°C
Storage Temperature (TS).......................................................................................................................-55°C to +150°C
† Notice: Stresses above those listed under “Maximum Ratings” may cause permanent damage to the device. This
is a stress rating only and functional operation of the device at those or any other conditions above those indicated in
the operational sections of this specification is not intended. Exposure to maximum rating conditions for extended
periods may affect device reliability.
2019-2021 Microchip Technology Inc.
DS20006191D-page 9
ATA663211
ELECTRICAL CHARACTERISTICS
Electrical Characteristics: Unless otherwise specified all values refer to GND pins, 5V < VVS < 28V, -40°C < TVJ < 150°C.
No.
Parameters
VS Pin
Symbol
Min.
Typ.
Max.
Unit
Conditions
1
Nominal DC
Voltage Range
VVS
5
3
13.5
9
28
15
V
1.1
Supply Current
in Sleep mode
IVSsleep
A
Sleep mode
V
V
LIN > VVS - 0.5V
VS < 14V, T = 27°C (Note 1)
IVSsleep
3
11
50
18
A
A
Sleep mode
1.3
V
V
LIN > VVS – 0.5V
VS < 14V
IVSsleep_short
20
100
Sleep mode, VLIN = 0V
bus shorted to GND
VVVS < 14V
Supply Current
in Normal Mode
IVSrec
150
200
250
700
320
950
A
A
Bus recessive
1.4
1.5
1.6
1.7
V
VS < 14V
Supply Current
in Normal Mode
IVSdom
Bus dominant
(internal LIN pull-up resistor
active)
V
VS < 14V
Bus recessive
VVS < 14V
Supply Current
in Fail-Safe mode
IVSfail
40
80
110
A
VS Undervoltage
Threshold (switching
from Normal to
VVS_th_N_F_down
VVS_th_F_N_up
3.9
4.1
4.3
4.6
4.7
4.9
V
V
Decreasing supply voltage
Increasing supply voltage
Fail-Safe mode)
VS Undervoltage
Hysteresis
VVS_hys_F_N
VVS_th_U_F_down
VVS_th_U_F_up
VVS_hys_U
0.1
1.9
2.0
0.1
0.25
2.05
2.25
0.2
0.4
2.3
2.4
0.3
V
V
V
V
1.8
1.9
VS Operation
Threshold (switching
to Unpowered mode)
Switch to Unpowered mode
Switch from Unpowered
to Fail-Safe mode
VS Undervoltage
Hysteresis
1.10
2
3
RXD Output Pin (Open Drain)
Low-Level Output Sink
Capability
VRXDL
—
-3
0.2
—
0.4
+3
V
Normal mode,
2.1
2.3
V
LIN = 0V, IRXD = 2 mA
High-Level
IRXDH
A
Normal mode
VLIN = VVS, VRXD = 5V
Leakage Current
TXD Input/Output Pin
Low-Level Voltage
Input
VTXDL
VTXDH
-0.3
2
—
—
+0.8
5.5
V
V
3.1
3.2
High-Level Voltage
Input
Pull-Down Resistor
RTXD
150
-3
200
—
300
+3
k
A
VTXD = 5V
VTXD = 0V
3.5
3.6
Low-level
ITXD
Leakage Current
Note 1: 100% correlation tested.
2: Characterized on samples.
3: Design parameter.
DS20006191D-page 10
2019-2021 Microchip Technology Inc.
ATA663211
ELECTRICAL CHARACTERISTICS (CONTINUED)
Electrical Characteristics: Unless otherwise specified all values refer to GND pins, 5V < VVS < 28V, -40°C < TVJ < 150°C.
No.
Parameters
Symbol
Min.
Typ.
Max.
Unit
mA Fail-Safe mode
TXD = 0.4V
Conditions
Low-Level Output Sink
Current at Wake-Up
Request
ITXD
2
2.5
8
V
3.7
4
EN Input Pin
Low-Level
Voltage Input
VENL
VENH
-0.3
2
—
—
+0.8
5.5
V
V
4.1
High-Level
Voltage Input
4.2
4.3
4.4
Pull-Down Resistor
REN
IEN
50
-3
125
—
200
+3
k
A
VEN = 5V
VEN = 0V
Low-Level
Input Current
6
WKin Input Pin
High-Level Input
Voltage
VWKinH
VWKinL
VVS – 1V
-1
—
—
VVS + 0.3V
V
V
6.1
Low-Level Input
Voltage
V
VS – 3.3V
Initializes a wake-up signal
6.2
6.3
6.4
WKin Pull-Up Current
IWKIN
-30
-5
-10
—
A
A
VVS < 28V, VWKin = 0V
VVS = 28V, VWKin = 28V
High-Level Leakage
Current
IWKINL
+5
Debounce Time of
Low Pulse for Wake
up via WKin
tWKin
50
100
150
s
VWKin = 0V
6.5
7
INH Output Pin
Switch on Resistance
Between VS and INH
RDSON,INH
ILEAK,INH
VINH
—
-3
12
—
—
25
+3
A
V
Normal or Fail-Safe mode
IINH = -15 mA
7.1
7.2
7.3
Leakage Current
Transceiver in Sleep mode,
VINH = 0V/28V, VVS = 28V
High-Level Voltage
VVS
0.375
–
VVS
Normal or Fail-Safe mode
IINH = -15 mA
10
LIN Bus Driver: Bus Load Conditions:
Load 1 (small): 1 nF, 1 k; Load 2 (large): 10 nF, 500; External Pull-up RRXD = 4.7 k ; CRXD = 20 pF,
Load 3 (medium): 6.8 nF, 660 characterized on samples, 12.7 and 12.8 specifies the timing parameters for proper
operation at 20 kb/s and 12.9 and 12.10 at 10.4 kb/s
Driver Recessive
Output Voltage
VBUSrec
V_LoSUP
V_HISUP
V_LoSUP_1k
V_HISUP_1K
RLIN
0.9 * VVS
—
—
—
—
—
30
VVS
1.2
2
V
V
Load1/Load2
10.1
Driver Dominant
Voltage
—
—
VVS = 7V
10.2
10.3
10.4
10.5
10.6
Rload = 500
Driver Dominant
Voltage
V
VVS = 18V
Rload = 500
Driver Dominant
Voltage
0.6
0.8
20
—
V
VVS = 7V
Rload = 1000
Driver Dominant
Voltage
—
V
VVS = 18V
Rload = 1000
Pull-Up Resistor to VS
47
k
The serial diode is mandatory
Note 1: 100% correlation tested.
2: Characterized on samples.
3: Design parameter.
2019-2021 Microchip Technology Inc.
DS20006191D-page 11
ATA663211
ELECTRICAL CHARACTERISTICS (CONTINUED)
Electrical Characteristics: Unless otherwise specified all values refer to GND pins, 5V < VVS < 28V, -40°C < TVJ < 150°C.
No.
Parameters
Symbol
Min.
Typ.
Max.
Unit
Conditions
Voltage Drop at the
Serial Diodes
VSerDiode
0.4
—
1.0
V
In pull-up path with RLIN
ISerDiode = 10 mA (Note 3)
10.7
LIN Current Limitation
IBUS_LIM
40
-1
120
200
—
mA
10.8
10.9
V
BUS = VBAT_MAX
Input leakage current
at the receiver
including pull-up
IBUS_PAS_dom
-0.35
mA Input leakage current
driver off
V
V
BUS= 0V
BAT = 12V
resistor as specified
Leakage Current
LIN Recessive
IBUS_PAS_rec
—
10
20
A
A
Driver off
8V < VBAT< 18V
8V < VBUS < 18V
10.10
V
BUS ≥ VBAT
Leakage current when
control unit is
IBUS_NO_gnd
-10
+0.5
+10
GNDDevice = VVS
VBAT= 12V
disconnected from
0V < VBUS< 18V
10.11 ground. Loss of local
ground must not affect
communication in the
residual network
Leakage current at
disconnected battery.
Node has to sustain
IBUS_NO_bat
—
0.1
2
A
VBAT disconnected
V
SUP_device = GND
0V < VBUS < 18V
the current that can
flow under this
10.12
condition. Bus must
remain operational
under this condition.
Capacitance on LIN
pin to GND
CLIN
—
—
20
pF
V
(Note 3)
10.13
11
LIN Bus Receiver
Center of Receiver
Threshold
VBUS_CNT
0.475 * VVS 0.5 * VS 0.525 * VVS
VBUS_CNT =
(Vth_dom + Vth_rec)/2
11.1
Receiver Dominant
State
VBUSdom
VBUSrec
VBUShys
-27
—
—
0.4 * VS
40
V
V
V
VEN = 5V
11.2
11.3
Receiver Recessive
State
0.6 * VVS
VEN = 5V
Receiver Input
Hysteresis
0.028 * VVS 0.1 * VS 0.175 * VVS
Vhys
=
11.4
V
th_rec - Vth_dom
Pre-Wake Detection
11.5 LIN High-Level Input
Voltage
VLINH
VVS – 2V
-27
—
—
VVS + 0.3V
VVS – 3.3V
V
V
Pre-Wake Detection
11.6 LIN Low-Level Input
Voltage
VLINL
Activates the LIN receiver
Note 1: 100% correlation tested.
2: Characterized on samples.
3: Design parameter.
DS20006191D-page 12
2019-2021 Microchip Technology Inc.
ATA663211
ELECTRICAL CHARACTERISTICS (CONTINUED)
Electrical Characteristics: Unless otherwise specified all values refer to GND pins, 5V < VVS < 28V, -40°C < TVJ < 150°C.
No.
12
Parameters
Symbol
Min.
Typ.
Max.
Unit
Conditions
Internal timers
Dominant time for
wake up via LIN bus
50
5
100
15
150
20
VLIN = 0V
VEN = 5V
tbus
s
s
12.1
Time delay for mode
change from Fail-Safe
into Normal mode via
EN pin
tnorm
12.2
Time delay for mode
change from Normal
mode to Sleep mode
via EN pin
5
15
20
VEN = 0V
VEN = 5V
tsleep
s
s
12.3
Time delay for mode
change from Sleep
mode to Normal mode
via EN pin
—
150
300
ts_n
12.4
12.5
TXD dominant
time-out time
20
40
—
60
—
VTXD = 0V
tdom
D1
ms
—
Duty Cycle 1
Duty Cycle 2
Duty Cycle 3
Duty Cycle 4
0.396
THRec(max) = 0.744 x VVS
THDom(max) = 0.581 x VVS
VVS = 7.0V to 18V
12.7
12.8
12.9
t
Bit = 50 s
D1 = tbus_rec(min)/(2 x tBit
)
—
0.417
—
—
—
—
—
0.581
THRec(min) = 0.422 x VVS
THDom(min) = 0.284 x VVS
VVS = 7.6V to 18V
D2
D3
D4
—
—
—
s
t
Bit = 50 s
D2 = tbus_rec(max)/(2 x tBit
)
—
THRec(max) = 0.778 x VVS
THDom(max) = 0.616 x VVS
VVS = 7.0V to 18V
t
Bit = 96 µs
D3 = tbus_rec(min)/(2 x tBit
)
0.590
22.5
THRec(min) = 0.389 x VVS
THDom(min) = 0.251 x VVS
VVS = 7.6V to 18V
12.10
12.11
t
Bit = 96 µs
D4 = tbus_rec(max)/(2 x tBit
)
Slope time falling and
rising edge at LIN
3.5
VVS = 7.0V to 18V
tSLOPE_fall
tSLOPE_rise
13
Receiver electrical AC parameters of the LIN physical layer
LIN receiver, RXD load conditions: CRXD = 20 pF, RRXD = 4.7 k
Propagation delay of
receiver
—
-2
—
—
5
VVS = 7.0V to 18V
trx_pd
s
s
13.1
13.2
t
rx_pd = max(trx_pdr, trx_pdf
)
Symmetry of receiver
propagation delay
rising edge minus
falling edge
+2
VVS = 7.0V to 18V
trx_sym
t
rx_sym = trx_pdr - trx_pdf
Note 1: 100% correlation tested.
2: Characterized on samples.
3: Design parameter.
2019-2021 Microchip Technology Inc.
DS20006191D-page 13
ATA663211
FIGURE 2-1:
DEFINITION OF BUS TIMING CHARACTERISTICS
tBit
tBit
tBit
TXD
(Input to transmitting node)
tBus_dom(max)
tBus_rec(min)
Thresholds of
receiving node1
THRec(max)
VS
THDom(max)
(Transceiver supply
of transmitting node)
LIN Bus Signal
Thresholds of
THRec(min)
THDom(min)
receiving node2
tBus_dom(min)
tBus_rec(max)
RXD
(Output of receiving node1)
trx_pdf(1)
trx_pdr(1)
RXD
(Output of receiving node2)
trx_pdr(2)
trx_pdf(2)
TEMPERATURE SPECIFICATIONS 8-LEAD VDFN
Parameters
Sym.
Min.
Typ.
Max.
Unit
Thermal resistance virtual junction to exposed
thermal pad
RthvJC
—
10
—
K/W
Thermal resistance virtual junction to ambient,
where exposed thermal pad is soldered to the PCB,
according to JEDEC
RthvJA
—
50
—
K/W
Thermal shutdown
Toff
150
—
165
10
180
—
°C
°C
Thermal shutdown hysteresis
Thys
TEMPERATURE SPECIFICATIONS 8-LEAD SOIC
Parameters
Sym.
Min.
Typ.
Max.
Unit
Thermal resistance virtual junction to ambient, with
a heat sink at GND (pin 5) on PCB (fused lead frame
to pin 5)
RthvJA
—
80
—
K/W
Thermal shutdown
Toff
150
5
165
10
180
20
°C
°C
Thermal shutdown hysteresis
Thys
DS20006191D-page 14
2019-2021 Microchip Technology Inc.
ATA663211
3.0
PACKAGING INFORMATION
Package Marking Information
8-Lead VDFN (3x3 mm)
Example ATA663211
XXXXXX
NNN
663211
256
PIN 1
PIN 1
8-Lead SOIC (3.90 mm)
Example ATA663211
Atmel YWW
Atmel 841
XXXXXX
663211
YYWWNNN
1841256
Legend: XX...X Customer-specific information
Y
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC designator for Matte Tin (Sn)
This package is Pb-free. The Pb-free JEDEC designator (
can be found on the outer packaging for this package.
YY
WW
NNN
3
e
*
)
e
3
●, ▲, ▼ Pin one index is identified by a dot, delta up, or delta down (triangle
mark).
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information. Package may or may not include
the corporate logo.
Underbar (_) symbol may not be to scale.
2019-2021 Microchip Technology Inc.
DS20006191D-page 15
ATA663211
8-Lead Plastic Small Outline (OA) - Narrow, 3.90 mm (.150 In.) Body [SOIC]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
2X
0.10 C A–B
D
A
D
NOTE 5
N
E
2
E1
2
E1
E
2X
0.10 C A–B
2X
0.10 C A–B
1
2
NOTE 1
e
NX b
0.25
C A–B D
B
NOTE 5
TOP VIEW
0.10 C
0.10 C
C
A2
A
SEATING
PLANE
8X
SIDE VIEW
A1
h
R0.13
R0.13
h
H
0.23
L
SEE VIEW C
(L1)
VIEW A–A
VIEW C
Microchip Technology Drawing No. C04-057-OA Rev F Sheet 1 of 2
DS20006191D-page 16
2019-2021 Microchip Technology Inc.
ATA663211
8-Lead Plastic Small Outline (OA) - Narrow, 3.90 mm (.150 In.) Body [SOIC]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Units
Dimension Limits
MILLIMETERS
MIN
NOM
MAX
Number of Pins
Pitch
Overall Height
Molded Package Thickness
Standoff
N
8
e
1.27 BSC
A
-
-
-
-
1.75
-
0.25
A2
A1
E
1.25
0.10
§
Overall Width
6.00 BSC
Molded Package Width
Overall Length
Chamfer (Optional)
Foot Length
E1
D
h
3.90 BSC
4.90 BSC
0.25
0.40
-
-
0.50
1.27
L
Footprint
Foot Angle
Lead Thickness
Lead Width
Mold Draft Angle Top
Mold Draft Angle Bottom
L1
1.04 REF
0°
0.17
0.31
5°
-
-
-
-
-
8°
c
b
0.25
0.51
15°
5°
15°
Notes:
1. Pin 1 visual index feature may vary, but must be located within the hatched area.
2. § Significant Characteristic
3. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or
protrusions shall not exceed 0.15mm per side.
4. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
REF: Reference Dimension, usually without tolerance, for information purposes only.
5. Datums A & B to be determined at Datum H.
Microchip Technology Drawing No. C04-057-OA Rev F Sheet 2 of 2
2019-2021 Microchip Technology Inc.
DS20006191D-page 17
ATA663211
8-Lead Plastic Small Outline (OA) - Narrow, 3.90 mm (.150 In.) Body [SOIC]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
SILK SCREEN
C
Y1
X1
E
RECOMMENDED LAND PATTERN
Units
Dimension Limits
MILLIMETERS
NOM
MIN
MAX
Contact Pitch
E
C
X1
Y1
1.27 BSC
5.40
Contact Pad Spacing
Contact Pad Width (X8)
Contact Pad Length (X8)
0.60
1.55
Notes:
1. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
Microchip Technology Drawing C04-2057-OA Rev F
DS20006191D-page 18
2019-2021 Microchip Technology Inc.
ATA663211
8-Lead Very Thin Plastic Dual Flat, No Lead Package (Q8B) - 3x3 mm Body [VDFN]
With 2.40x1.60 mm Exposed Pad and Stepped Wettable Flanks; Atmel Legacy YCL
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
D
A
B
E
N
(DATUM A)
(DATUM B)
NOTE 1
2X
0.10 C
1
2
2X
TOP VIEW
0.10 C
0.10 C
0.08 C
C
A
A1
SEATING
PLANE
8X
SIDE VIEW
(A3)
0.10
C A B
D2
2
A
A
1
NOTE 1
0.10
C A B
E2
K
N
L
8X b
0.10
0.05
C A B
C
e
BOTTOM VIEW
Microchip Technology Drawing C04-21358 Rev C Sheet 1 of 2
2019-2021 Microchip Technology Inc.
DS20006191D-page 19
ATA663211
8-Lead Very Thin Plastic Dual Flat, No Lead Package (Q8B) - 3x3 mm Body [VDFN]
With 2.40x1.60 mm Exposed Pad and Stepped Wettable Flanks; Atmel Legacy YCL
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
A4
PARTIALLY
PLATED
E3
SECTION A–A
Units
Dimension Limits
MILLIMETERS
MIN
NOM
MAX
Number of Terminals
Pitch
Overall Height
Standoff
Terminal Thickness
Overall Length
Exposed Pad Length
Overall Width
Exposed Pad Width
Terminal Width
Terminal Length
N
8
0.65 BSC
0.90
0.035
0.203 REF
3.00 BSC
2.40
3.00 BSC
1.60
0.30
e
A
A1
A3
D
D2
E
E2
b
L
K
0.80
0.00
1.00
0.05
2.30
2.50
1.50
0.25
0.35
0.20
0.10
-
1.70
0.35
0.45
-
0.19
0.085
0.40
-
-
-
Terminal-to-Exposed-Pad
Wettable Flank Step Cut Depth
Wettable Flank Step Cut Width
A4
E3
Notes:
1. Pin 1 visual index feature may vary, but must be located within the hatched area.
2. Package is saw singulated
3. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
REF: Reference Dimension, usually without tolerance, for information purposes only.
Microchip Technology Drawing C04-21358 Rev C Sheet 2 of 2
DS20006191D-page 20
2019-2021 Microchip Technology Inc.
ATA663211
8-Lead Very Thin Plastic Dual Flat, No Lead Package (Q8B) - 3x3 mm Body [VDFN]
With 2.40x1.60 mm Exposed Pad and Stepped Wettable Flanks
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Y2
EV
8
ØV
C X2
EV
CH
G1
Y1
1
2
SILK SCREEN
X1
G2
E
RECOMMENDED LAND PATTERN
Units
Dimension Limits
E
MILLIMETERS
NOM
0.65 BSC
MIN
MAX
Contact Pitch
Optional Center Pad Width
Optional Center Pad Length
Contact Pad Spacing
X2
Y2
C
1.70
2.50
3.00
Contact Pad Width (X8)
Contact Pad Length (X8)
Contact Pad to Center Pad (X8)
Contact Pad to Contact Pad (X6)
Pin 1 Index Chamfer
Thermal Via Diameter
Thermal Via Pitch
X1
Y1
G1
G2
CH
V
0.35
0.80
0.20
0.20
0.20
0.33
1.20
EV
Notes:
1. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
2. For best soldering results, thermal vias, if used, should be filled or tented to avoid solder loss during
reflow process
Microchip Technology Drawing C04-23358 Rev C
2019-2021 Microchip Technology Inc.
DS20006191D-page 21
ATA663211
NOTES:
DS20006191D-page 22
2019-2021 Microchip Technology Inc.
ATA663211
APPENDIX A: REVISION HISTORY
Revision D (June 2021)
The following is the list of modifications:
• The current LIN standards use the terminology
"Master" and "Slave”. The LIN standard groups
have decided that the terms "Commander" and
"Responder" will be used in future.
• Updated the VDFN8 package drawing.
• Minor text updates.
Revision C (July 2020)
• Parameter 13.1 in chapter 2.0 “Electrical
Characteristics” updated
• Updated the marking information for the SOIC
package in the “Package Marking Information”
section
Revision B (April 2020)
•
“Package Marking Information” updated
• Minor editorial changes
Revision A (April 2019)
• Original release of this document
• Minor text updates
• This document replaces
Atmel – 9359D-AUTO-10/16
2019-2021 Microchip Technology Inc.
DS20006191D-page 23
ATA663211
NOTES:
DS20006191D-page 24
2019-2021 Microchip Technology Inc.
ATA663211
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
Examples:
–
PART NO.
XX
[X](1)
[X]
a) ATA663211-GAQW
8-Lead SOIC,
Tape and Reel package according
to RoHS
Device
Package Tape and Reel Package Directives
Classification
Option
b) ATA663211-GBQW
8-Lead VDFN,
Tape and Reel package according
to RoHS
Device:
ATA663211
Note 1: Tape and Reel identifier only appears in the catalog
part number description. This identifier is used for
ordering purposes and is not printed on the device
package. Check with your Microchip Sales Office
for package availability with the Tape and Reel
option.
Package:
GA
GB
=
=
8-Lead SOIC
8-Lead VDFN
(1)
Tape and Reel
Option:
Q
=
=
330 mm diameter Tape and Reel
2: RoHS compliant; maximum concentration value of
0.09% (900 ppm) for Bromine (Br) and Chlorine
(Cl) and less than 0.15% (1500 ppm) total Bromine
(Br) and Chlorine (Cl) in any homogeneous
material. Maximum concentration value of 0.09%
(900 ppm) for Antimony (Sb) in any homogeneous
material.
(1)
Package Directives
Classification:
W
Package according to RoHS
2019-2021 Microchip Technology Inc.
DS20006191D-page 25
ATA663211
NOTES:
DS20006191D-page 26
2019-2021 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
•
•
Microchip products meet the specifications contained in their particular Microchip Data Sheet.
Microchip believes that its family of products is secure when used in the intended manner and under normal conditions.
There are dishonest and possibly illegal methods being used in attempts to breach the code protection features of the Microchip
devices. We believe that these methods require using the Microchip products in a manner outside the operating specifications
contained in Microchip's Data Sheets. Attempts to breach these code protection features, most likely, cannot be accomplished
without violating Microchip's intellectual property rights.
•
•
Microchip is willing to work with any customer who is concerned about the integrity of its code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of its code. Code protection does not
mean that we are guaranteeing the product is "unbreakable." Code protection is constantly evolving. We at Microchip are
committed to continuously improving the code protection features of our products. Attempts to break Microchip's code protection
feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or
other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication is provided for the sole
purpose of designing with and using Microchip products. Infor-
mation regarding device applications and the like is provided
only for your convenience and may be superseded by updates.
It is your responsibility to ensure that your application meets
with your specifications.
Trademarks
The Microchip name and logo, the Microchip logo, Adaptec,
AnyRate, AVR, AVR logo, AVR Freaks, BesTime, BitCloud, chipKIT,
chipKIT logo, CryptoMemory, CryptoRF, dsPIC, FlashFlex,
flexPWR, HELDO, IGLOO, JukeBlox, KeeLoq, Kleer, LANCheck,
LinkMD, maXStylus, maXTouch, MediaLB, megaAVR, Microsemi,
Microsemi logo, MOST, MOST logo, MPLAB, OptoLyzer,
PackeTime, PIC, picoPower, PICSTART, PIC32 logo, PolarFire,
Prochip Designer, QTouch, SAM-BA, SenGenuity, SpyNIC, SST,
SST Logo, SuperFlash, Symmetricom, SyncServer, Tachyon,
TimeSource, tinyAVR, UNI/O, Vectron, and XMEGA are registered
trademarks of Microchip Technology Incorporated in the U.S.A. and
other countries.
THIS INFORMATION IS PROVIDED BY MICROCHIP "AS IS".
MICROCHIP MAKES NO REPRESENTATIONS OR WAR-
RANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED,
WRITTEN OR ORAL, STATUTORY OR OTHERWISE,
RELATED TO THE INFORMATION INCLUDING BUT NOT
LIMITED TO ANY IMPLIED WARRANTIES OF NON-
INFRINGEMENT, MERCHANTABILITY, AND FITNESS FOR A
PARTICULAR PURPOSE OR WARRANTIES RELATED TO
ITS CONDITION, QUALITY, OR PERFORMANCE.
AgileSwitch, APT, ClockWorks, The Embedded Control Solutions
Company, EtherSynch, FlashTec, Hyper Speed Control, HyperLight
Load, IntelliMOS, Libero, motorBench, mTouch, Powermite 3,
Precision Edge, ProASIC, ProASIC Plus, ProASIC Plus logo, Quiet-
Wire, SmartFusion, SyncWorld, Temux, TimeCesium, TimeHub,
TimePictra, TimeProvider, WinPath, and ZL are registered
trademarks of Microchip Technology Incorporated in the U.S.A.
IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDI-
RECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUEN-
TIAL LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND
WHATSOEVER RELATED TO THE INFORMATION OR ITS
USE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS
BEEN ADVISED OF THE POSSIBILITY OR THE DAMAGES
ARE FORESEEABLE. TO THE FULLEST EXTENT
ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON
ALL CLAIMS IN ANY WAY RELATED TO THE INFORMATION
OR ITS USE WILL NOT EXCEED THE AMOUNT OF FEES, IF
ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP
FOR THE INFORMATION. Use of Microchip devices in life sup-
port and/or safety applications is entirely at the buyer's risk, and
the buyer agrees to defend, indemnify and hold harmless
Microchip from any and all damages, claims, suits, or expenses
resulting from such use. No licenses are conveyed, implicitly or
otherwise, under any Microchip intellectual property rights
unless otherwise stated.
Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any
Capacitor, AnyIn, AnyOut, Augmented Switching, BlueSky,
BodyCom, CodeGuard, CryptoAuthentication, CryptoAutomotive,
CryptoCompanion, CryptoController, dsPICDEM, dsPICDEM.net,
Dynamic Average Matching, DAM, ECAN, Espresso T1S,
EtherGREEN, IdealBridge, In-Circuit Serial Programming, ICSP,
INICnet, Intelligent Paralleling, Inter-Chip Connectivity,
JitterBlocker, maxCrypto, maxView, memBrain, Mindi, MiWi,
MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK,
NetDetach, Omniscient Code Generation, PICDEM, PICDEM.net,
PICkit, PICtail, PowerSmart, PureSilicon, QMatrix, REAL ICE,
Ripple Blocker, RTAX, RTG4, SAM-ICE, Serial Quad I/O,
simpleMAP, SimpliPHY, SmartBuffer, SMART-I.S., storClad, SQI,
SuperSwitcher, SuperSwitcher II, Switchtec, SynchroPHY, Total
Endurance, TSHARC, USBCheck, VariSense, VectorBlox, VeriPHY,
ViewSpan, WiperLock, XpressConnect, and ZENA are trademarks
of Microchip Technology Incorporated in the U.S.A. and other
countries.
SQTP is a service mark of Microchip Technology Incorporated in
the U.S.A.
The Adaptec logo, Frequency on Demand, Silicon Storage
Technology, and Symmcom are registered trademarks of Microchip
Technology Inc. in other countries.
GestIC is a registered trademark of Microchip Technology Germany
II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in
other countries.
All other trademarks mentioned herein are property of their
respective companies.
© 2019-2021, Microchip Technology Incorporated, All Rights
Reserved.
For information regarding Microchip’s Quality Management Systems,
please visit www.microchip.com/quality.
ISBN: 978-1-5224-8328-1
2019-2021 Microchip Technology Inc.
DS20006191D-page 27
Worldwide Sales and Service
AMERICAS
ASIA/PACIFIC
ASIA/PACIFIC
EUROPE
Corporate Office
2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7200
Fax: 480-792-7277
Technical Support:
http://www.microchip.com/
support
Australia - Sydney
Tel: 61-2-9868-6733
India - Bangalore
Tel: 91-80-3090-4444
Austria - Wels
Tel: 43-7242-2244-39
Fax: 43-7242-2244-393
China - Beijing
Tel: 86-10-8569-7000
India - New Delhi
Tel: 91-11-4160-8631
Denmark - Copenhagen
Tel: 45-4485-5910
Fax: 45-4485-2829
China - Chengdu
Tel: 86-28-8665-5511
India - Pune
Tel: 91-20-4121-0141
Finland - Espoo
Tel: 358-9-4520-820
China - Chongqing
Tel: 86-23-8980-9588
Japan - Osaka
Tel: 81-6-6152-7160
Web Address:
www.microchip.com
France - Paris
Tel: 33-1-69-53-63-20
Fax: 33-1-69-30-90-79
China - Dongguan
Tel: 86-769-8702-9880
Japan - Tokyo
Tel: 81-3-6880- 3770
Atlanta
Duluth, GA
Tel: 678-957-9614
Fax: 678-957-1455
China - Guangzhou
Tel: 86-20-8755-8029
Korea - Daegu
Tel: 82-53-744-4301
Germany - Garching
Tel: 49-8931-9700
China - Hangzhou
Tel: 86-571-8792-8115
Korea - Seoul
Tel: 82-2-554-7200
Germany - Haan
Tel: 49-2129-3766400
Austin, TX
Tel: 512-257-3370
China - Hong Kong SAR
Tel: 852-2943-5100
Malaysia - Kuala Lumpur
Tel: 60-3-7651-7906
Germany - Heilbronn
Tel: 49-7131-72400
Boston
Westborough, MA
Tel: 774-760-0087
Fax: 774-760-0088
China - Nanjing
Tel: 86-25-8473-2460
Malaysia - Penang
Tel: 60-4-227-8870
Germany - Karlsruhe
Tel: 49-721-625370
China - Qingdao
Philippines - Manila
Germany - Munich
Tel: 49-89-627-144-0
Fax: 49-89-627-144-44
Tel: 86-532-8502-7355
Tel: 63-2-634-9065
Chicago
Itasca, IL
Tel: 630-285-0071
Fax: 630-285-0075
China - Shanghai
Tel: 86-21-3326-8000
Singapore
Tel: 65-6334-8870
Germany - Rosenheim
Tel: 49-8031-354-560
China - Shenyang
Tel: 86-24-2334-2829
Taiwan - Hsin Chu
Tel: 886-3-577-8366
Dallas
Addison, TX
Tel: 972-818-7423
Fax: 972-818-2924
Israel - Ra’anana
Tel: 972-9-744-7705
China - Shenzhen
Tel: 86-755-8864-2200
Taiwan - Kaohsiung
Tel: 886-7-213-7830
Italy - Milan
Tel: 39-0331-742611
Fax: 39-0331-466781
China - Suzhou
Tel: 86-186-6233-1526
Taiwan - Taipei
Tel: 886-2-2508-8600
Detroit
Novi, MI
Tel: 248-848-4000
China - Wuhan
Tel: 86-27-5980-5300
Thailand - Bangkok
Tel: 66-2-694-1351
Italy - Padova
Tel: 39-049-7625286
Houston, TX
Tel: 281-894-5983
China - Xian
Tel: 86-29-8833-7252
Vietnam - Ho Chi Minh
Tel: 84-28-5448-2100
Netherlands - Drunen
Tel: 31-416-690399
Fax: 31-416-690340
Indianapolis
Noblesville, IN
Tel: 317-773-8323
Fax: 317-773-5453
Tel: 317-536-2380
China - Xiamen
Tel: 86-592-2388138
Norway - Trondheim
Tel: 47-7288-4388
China - Zhuhai
Tel: 86-756-3210040
Poland - Warsaw
Tel: 48-22-3325737
Los Angeles
Mission Viejo, CA
Tel: 949-462-9523
Fax: 949-462-9608
Tel: 951-273-7800
Romania - Bucharest
Tel: 40-21-407-87-50
Spain - Madrid
Tel: 34-91-708-08-90
Fax: 34-91-708-08-91
Raleigh, NC
Tel: 919-844-7510
Sweden - Gothenberg
Tel: 46-31-704-60-40
New York, NY
Tel: 631-435-6000
Sweden - Stockholm
Tel: 46-8-5090-4654
San Jose, CA
Tel: 408-735-9110
Tel: 408-436-4270
UK - Wokingham
Tel: 44-118-921-5800
Fax: 44-118-921-5820
Canada - Toronto
Tel: 905-695-1980
Fax: 905-695-2078
DS20006191D-page 28
2019-2021 Microchip Technology Inc.
02/28/20
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