DSC2011FE1-E0005 [MICROCHIP]

OSC MEMS CONFIGURABLE OUTPUT;


型号：	DSC2011FE1-E0005
厂家：	MICROCHIP
描述：	OSC MEMS CONFIGURABLE OUTPUT 输出元件
文件：	总6页 (文件大小：530K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

DSC2011

Low-Jitter Configurable Dual CMOS Oscillator

General Description

Features

The DSC2011 series of high performance

dual output CMOS oscillators utilize a proven

silicon MEMS technology to provide excellent

jitter and stability while incorporating

 Low RMS Phase Jitter: <1 ps (typ)

 High Stability: ±10, ±25, ±50 ppm

 Wide Temperature Range

o Automotive: -55° to 125° C

o Ext. Industrial: -40° to 105° C

o Industrial: -40° to 85° C

additional device functionality.

The two

CMOS outputs are controlled by separate

supply voltages to allow for independent

voltage level control. The frequencies of the

outputs can be identical or independently

derived from a common PLL frequency

source. The DSC2011 has provision for up to

eight user-defined pre-programmed, pin-

selectable output frequency combinations.

The DSC2011 is also equipped with

independent pin-selectable output drive

strengths for each output to reduce EMI and

noise.

o Ext. commercial: -20° to 70° C

 High Supply Noise Rejection: -50 dBc

 Two Independent CMOS Outputs

 Pin-Selectable Configurations

o 2-bit Output Drive Strength

o 3-bit Output Frequency Combinations

 Short Lead Times: 2 Weeks

 Wide Freq. Range:

o CMOS Output: 2.3 to 170 MHz

DSC2011 is packaged in a 14-pin 3.2x2.5

QFN

package

and

available

temperature grades from Ext. Commercial to

Automotive.

 Miniature Footprint of 3.2x2.5mm

 Excellent Shock & Vibration Immunity

o Qualified to MIL-STD-883

 High Reliability

o 20x better MTF than quartz oscillators

Block Diagram

 Supply Range of 2.25 to 3.6 V

 Lead Free & RoHS Compliant

Applications

 Consumer Electronics

 Storage Area Networks

o SATA, SAS, Fibre Channel

 Passive Optical Networks

o EPON, 10G-EPON, GPON, 10G-PON

 Ethernet

o 1G, 10GBASE-T/KR/LR/SR, and FCoE

 HD/SD/SDI Video & Surveillance

 PCI Express

______________________________________________________________________________________________________________________________________________

DSC2011 Page 1 MK-Q-B-P-D-12042602-2

Low-Jitter Configurable Dual CMOS Oscillator

DSC2011

Pin Description

Pin No. Pin Name Pin Type

Description

Enable

Enables outputs when high and disables when low

Leave unconnected or grounded

O2S0

GND

Least significant bit for drive strength selection for Output 2

Ground

Power

FS0

FS1

Least significant bit for frequency selection

Middle bit for frequency selection

FS2

Most significant bit for frequency selection

CMOS output 1

Least significant bit for drive strength selection for output 1

Most significant bit for drive strength selection for output 1

CMOS output 2

Power Supply for Output 2

Power Supply

Most significant bit for drive strength selection for output 2

Output1

O1S0

O1S1

Output2

VDD2

VDD

Power

O2S1

Operational Description

The DSC2011 is a dual output CMOS oscillator

consisting of a MEMS resonator and a support

PLL IC. The two CMOS outputs are generated

through independent 8-bit programmable

dividers from the output of the internal PLL.

For temp ranges up to Industrial, two

constraints are imposed on the output

frequencies: 1) f₂=M x f₁/N, where M and N

are even integers between 4 and 254, 2)

1.2GHz < N x f₂< 1.7GHz. Please consult

factory for acceptable frequency combinations

for other temp ranges.

2. VDD2 must be equal to or less than VDD at

all times to insure proper operation. VDD2

can be as low as 1.65V.

When Enable (pin 1) is floated or connected to

VDD, the DSC2011 is in operational mode.

Driving Enable to ground will tri-state both

output drivers (hi-impedance mode).

The DSC2011 has programmable output drive

strength for each output. Using two control

pins (OXS0-OXS1) for each output, the drive

strength can be independently adjusted to

match circuit board impedances to reduce

power supply noise, overshoot/undershoot

and EMI. Table 1 displays typical rise / fall

times for the output with a 15pf load

capacitance as a function of these control pins

at VDD=3.3V and room temperature.

The actual frequencies output by the DSC2011

are controlled by an internal pre-programmed

memory (OTP).

coefficients required by the PLL for up to eight

different frequency combinations. Three

control pins (FS0 – FS2) select the output

frequency combination. Discera supports

This memory stores all

Table 1. Rise/Fall times for drive strengths

customer defined versions of the DSC2011.

Standard frequency options are described in in

the following sections.

Output Drive Strength Bits

[OXS1, OXS0] - Default [11]

1.6

2.4

1.4

2.2

1.2

1.5

1.1

1.4

The DSC2011 has independent control of the

output voltage levels of the two outputs. The

high voltage level of Output 1 is equal to the

main supply voltage, VDD (pin 13). VDD2

(pin 12) sets the high voltage level of Output

t_r(ns)

t_f(ns)

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DSC2011 Page 2 MK-Q-B-P-D-12042602-2

Low-Jitter Configurable Dual CMOS Oscillator

DSC2011

Output Clock Frequencies

Table 2 lists the standard frequency configurations and the associated ordering information to be

used in conjunction with the ordering code above. Customer defined combinations are available.

Table 2. Pre-programmed pin-selectable output frequency combinations

Freq Select Bits [FS2, FS1, FS0] – Default is [111]

Ordering

Info

Freq

(MHz)

000

001

010

011

100

101

110

111

f_OUT1

f_OUT2

f_OUT1

f_OUT2

f_OUT1

f_OUT2

f_OUT1

f_OUT2

f_OUT1

f_OUT2

f_OUT1

f_OUT2

f_OUT1

f_OUT2

f_OUT1

f_OUT2

E0001

E0002

E0004

125

100

125

106.25

100

156.25

125

156.25

125

74.25

148.5

E0005

E0006

148.5

74.25

74.25 148.35

37.125 74.175

74.175

37.0875

13.5

E0007

E0008

120

100

200

128

EXXXX

Contact factory for additional configurations.

Frequency select bit are weakly tied high so if left unconnected the default setting will be [111] and

the device will output the associated frequency highlighted in Bold.

0* – denotes invalid selection, output frequency is not specified.

______________________________________________________________________________________________________________________________________________

DSC2011

Page 3

MK-Q-B-P-D-12042602-2

Low-Jitter Configurable Dual CMOS Oscillator

DSC2011

Absolute Maximum Ratings

Ordering Code

Item

Min

Max

Unit Condition

Temp Range

E: -20 to 70

I: -40 to 85

L: -40 to 105

M: -55 to 125

Supply Voltage

Input Voltage

Junction Temp

Storage Temp

Soldering Temp

-0.3

+4.0

Packing

T: Tape & Reel

: Tube

-0.3 V_DD+0.3

-55

+150

+260

°C

DSC2011 F I 2

xxxxx

40sec max.

ESD

HBM

Package

Stability

1: ±50ppm

2: ±25ppm

5: ±10ppm

Freq (MHz)

See Freq. table

4000

400

1500

F: 3.2x2.5mm

CDM

Note: 1000+ years of data retention on internal memory

Specifications (Unless specified otherwise: T=25° C, max CMOS drive strength)

Parameter

Supply Voltage¹

Supply Current

Supply Current²

Condition

Min.

2.25

Typ.

Max.

3.6

Unit

V_DD

I_DD

EN pin low – outputs are disabled

EN pin high – outputs are enabled

C_L=15pF, F_O1=F_O2=125 MHz

Includes frequency variations due

to initial tolerance, temp. and

power supply voltage

I_DD

±10

±25

±50

±5

Frequency Stability

Aging

Startup Time³

Δf

ppm

Δf

t_SU

1 year @25°C

T=25°C

ppm

Input Logic Levels

Input logic high

Input logic low

V_IH

V_IL

0.75xV_DD

0.25xV_DD

Output Disable Time⁴

Output Enable Time

Pull-Up Resistor²

t_DA

t_EN

Pull-up exists on all digital IO

kΩ

CMOS Outputs

Output Logic Levels

Output logic high

Output logic low

Output Transition time⁴

Rise Time

V_OH

V_OL

0.9xV_DD

I=±6mA

0.1xV_DD

20% to 80%

C_L=15pf

t_R

t_F

1.1

1.4

Fall Time

Commercial/Industrial temp range

Automotive temp range

2.3

170

100

Frequency

f₀

MHz

Output Duty Cycle

Period Jitter⁵

SYM

J_PER

ps_RMS

F_O1=F_O2=125 MHz

200kHz to 20MHz @ 125MHz

100kHz to 20MHz @ 125MHz

12kHz to 20MHz @ 125MHz

0.3

0.38

1.7

Integrated Phase Noise

J_CC

ps_RMS

Notes:

Pin 4 V_DDshould be filtered with 0.01uf capacitor.

Output is enabled if Enable pad is floated or not connected.

t_suis time to 100PPM stable output frequency after V_DDis applied and outputs are enabled.

Output Waveform and Test Circuit figures below define the parameters.

Period Jitter includes crosstalk from adjacent output.

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DSC2011 Page 4 MK-Q-B-P-D-12042602-2

Low-Jitter Configurable Dual CMOS Oscillator

DSC2011

Nominal Performance Parameters (Unless specified otherwise: T=25° C, V_DD=3.3 V)

2.5

25MHz-CMOS

50MHz-CMOS

106MHz-CMOS

125MHz-CMOS

2.0

1.5

1.0

0.5

0.0

200

400

600

800

1000

Low-end of integration BW: x kHz to 20 MHz

CMOS Phase jitter (integrated phase noise)

Output Waveform: CMOS

t_R

t_F

V_OH

Output

Enable

V_OL

t_EN

1/f_o

t_DA

V_IH

V_IL

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DSC2011 Page 5 MK-Q-B-P-D-12042602-2

Low-Jitter Configurable Dual CMOS Oscillator

DSC2011

Solder Reflow Profile

20-40

Sec

260°C

MSL 1 @ 260°C refer to JSTD-020C

Ramp-Up Rate (200°C to Peak Temp) 3°C/Sec Max.

217°C

200°C

60-150

Sec

Preheat Time 150°C to 200°C

Time maintained above 217°C

Peak Temperature

Time within 5°C of actual Peak

Ramp-Down Rate

60-180 Sec

60-150 Sec

255-260°C

20-40 Sec

6°C/Sec Max.

8 min Max.

Reflow

60-180

Sec

150°C

Cool

Pre heat

25°C

Time 25°C to Peak Temperature

Time

8 min max

Package Dimensions

3.2 x 2.5 mm 14 Lead Plastic Package

Disclaimer:

Micrel makes no representations or warranties with respect to the accuracy or completeness of the information furnished in this data sheet. This information

is not intended as a warranty and Micrel does not assume responsibility for its use. Micrel reserves the right to change circuitry, specifications and

descriptions at any time without notice. No license, whether express, implied, arising by estoppel or otherwise, to any intellectual property rights is granted

by this document. Except as provided in Micrel’s terms and conditions of sale for such products, Micrel assumes no liability whatsoever, and Micrel disclaims

any express or implied warranty relating to the sale and/or use of Micrel products including liability or warranties relating to fitness for a particular purpose,

merchantability, or infringement of any patent, copyright or other intellectual property right.

Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can

reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the

body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser’s use or

sale of Micrel Products for use in life support appliances, devices or systems is a Purchaser’s own risk and Purchaser agrees to fully indemnify Micrel for any

damages resulting from such use or sale.

MICREL, Inc.

Phone: +1 (408) 944-0800

●

2180 Fortune Drive,

Fax: +1 (408) 474-1000

San Jose, California

95131

●

USA

●

Email: hbwhelp@micrel.com

www.micrel.com

______________________________________________________________________________________________________________________________________________

DSC2011 Page 6 MK-Q-B-P-D-12042602-2

DSC2011FE1-E0005 [MICROCHIP]

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