MCP23S08-E/SO_技术文档

MCP23008/MCP23S08

8-Bit I/O Expander with Serial Interface

Features

Package Types

MCP23008

• 8-bit remote bidirectional I/O port

- I/O pins default to input

• High-speed I²C™ interface (MCP23008)

- 100 kHz

PDIP/SOIC

1

18

17

16

15

14

13

12

11

10

VDD

GP7

GP6

GP5

GP4

GP3

GP2

GP1

GP0

SCL

SDA

A2

A1

A0

2

3

4

5

6

7

8

9

- 400 kHz

- 1.7 MHz

• High-speed SPI™ interface (MCP23S08)

- 10 MHz

RESET

NC

INT

VSS

• Hardware address pins

- Three for the MCP23008 to allow up to eight

devices on the bus

SSOP

- Two for the MCP23S08 to allow up to four

devices using the same chip-select

1

2

3

4

5

6

7

8

9

20

SCL

SDA

A2

A1

A0

VDD

19

18

17

16

15

14

13

12

11

GP7

GP6

GP5

GP4

GP3

GP2

GP1

GP0

N/C

• Configurable interrupt output pin

- Configurable as active-high, active-low or

open-drain

• Configurable interrupt source

RESET

NC

- Interrupt-on-change from configured defaults

or pin change

INT

VSS

N/C

• Polarity Inversion register to configure the polarity

of the input port data

10

• External reset input

• Low standby current: 1 µA (max.)

• Operating voltage:

MCP23S08

PDIP/SOIC

- 1.8V to 5.5V @ -40°C to +85°C (I-Temp)

- 2.7V to 5.5V @ -40°C to +85°C (I-Temp)

- 4.5V to 5.5V @ -40°C to +125°C (E-Temp)

1

18

17

16

15

14

13

12

11

10

VDD

GP7

GP6

GP5

GP4

GP3

GP2

GP1

GP0

SCK

SI

SO

A1

A0

2

3

4

5

6

7

8

9

Packages

RESET

CS

18-pin PDIP (300 mil)

18-pin SOIC (300 mil)

20-pin SSOP

INT

VSS

SSOP

1

2

3

4

5

6

7

8

9

20

VDD

GP7

GP6

GP5

GP4

GP3

GP2

GP1

GP0

N/C

SCK

SI

SO

A1

A0

19

18

17

16

15

14

13

12

11

RESET

CS

INT

VSS

N/C

10

DS21919B-page 1

MCP23008/MCP23S08

Block Diagram

MCP23S08

SCK

SI

SO

MCP23008

GP0

GP1

GP2

GP3

GP4

GP5

GP6

GP7

SCL

SDA

Serializer/

Deserializer

Serial

Interface

8

MCP23S08

3

A1:A0

A2:A0

Decode

GPIO

Control

8

RESET

INT

Interrupt

Logic

VDD

VSS

POR

Configuration/

Control

Registers

DS21919B-page 2

MCP23008/MCP23S08

The interrupt output can be configured to activate

under two conditions (mutually exclusive):

1.0

DEVICE OVERVIEW

The MCP23X08 device provides 8-bit, general

purpose, parallel I/O expansion for I²C bus or SPI

applications. The two devices differ in the number of

hardware address pins and the serial interface:

1. When any input state differs from its

corresponding input port register state. This is

used to indicate to the system master that an

input state has changed.

• MCP23008 – I²C interface; three address pins

2. When an input state differs from a preconfigured

register value (DEFVAL register).

• MCP23S08 – SPI interface; two address pins

The MCP23X08 consists of multiple 8-bit configuration

registers for input, output and polarity selection. The

system master can enable the I/Os as either inputs or

outputs by writing the I/O configuration bits. The data

for each input or output is kept in the corresponding

Input or Output register. The polarity of the Input Port

register can be inverted with the Polarity Inversion

register. All registers can be read by the system master.

The Interrupt Capture register captures port values at

the time of the interrupt, thereby saving the condition

that caused the interrupt.

The Power-on Reset (POR) sets the registers to their

default values and initializes the device state machine.

The hardware address pins are used to determine the

device address.

1.1

Pin Descriptions

TABLE 1-1:

PINOUT DESCRIPTION

Name

PDIP/S

OIC

SSOP

Function

Type

SCL/SCK

SDA/SI

A2/SO

1

2

3

1

2

3

I

Serial clock input.

I/O Serial data I/O (MCP23008)/Serial data input (MCP23S08).

I/O Hardware address input (MCP23008)/Serial data output (MCP23S08).

A2 must be biased externally.

A1

4

5

4

5

I

Hardware address input. Must be biased externally.

External reset input

A0

RESET

NC/CS

INT

6

I

7

I

No connect (MCP23008)/External chip select input (MCP23S08).

Interrupt output. Can be configured for active-high, active-low or open-drain.

Ground.

8

O

P

VSS

9

GP0

10

12

I/O Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak

pull-up resistor.

GP1

GP2

GP3

GP4

GP5

GP6

GP7

11

12

13

14

15

16

17

18

13

14

15

16

17

18

19

I/O Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak

pull-up resistor.

I/O Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak

pull-up resistor.

I/O Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak

pull-up resistor.

I/O Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak

pull-up resistor.

I/O Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak

pull-up resistor.

I/O Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak

pull-up resistor.

I/O Bidirectional I/O pin. Can be enabled for interrupt-on-change and/or internal weak

pull-up resistor.

VDD

N/C

20

P

Power.

10, 11

DS21919B-page 3

MCP23008/MCP23S08

1.3.2

I²C™ INTERFACE

I²C Write Operation

1.2

Power-on Reset (POR)

The on-chip POR circuit holds the device in reset until

VDD has reached a high enough voltage to deactivate

the POR circuit (i.e., release the device from reset).

The maximum VDD rise time is specified in Section 2.0

“Electrical Characteristics”.

1.3.2.1

The I²C Write operation includes the control byte and

register address sequence, as shown in the bottom of

Figure 1-1. This sequence is followed by eight bits of

data from the master and an Acknowledge (ACK) from

the MCP23008. The operation is ended with a STOP

or RESTART condition being generated by the master.

When the device exits the POR condition (releases

reset), device operating parameters (i.e., voltage,

temperature, serial bus frequency, etc.) must be met to

ensure proper operation.

Data is written to the MCP23008 after every byte

transfer. If

a STOP or RESTART condition is

generated during a data transfer, the data will not be

written to the MCP23008.

1.3

Serial Interface

This block handles the functionality of the I²C

(MCP23008) or SPI (MCP23S08) interface protocol.

The MCP23X08 contains eleven registers that can be

addressed through the serial interface block (Table 1-2):

Byte writes and sequential writes are both supported

by the MCP23008. The MCP23008 increments its

address counter after each ACK during the data

transfer.

1.3.2.2

I²C Read Operation

TABLE 1-2:

Address

REGISTER ADDRESSES

Access to:

The I²C Read operation includes the control byte

sequence, as shown in the bottom of Figure 1-1. This

sequence is followed by another control byte (includ-

ing the START condition and ACK) with the R/W bit

equal to a logic 1 (R/W = 1). The MCP23008 then

transmits the data contained in the addressed register.

The sequence is ended with the master generating a

STOP or RESTART condition.

00h

01h

02h

03h

04h

05h

06h

07h

08h

09h

0Ah

IODIR

IPOL

GPINTEN

DEFVAL

INTCON

IOCON

GPPU

1.3.2.3

I²C Sequential Write/Read

INTF

For sequential operations (Write or Read), instead of

transmitting a STOP or RESTART condition after the

data transfer, the master clocks the next byte pointed to

by the address pointer (see Section 1.3.1 “Sequential

Operation Bit” for details regarding sequential

operation control).

INTCAP (Read-only)

GPIO

OLAT

1.3.1

SEQUENTIAL OPERATION BIT

The sequence ends with the master sending a STOP or

RESTART condition.

The Sequential Operation (SEQOP) bit (IOCON

register) controls the operation of the address pointer.

The address pointer can either be enabled (default) to

allow the address pointer to increment automatically

after each data transfer, or it can be disabled.

The MCP23008 address pointer will roll over to

address zero after reaching the last register address.

Refer to Figure 1-1.

When

operating

in

Sequential

mode

1.3.3

SPI™ INTERFACE

SPI Write Operation

(IOCON.SEQOP = 0), the address pointer automati-

cally increments to the next address after each byte

is clocked.

1.3.3.1

The SPI Write operation is started by lowering CS. The

Write command (slave address with R/W bit cleared) is

then clocked into the device. The opcode is followed by

an address and at least one data byte.

When operating in Byte mode (IOCON.SEQOP = 1),

the MCP23X08 does not increment its address

counter after each byte during the data transfer. This

gives the ability to continually read the same address

by providing extra clocks (without additional control

bytes). This is useful for polling the GPIO register for

data changes.

1.3.3.2

SPI Read Operation

The SPI Read operation is started by lowering CS. The

SPI read command (slave address with R/W bit set) is

then clocked into the device. The opcode is followed by

an address, with at least one data byte being clocked

out of the device.

DS21919B-page 4

MCP23008/MCP23S08

FIGURE 1-1:

MCP23008 I²C™ DEVICE PROTOCOL

- START

S

SR

P

- RESTART

DIN

S

OP

W

ADDR

....

P

- STOP

- Write

- Read

w

DOUT

DIN

D

OUT

SR

OP

R

P

....

R

D

IN

SR

P

W

- Device opcode

ADDR - Device address

OP

- Data out from MCP23008

- Data into MCP23008

DOUT

DIN

DOUT

S

OP

R

P

....

DOUT

SR

OP

R

P

....

DIN

....

DIN

SR

OP

W

ADDR

P

Byte and Sequential Write

DIN

S

OP

W

ADDR

P

Byte

DIN

....

Sequential

P

Byte and Sequential Read

Byte

D

OUT

S

R

OP

SR

OP

R

P

D

OUT

Sequential

DOUT

SR OP

....

P

1.3.3.3

SPI Sequential Write/Read

1.4

Hardware Address Decoder

For sequential operations, instead of deselecting the

device by raising CS, the master clocks the next byte

pointed to by the address pointer.

The hardware address pins are used to determine the

device address. To address a device, the correspond-

ing address bits in the control byte must match the pin

state.

The sequence ends by the raising of CS.

• MCP23008 has address pins A2, A1 and A0.

• MCP23S08 has address pins A1 and A0.

The MCP23S08 address pointer will roll over to

address zero after reaching the last register address.

The pins must be biased externally.

DS21919B-page 5

MCP23008/MCP23S08

1.4.1

ADDRESSING I²C DEVICES

(MCP23008)

FIGURE 1-2:

I²C™ CONTROL BYTE

FORMAT

The MCP23008 is a slave I²C device that supports 7-bit

slave addressing, with the read/write bit filling out the

control byte. The slave address contains four fixed bits

and three user-defined hardware address bits (pins A2,

A1 and A0). Figure 1-2 shows the control byte format.

Control Byte

A2 A1 A0 R/W ACK

S

0

1

0

Slave Address

R/W bit

Start

bit

1.4.2

ADDRESSING SPI DEVICES

(MCP23S08)

ACK bit

R/W = 0= write

R/W = 1= read

The MCP23S08 is a slave SPI device. The slave

address contains five fixed bits and two user-defined

hardware address bits (pins A1 and A0), with the

read/write bit filling out the control byte. Figure 1-3

shows the control byte format.

FIGURE 1-3:

SPI™ CONTROL BYTE

FORMAT

CS

Control Byte

0

1

0

A1 A0 R/W

Slave Address

R/W bit

R/W = 0= write

R/W = 1= read

FIGURE 1-4:

I²C™ ADDRESSING REGISTERS

A2 A1 A0 ACK A7

S

0

1

0

A6

A5

A4

A3

A2

A1

A0 ACK

R/W = 0

Device Opcode

Register Address

The ACKs are provided by the MCP23008.

FIGURE 1-5:

SPI™ ADDRESSING REGISTERS

CS

0

1

0

A1 A0 R/W

A7

A6

A5

A4

A3

A2

A1

A0

Device Opcode

Register Address

DS21919B-page 6

MCP23008/MCP23S08

1.5

GPIO Port

1.6

Configuration and Control

Registers

The GPIO module contains the data port (GPIO),

internal pull up resistors and the Output Latches

(OLAT).

The Configuration and Control blocks contain the

registers as shown in Table 1-3.

Reading the GPIO register reads the value on the port.

Reading the OLAT register only reads the OLAT, not

the actual value on the port.

Writing to the GPIO register actually causes a write to

the OLAT. Writing to the OLAT register forces the

associated output drivers to drive to the level in OLAT.

Pins configured as inputs turn off the associated output

driver and put it in high-impedance.

TABLE 1-3:

CONFIGURATION AND CONTROL REGISTERS

Register

Name

Address

(hex)

POR/RST

value

bit 7

bit 6

bit 5

bit 4

bit 3

bit 2

bit 1

bit 0

IODIR

00

01

02

03

04

05

06

07

08

09

0A

IO7

IP7

IO6

IP6

IO5

IP5

IO4

IP4

IO3

IP3

IO2

IP2

IO1

IP1

IO0

IP0

1111 1111

0000 0000

IPOL

GPINTEN

DEFVAL

INTCON

IOCON

GPPU

INTF

GPINT7 GPINT6

GPINT5 GPINT4

GPINT3 GPINT2

GPINT1

DEF1

IOC1

INTPOL

PU1

GPINT0 0000 0000

DEF7

IOC7

—

DEF6

IOC6

—

DEF5

IOC5

SREAD

PU5

DEF4

IOC4

DISSLW

PU4

DEF3

IOC3

HAEN *

PU3

DEF2

IOC2

ODR

PU2

DEF0

IOC0

—

0000 0000

--00 000-

0000 0000

PU7

INT7

ICP7

GP7

OL7

PU6

INT6

ICP6

GP6

OL6

PU0

INTO

ICP0

GP0

OL0

INT5

ICP5

GP5

INT4

INT3

ICP3

GP3

INT2

ICP2

GP2

OL2

INT1

INTCAP

GPIO

ICP4

GP4

ICP1

GP1

OLAT

OL5

OL4

OL3

OL1

* Not used on the MCP23008.

DS21919B-page 7

MCP23008/MCP23S08

1.6.1

I/O DIRECTION (IODIR) REGISTER

Controls the direction of the data I/O.

When a bit is set, the corresponding pin becomes an

input. When a bit is clear, the corresponding pin

becomes an output.

REGISTER 1-1:

IODIR – I/O DIRECTION REGISTER (ADDR 0x00)

R/W-1

IO7

R/W-1

IO6

R/W-1

IO5

R/W-1

IO4

R/W-1

IO3

R/W-1

IO2

R/W-1

IO1

R/W-1

IO0

bit 7

bit 0

bit 7-0

IO7:IO0: These bits control the direction of data I/O <7:0>.

1= Pin is configured as an input.

0= Pin is configured as an output.

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

‘0’ = Bit is cleared x = Bit is unknown

- n = Value at POR

‘1’ = Bit is set

DS21919B-page 8

MCP23008/MCP23S08

1.6.2

INPUT POLARITY (IPOL) REGISTER

The IPOL register allows the user to configure the

polarity on the corresponding GPIO port bits.

If a bit is set, the corresponding GPIO register bit will

reflect the inverted value on the pin.

REGISTER 1-2:

IPOL – INPUT POLARITY PORT REGISTER (ADDR 0x01)

R/W-0

IP7

R/W-0

IP6

R/W-0

IP5

R/W-0

IP4

R/W-0

IP3

R/W-0

IP2

R/W-0

IP1

R/W-0

IP0

bit 7

bit 0

bit 7-0

IP7:IP0: These bits control the polarity inversion of the input pins <7:0>.

1= GPIO register bit will reflect the opposite logic state of the input pin.

0= GPIO register bit will reflect the same logic state of the input pin.

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

‘0’ = Bit is cleared x = Bit is unknown

- n = Value at POR

‘1’ = Bit is set

DS21919B-page 9

MCP23008/MCP23S08

1.6.3

INTERRUPT-ON-CHANGE

CONTROL (GPINTEN) REGISTER

The GPINTEN register controls the interrupt-on-

change feature for each pin.

If a bit is set, the corresponding pin is enabled for

interrupt-on-change. The DEFVAL and INTCON

registers must also be configured if any pins are

enabled for interrupt-on-change.

REGISTER 1-3:

GPINTEN – INTERRUPT-ON-CHANGE PINS (ADDR 0x02)

R/W-0

GPINT7

bit 7

R/W-0

GPINT0

bit 0

GPINT6

GPINT5 GPINT4

GPINT3

GPINT2 GPINT1

bit 7-0

GPINT7:GPINT0: General purpose I/O interrupt-on-change bits <7:0>.

1= Enable GPIO input pin for interrupt-on-change event.

0= Disable GPIO input pin for interrupt-on-change event.

Refer to INTCON and GPINTEN.

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

‘0’ = Bit is cleared x = Bit is unknown

- n = Value at POR

‘1’ = Bit is set

DS21919B-page 10

MCP23008/MCP23S08

1.6.4

DEFAULT COMPARE (DEFVAL)

REGISTER FOR INTERRUPT-ON-

CHANGE

The default comparison value is configured in the

DEFVAL register. If enabled (via GPINTEN and

INTCON) to compare against the DEFVAL register, an

opposite value on the associated pin will cause an

interrupt to occur.

REGISTER 1-4:

DEFVAL – DEFAULT VALUE REGISTER (ADDR 0x03)

R/W-0

DEF7

R/W-0

DEF6

R/W-0

DEF5

R/W-0

DEF4

R/W-0

DEF3

R/W-0

DEF2

R/W-0

DEF1

R/W-0

DEF0

bit 7

bit 0

bit 7-0

DEF7:DEF0: These bits set the compare value for pins configured for interrupt-on-change from

defaults <7:0>. Refer to INTCON.

If the associated pin level is the opposite from the register bit, an interrupt occurs.

Refer to INTCON and GPINTEN.

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

‘0’ = Bit is cleared x = Bit is unknown

- n = Value at POR

‘1’ = Bit is set

DS21919B-page 11

MCP23008/MCP23S08

1.6.5

INTERRUPT CONTROL (INTCON)

REGISTER

The INTCON register controls how the associated pin

value is compared for the interrupt-on-change feature.

If a bit is set, the corresponding I/O pin is compared

against the associated bit in the DEFVAL register. If a

bit value is clear, the corresponding I/O pin is

compared against the previous value.

REGISTER 1-5:

INTCON – INTERRUPT-ON-CHANGE CONTROL REGISTER (ADDR 0x04)

R/W-0

IOC7

R/W-0

IOC6

R/W-0

IOC5

R/W-0

IOC4

R/W-0

IOC3

R/W-0

IOC2

R/W-0

IOC1

R/W-0

IOC0

bit 7

bit 0

bit 7-0

IOC7:IOC0: These bits control how the associated pin value is compared for interrupt-on-

change <7:0>.

1= Controls how the associated pin value is compared for interrupt-on-change.

0= Pin value is compared against the previous pin value.

Refer to INTCON and GPINTEN.

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

‘0’ = Bit is cleared x = Bit is unknown

- n = Value at POR

‘1’ = Bit is set

DS21919B-page 12

MCP23008/MCP23S08

• The Hardware Address Enable (HAEN) control bit

enables/disables the hardware address pins (A2,

A1) on the MCP23S08. This bit is not used on the

MCP23008. The address pins are always enabled

on the MCP23008.

1.6.6

CONFIGURATION (IOCON)

REGISTER

The IOCON register contains several bits for

configuring the device:

• The Sequential Operation (SEQOP) controls the

incrementing function of the address pointer. If

the address pointer is disabled, the address

pointer does not automatically increment after

each byte is clocked during a serial transfer. This

feature is useful when it is desired to continuously

poll (read) or modify (write) a register.

• The Open-Drain (ODR) control bit

enables/disables the INT pin for open-drain

configuration.

• The Interrupt Polarity (INTPOL) control bit sets

the polarity of the INT pin. This bit is functional

only when the ODR bit is cleared, configuring the

INT pin as active push-pull.

• The Slew Rate (DISSLW) bit controls the slew

rate function on the SDA pin. If enabled, the SDA

slew rate will be controlled when driving from a

high to a low.

REGISTER 1-6:

IOCON – I/O EXPANDER CONFIGURATION REGISTER (ADDR 0x05)

U-0

—

U-0

—

R/W-0

HAEN

R/W-0

ODR

R/W-0

U-0

—

SEQOP DISSLW

INTPOL

bit 7

bit 0

bit 7-6

bit 5

Unimplemented: Read as ‘0’.

SEQOP: Sequential Operation mode bit.

1= Sequential operation disabled, address pointer does not increment.

0= Sequential operation enabled, address pointer increments.

bit 4

bit 3

DISSLW: Slew Rate control bit for SDA output.

1= Slew rate disabled.

0= Slew rate enabled.

HAEN: Hardware Address Enable bit (MCP23S08 only).

Address pins are always enabled on MCP23008.

1= Enables the MCP23S08 address pins.

0= Disables the MCP23S08 address pins.

bit 2

bit 1

bit 0

ODR: This bit configures the INT pin as an open-drain output.

1= Open-drain output (overrides the INTPOL bit).

0= Active driver output (INTPOL bit sets the polarity).

INTPOL: This bit sets the polarity of the INT output pin.

1= Active-high.

0= Active-low.

Unimplemented: Read as ‘0’.

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

‘0’ = Bit is cleared x = Bit is unknown

- n = Value at POR

‘1’ = Bit is set

DS21919B-page 13

MCP23008/MCP23S08

1.6.7

PULL-UP RESISTOR

CONFIGURATION (GPPU)

REGISTER

The GPPU register controls the pull-up resistors for the

port pins. If a bit is set and the corresponding pin is

configured as an input, the corresponding port pin is

internally pulled up with a 100 kΩ resistor.

REGISTER 1-7:

GPPU – GPIO PULL-UP RESISTOR REGISTER (ADDR 0x06)

R/W-0

PU7

R/W-0

PU6

R/W-0

PU5

R/W-0

PU4

R/W-0

PU3

R/W-0

PU2

R/W-0

PU1

R/W-0

PU0

bit 7

bit 0

bit 7-0

PU7:PU0: These bits control the weak pull-up resistors on each pin (when configured as an

input) <7:0>.

1= Pull-up enabled.

0= Pull-up disabled.

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

‘0’ = Bit is cleared x = Bit is unknown

- n = Value at POR

‘1’ = Bit is set

DS21919B-page 14

MCP23008/MCP23S08

1.6.8

INTERRUPT FLAG (INTF)

REGISTER

Note:

INTF will always reflect the pin(s) that

have an interrupt condition. For example,

one pin causes an interrupt to occur and is

captured in INTCAP and INF. If, before

clearing the interrupt, another pin changes

which would normally cause an interrupt, it

will be reflected in INTF, but not INTCAP.

The INTF register reflects the interrupt condition on the

port pins of any pin that is enabled for interrupts via the

GPINTEN register. A ‘set’ bit indicates that the

associated pin caused the interrupt.

This register is ‘read-only’. Writes to this register will be

ignored.

REGISTER 1-8:

INTF – INTERRUPT FLAG REGISTER (ADDR 0x07)

R-0

INT7

INT6

INT5

INT4

INT3

INT2

INT1

INT0

bit 7

bit 0

bit 7-0

INT7:INT0: These bits reflect the interrupt condition on the port. Will reflect the change only if

interrupts are enabled (GPINTEN) <7:0>.

1= Pin caused interrupt.

0= Interrupt not pending.

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

‘0’ = Bit is cleared x = Bit is unknown

- n = Value at POR

‘1’ = Bit is set

DS21919B-page 15

MCP23008/MCP23S08

1.6.9

INTERRUPT CAPTURE (INTCAP)

REGISTER

The INTCAP register captures the GPIO port value at

the time the interrupt occurred. The register is ‘read-

only’ and is updated only when an interrupt occurs. The

register will remain unchanged until the interrupt is

cleared via a read of INTCAP or GPIO.

REGISTER 1-9:

INTCAP – INTERRUPT CAPTURED VALUE FOR PORT REGISTER

(ADDR 0x08)

R-x

ICP7

bit 7

R-x

ICP6

ICP5

ICP4

ICP3

ICP2

ICP1

ICP0

bit 0

bit 7-0

ICP7:ICP0: These bits reflect the logic level on the port pins at the time of interrupt due to pin

change <7:0>.

1= Logic-high.

0= Logic-low.

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

‘0’ = Bit is cleared x = Bit is unknown

- n = Value at POR

‘1’ = Bit is set

DS21919B-page 16

MCP23008/MCP23S08

1.6.10

PORT (GPIO) REGISTER

The GPIO register reflects the value on the port.

Reading from this register reads the port. Writing to this

register modifies the Output Latch (OLAT) register.

REGISTER 1-10: GPIO – GENERAL PURPOSE I/O PORT REGISTER (ADDR 0x09)

R/W-0

GP7

R/W-0

GP6

R/W-0

GP5

R/W-0

GP4

R/W-0

GP3

R/W-0

GP2

R/W-0

GP1

R/W-0

GP0

bit 7

bit 0

bit 7-0

GP7:GP0: These bits reflect the logic level on the pins <7:0>.

1= Logic-high.

0= Logic-low.

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

‘0’ = Bit is cleared x = Bit is unknown

- n = Value at POR

‘1’ = Bit is set

DS21919B-page 17

MCP23008/MCP23S08

1.6.11

OUTPUT LATCH REGISTER (OLAT)

The OLAT register provides access to the output

latches. A read from this register results in a read of the

OLAT and not the port itself. A write to this register

modifies the output latches that modify the pins

configured as outputs.

REGISTER 1-11: OLAT – OUTPUT LATCH REGISTER 0 (ADDR 0x0A)

R/W-0

OL7

R/W-0

OL6

R/W-0

OL5

R/W-0

OL4

R/W-0

OL3

R/W-0

OL2

R/W-0

OL1

R/W-0

OL0

bit 7

bit 0

bit 7-0

OL7:OL0: These bits reflect the logic level on the output latch <7:0>.

1= Logic-high.

0= Logic-low.

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

‘0’ = Bit is cleared x = Bit is unknown

- n = Value at POR

‘1’ = Bit is set

DS21919B-page 18

MCP23008/MCP23S08

FIGURE 1-6:

INTERRUPT-ON-PIN-

CHANGE

1.7

Interrupt Logic

The interrupt output pin will activate if an internal

interrupt occurs. The interrupt block is configured by

the following registers:

GPx

• GPINTEN – enables the individual inputs

• DEFVAL – holds the values that are compared

against the associated input port values

INT

ACTIVE

• INTCON – controls if the input values are

compared against DEFVAL or the previous values

on the port

Port value

is captured

Read GPIU Port value

or INTCAP

is captured

into INTCAP

• IOCON (ODR and INPOL) – configures the INT

pin as push-pull, open-drain and active-level

Only pins configured as inputs can cause interrupts.

Pins configured as outputs have no affect on INT.

FIGURE 1-7:

INTERRUPT-ON-CHANGE

FROM REGISTER

DEFAULT

Interrupt activity on the port will cause the port value to

be captured and copied into INTCAP. The interrupt will

remain active until the INTCAP or GPIO register is

read. Writing to these registers will not affect the

interrupt.

DEFVAL

GP:

7

6

5

4

3

2

0

1

0

The first interrupt event will cause the port contents to

be copied into the INTCAP register. Subsequent

interrupt conditions on the port will not cause an

interrupt to occur as long as the interrupt is not cleared

by a read of INTCAP or GPIO.

X

GP2

INT

1.7.1

INTERRUPT CONDITIONS

There are two possible configurations to cause

interrupts (configured via INTCON):

ACTIVE

1. Pins configured for interrupt-on-pin-change

will cause an interrupt to occur if a pin changes

to the opposite state. The default state is reset

after an interrupt occurs. For example, an

interrupt occurs by an input changing from 1to

0. The new initial state for the pin is a logic 0.

Port value

is captured

into INTCAP

Read GPIU

or INTCAP

(INT clears only if interrupt

condition does not exist.)

2. Pins configured for interrupt-on-change from

register value will cause an interrupt to occur if

the corresponding input pin differs from the

register bit. The interrupt condition will remain as

long as the condition exists, regardless if the

INTAP or GPIO is read.

See Figure 1-6 and Figure 1-7 for more information on

interrupt operations.

DS21919B-page 19

MCP23008/MCP23S08

NOTES:

DS21919B-page 20

MCP23008/MCP23S08

2.0

ELECTRICAL CHARACTERISTICS

Absolute Maximum Ratings †

Ambient temperature under bias.............................................................................................................-40°C to +125°C

Storage temperature .............................................................................................................................. -65°C to +150°C

Voltage on VDD with respect to VSS ......................................................................................................... -0.3V to +5.5V

Voltage on all other pins with respect to VSS (except VDD)............................................................. -0.6V to (VDD + 0.6V)

Total power dissipation (Note) .............................................................................................................................700 mW

Maximum current out of VSS pin ...........................................................................................................................150 mA

Maximum current into VDD pin ..............................................................................................................................125 mA

Input clamp current, IIK (VI < 0 or VI > VDD)...................................................................................................................... 20 mA

Output clamp current, IOK (VO < 0 or VO > VDD) .............................................................................................................. 20 mA

Maximum output current sunk by any output pin ....................................................................................................25 mA

Maximum output current sourced by any output pin ...............................................................................................25 mA

Note:

Power dissipation is calculated as follows:

PDIS = VDD x {IDD - ∑ IOH} + ∑ {(VDD-VOH) x IOH} + ∑(VOL x IOL)

†

NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the

device. This is a stress rating only and functional operation of the device at those or any other conditions above those

indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for

extended periods may affect device reliability.

DS21919B-page 21

MCP23008/MCP23S08

2.1

DC Characteristics

Operating Conditions (unless otherwise indicated):

1.8V ≤ VDD ≤ 5.5V at -40°C ≤ TA ≤ +85°C (I-Temp)

DC Characteristics

Param

4.5V ≤ VDD ≤ 5.5V at -40°C ≤ TA ≤ +125°C (E-Temp) (Note 1)

Characteristic

Sym

Min

Typ

Max

Units

Conditions

No.

D001 Supply Voltage

VDD

1.8

—

5.5

—

V

D002 VDD Start Voltage to

Ensure Power-on

Reset

VPOR

VSS

D003 VDD Rise Rate to

Ensure Power-on

Reset

SVDD

0.05

—

V/ms Design guidance only.

Not tested.

D004 Supply Current

D005 Standby current

IDD

—

1

2

mA SCL/SCK = 1 MHz

µA

IDDS

µA

4.5V - 5.5V @ +125°C

(Note 1)

Input Low-Voltage

D030 A0, A1 (TTL buffer)

VIL

VIH

VSS

—

0.15 VDD

0.2 VDD

V

D031 CS, GPIO, SCL/SCK,

SDA, A2, RESET

(Schmitt Trigger)

Input High-Voltage

D040 A0, A1

(TTL buffer)

0.25 VDD + 0.8

0.8 VDD

—

VDD

V

D041 CS, GPIO, SCL/SCK,

SDA, A2, RESET

For entire VDD range.

(Schmitt Trigger)

Input Leakage Current

D060 I/O port pins

IIL

—

±1

µA

VSS ≤ VPIN ≤ VDD

Output Leakage Current

D065 I/O port pins

ILO

IPU

—

±1

µA

D070 GPIO weak pull-up

current

40

75

115

VDD = 5V, GP Pins = VSS

–40°C ≤ TA ≤ +85°C

Output Low-Voltage

D080 GPIO

VOL

—

0.6

0.8

V

IOL = 8.5 mA, VDD = 4.5V

IOL = 1.6 mA, VDD = 4.5V

IOL = 3.0 mA, VDD = 1.8V

IOL = 3.0 mA, VDD = 4.5V

INT

SO, SDA

SDA

Output High-Voltage

D090 GPIO, INT, SO

VOH

VDD – 0.7

—

V

IOH = -3.0 mA, VDD = 4.5V

IOH = -400 µA, VDD = 1.8V

Capacitive Loading Specs on Output Pins

D101 GPIO, SO, INT

D102 SDA

CIO

CB

—

50

pF

400

Note 1: This parameter is characterized, not 100% tested.

DS21919B-page 22

MCP23008/MCP23S08

FIGURE 2-1:

LOAD CONDITIONS FOR DEVICE TIMING SPECIFICATIONS

VDD

1 kΩ

SCL and

SDA pin

50 pF

MCP23008

135 pF

FIGURE 2-2:

RESET AND DEVICE RESET TIMER TIMING

VDD

RESET

30

32

Internal

RESET

34

Output pin

DS21919B-page 23

MCP23008/MCP23S08

TABLE 2-1:

DEVICE RESET SPECIFICATIONS

Operating Conditions (unless otherwise indicated):

1.8V ≤ VDD ≤ 5.5V at -40°C ≤ TA ≤ +85°C (I-Temp)

AC Characteristics

Param

4.5V ≤ VDD ≤ 5.5V at -40°C ≤ TA ≤ +125°C (E-Temp) (Note 1)

Characteristic

Sym

Min

Typ⁽¹⁾

Max

Units

Conditions

No.

30

RESET Pulse Width

(Low)

TRSTL

1

—

µs

32

34

Device Active After Reset

high

THLD

TIOZ

—

TBD

1

µs

VDD = 5.0V

Output High-Impedance

From RESET Low

—

Note 1: This parameter is characterized, not 100% tested.

FIGURE 2-3:

I²C™ BUS START/STOP BITS TIMING

SCL

93

91

90

92

SDA

STOP

Condition

START

Condition

FIGURE 2-4:

I²C™ BUS DATA TIMING

103

100

102

92

101

109

SCL

90

106

91

107

SDA

In

110

109

SDA

Out

DS21919B-page 24

MCP23008/MCP23S08

TABLE 2-2:

I²C™ BUS DATA REQUIREMENTS (SLAVE MODE)

Operating Conditions (unless otherwise indicated):

1.8V ≤ VDD ≤ 5.5V at -40°C ≤ TA ≤ +85°C (I-Temp)

4.5V ≤ VDD ≤ 5.5V at -40°C ≤ TA ≤ +125°C (E-Temp) (Note 1)

RPU (SCL, SDA) = 1 kΩ, CL (SCL, SDA) = 135 pF

I²C™ AC Characteristics

Param Characteristic

No.

Sym

Min

Typ

Max Units Conditions

100 Clock High Time:

100 kHz mode

THIGH

4.0

0.6

—

µs 1.8V – 5.5V (I-Temp)

400 kHz mode

µs 2.7V – 5.5V (I-Temp)

µs 4.5V – 5.5V (E-Temp)

1.7 MHz mode

0.12

101 Clock Low Time:

100 kHz mode

TLOW

4.7

1.3

—

µs 1.8V – 5.5V (I-Temp)

µs 2.7V – 5.5V (I-Temp)

µs 4.5V – 5.5V (E-Temp)

400 kHz mode

1.7 MHz mode

0.32

102 SDA and SCL Rise Time:

100 kHz mode

TR

(Note 1)

—

20 + 0.1 CB

20

—

1000

300

ns 1.8V – 5.5V (I-Temp)

ns 2.7V – 5.5V (I-Temp)

ns 4.5V – 5.5V (E-Temp)

(2)

400 kHz mode

1.7 MHz mode

160

103 SDA and SCL Fall Time:

100 kHz mode

TF

(Note 1)

—

20 + 0.1 CB

20

—

300

80

ns 1.8V – 5.5V (I-Temp)

ns 2.7V – 5.5V (I-Temp)

ns 4.5V – 5.5V (E-Temp)

(2)

400 kHz mode

1.7 MHz mode

90

91

START Condition Setup Time: TSU:STA

100 kHz mode

4.7

0.6

—

µs 1.8V – 5.5V (I-Temp)

µs 2.7V – 5.5V (I-Temp)

µs 4.5V – 5.5V (E-Temp)

400 kHz mode

1.7 MHz mode

0.16

START Condition Hold Time:

100 kHz mode

THD:STA

THD:DAT

TSU:DAT

TSU:STO

4.0

0.6

—

µs 1.8V – 5.5V (I-Temp)

µs 2.7V – 5.5V (I-Temp)

µs 4.5V – 5.5V (E-Temp)

400 kHz mode

1.7 MHz mode

0.16

106 Data Input Hold Time:

100 kHz mode

0

—

3.45

0.9

µs 1.8V – 5.5V (I-Temp)

µs 2.7V – 5.5V (I-Temp)

µs 4.5V – 5.5V (E-Temp)

400 kHz mode

1.7 MHz mode

0.15

107 Data Input Setup Time:

100 kHz mode

250

100

0.01

—

ns 1.8V – 5.5V (I-Temp)

ns 2.7V – 5.5V (I-Temp)

µs 4.5V – 5.5V (E-Temp)

400 kHz mode

1.7 MHz mode

92

STOP Condition Setup Time:

100 kHz mode

4.0

0.6

—

µs 1.8V – 5.5V (I-Temp)

µs 2.7V – 5.5V (I-Temp)

µs 4.5V – 5.5V (E-Temp)

400 kHz mode

1.7 MHz mode

0.16

Note 1: This parameter is characterized, not 100% tested.

2: CB is specified to be from 10 to 400 pF.

DS21919B-page 25

MCP23008/MCP23S08

TABLE 2-2:

I²C™ BUS DATA REQUIREMENTS (SLAVE MODE) (CONTINUED)

Operating Conditions (unless otherwise indicated):

1.8V ≤ VDD ≤ 5.5V at -40°C ≤ TA ≤ +85°C (I-Temp)

4.5V ≤ VDD ≤ 5.5V at -40°C ≤ TA ≤ +125°C (E-Temp) (Note 1)

RPU (SCL, SDA) = 1 kΩ, CL (SCL, SDA) = 135 pF

I²C™ AC Characteristics

Param Characteristic

No.

Sym

Min

Typ

Max Units Conditions

109 Output Valid From Clock:

100 kHz mode

TAA

—

3.45

0.9

µs 1.8V – 5.5V (I-Temp)

400 kHz mode

µs 2.7V – 5.5V (I-Temp)

µs 4.5V – 5.5V (E-Temp)

1.7 MHz mode

0.18

110

Bus Free Time:

100 kHz mode

TBUF

4.7

1.3

N/A

—

µs 1.8V – 5.5V (I-Temp)

µs 2.7V – 5.5V (I-Temp)

µs 4.5V – 5.5V (E-Temp)

400 kHz mode

1.7 MHz mode

N/A

Bus Capacitive Loading:

100 kHz and 400 kHz

1.7 MHz

CB

—

400

100

pF (Note 1)

Input Filter Spike

TSP

Suppression: (SDA and SCL)

100 kHz and 400 kHz

1.7 MHz

—

50

10

ns

ns Spike suppression off

Note 1: This parameter is characterized, not 100% tested.

2: CB is specified to be from 10 to 400 pF.

FIGURE 2-5:

SPI™ INPUT TIMING

3

CS

11

10

6

1

2

7

Mode 1,1

SCK

SI

Mode 0,0

4

5

MSb in

LSb in

high-impedance

SO

DS21919B-page 26

MCP23008/MCP23S08

FIGURE 2-6:

SPI™ OUTPUT TIMING

CS

2

8

9

SCK

Mode 1,1

Mode 0,0

12

14

13

SO

SI

MSb out

LSb out

don’t care

TABLE 2-3:

SPI™ INTERFACE AC CHARACTERISTICS

Operating Conditions (unless otherwise indicated):

1.8V ≤ VDD ≤ 5.5V at -40°C ≤ TA ≤ +85°C (I-Temp)

4.5V ≤ VDD ≤ 5.5V at -40°C ≤ TA ≤ +125°C (E-Temp) (Note 1)

SPI™ Interface AC Characteristics

Param

Characteristic

No.

Sym

Min

Typ

Max

Units

Conditions

Clock Frequency

FCLK

—

5

MHz 1.8V – 5.5V (I-Temp)

MHz 2.7V – 5.5V (I-Temp)

MHz 4.5V – 5.5V (E-Temp)

ns

10

—

2

—

1

2

CS Setup Time

CS Hold Time

TCSS

TCSH

50

100

50

100

50

20

10

20

10

—

ns

µs

ns

1.8V – 5.5V (I-Temp)

2.7V – 5.5V (I-Temp)

4.5V – 5.5V (E-Temp)

1.8V – 5.5V (I-Temp)

2.7V – 5.5V (I-Temp)

4.5V – 5.5V (E-Temp)

1.8V – 5.5V (I-Temp)

2.7V – 5.5V (I-Temp)

4.5V – 5.5V (E-Temp)

1.8V – 5.5V (I-Temp)

2.7V – 5.5V (I-Temp)

4.5V – 5.5V (E-Temp)

Note 1

3

4

5

CS Disable Time

Data Setup Time

Data Hold Time

TCSD

TSU

THD

6

7

8

CLK Rise Time

CLK Fall Time

Clock High Time

TR

TF

—

2

Note 1

THI

90

45

—

1.8V – 5.5V (I-Temp)

2.7V – 5.5V (I-Temp)

4.5V – 5.5V (E-Temp)

Note 1: This parameter is characterized, not 100% tested.

2: TV = 90 ns (max) when address pointer rolls over from address 0x0A to 0x00.

DS21919B-page 27

MCP23008/MCP23S08

TABLE 2-3:

SPI™ INTERFACE AC CHARACTERISTICS (CONTINUED)

Operating Conditions (unless otherwise indicated):

1.8V ≤ VDD ≤ 5.5V at -40°C ≤ TA ≤ +85°C (I-Temp)

4.5V ≤ VDD ≤ 5.5V at -40°C ≤ TA ≤ +125°C (E-Temp) (Note 1)

SPI™ Interface AC Characteristics

Param

Characteristic

No.

Sym

Min

Typ

Max

Units

Conditions

9

Clock Low Time

TLO

90

45

50

—

0

—

ns

1.8V – 5.5V (I-Temp)

2.7V – 5.5V (I-Temp)

4.5V – 5.5V (E-Temp)

—

10

11

12

Clock Delay Time

TCLD

TCLE

TV

—

Clock Enable Time

—

Output Valid from Clock Low

90

45

—

1.8V – 5.5V (I-Temp)

2.7V – 5.5V (I-Temp)

4.5V – 5.5V (E-Temp)

13

14

Output Hold Time

THO

TDIS

Output Disable Time

—

100

Note 1: This parameter is characterized, not 100% tested.

2: TV = 90 ns (max) when address pointer rolls over from address 0x0A to 0x00.

FIGURE 2-7:

GPIO AND INT TIMING

SCL/SCK

SDA/SI

In

D1

D0

LSb of data byte zero

during a write or read

command, depending

on parameter.

50

51

GPn

Output

INT

inactive

53

INT pin active

GPn

Input

52

Register

Loaded

DS21919B-page 28

MCP23008/MCP23S08

TABLE 2-4:

GP AND INT PINS

Operating Conditions (unless otherwise indicated):

AC Characteristics

Param

1.8V ≤ VDD ≤ 5.5V at -40°C ≤ TA ≤ +85°C (I-Temp)

4.5V ≤ VDD ≤ 5.5V at -40°C ≤ TA ≤ +125°C (E-Temp) (Note 1)

Characteristic

Sym

Min

Typ

Max Units

Conditions

No.

50

51

52

Serial data to output valid

Interrupt pin disable time

TGPOV

TINTD

TGPIV

—

500

450

ns

GP input change to register

valid

53

IOC event to INT active

Glitch Filter on GP Pins

TGPINT

—

500

150

ns

TGLITCH

Note 1: This parameter is characterized, not 100% tested

DS21919B-page 29

MCP23008/MCP23S08

NOTES:

DS21919B-page 30

MCP23008/MCP23S08

3.0

3.1

PACKAGING INFORMATION

Package Marking Information

18-Lead PDIP (300 mil)

Example:

XXXXXXXXXXXXXXXXX

YYWWNNN

MCP23008-E/P^^

e

3

0434256

18-Lead SOIC (300 mil)

Example:

XXXXXXXXXXXX

YYWWNNN

MCP23008

e3

E/SO^^

0434256

20-Lead SSOP

Example:

XXXXXXXXXXXX

YYWWNNN

MCP23S08

e

3

ESS^^

XXXXXXXXXXXX

0434256

Legend: XX...X Customer-specific information

Y

YY

Year code (last digit of calendar year)

Year code (last 2 digits of calendar year)

WW

NNN

Week code (week of January 1 is week ‘01’)

Alphanumeric traceability code

e

3

Pb-free JEDEC designator for Matte Tin (Sn)

This package is Pb-free. The Pb-free JEDEC designator (

can be found on the outer packaging for this package.

*

)

3

e

Note: In the event the full Microchip part number cannot be marked on one line, it will

be carried over to the next line, thus limiting the number of available

characters for customer-specific information.

DS21919B-page 31

MCP23008/MCP23S08

18-Lead Plastic Dual In-line (P) – 300 mil (PDIP)

E1

D

2

α

n

1

E

A2

L

A

c

A1

B1

β

p

B

eB

Units

INCHES*

NOM

MILLIMETERS

Dimension Limits

MIN

MAX

MIN

NOM

18

MAX

n

p

Number of Pins

Pitch

18

.100

.155

.130

2.54

Top to Seating Plane

A

.140

.170

3.56

2.92

3.94

3.30

4.32

Molded Package Thickness

Base to Seating Plane

Shoulder to Shoulder Width

Molded Package Width

Overall Length

A2

A1

E

.115

.015

.300

.240

.890

.125

.008

.045

.014

.310

5

.145

3.68

0.38

7.62

6.10

22.61

3.18

0.20

1.14

0.36

7.87

5

.313

.250

.898

.130

.012

.058

.018

.370

10

.325

.260

.905

.135

.015

.070

.022

.430

15

7.94

6.35

22.80

3.30

0.29

1.46

0.46

9.40

10

8.26

6.60

22.99

3.43

0.38

1.78

0.56

10.92

15

E1

D

Tip to Seating Plane

Lead Thickness

L

c

Upper Lead Width

B1

B

Lower Lead Width

Overall Row Spacing

Mold Draft Angle Top

Mold Draft Angle Bottom

§

eB

α

β

5

10

15

5

10

15

* Controlling Parameter

§ Significant Characteristic

Notes:

Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed

.010” (0.254mm) per side.

JEDEC Equivalent: MS-001

Drawing No. C04-007

DS21919B-page 32

MCP23008/MCP23S08

18-Lead Plastic Small Outline (SO) – Wide, 300 mil (SOIC)

E

p

E1

D

2

1

B

n

h

α

45°

c

A2

A

φ

β

L

A1

Units

INCHES*

NOM

MILLIMETERS

Dimension Limits

MIN

MAX

MIN

NOM

18

MAX

n

p

Number of Pins

Pitch

18

.050

.099

.091

.008

.407

.295

.454

.020

.033

4

1.27

Overall Height

A

.093

.104

2.36

2.24

2.50

2.31

0.20

10.34

7.49

11.53

0.50

0.84

4

2.64

2.39

0.30

10.67

7.59

11.73

0.74

1.27

8

Molded Package Thickness

Standoff

A2

A1

E

.088

.004

.394

.291

.446

.010

.016

0

.094

.012

.420

.299

.462

.029

.050

8

§

0.10

10.01

7.39

11.33

0.25

0.41

0

Overall Width

Molded Package Width

Overall Length

E1

D

Chamfer Distance

Foot Length

h

L

φ

Foot Angle

c

Lead Thickness

Lead Width

.009

.014

0

.011

.017

12

.012

.020

15

0.23

0.36

0

0.27

0.42

12

0.30

0.51

15

B

α

β

Mold Draft Angle Top

Mold Draft Angle Bottom

0

12

15

0

12

15

* Controlling Parameter

§ Significant Characteristic

Notes:

Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed

.010” (0.254mm) per side.

JEDEC Equivalent: MS-013

Drawing No. C04-051

DS21919B-page 33

MCP23008/MCP23S08

20-Lead Plastic Shrink Small Outline (SS) – 209 mil Body, 5.30 mm (SSOP)

E

E1

p

D

B

2

1

n

c

A2

A

f

L

A1

Units

Dimension Limits

INCHES

NOM

20

MILLIMETERS*

MIN

MAX

MIN

NOM

20

MAX

n

p

Number of Pins

Pitch

.026

0.65

-

Overall Height

Molded Package Thickness

Standoff

A

A2

A1

E

-

.079

-

2.00

1.85

-

.065

.002

.291

.197

.272

.022

.004

0°

.069

-

.073

-

1.65

0.05

7.40

5.00

.295

0.55

0.09

0°

1.75

-

Overall Width

Molded Package Width

Overall Length

Foot Length

.307

.209

.283

.030

-

.323

.220

.289

.037

.010

8°

7.80

5.30

7.20

0.75

-

8.20

5.60

7.50

0.95

0.25

8°

E1

D

L

c

Lead Thickness

Foot Angle

f

4°

Lead Width

B

.009

-

.015

0.22

-

0.38

*Controlling Parameter

Notes:

Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions

shall not exceed .010" (0.254mm) per side.

JEDEC Equivalent: MO-150

Drawing No. C04-072

Revised 11/03/03

DS21919B-page 34

MCP23008/MCP23S08

APPENDIX A: REVISION HISTORY

Revision B (February 2005)

The following is the list of modifications:

1. Section 1.6 “Configuration and Control Reg-

isters”. Added Hardware Address Enable

(HAEN) bit to Table 1-3.

2. Section 1.6.6 “Configuration (IOCON) Regis-

ter”. Added Hardware Address Enable (HAEN)

bit to Register 1-6.

Revision A (December 2004)

Original Release of this Document.

DS21919B-page 35

MCP23008/MCP23S08

NOTES:

DS21919B-page 36

MCP23008/MCP23S08

PRODUCT IDENTIFICATION SYSTEM

To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.

Examples:

–

PART NO.

Device

X

/XX

a) MCP23008-E/P:

Extended Temp.,

18LD PDIP package.

Temperature

Range

Package

b) MCP23008-E/SO: Extended Temp.,

18LD SOIC package.

2

c) MCP23008T-E/SO: Tape and Reel,

Extended Temp.,

Device

MCP23008:

8-Bit I/O Expander w/ I C™ Interface

2

MCP23008T: 8-Bit I/O Expander w/ I C Interface

(Tape and Reel)

18LD SOIC package.

d) MCP23008-E/SS: Extended Temp.,

20LD SSOP package.

MCP23S08:

8-Bit I/O Expander w/ SPI™ Interface

MCP23S08T: 8-Bit I/O Expander w/ SPI Interface

(Tape and Reel)

e) MCP23008T-E/SS: Tape and Reel,

Extended Temp.,

20LD SSOP package.

Temperature

Range

E

=

-40°C to +125°C (Extended) *

a) MCP23S08-E/P:

Extended Temp.,

18LD PDIP package.

* While these devices are only offered in the “E”

temperature range, the device will operate at different

voltages and temperatures as identified in the

Section 2.0 “Electrical Characteristics”.

b) MCP23S08-E/SO: Extended Temp.,

18LD SOIC package.

c) MCP23S08T-E/SO: Tape and Reel,

Extended Temp.,

18LD SOIC package.

d) MCP23S08-E/SS: Extended Temp.,

20LD SSOP package.

Package

P

SO

SS

=

Plastic DIP (300 mil Body), 18-Lead

Plastic SOIC (300 mil Body), 18-Lead

SSOP, (209 mil Body, 5.30 mm), 20-Lead

e) MCP23S08T-E/SS: Tape and Reel,

Extended Temp.,

20LD SSOP package.

DS21919B-page 37

MCP23008/MCP23S08

NOTES:

DS21919B-page 38

Note the following details of the code protection feature on Microchip devices:

•

Microchip products meet the specification contained in their particular Microchip Data Sheet.

•

Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the

intended manner and under normal conditions.

•

There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our

knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data

Sheets. Most likely, the person doing so is engaged in theft of intellectual property.

•

Microchip is willing to work with the customer who is concerned about the integrity of their code.

Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not

mean that we are guaranteeing the product as “unbreakable.”

Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our

products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts

allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.

Information contained in this publication regarding device

applications and the like is provided only for your convenience

and may be superseded by updates. It is your responsibility to

ensure that your application meets with your specifications.

MICROCHIP MAKES NO REPRESENTATIONS OR WAR-

RANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED,

WRITTEN OR ORAL, STATUTORY OR OTHERWISE,

RELATED TO THE INFORMATION, INCLUDING BUT NOT

LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE,

MERCHANTABILITY OR FITNESS FOR PURPOSE.

Microchip disclaims all liability arising from this information and

its use. Use of Microchip’s products as critical components in

life support systems is not authorized except with express

written approval by Microchip. No licenses are conveyed,

implicitly or otherwise, under any Microchip intellectual property

rights.

Trademarks

The Microchip name and logo, the Microchip logo, Accuron,

dsPIC, KEELOQ, microID, MPLAB, PIC, PICmicro, PICSTART,

PRO MATE, PowerSmart, rfPIC, and SmartShunt are

registered trademarks of Microchip Technology Incorporated

in the U.S.A. and other countries.

AmpLab, FilterLab, Migratable Memory, MXDEV, MXLAB,

PICMASTER, SEEVAL, SmartSensor and The Embedded

Control Solutions Company are registered trademarks of

Microchip Technology Incorporated in the U.S.A.

Analog-for-the-Digital Age, Application Maestro, dsPICDEM,

dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR,

FanSense, FlexROM, fuzzyLAB, In-Circuit Serial

Programming, ICSP, ICEPIC, MPASM, MPLIB, MPLINK,

MPSIM, PICkit, PICDEM, PICDEM.net, PICLAB, PICtail,

PowerCal, PowerInfo, PowerMate, PowerTool, rfLAB,

rfPICDEM, Select Mode, Smart Serial, SmartTel, Total

Endurance and WiperLock are trademarks of Microchip

Technology Incorporated in the U.S.A. and other countries.

SQTP is a service mark of Microchip Technology Incorporated

in the U.S.A.

All other trademarks mentioned herein are property of their

respective companies.

Printed on recycled paper.

Microchip received ISO/TS-16949:2002 quality system certification for

its worldwide headquarters, design and wafer fabrication facilities in

Chandler and Tempe, Arizona and Mountain View, California in

October 2003. The Company’s quality system processes and

procedures are for its PICmicro^®8-bit MCUs, KEELOQ^®code hopping

devices, Serial EEPROMs, microperipherals, nonvolatile memory and

analog products. In addition, Microchip’s quality system for the design

and manufacture of development systems is ISO 9001:2000 certified.

DS21919B-page 39

WORLDWIDE SALES AND SERVICE

AMERICAS

ASIA/PACIFIC

EUROPE

Corporate Office

Australia - Sydney

Tel: 61-2-9868-6733

Fax: 61-2-9868-6755

India - Bangalore

Tel: 91-80-2229-0061

Fax: 91-80-2229-0062

Austria - Weis

Tel: 43-7242-2244-399

Fax: 43-7242-2244-393

2355 West Chandler Blvd.

Chandler, AZ 85224-6199

Tel: 480-792-7200

Fax: 480-792-7277

Technical Support:

http://support.microchip.com

Web Address:

www.microchip.com

China - Beijing

Tel: 86-10-8528-2100

Fax: 86-10-8528-2104

Denmark - Ballerup

Tel: 45-4450-2828

Fax: 45-4485-2829

India - New Delhi

Tel: 91-11-5160-8631

Fax: 91-11-5160-8632

China - Chengdu

Tel: 86-28-8676-6200

Fax: 86-28-8676-6599

France - Massy

Tel: 33-1-69-53-63-20

Fax: 33-1-69-30-90-79

Japan - Kanagawa

Tel: 81-45-471- 6166

Fax: 81-45-471-6122

Atlanta

China - Fuzhou

Tel: 86-591-8750-3506

Fax: 86-591-8750-3521

Germany - Ismaning

Tel: 49-89-627-144-0

Fax: 49-89-627-144-44

Korea - Seoul

Alpharetta, GA

Tel: 770-640-0034

Fax: 770-640-0307

Tel: 82-2-554-7200

Fax: 82-2-558-5932 or

82-2-558-5934

Italy - Milan

Tel: 39-0331-742611

Fax: 39-0331-466781

China - Hong Kong SAR

Tel: 852-2401-1200

Fax: 852-2401-3431

Boston

Singapore

Tel: 65-6334-8870

Fax: 65-6334-8850

Westford, MA

Tel: 978-692-3848

Fax: 978-692-3821

Netherlands - Drunen

Tel: 31-416-690399

Fax: 31-416-690340

China - Shanghai

Tel: 86-21-5407-5533

Fax: 86-21-5407-5066

China - Shenyang

Tel: 86-24-2334-2829

Fax: 86-24-2334-2393

Taiwan - Kaohsiung

Tel: 886-7-536-4818

Fax: 886-7-536-4803

Chicago

Itasca, IL

Tel: 630-285-0071

Fax: 630-285-0075

England - Berkshire

Tel: 44-118-921-5869

Fax: 44-118-921-5820

Taiwan - Taipei

Tel: 886-2-2500-6610

Fax: 886-2-2508-0102

Dallas

Addison, TX

China - Shenzhen

Tel: 86-755-8203-2660

Fax: 86-755-8203-1760

Tel: 972-818-7423

Fax: 972-818-2924

Taiwan - Hsinchu

Tel: 886-3-572-9526

Fax: 886-3-572-6459

China - Shunde

Detroit

Tel: 86-757-2839-5507

Fax: 86-757-2839-5571

Farmington Hills, MI

Tel: 248-538-2250

Fax: 248-538-2260

China - Qingdao

Tel: 86-532-502-7355

Fax: 86-532-502-7205

Kokomo

Kokomo, IN

Tel: 765-864-8360

Fax: 765-864-8387

Los Angeles

Mission Viejo, CA

Tel: 949-462-9523

Fax: 949-462-9608

San Jose

Mountain View, CA

Tel: 650-215-1444

Fax: 650-961-0286

Toronto

Mississauga, Ontario,

Canada

Tel: 905-673-0699

Fax: 905-673-6509

10/20/04

DS21919B-page 40


型号：	MCP23S08-E/SO
厂家：	MICROCHIP
描述：	8-Bit I/O Expander with Serial Interface 8位I / O扩展器，串行接口
文件：	总40页 (文件大小：500K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

MCP23S08-E/SO [MICROCHIP]

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