MCP2551T-E/SNVAO [MICROCHIP]
Interface Circuit, PDSO8;
| 型号： | MCP2551T-E/SNVAO |
| 厂家： | 
MICROCHIP |
| 描述： | Interface Circuit, PDSO8 光电二极管 |
| 文件： | 总26页 (文件大小：451K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Not Recommended for New Designs
Please use MCP2561
MCP2551
High-Speed CAN Transceiver
Features
Package Types
PDIP/SOIC
• Supports 1 Mb/s operation
• Implements ISO-11898 standard physical layer
requirements
• Suitable for 12V and 24V systems
TXD
VSS
1
2
8
7
RS
• Externally-controlled slope for reduced RFI
emissions
CANH
• Detection of ground fault (permanent Dominant)
on TXD input
VDD
3
4
6
5
CANL
VREF
• Power-on Reset and voltage brown-out protection
RXD
• An unpowered node or brown-out event will not
disturb the CAN bus
• Low current standby operation
• Protection against damage due to short-circuit
conditions (positive or negative battery voltage)
• Protection against high-voltage transients
• Automatic thermal shutdown protection
• Up to 112 nodes can be connected
• High-noise immunity due to differential bus
implementation
• Temperature ranges:
- Industrial (I): -40°C to +85°C
- Extended (E): -40°C to +125°C
Block Diagram
VDD
TXD
Dominant
Detect
Thermal
Shutdown
VDD
Driver
Control
TXD
Slope
Power-On
Reset
CANH
RS
RXD
VREF
Control
0.5 VDD
GND
CANL
Receiver
Reference
Voltage
VSS
2001-2016 Microchip Technology Inc.
DS20001667G-page 1
MCP2551
NOTES:
DS20001667G-page 2
2001-2016 Microchip Technology Inc.
MCP2551
1.4
Operating Modes
1.0
DEVICE OVERVIEW
The RS pin allows three modes of operation to be
selected:
The MCP2551 is a high-speed CAN, fault-tolerant
device that serves as the interface between a CAN
protocol controller and the physical bus. The MCP2551
device provides differential transmit and receive
capability for the CAN protocol controller, and is fully
compatible with the ISO-11898 standard, including 24V
requirements. It will operate at speeds of up to 1 Mb/s.
• High-Speed
• Slope-Control
• Standby
These modes are summarized in Table 1-1.
Typically, each node in a CAN system must have a
device to convert the digital signals generated by a
CAN controller to signals suitable for transmission over
the bus cabling (differential output). It also provides a
buffer between the CAN controller and the high-voltage
spikes that can be generated on the CAN bus by
outside sources (EMI, ESD, electrical transients, etc.).
When in High-Speed or Slope-Control mode, the
drivers for the CANH and CANL signals are internally
regulated to provide controlled symmetry in order to
minimize EMI emissions.
Additionally, the slope of the signal transitions on
CANH and CANL can be controlled with a resistor
connected from pin 8 (RS) to ground. The slope must
be proportional to the current output at RS, which will
further reduce EMI emissions.
1.1
Transmitter Function
The CAN bus has two states: Dominant and
Recessive. Dominant state occurs when the
1.4.1
HIGH-SPEED
A
High-Speed mode is selected by connecting the RS pin
to VSS. In this mode, the transmitter output drivers have
fast output rise and fall times to support high-speed
CAN bus rates.
differential voltage between CANH and CANL is
greater than a defined voltage (e.g.,1.2V). A Recessive
state occurs when the differential voltage is less than a
defined voltage (typically 0V). The Dominant and
Recessive states correspond to the Low and High state
of the TXD input pin, respectively. However, a
Dominant state initiated by another CAN node will
override a Recessive state on the CAN bus.
1.4.2
SLOPE-CONTROL
Slope-Control mode further reduces EMI by limiting the
rise and fall times of CANH and CANL. The slope, or
slew rate (SR), is controlled by connecting an external
resistor (REXT) between RS and VOL (usually ground).
The slope is proportional to the current output at the RS
pin. Since the current is primarily determined by the
slope-control resistance value REXT, a certain slew rate
is achieved by applying
Figure 1-1 illustrates typical slew rate values as a
function of the slope-control resistance value.
1.1.1
MAXIMUM NUMBER OF NODES
The MCP2551 CAN outputs will drive a minimum load
of 45, allowing a maximum of 112 nodes to be
connected (given
a
minimum differential input
a specific resistance.
resistance of 20 k and a nominal termination resistor
value of 120
1.2
Receiver Function
1.4.3
STANDBY MODE
The RXD output pin reflects the differential bus voltage
between CANH and CANL. The Low and High states of
the RXD output pin correspond to the Dominant and
Recessive states of the CAN bus, respectively.
The device may be placed in Standby or SLEEP mode
by applying a high-level to the RS pin. In SLEEP mode,
the transmitter is switched off and the receiver operates
at a lower current. The receive pin on the controller side
(RXD) is still functional, but will operate at a slower
rate. The attached microcontroller can monitor RXD for
CAN bus activity and place the transceiver into normal
operation via the RS pin (at higher bus rates, the first
CAN message may be lost).
1.3
Internal Protection
CANH and CANL are protected against battery short
circuits and electrical transients that can occur on the
CAN bus. This feature prevents destruction of the
transmitter output stage during such a fault condition.
The device is further protected from excessive current
loading by thermal shutdown circuitry that disables the
output drivers when the junction temperature exceeds
a nominal limit of 165°C. All other parts of the chip
remain operational, and the chip temperature is low-
ered due to the decreased power dissipation in the
transmitter outputs. This protection is essential to
protect against bus line short-circuit-induced damage.
2001-2016 Microchip Technology Inc.
DS20001667G-page 3
MCP2551
TABLE 1-1:
Mode
MODES OF OPERATION
Current at Rs Pin
-IRS < 10 µA
Resulting Voltage at RS Pin
Standby
VRS > 0.75 VDD
Slope-Control
High-Speed
10 µA < -IRS < 200 µA
-IRS < 610 µA
0.4 VDD < VRS < 0.6 VDD
0 < VRS < 0.3VDD
TABLE 1-2:
TRANSCEIVER TRUTH TABLE
(
VDD
VRS
TXD
CANH
CANL
Bus State( 1)
RXD 1)
0
HIGH
LOW
Dominant
Recessive
Recessive
Dominant
Recessive
Recessive
0
1
1
0
1
1
VRS < 0.75 VDD
VRS > 0.75 VDD
VRS < 0.75 VDD
VRS > 0.75 VDD
X
4.5V VDD 5.5V
1 or floating
Not Driven
Not Driven
HIGH
Not Driven
Not Driven
LOW
X
0
1 or floating
X
VPOR < VDD < 4.5V
Not Driven
Not Driven
Not Driven
Not Driven
(See Note 3)
Not Driven/
No Load
Not Driven/
No Load
0 < VDD < VPOR
X
High Impedance
X
Note 1: If another bus node is transmitting a Dominant bit on the CAN bus, then RXD is a logic ‘0’.
2: X = “don’t care”.
3: Device drivers will function, although outputs are not ensured to meet the ISO-11898 specification.
FIGURE 1-1:
SLEW RATE VS. SLOPE-CONTROL RESISTANCE VALUE
25
20
15
10
5
0
10 20 30 40 49 60 70 76 90 100 110 120
Resistance (k)
DS20001667G-page 4
2001-2016 Microchip Technology Inc.
MCP2551
1.7.1
TRANSMITTER DATA INPUT (TXD)
1.5
TXD Permanent Dominant
Detection
TXD is a TTL-compatible input pin. The data on this pin
is driven out on the CANH and CANL differential output
pins. It is usually connected to the transmitter data
output of the CAN controller device. When TXD is low,
CANH and CANL are in the Dominant state. When TXD
is high, CANH and CANL are in the Recessive state,
provided that another CAN node is not driving the CAN
bus with a Dominant state. TXD has an internal pull-up
resistor (nominal 25 k to VDD).
If the MCP2551 detects an extended Low state on the
TXD input, it will disable the CANH and CANL output
drivers in order to prevent the corruption of data on the
CAN bus. The drivers are disabled if TXD is Low for
more than 1.25 ms (minimum). This implies
a
maximum bit time of 62.5 µs (16 kb/s bus rate),
allowing up to 20 consecutive transmitted Dominant
bits during a multiple bit error and error frame scenario.
The drivers remain disabled as long as TXD remains
Low. A rising edge on TXD will reset the timer logic and
enable the CANH and CANL output drivers.
1.7.2
GROUND SUPPLY (VSS)
Ground supply pin.
1.7.3
SUPPLY VOLTAGE (VDD)
1.6
Power-on Reset
Positive supply voltage pin.
When the device is powered on, CANH and CANL
remain in a high-impedance state until VDD reaches the
voltage level VPORH. In addition, CANH and CANL will
remain in a high-impedance state if TXD is Low when
VDD reaches VPORH. CANH and CANL will become
active only after TXD is asserted High. Once powered
on, CANH and CANL will enter a high-impedance state
if the voltage level at VDD falls below VPORL, providing
voltage brown-out protection during normal operation.
1.7.4
RECEIVER DATA OUTPUT (RXD)
RXD is a CMOS-compatible output that drives high or
low depending on the differential signals on the CANH
and CANL pins and is usually connected to the receiver
data input of the CAN controller device. RXD is High
when the CAN bus is Recessive and Low in the
Dominant state.
1.7.5
REFERENCE VOLTAGE (VREF)
1.7
Pin Descriptions
Reference Voltage Output (defined as VDD/2).
The 8-pin pinout is listed in Table 1-3.
1.7.6
CAN LOW (CANL)
TABLE 1-3:
Pin
MCP2551 PINOUT
The CANL output drives the low side of the CAN
differential bus. This pin is also tied internally to the
receive input comparator.
Pin
Pin Function
Number Name
1
2
3
4
5
6
7
8
TXD
VSS
VDD
Transmit Data Input
Ground
1.7.7
CAN HIGH (CANH)
The CANH output drives the high side of the CAN
differential bus. This pin is also tied internally to the
receive input comparator.
Supply Voltage
RXD Receive Data Output
Reference Output Voltage
VREF
1.7.8
SLOPE RESISTOR INPUT (RS)
CANL CAN Low-Level Voltage I/O
CANH CAN High-Level Voltage I/O
The RS pin is used to select High-Speed, Slope-Control
or Standby modes via an external biasing resistor.
RS
Slope-Control Input
2001-2016 Microchip Technology Inc.
DS20001667G-page 5
MCP2551
NOTES:
DS20001667G-page 6
2001-2016 Microchip Technology Inc.
MCP2551
2.1.5
DIFFERENTIAL VOLTAGE, VDIFF
(OF CAN BUS)
2.0
2.1
ELECTRICAL
CHARACTERISTICS
Differential voltage of the two-wire CAN bus, value
VDIFF = VCANH – VCANL.
Terms and Definitions
A number of terms are defined in ISO-11898 that are
used to describe the electrical characteristics of a CAN
transceiver device. These terms and definitions are
summarized in this section.
2.1.6
INTERNAL CAPACITANCE, CIN
(OF A CAN NODE)
Capacitance seen between CANL (or CANH) and
ground during the Recessive state when the CAN node
is disconnected from the bus (see Figure 2-1).
2.1.1
BUS VOLTAGE
VCANL and VCANH denote the voltages of the bus line
wires CANL and CANH relative to ground of each
individual CAN node.
2.1.7
INTERNAL RESISTANCE, RIN
(OF A CAN NODE)
Resistance seen between CANL (or CANH) and
ground during the Recessive state when the CAN node
is disconnected from the bus (see Figure 2-1).
2.1.2
COMMON MODE BUS VOLTAGE
RANGE
Boundary voltage levels of VCANL and VCANH with
respect to ground, for which proper operation will occur,
if up to the maximum number of CAN nodes are
connected to the bus.
FIGURE 2-1:
PHYSICAL LAYER
DEFINITIONS
ECU
2.1.3
DIFFERENTIAL INTERNAL
CAPACITANCE, CDIFF
(OF A CAN NODE)
RIN
RIN
CANL
Capacitance seen between CANL and CANH during
the Recessive state when the CAN node is
disconnected from the bus (see Figure 2-1).
CDIFF
RDIFF
CANH
CIN
CIN
2.1.4
DIFFERENTIAL INTERNAL
RESISTANCE, RDIFF
(OF A CAN NODE)
GROUND
Resistance seen between CANL and CANH during the
Recessive state when the CAN node is disconnected
from the bus (see Figure 2-1).
2001-2016 Microchip Technology Inc.
DS20001667G-page 7
MCP2551
Absolute Maximum Ratings†
VDD.............................................................................................................................................................................7.0V
DC Voltage at TXD, RXD, VREF and VS............................................................................................ -0.3V to VDD + 0.3V
DC Voltage at CANH, CANL (Note 1)..........................................................................................................-42V to +42V
Transient Voltage on Pins 6 and 7 (Note 2).............................................................................................-250V to +250V
Storage temperature ...............................................................................................................................-55°C to +150°C
Operating ambient temperature ..............................................................................................................-40°C to +125°C
Virtual Junction Temperature, TVJ (Note 3).............................................................................................-40°C to +150°C
Soldering temperature of leads (10 seconds) .......................................................................................................+300°C
ESD protection on CANH and CANL pins (Note 4) ...................................................................................................6 kV
ESD protection on all other pins (Note 4) ..................................................................................................................4 kV
Note 1:Short-circuit applied when TXD is High and Low.
2: In accordance with ISO-7637.
3: In accordance with IEC 60747-1.
4: Classification A: Human Body Model.
† NOTICE: Stresses above those listed under “Maximum ratings” may cause permanent damage to the device. This
is a stress rating only and functional operation of the device at those or any other conditions above those indicated in
the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods
may affect device reliability.
DS20001667G-page 8
2001-2016 Microchip Technology Inc.
MCP2551
2.2
DC Characteristics
Electrical Characteristics:
DC Specifications
Industrial (I): TAMB = -40°C to +85°C VDD = 4.5V to 5.5V
Extended (E): TAMB = -40°C to +125°C VDD = 4.5V to 5.5V
Param
Sym
No.
Characteristic
Min
Max
Units
Conditions
Supply
D1
—
—
75
10
mA
mA
Dominant; VTXD = 0.8V; VDD
Recessive; VTXD = +2V;
RS = 47 kW
D2
IDD
Supply Current
-40°C TAMB +85°C, Standby;
(Note 2)
—
—
365
465
4.3
4.0
0.8
µA
µA
V
D3
-40°C TAMB +125°C,
Standby; (Note 2)
High-level of the Power-on
Reset comparator
CANH, CANL outputs are active
when VDD > VPORH
D4
D5
D6
VPORH
VPORL
VPORD
3.8
3.4
0.3
Low-level of the Power-on
Reset comparator
CANH, CANL outputs are not
active when VDD < VPORL
V
Hysteresis of Power-on
Reset comparator
V
Note 1
Bus Line (CANH; CANL) Transmitter
VCANH
VCANL
CANH, CANL Recessive
bus voltage
(r);
(r)
D7
D8
2.0
-2
3.0
+2
V
mA
mA
V
VTXD = VDD; no load.
-2V < V(CAHL,CANH) < +7V,
0V <VDD < 5.5V
IO(CANH)(reces)
IO(CANL)(reces)
Recessive output current
-5V < V(CANL,CANH) < +40V,
0V <VDD < 5.5V
D9
-10
2.75
0.5
+10
4.5
CANH Dominant
output voltage
D10
D11
D12
VO(CANH)
VO(CANL)
VTXD = 0.8V
CANL Dominant
output voltage
2.25
+50
V
VTXD = 0.8V
Recessive differential
output voltage
VDIFF(r)(o)
VDIFF(d)(o)
-500
mV
VTXD = 2V; no load
Dominant differential
output voltage
VTXD = 0.8V; VDD = 5V
40W < RL < 60W (Note 2)
D13
D14
D15
1.5
—
3.0
V
-200
mA
mA
VCANH = -5V
CANH short-circuit
output current
IO(SC)(CANH)
IO(SC)(CANL)l
-100
(typical)
—
VCANH = -40V, +40V. (Note 1)
CANL short-circuit
output current
D16
D17
—
200
+0.5
+0.4
mA
V
VCANL = -40V, +40V. (Note 1)
-2V < V(CANL, CANH) < +7V
(Note 3)
-1.0
-1.0
Recessive differential
input voltage
VDIFF(r)(i)
-12V < V(CANL, CANH) < +12V
(Note 3)
V
Note 1: This parameter is periodically sampled and not 100% tested.
2: ITXD = IRXD = IVREF = 0 mA; 0V < VCANL < VDD; 0V < VCANH < VDD; VRS = VDD
.
3: This is valid for the receiver in all modes; High-speed, Slope-control and Standby.
2001-2016 Microchip Technology Inc.
DS20001667G-page 9
MCP2551
2.2
DC Characteristics (Continued)
Electrical Characteristics:
DC Specifications (Continued)
Industrial (I): TAMB = -40°C to +85°C VDD = 4.5V to 5.5V
Extended (E): TAMB = -40°C to +125°C VDD = 4.5V to 5.5V
Param
Sym
No.
Characteristic
Min
Max
Units
Conditions
Bus Line (CANH; CANL) Receiver: [TXD = 2V; pins 6 and 7 externally driven]
-2V < V(CANL, CANH) < +7V
(Note 3)
0.9
5.0
V
Dominant differential
input voltage
D18
VDIFF(d)(i)
-12V < V(CANL, CANH) < +12V
(Note 3)
1.0
100
5
5.0
200
50
V
D19
D20
VDIFF(h)(i)
RIN
Differential input hysteresis
mV
kW
See Figure 2-3 (Note 1)
CANH, CANL Common-
mode input resistance
Deviation between CANH
and CANL Common-mode
input resistance
D21
RIN(d)
-3
+3
%
VCANH = VCANL
Bus Line (CANH; CANL) Receiver: [TXD = 2V; pins 6 and 7 externally driven]
D22
RDIFF
Differential input resistance
20
100
kW
CANH, CANL input leakage
current
VDD < VPOR;
VCANH = VCANL = +5V
D24
ILI
—
150
µA
Transmitter Data Input (TXD)
D25
D26
D27
D28
VIH
VIL
IIH
High-level input voltage
Low-level input voltage
High-level input current
Low-level input current
2.0
VSS
-1
VDD
+0.8
+1
V
V
Output Recessive
Output Dominant
VTXD = VDD
µA
µA
IIL
-100
-400
VTXD = 0V
Receiver Data Output (RXD)
0.7 VD
D
D31
D32
VOH
High-level output voltage
Low-level output voltage
—
V
V
IOH = 8 mA
IOL = 8 mA
VOL
—
0.8
Voltage Reference Output (VREF)
D33 Reference output voltage
Standby/Slope-Control (RS pin)
0.45 V 0.55 VD
VREF
V
-50 µA < IVREF < 50 µA
DD
D
Input voltage for standby
mode
0.75 V
DD
D34
D35
D36
VSTB
ISLOPE
VSLOPE
—
V
µA
V
Slope-control mode current
-10
-200
0.4 VD
D
Slope-control mode voltage
0.6 VDD
Thermal Shutdown
Shutdown junction
temperature
oC
oC
D37
D38
TJ
155
20
180
30
Note 1
(sd)
Shutdown temperature
hysteresis
-12V < V(CANL, CANH) < +12V
(Note 3)
TJ
(h)
Note 1: This parameter is periodically sampled and not 100% tested.
2: ITXD = IRXD = IVREF = 0 mA; 0V < VCANL < VDD; 0V < VCANH < VDD; VRS = VDD
.
3: This is valid for the receiver in all modes; High-speed, Slope-control and Standby.
DS20001667G-page 10
2001-2016 Microchip Technology Inc.
MCP2551
FIGURE 2-1:
TEST CIRCUIT FOR ELECTRICAL CHARACTERISTICS
0.1µF
VDD
CANH
TXD
VREF
CAN
60
100 pF
Transceiver
RXD
CANL
30 pF
RS
Rext
GND
Note:
RS may be connected to VDD or GND via a load resistor depending on desired
operating mode as described in Section 1.7.3 “Supply Voltage (VDD)”.
FIGURE 2-2:
TEST CIRCUIT FOR AUTOMOTIVE TRANSIENTS
500 pF
CANH
TXD
Schaffner
CAN
VREF
RXD
60
Generator
Transceiver
CANL
500 pF
RS
GND
Note:
RS may be connected to VDD or
GND via a load resistor depending
on desired operating mode as
described in Section 1.7.8 “Slope
Resistor Input (Rs)”.
Rext
The wave forms of the applied transients shall be in accordance with “ISO-7637, Part 1”, test pulses 1, 2, 3a and 3b.
FIGURE 2-3:
HYSTERESIS OF THE RECEIVER
RXD (receive data
output voltage)
VOH
VOL
VDIFF (r)(i)
VDIFF (d)(i)
hysteresis
D19
0.5
0.9
VDIFF (V)
2001-2016 Microchip Technology Inc.
DS20001667G-page 11
MCP2551
2.3
AC Characteristics
Electrical Characteristics:
AC Specifications
Industrial (I): TAMB = -40°C to +85°C VDD = 4.5V to 5.5V
Extended (E): TAMB = -40°C to +125°C VDD = 4.5V to 5.5V
Param
Sym
No.
Characteristic
Min
Max
Units
Conditions
1
2
tBIT
fBIT
Bit time
Bit frequency
1
62.5
µs
VRS = 0V
VRS = 0V
16
1000
kHz
-40°C TAMB +125°C,
VRS = 0V
3
TtxL2bus(d) Delay TXD to bus active
—
—
70
ns
ns
-40°C TAMB +85°C,
VRS = 0V
125
170
130
250
175
225
235
400
8.5
4
TtxH2bus(r) Delay TXD to bus inactive
-40°C TAMB +125°C,
VRS = 0V
—
ns
-40°C TAMB +125°C,
VRS = 0V
—
ns
5
6
TtxL2rx(d) Delay TXD to receive active
-40°C TAMB +125°C,
RS = 47 k
—
ns
-40°C TAMB +85°C,
VRS = 0V
—
ns
-40°C TAMB +85°C,
RS = 47 k
—
ns
Delay TXD to receiver
TtxH2rx(r)
inactive
-40°C TAMB +125°C,
VRS = 0V
—
ns
-40°C TAMB +125°C,
RS = 47 k
—
ns
Refer to Figure 2-1;
RS = 47 kNote 1)
7
SR
CANH, CANL slew rate
5.5
—
V/µs
µs
ns
Wake-up time from standby
(Rs pin)
10
11
12
13
14
tWAKE
5
See Figure 2-5
Bus Dominant to RXD Low
(Standby mode)
TbusD2rx(s)
—
550
VRS = +4V; (See Figure 2-6)
CIN(CANH)
CIN(CANL)
CANH; CANL input
capacitance
20
(typical)
1 Mb/s data rate;
VTXD = VDD, (Note 1)
—
pF
pF
ms
Differential input
capacitance
10
(typical)
1 Mb/s data rate
(Note 1)
CDIFF
—
TX Permanent Dominant
Timer Disable Time
TtxL2busZ
1.25
4
Rising edge on TXD while
device is in permanent
Dominant state
TX Permanent Dominant
Timer Reset Time
15
TtxR2pdt(res)
—
1
µs
Note 1: This parameter is periodically sampled and not 100% tested.
DS20001667G-page 12
2001-2016 Microchip Technology Inc.
MCP2551
2.4
Timing Diagrams and Specifications
TIMING DIAGRAM FOR AC CHARACTERISTICS
FIGURE 2-4:
VDD
0V
TXD (transmit data
input voltage)
VDIFF (CANH,
CANL differential
voltage)
0.5V
0.9V
RXD (receive data
output voltage)
0.7 VDD
0.3 VDD
3
4
5
6
FIGURE 2-5:
TIMING DIAGRAM FOR WAKE-UP FROM STANDBY
VRS Slope resistor
input voltage
VDD
0V
0.6 VDD
VRXD Receive data
output voltage
0.3 VDD
10
VTXD = 0.8V
FIGURE 2-6:
TIMING DIAGRAM FOR BUS DOMINANT TO RXD LOW (STANDBY MODE)
1.5V
0.9V
VDIFF, Differential
voltage
0V
Receive data
output voltage
0.3 VDD
11
VRS = 4V; VTXD = 2V
2001-2016 Microchip Technology Inc.
DS20001667G-page 13
MCP2551
NOTES:
DS20001667G-page 14
2001-2016 Microchip Technology Inc.
MCP2551
3.0
3.1
PACKAGING INFORMATION
Package Marking Information
8-Lead PDIP (300 mil)
Example:
MCP2551
e
3
E/P256
1642
8-Lead SOIC (150 mil)
Example:
MCP2551E
e
3
SN^1642
256
NNN
Legend: XX...X Customer-specific information
Y
YY
WW
NNN
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC® designator for Matte Tin (Sn)
e
3
*
This package is Pb-free. The Pb-free JEDEC designator ( )
e
3
can be found on the outer packaging for this package.
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
2001-2016 Microchip Technology Inc.
DS20001667G-page 15
MCP2551
8-Lead Plastic Dual In-Line (P) - 300 mil Body [PDIP]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
D
A
N
B
E1
NOTE 1
1
2
TOP VIEW
E
A2
A
C
PLANE
L
c
A1
e
eB
8X b1
8X b
.010
C
SIDE VIEW
END VIEW
Microchip Technology Drawing No. C04-018D Sheet 1 of 2
DS20001667G-page 16
2001-2016 Microchip Technology Inc.
MCP2551
8-Lead Plastic Dual In-Line (P) - 300 mil Body [PDIP]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
ALTERNATE LEAD DESIGN
(VENDOR DEPENDENT)
DATUM A
DATUM A
b
b
e
2
e
2
e
e
Units
Dimension Limits
INCHES
NOM
8
.100 BSC
-
MIN
MAX
Number of Pins
Pitch
N
e
A
Top to Seating Plane
-
.210
.195
-
Molded Package Thickness
Base to Seating Plane
Shoulder to Shoulder Width
Molded Package Width
Overall Length
Tip to Seating Plane
Lead Thickness
Upper Lead Width
A2
A1
E
E1
D
L
c
b1
b
eB
.115
.015
.290
.240
.348
.115
.008
.040
.014
-
.130
-
.310
.250
.365
.130
.010
.060
.018
-
.325
.280
.400
.150
.015
.070
.022
.430
Lower Lead Width
Overall Row Spacing
§
Notes:
1. Pin 1 visual index feature may vary, but must be located within the hatched area.
2. § Significant Characteristic
3. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or
protrusions shall not exceed .010" per side.
4. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
Microchip Technology Drawing No. C04-018D Sheet 2 of 2
2001-2016 Microchip Technology Inc.
DS20001667G-page 17
MCP2551
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
DS20001667G-page 18
2001-2016 Microchip Technology Inc.
MCP2551
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
2001-2016 Microchip Technology Inc.
DS20001667G-page 19
MCP2551
ꢀꢁꢂꢃꢄꢅꢆꢇꢈꢄꢉꢊꢋꢌꢆꢍꢎꢄꢈꢈꢆꢏꢐꢊꢈꢋꢑꢃꢆꢒꢍꢓꢔꢆꢕꢆꢓꢄꢖꢖꢗꢘꢙꢆꢚꢛꢜꢝꢆꢎꢎꢆꢞꢗꢅꢟꢆꢠꢍꢏꢡꢢꢣ
ꢓꢗꢊꢃꢤ ꢀꢁꢂꢃꢄꢅꢆꢃ!ꢁ"ꢄꢃꢇ#ꢂꢂꢆꢈꢄꢃꢉꢊꢇ$ꢊꢋꢆꢃ%ꢂꢊ&ꢌꢈꢋ"'ꢃꢉꢍꢆꢊ"ꢆꢃ"ꢆꢆꢃꢄꢅꢆꢃꢎꢌꢇꢂꢁꢇꢅꢌꢉꢃ(ꢊꢇ$ꢊꢋꢌꢈꢋꢃꢏꢉꢆꢇꢌ)ꢌꢇꢊꢄꢌꢁꢈꢃꢍꢁꢇꢊꢄꢆ%ꢃꢊꢄꢃ
ꢅꢄꢄꢉ*++&&&ꢐ!ꢌꢇꢂꢁꢇꢅꢌꢉꢐꢇꢁ!+ꢉꢊꢇ$ꢊꢋꢌꢈꢋ
DS20001667G-page 20
2001-2016 Microchip Technology Inc.
MCP2551
APPENDIX A: REVISION HISTORY
Revision G (December 2016)
The following is the list of modifications:
• Added note to page 1 header: “Not recommended
for new designs”.
• Updated Section 3.1 “Package Marking Infor-
mation”.
• Minor typographical corrections.
Revision F (July 2010)
The following is the list of modifications:
• Updates to the packaging diagrams.
Revision E (January 2007)
The following is the list of modifications:
• Updates to the packaging diagrams.
Revision A (June 2001)
• Original Release of this Document.
2001-2016 Microchip Technology Inc.
DS20001667G-page 21
MCP2551
NOTES:
DS20001667G-page 22
2001-2016 Microchip Technology Inc.
MCP2551
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO.
Device
-X
/XX
XXX
Examples:
Temperature
Range
Package
Pattern
a) MCP2551-I/P:
Industrial temperature,
PDIP package.
b) MCP2551-E/P:
Extended temperature,
PDIP package.
Device:
MCP2551: High-Speed CAN Transceiver
MCP2551T: High-Speed CAN Transceiver
(Tape and Reel)
c) MCP2551-I/SN: Industrial temperature,
SOIC package.
d) MCP2551T-I/SN: Tape and Reel,
Industrial Temperature,
Temperature
Range:
I
=
=
-40°C to +85°C
-40°C to +125°C
SOIC package.
E
e) MCP2551T-E/SN: Tape and Reel,
Extended Temperature,
SOIC package.
Package:
P
SN
=
=
Plastic DIP (300 mil Body) 8-lead
Plastic SOIC (150 mil Body) 8-lead
f)
MCP2551-E/SN: Extended Temperature,
SOIC package.
2001-2016 Microchip Technology Inc.
DS20001667G-page 23
MCP2551
NOTES:
DS20001667G-page 24
2001-2016 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights unless otherwise stated.
Trademarks
The Microchip name and logo, the Microchip logo, AnyRate, AVR,
AVR logo, AVR Freaks, BeaconThings, BitCloud, CryptoMemory,
CryptoRF, dsPIC, FlashFlex, flexPWR, Heldo, JukeBlox, KEELOQ,
KEELOQ logo, Kleer, LANCheck, LINK MD, maXStylus,
maXTouch, MediaLB, megaAVR, MOST, MOST logo, MPLAB,
OptoLyzer, PIC, picoPower, PICSTART, PIC32 logo, Prochip
Designer, QTouch, RightTouch, SAM-BA, SpyNIC, SST, SST
Logo, SuperFlash, tinyAVR, UNI/O, and XMEGA are registered
trademarks of Microchip Technology Incorporated in the U.S.A.
and other countries.
ClockWorks, The Embedded Control Solutions Company,
EtherSynch, Hyper Speed Control, HyperLight Load, IntelliMOS,
mTouch, Precision Edge, and Quiet-Wire are registered
trademarks of Microchip Technology Incorporated in the U.S.A.
Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any
Capacitor, AnyIn, AnyOut, BodyCom, chipKIT, chipKIT logo,
CodeGuard, CryptoAuthentication, CryptoCompanion,
CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average
Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial
Programming, ICSP, Inter-Chip Connectivity, JitterBlocker,
KleerNet, KleerNet logo, Mindi, MiWi, motorBench, MPASM, MPF,
MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach,
Omniscient Code Generation, PICDEM, PICDEM.net, PICkit,
PICtail, PureSilicon, QMatrix, RightTouch logo, REAL ICE, Ripple
Blocker, SAM-ICE, Serial Quad I/O, SMART-I.S., SQI,
SuperSwitcher, SuperSwitcher II, Total Endurance, TSHARC,
USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and
ZENA are trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated in
the U.S.A.
Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
Silicon Storage Technology is a registered trademark of Microchip
Technology Inc. in other countries.
GestIC is a registered trademark of Microchip Technology
Germany II GmbH & Co. KG, a subsidiary of Microchip Technology
Inc., in other countries.
All other trademarks mentioned herein are property of their
respective companies.
QUALITY MANAGEMENT SYSTEM
CERTIFIED BY DNV
© 2001-2016, Microchip Technology Incorporated, All Rights
Reserved.
ISBN: 978-1-5224-1198-7
== ISO/TS 16949 ==
2001-2016 Microchip Technology Inc.
DS20001667G-page 25
Worldwide Sales and Service
AMERICAS
ASIA/PACIFIC
ASIA/PACIFIC
EUROPE
Corporate Office
2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7200
Fax: 480-792-7277
Technical Support:
http://www.microchip.com/
support
Asia Pacific Office
China - Xiamen
Tel: 86-592-2388138
Fax: 86-592-2388130
Austria - Wels
Tel: 43-7242-2244-39
Fax: 43-7242-2244-393
Suites 3707-14, 37th Floor
Tower 6, The Gateway
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Tel: 86-756-3210040
Fax: 86-756-3210049
Denmark - Copenhagen
Tel: 45-4450-2828
Fax: 45-4485-2829
Hong Kong
Tel: 852-2943-5100
Fax: 852-2401-3431
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Tel: 91-80-3090-4444
Fax: 91-80-3090-4123
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Web Address:
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DS20001667G-page 26
2001-2016 Microchip Technology Inc.
11/07/16
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