MCP6051T-E/SN [MICROCHIP]

30 μA, High Precision Op Amps; 30 μA ,高精度运算放大器
MCP6051T-E/SN
型号: MCP6051T-E/SN
厂家: MICROCHIP    MICROCHIP
描述:

30 μA, High Precision Op Amps
30 μA ,高精度运算放大器

运算放大器 放大器电路 光电二极管
文件: 总34页 (文件大小:685K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
MCP6051/2/4  
30 µA, High Precision Op Amps  
Features  
Description  
• Low Offset Voltage: ±150 µV (maximum)  
• Low Quiescent Current: 30 µA (typical)  
• Rail-to-Rail Input and Output  
The Microchip Technology Inc. MCP6051/2/4 family of  
operational amplifiers (op amps) has low input offset  
voltage (±150 µV, maximum) and rail-to-rail input and  
output operation. This family is unity gain stable and  
has a gain bandwidth product of 385 kHz (typical).  
These devices operate with a single supply voltage as  
low as 1.8V, while drawing low quiescent current per  
amplifier (30 µA, typical). These features make the  
family of op amps well suited for single-supply, high  
precision, battery-powered applications.  
• Wide Supply Voltage Range: 1.8V to 6.0V  
• Gain Bandwidth Product: 385 kHz (typical)  
• Unity Gain Stable  
• Extended Temperature Range: -40°C to +125°C  
• No Phase Reversal  
The MCP6051/2/4 family is offered in single  
(MCP6051), dual (MCP6052), and quad (MCP6054)  
configurations.  
Applications  
• Automotive  
• Portable Instrumentation  
• Sensor Conditioning  
• Battery Powered Systems  
• Medical Instrumentation  
Test Equipment  
The MCP6051/2/4 is designed with Microchip’s  
advanced CMOS process. All devices are available in  
the extended temperature range, with a power supply  
range of 1.8V to 6.0V.  
Package Types  
• Analog Filters  
MCP6051  
SOIC  
MCP6052  
SOIC  
Design Aids  
NC  
VDD  
8
1
8
7
6
5
1
2
3
4
NC  
VOUTA  
• SPICE Macro Models  
• FilterLab® Software  
• MindiCircuit Designer & Simulator  
• Microchip Advanced Part Selector (MAPS)  
• Analog Demonstration and Evaluation Boards  
• Application Notes  
VDD  
VOUT  
NC  
VOUTB  
2
3
4
7
6
5
VIN  
+
VINA  
+
VINB  
VINB  
+
VIN  
VINA  
VSS  
VSS  
MCP6051  
2x3 TDFN *  
MCP6052  
2x3 TDFN *  
NC  
VOUTA  
1
1
8
7
8
7
NC  
VDD  
Typical Application  
VIN–  
VINA  
+
VDD  
VOUT  
VOUTB  
2
2
EP  
9
EP  
9
VIN  
+
VINA  
VINB  
VINB  
+
3
4
6
5
3
4
6
5
RL  
VSS  
VSS  
NC  
VOUT  
MCP6054  
SOIC, TSSOP  
ZIN  
MCP6051  
VOUTD  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
VOUTA  
VIND  
VIND  
VSS  
VINA  
+
C
+
VINA  
ZIN = RL + jωL  
L = RLRC  
R
VDD  
VINB  
VINB  
Gyrator  
VINC  
+
+
VINC  
VOUTC  
8
VOUTB  
* Includes Exposed Thermal Pad (EP); see Table 3-1.  
© 2009 Microchip Technology Inc.  
DS22182A-page 1  
MCP6051/2/4  
NOTES:  
DS22182A-page 2  
© 2009 Microchip Technology Inc.  
MCP6051/2/4  
1.0  
1.1  
ELECTRICAL CHARACTERISTICS  
Absolute Maximum Ratings †  
VDD – VSS ........................................................................7.0V  
Current at Input Pins.....................................................±2 mA  
Analog Inputs (VIN+, VIN-)†† .......... VSS – 1.0V to VDD + 1.0V  
All Other Inputs and Outputs ......... VSS – 0.3V to VDD + 0.3V  
† Notice: Stresses above those listed under “Absolute  
Maximum Ratings” may cause permanent damage to  
the device. This is a stress rating only and functional  
operation of the device at those or any other conditions  
above those indicated in the operational listings of this  
specification is not implied. Exposure to maximum  
rating conditions for extended periods may affect  
device reliability.  
Difference Input Voltage ...................................... |VDD – VSS  
|
Output Short-Circuit Current .................................continuous  
Current at Output and Supply Pins ............................±30 mA  
Storage Temperature ....................................-65°C to +150°C  
Maximum Junction Temperature (TJ)..........................+150°C  
ESD protection on all pins (HBM; MM) ................ ≥ 4 kV; 400V  
†† See 4.1.2 “Input Voltage And Current Limits”  
1.2  
Specifications  
TABLE 1-1:  
DC ELECTRICAL SPECIFICATIONS  
Electrical Characteristics: Unless otherwise indicated, VDD = +1.8V to +6.0V, VSS= GND, TA= +25°C, VCM = VDD/2,  
VOUT VDD/2, VL = VDD/2 and RL = 100 kΩ to VL. (Refer to Figure 1-1).  
Parameters  
Input Offset  
Sym  
Min  
Typ  
Max  
Units  
Conditions  
Input Offset Voltage  
VOS  
-150  
+150  
µV VDD = 3.0V,  
VCM = VDD/3  
Input Offset Drift with Temperature  
ΔVOS/ΔTA  
ΔVOS/ΔTA  
PSRR  
±1.5  
±4.0  
87  
µV/°C TA= -40°C to +85°C,  
VDD = 3.0V, VCM = VDD/3  
µV/°C TA= +85°C to +125°C,  
VDD = 3.0V, VCM = VDD/3  
Power Supply Rejection Ratio  
Input Bias Current and Impedance  
Input Bias Current  
70  
dB  
VCM = VSS  
IB  
IB  
±1.0  
60  
100  
pA  
pA TA = +85°C  
IB  
1100  
±1.0  
1013||6  
1013||6  
5000  
pA TA = +125°C  
Input Offset Current  
IOS  
ZCM  
ZDIFF  
pA  
Common Mode Input Impedance  
Differential Input Impedance  
Common Mode  
Ω||pF  
Ω||pF  
Common Mode Input Voltage Range  
VCMR  
VCMR  
VSS0.2  
VSS0.3  
74  
90  
VDD+0.2  
VDD+0.3  
V
VDD = 1.8V (Note 1)  
VDD = 6.0V (Note 1)  
CM = -0.2V to 2.0V,  
VDD = 1.8V  
dB VCM = -0.3V to 6.3V,  
V
Common Mode Rejection Ratio  
CMRR  
dB  
V
74  
72  
74  
91  
87  
89  
VDD = 6.0V  
dB  
dB  
V
CM = 3.0V to 6.3V,  
VDD = 6.0V  
CM = -0.3V to 3.0V,  
VDD = 6.0V  
V
Note 1: Figure 2-13 shows how VCMR changed across temperature.  
© 2009 Microchip Technology Inc.  
DS22182A-page 3  
MCP6051/2/4  
TABLE 1-1:  
DC ELECTRICAL SPECIFICATIONS (CONTINUED)  
Electrical Characteristics: Unless otherwise indicated, VDD = +1.8V to +6.0V, VSS= GND, TA= +25°C, VCM = VDD/2,  
VOUT VDD/2, VL = VDD/2 and RL = 100 kΩ to VL. (Refer to Figure 1-1).  
Parameters  
Open-Loop Gain  
Sym  
Min  
Typ  
Max  
Units  
Conditions  
DC Open-Loop Gain  
(Large Signal)  
AOL  
95  
115  
dB 0.2V < VOUT <(VDD-0.2V)  
VCM = VSS  
Output  
Maximum Output Voltage Swing  
VOL, VOH  
VSS+15  
VDD–15  
mV G = +2 V/V,  
0.5V input overdrive  
Output Short-Circuit Current  
ISC  
±5  
mA VDD = 1.8V  
±26  
mA  
VDD = 6.0V  
Power Supply  
Supply Voltage  
VDD  
IQ  
1.8  
15  
6.0  
45  
V
Quiescent Current per Amplifier  
30  
µA IO = 0, VDD = 6.0V  
VCM = 0.9VDD  
Note 1: Figure 2-13 shows how VCMR changed across temperature.  
TABLE 1-2: AC ELECTRICAL SPECIFICATIONS  
Electrical Characteristics: Unless otherwise indicated, TA = +25°C, VDD = +1.8 to +6.0V, VSS = GND, VCM = VDD/2,  
VOUT VDD/2, VL = VDD/2, RL = 100 kΩ to VL and CL = 60 pF. (Refer to Figure 1-1).  
Parameters  
Sym  
Min  
Typ  
Max  
Units  
Conditions  
AC Response  
Gain Bandwidth Product  
Phase Margin  
GBWP  
PM  
385  
61  
kHz  
°
G = +1 V/V  
Slew Rate  
SR  
0.15  
V/µs  
Noise  
Input Noise Voltage  
Input Noise Voltage Density  
Input Noise Current Density  
Eni  
eni  
ini  
5.0  
34  
µVp-p f = 0.1 Hz to 10 Hz  
nV/Hz f = 10 kHz  
0.6  
fA/Hz f = 1 kHz  
TABLE 1-3:  
TEMPERATURE SPECIFICATIONS  
Electrical Characteristics: Unless otherwise indicated, VDD = +1.8V to +6.0V and VSS = GND.  
Parameters  
Temperature Ranges  
Sym  
Min  
Typ  
Max  
Units  
Conditions  
Operating Temperature Range  
Storage Temperature Range  
TA  
TA  
-40  
-65  
+125  
+150  
°C  
°C  
Note 1  
Thermal Package Resistances  
Thermal Resistance, 8L-2x3 TDFN  
Thermal Resistance, 8L-SOIC  
Thermal Resistance, 14L-SOIC  
Thermal Resistance, 14L-TSSOP  
θJA  
θJA  
θJA  
θJA  
41  
149.5  
95.3  
100  
°C/W  
°C/W  
°C/W  
°C/W  
Note 1: The internal junction temperature (TJ) must not exceed the absolute maximum specification of +150°C.  
DS22182A-page 4  
© 2009 Microchip Technology Inc.  
MCP6051/2/4  
1.3  
Test Circuits  
CF  
6.8 pF  
The circuit used for most DC and AC tests is shown in  
Figure 1-1. This circuit can independently set VCM and  
VOUT; see Equation 1-1. Note that VCM is not the  
circuit’s common mode voltage ((VP + VM)/2), and that  
VOST includes VOS plus the effects (on the input offset  
RG  
100 kΩ  
RF  
100 kΩ  
VDD/2  
VP  
error, VOST) of temperature, CMRR, PSRR and AOL  
.
VDD  
VIN+  
EQUATION 1-1:  
CB1  
100 nF  
CB2  
1 µF  
GDM = RF RG  
MCP605X  
VCM = (VP + VDD 2) 2  
VOST = VIN– VIN+  
VIN–  
VOUT = (VDD 2) + (VP VM) + VOST(1 + GDM  
)
VOUT  
VM  
RL  
10 kΩ  
CL  
60 pF  
RG  
100 kΩ  
RF  
100 kΩ  
Where:  
GDM = Differential Mode Gain  
(V/V)  
(V)  
VCM = Op Amp’s Common Mode  
CF  
6.8 pF  
Input Voltage  
VL  
VOST = Op Amp’s Total Input Offset  
(mV)  
Voltage  
FIGURE 1-1:  
AC and DC Test Circuit for  
Most Specifications.  
© 2009 Microchip Technology Inc.  
DS22182A-page 5  
MCP6051/2/4  
NOTES:  
DS22182A-page 6  
© 2009 Microchip Technology Inc.  
MCP6051/2/4  
2.0  
TYPICAL PERFORMANCE CURVES  
Note:  
The graphs and tables provided following this note are a statistical summary based on a limited number of  
samples and are provided for informational purposes only. The performance characteristics listed herein  
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified  
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.  
Note: Unless otherwise indicated, TA = +25°C, VDD = +1.8V to +6.0V, VSS = GND, VCM = VDD/2, VOUT VDD/2,  
VL = VDD/2, RL = 100 kΩ to VL and CL = 60 pF.  
14%  
12%  
10%  
8%  
750  
600  
450  
300  
150  
0
1244 Samples  
VDD = 3.0V  
VCM = VDD/3  
VDD = 6.0V  
Representative Part  
6%  
-150  
-300  
-450  
-600  
-750  
TA = -40°C  
TA = +25°C  
TA = +85°C  
TA = +125°C  
4%  
2%  
0%  
Input Offset Voltage (µV)  
Common Mode Input Voltage (V)  
FIGURE 2-1:  
Input Offset Voltage with  
FIGURE 2-4:  
Input Offset Voltage vs.  
V
= 3.0V.  
Common Mode Input Voltage with V = 6.0V.  
DD  
DD  
750  
27%  
1244 Samples  
600  
450  
300  
150  
0
VDD = 3.0V  
Representative Part  
24%  
21%  
18%  
15%  
12%  
9%  
VDD = 3.0V  
VCM = VDD/3  
TA = -40  
°C to +85°C  
-150  
-300  
-450  
-600  
-750  
TA = -40°C  
TA = +25°C  
TA = +85°C  
6%  
3%  
TA = +125°C  
0%  
Input Offset Drift with Temperature (µV/°C)  
Common Mode Input Voltage (V)  
FIGURE 2-2:  
Input Offset Voltage Drift  
FIGURE 2-5:  
Input Offset Voltage vs.  
with V = 3.0V and T +85°C.  
Common Mode Input Voltage with V = 3.0V.  
DD  
A
DD  
27%  
24%  
21%  
18%  
15%  
12%  
9%  
1244 Samples  
VDD = 3.0V  
VCM = VDD/3  
TA = +85°C to +125°C  
6%  
3%  
0%  
Input Offset Drift with Temperature (µV/°C)  
FIGURE 2-3:  
Input Offset Voltage Drift  
FIGURE 2-6:  
Input Offset Voltage vs.  
with V = 3.0V and T +85°C.  
Common Mode Input Voltage with V = 1.8V.  
DD  
A
DD  
© 2009 Microchip Technology Inc.  
DS22182A-page 7  
MCP6051/2/4  
Note: Unless otherwise indicated, TA = +25°C, VDD = +1.8V to +6.0V, VSS = GND, VCM = VDD/2, VOUT VDD/2,  
VL = VDD/2, RL = 100 kΩ to VL and CL = 60 pF.  
350  
50  
45  
40  
35  
Representative Part  
250  
150  
30  
25  
20  
15  
10  
5
50  
-50  
VDD = 6.0V  
VDD = 3.0V  
-150  
-250  
-350  
f = 10 kHz  
DD = 6.0V  
V
VDD = 1.8V  
0
Output Voltage (V)  
Common Mode Input Voltage (V)  
FIGURE 2-7:  
Input Offset Voltage vs.  
FIGURE 2-10:  
Input Noise Voltage Density  
Output Voltage.  
vs. Common Mode Input Voltage.  
750  
110  
TA = +125°C  
PSRR-  
Representative Part  
600  
450  
300  
150  
0
Representative Part  
100  
90  
80  
70  
60  
50  
40  
30  
20  
TA = +85°C  
TA = +25°C  
TA = -40°C  
CMRR  
PSRR+  
-150  
-300  
-450  
-600  
-750  
10  
100  
1k  
Frequency (Hz)  
10k  
100k  
1M  
Power Supply Voltage (V)  
FIGURE 2-8:  
Input Offset Voltage vs.  
FIGURE 2-11:  
CMRR, PSRR vs.  
Power Supply Voltage.  
Frequency.  
110  
105  
1,000  
CMRR (VDD = 6.0V, VCM = -0.3V to 6.3V)  
100  
95  
90  
85  
80  
75  
70  
65  
60  
100  
PSRR (VDD = 1.8V to 6.0V, VCM = VSS  
)
10  
0.1  
1
10  
100  
1k  
10k 100k  
-50  
-25  
0
25  
50  
75  
100  
125  
Frequency (Hz)  
Ambient Temperature (°C)  
FIGURE 2-9:  
Input Noise Voltage Density  
FIGURE 2-12:  
CMRR, PSRR vs. Ambient  
vs. Frequency.  
Temperature.  
DS22182A-page 8  
© 2009 Microchip Technology Inc.  
MCP6051/2/4  
Note: Unless otherwise indicated, TA = +25°C, VDD = +1.8V to +6.0V, VSS = GND, VCM = VDD/2, VOUT VDD/2,  
VL = VDD/2, RL = 100 kΩ to VL and CL = 60 pF.  
0.35  
0.30  
0.25  
0.20  
0.15  
0.10  
0.05  
0.00  
-0.05  
-0.10  
-0.15  
-0.20  
-0.25  
-0.30  
-0.35  
45  
40  
35  
30  
25  
20  
15  
10  
VDD = 6.0V  
VCM = 0.9VDD  
VDD - VOH @ VDD = 6.0V  
@ VDD = 3.0V  
@ VDD = 1.8V  
VOL - VSS @ VDD = 1.8V  
VOL - VSS @ VDD = 3.0V  
VOL - VSS @ VDD = 6.0V  
VDD = 1.8V  
CM = 0.9VDD  
V
-50  
-25  
0
25  
50  
75  
100 125  
-50  
-25  
0
25  
50  
75  
100 125  
Ambient Temperature (°C)  
Ambient Temperature (°C)  
FIGURE 2-13:  
Common Mode Input  
FIGURE 2-16:  
Quiescent Current vs  
Voltage Range Limit vs. Ambient Temperature.  
Ambient Temperature with V  
= 0.9V  
.
CM  
DD  
45  
10000  
VDD = 6.0V  
VCM = 0.9VDD  
VDD = 6.0V  
40  
V
CM = VDD  
35  
30  
25  
20  
15  
10  
5
1000  
100  
10  
Input Bias Current  
TA = +125°C  
TA = +85°C  
TA = +25°C  
TA = -40°C  
Input Offset Current  
0
1
25  
45  
65  
85  
105  
125  
Ambient Temperature (°C)  
Power Supply Voltage (V)  
FIGURE 2-14:  
Input Bias, Offset Currents  
FIGURE 2-17:  
Quiescent Current vs.  
vs. Ambient Temperature.  
Power Supply Voltage with V  
= 0.9V  
.
CM  
DD  
120  
0
10000  
VDD = 6.0V  
Open-Loop Gain  
100  
-30  
1000  
100  
10  
80  
-60  
TA = +125°C  
TA = +85°C  
Open-Loop Phase  
60  
40  
20  
0
-90  
-120  
-150  
-180  
-210  
VDD = 6.0V  
1
-20  
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0  
Common Mode Input Votlage (V)  
0.1  
1
10100 1k10k100k1M10M  
Frequency (Hz)  
FIGURE 2-15:  
Input Bias Current vs.  
FIGURE 2-18:  
Open-Loop Gain, Phase vs.  
Common Mode Input Voltage.  
Frequency.  
© 2009 Microchip Technology Inc.  
DS22182A-page 9  
MCP6051/2/4  
Note: Unless otherwise indicated, TA = +25°C, VDD = +1.8V to +6.0V, VSS = GND, VCM = VDD/2, VOUT VDD/2,  
VL = VDD/2, RL = 100 kΩ to VL and CL = 60 pF.  
150  
145  
140  
135  
130  
125  
120  
115  
110  
105  
100  
0.9  
0.8  
0.7  
0.6  
0.5  
0.4  
0.3  
0.2  
0.1  
0.0  
180  
160  
140  
120  
100  
80  
Gain Bandwidth Product  
60  
40  
VDD = 6.0V  
G = +1 V/V  
Phase Margin  
RL = 100 k  
VSS + 0.2V < VOUT < VDD - 0.2V  
20  
0
1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0  
Power Supply Voltage (V)  
Common Mode Input Voltage (V)  
FIGURE 2-19:  
DC Open-Loop Gain vs.  
FIGURE 2-22:  
Gain Bandwidth Product,  
Power Supply Voltage.  
Phase Margin vs. Common Mode Input Voltage.  
150  
145  
140  
135  
130  
125  
120  
0.9  
0.8  
0.7  
0.6  
0.5  
0.4  
0.3  
0.2  
0.1  
0.0  
180  
160  
140  
120  
100  
80  
VDD = 6.0V  
Gain Bandwidth Product  
VDD = 1.8V  
115  
60  
110  
105  
100  
Large Signal AOL  
0.20 0.25  
40  
Phase Margin  
VDD = 6.0V  
G = +1 V/V  
20  
0
0.00  
0.05  
0.10  
0.15  
-50 -25  
0
25  
50  
75 100 125  
Output Voltage Headroom  
VDD - VOH or VOL - VSS (V)  
Ambient Temperature (°C)  
FIGURE 2-20:  
DC Open-Loop Gain vs.  
FIGURE 2-23:  
Gain Bandwidth Product,  
Output Voltage Headroom.  
Phase Margin vs. Ambient Temperature.  
140  
130  
120  
110  
100  
0.9  
0.8  
0.7  
180  
160  
140  
120  
100  
80  
0.6  
0.5  
0.4  
0.3  
0.2  
0.1  
0.0  
Gain Bandwidth Product  
60  
40  
VDD = 1.8V  
G = +1 V/V  
Phase Margin  
90  
80  
Input Referred  
20  
0
100  
1k  
10k  
100k  
1M  
-50 -25  
0
25  
50  
75 100 125  
Frequency (Hz)  
Ambient Temperature (°C)  
FIGURE 2-21:  
Channel-to-Channel  
FIGURE 2-24:  
Gain Bandwidth Product,  
Separation vs. Frequency ( MCP6052/4 only).  
Phase Margin vs. Ambient Temperature.  
DS22182A-page 10  
© 2009 Microchip Technology Inc.  
MCP6051/2/4  
Note: Unless otherwise indicated, TA = +25°C, VDD = +1.8V to +6.0V, VSS = GND, VCM = VDD/2, VOUT VDD/2,  
VL = VDD/2, RL = 100 kΩ to VL and CL = 60 pF.  
40  
35  
30  
25  
20  
15  
10  
5
16.0  
14.0  
12.0  
10.0  
8.0  
TA = -40°C  
TA = +25°C  
VDD - VOH  
T
A = +85°C  
TA = +125°C  
6.0  
VSS - VOL  
4.0  
2.0  
0
0.0  
-50  
-25  
0
25  
50  
75  
100 125  
Power Supply Voltage (V)  
Ambient Temperature (°C)  
FIGURE 2-25:  
Ouput Short Circuit Current  
FIGURE 2-28:  
Output Voltage Headroom  
vs. Power Supply Voltage.  
vs. Ambient Temperature.  
10  
0.30  
VDD = 6.0V  
Falling Edge, VDD = 6.0V  
Falling Edge, VDD = 1.8V  
0.25  
0.20  
0.15  
0.10  
0.05  
0.00  
VDD = 1.8V  
1
Rising Edge, VDD = 6.0V  
Rising Edge, VDD = 1.8V  
0.1  
100  
1k  
10k  
100k  
1M  
-50  
-25  
0
25  
50  
75  
100 125  
Frequency (Hz)  
Ambient Temperature (°C)  
FIGURE 2-26:  
Output Voltage Swing vs.  
FIGURE 2-29:  
Slew Rate vs. Ambient  
Frequency.  
Temperature.  
70  
65  
60  
55  
50  
45  
40  
35  
30  
25  
20  
15  
10  
(VDD - VOH)/IOUT  
VDD = 1.8V  
(VOL - VSS)/(-IOUT  
)
(VDD - VOH)/IOUT  
VDD = 6.0V  
G = +1 V/V  
(VOL - VSS)/(-IOUT  
)
VDD = 6.0V  
0.1  
1
10  
Time (2 µs/div)  
Output Current (mA)  
FIGURE 2-27:  
Ratio of Output Voltage  
FIGURE 2-30:  
Small Signal Non-Inverting  
Headroom to Output Current vs. Output Current.  
Pulse Response.  
© 2009 Microchip Technology Inc.  
DS22182A-page 11  
MCP6051/2/4  
Note: Unless otherwise indicated, TA = +25°C, VDD = +1.8V to +6.0V, VSS = GND, VCM = VDD/2, VOUT VDD/2,  
VL = VDD/2, RL = 100 kΩ to VL and CL = 60 pF.  
7.0  
6.0  
VDD = 6.0V  
G = -1 V/V  
VOUT  
5.0  
VIN  
4.0  
3.0  
2.0  
1.0  
VDD = 6.0V  
G = +2 V/V  
0.0  
-1.0  
Time (2 µs/div)  
Time (0.1 ms/div)  
FIGURE 2-31:  
Small Signal Inverting Pulse  
FIGURE 2-34:  
The MCP6051/2/4 Shows  
Response.  
No Phase Reversal.  
6.0  
5.5  
5.0  
4.5  
4.0  
3.5  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0.0  
10000  
1000  
100  
10  
GN:  
101 V/V  
11 V/V  
1 V/V  
VDD = 6.0V  
G = +1 V/V  
1
10  
100  
1k  
10k  
100k  
1M  
Frequency (Hz)  
Time (0.02 ms/div)  
FIGURE 2-32:  
Large Signal Non-Inverting  
FIGURE 2-35:  
Closed Loop Output  
Pulse Response.  
Impedance vs. Frequency.  
5.5  
5.0  
4.5  
4.0  
3.5  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0.0  
-0.5  
1m  
100  
µ
VDD = 6.0V  
G = -1 V/V  
10µ  
1µ  
100n  
10n  
TA = -40°C  
TA = +25°C  
TA = +85°C  
TA = +125°C  
1n  
100p  
10p  
1p  
-1.0 -0.9 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0.0  
IN (V)  
V
Time (0.02 ms/div)  
FIGURE 2-33:  
Large Signal Inverting Pulse  
FIGURE 2-36:  
Measured Input Current vs.  
Response.  
Input Voltage (below V ).  
SS  
DS22182A-page 12  
© 2009 Microchip Technology Inc.  
MCP6051/2/4  
3.0  
PIN DESCRIPTIONS  
Descriptions of the pins are listed in Table 3-1.  
TABLE 3-1:  
MCP6051  
PIN FUNCTION TABLE  
MCP6052  
MCP6054  
Symbol  
Description  
SOIC,  
TSSOP  
SOIC  
2x3 TDFN  
SOIC  
2x3 TDFN  
6
2
6
2
1
2
3
8
5
6
1
2
3
8
5
6
1
2
3
4
5
6
VOUT, VOUTA  
Analog Output (op amp A)  
Inverting Input (op amp A)  
Non-inverting Input (op amp A)  
Positive Power Supply  
VIN–, VINA  
VIN+, VINA  
VDD  
3
3
+
7
7
VINB  
+
Non-inverting Input (op amp B)  
Inverting Input (op amp B)  
VINB  
7
7
7
VOUTB  
VOUTC  
Analog Output (op amp B)  
Analog Output (op amp C)  
Inverting Input (op amp C)  
Non-inverting Input (op amp C)  
Negative Power Supply  
4
4
8
9
VINC  
VINC  
10  
11  
12  
13  
14  
+
4
4
VSS  
9
VIND+  
Non-inverting Input (op amp D)  
Inverting Input (op amp D)  
Analog Output (op amp D)  
No Internal Connection  
VIND–  
VOUTD  
NC  
1, 5, 8  
1, 5, 8  
9
Exposed Thermal Pad (EP); must be  
EP  
connected to VSS  
.
3.1  
Analog Outputs  
3.3  
Power Supply Pins  
The output pins are low-impedance voltage sources.  
The positive power supply (VDD) is 1.8V to 6.0V higher  
than the negative power supply (VSS). For normal  
operation, the other pins are at voltages between VSS  
3.2  
Analog Inputs  
and VDD  
.
The non-inverting and inverting inputs are high-  
impedance CMOS inputs with low bias currents.  
Typically, these parts are used in a single (positive)  
supply configuration. In this case, VSS is connected to  
ground and VDD is connected to the supply. VDD will  
need bypass capacitors.  
3.4  
Exposed Thermal Pad (EP)  
There is an internal electrical connection between the  
Exposed Thermal Pad (EP) and the VSS pin; they must  
be connected to the same potential on the Printed  
Circuit Board (PCB).  
© 2009 Microchip Technology Inc.  
DS22182A-page 13  
MCP6051/2/4  
NOTES:  
DS22182A-page 14  
© 2009 Microchip Technology Inc.  
MCP6051/2/4  
4.0  
APPLICATION INFORMATION  
VDD  
The MCP6051/2/4 family of op amps is manufactured  
using Microchip’s state-of-the-art CMOS process and  
is specifically designed for low-power, high precision  
applications.  
D1 D2  
V1  
V2  
R1  
R2  
MCP605X  
4.1  
Rail-to-Rail Input  
4.1.1  
PHASE REVERSAL  
The MCP6051/2/4 op amps are designed to prevent  
phase reversal when the input pins exceed the supply  
voltages. Figure 2-34 shows the input voltage  
exceeding the supply voltage without any phase  
reversal.  
R3  
VSS – (minimum expected V1)  
R1 >  
R2 >  
2 mA  
VSS – (minimum expected V2)  
2 mA  
4.1.2  
INPUT VOLTAGE AND CURRENT  
LIMITS  
FIGURE 4-2:  
Protecting the Analog  
The ESD protection on the inputs can be depicted as  
shown in Figure 4-1. This structure was chosen to  
protect the input transistors and to minimize input bias  
current (IB). The input ESD diodes clamp the inputs  
when they try to go more than one diode drop below  
VSS. They also clamp any voltage that go too far above  
VDD; their breakdown voltage is high enough to allow  
normal operation and low enough to bypass ESD  
events within the specified limits.  
Inputs.  
It is also possible to connect the diodes to the left of the  
resistors R1 and R2. In this case, the currents through  
the diodes D1 and D2 need to be limited by some other  
mechanism. The resistors then serve as in-rush current  
limiters; the DC currents into the input pins (VIN+ and  
VIN-) should be very small. A significant amount of  
current can flow out of the inputs when the common  
mode voltage (VCM) is below ground (VSS). (See  
Figure 2-36).  
Bond  
VDD  
4.1.3  
NORMAL OPERATION  
Pad  
The input stage of the MCP6051/2/4 op amps uses two  
differential input stages in parallel. One operates at a  
low common mode input voltage (VCM), while the other  
operates at a high VCM. With this topology, the device  
operates with a VCM up to 300 mV above VDD and  
300 mV below VSS. (See Figure 2-13) .The input offset  
voltage is measured at VCM = VSS – 0.3V and  
VDD + 0.3V to ensure proper operation.  
Bond  
Pad  
Bond  
Pad  
Input  
Stage  
VIN+  
VIN–  
Bond  
Pad  
VSS  
The transition between the input stages occurs when  
VCM is near VDD – 1.1V (See Figures 2-4, 2-5 and  
Figure 2-6). For the best distortion performance and  
gain linearity, with non-inverting gains, avoid this region  
of operation.  
FIGURE 4-1:  
Structures.  
Simplified Analog Input ESD  
In order to prevent damage and/or improper operation  
of these op amps, the circuit they are in must limit the  
voltages and currents at the VIN+ and VIN- pins (see  
Absolute Maximum Ratings at the beginning of  
Section 1.0 “Electrical Characteristics”). Figure 4-2  
shows the recommended approach to protecting these  
inputs. The internal ESD diodes prevent the input pins  
(VIN+ and VIN-) from going too far below ground, and  
the resistors R1 and R2 limit the possible current drawn  
out of the input pins. Diodes D1 and D2 prevent the  
input pins (VIN+ and VIN-) from going too far above  
VDD. When implemented as shown, resistors R1 and  
R2 also limit the current through D1 and D2.  
4.2  
Rail-to-Rail Output  
The output voltage range of the MCP6051/2/4 op amps  
is VSS + 15 mV (minimum) and VDD – 15 mV  
(maximum) when RL = 10 kΩ is connected to VDD/2  
and VDD = 6.0V. Refer to Figures 2-27 and 2-28 for  
more information.  
© 2009 Microchip Technology Inc.  
DS22182A-page 15  
MCP6051/2/4  
After selecting RISO for your circuit, double-check the  
resulting frequency response peaking and step  
response overshoot. Modify RISO’s value until the  
response is reasonable. Bench evaluation and  
simulations with the MCP6051/2/4 SPICE macro  
model are very helpful.  
4.3  
Capacitive Loads  
Driving large capacitive loads can cause stability  
problems for voltage feedback op amps. As the load  
capacitance increases, the feedback loop’s phase  
margin decreases and the closed-loop bandwidth is  
reduced. This produces gain peaking in the frequency  
response, with overshoot and ringing in the step  
response. While a unity-gain buffer (G = +1) is the most  
sensitive to capacitive loads, all gains show the same  
general behavior.  
4.4  
Supply Bypass  
With this family of operational amplifiers, the power  
supply pin (VDD for single-supply) should have a local  
bypass capacitor (i.e., 0.01 µF to 0.1 µF) within 2 mm  
for good high frequency performance. It can use a bulk  
capacitor (i.e., 1 µF or larger) within 100 mm to provide  
large, slow currents. This bulk capacitor can be shared  
with other analog parts.  
When driving large capacitive loads with these op  
amps (e.g., > 100 pF when G = +1), a small series  
resistor at the output (RISO in Figure 4-3) improves the  
feedback loop’s phase margin (stability) by making the  
output load resistive at higher frequencies. The  
bandwidth will be generally lower than the bandwidth  
with no capacitance load.  
4.5  
Unused Op Amps  
An unused op amp in a quad package (MCP6054)  
should be configured as shown in Figure 4-5. These  
circuits prevent the output from toggling and causing  
crosstalk. Circuits A sets the op amp at its minimum  
noise gain. The resistor divider produces any desired  
reference voltage within the output voltage range of the  
op amp; the op amp buffers that reference voltage.  
Circuit B uses the minimum number of components  
and operates as a comparator, but it may draw more  
current.  
RISO  
VOUT  
MCP605X  
VIN  
+
CL  
FIGURE 4-3:  
Output Resistor, R  
ISO  
Stabilizes Large Capacitive Loads.  
Figure 4-4 gives recommended RISO values for  
different capacitive loads and gains. The x-axis is the  
normalized load capacitance (CL/GN), where GN is the  
circuit's noise gain. For non-inverting gains, GN and the  
Signal Gain are equal. For inverting gains, GN is  
1+|Signal Gain| (e.g., -1 V/V gives GN = +2 V/V).  
¼ MCP6054 (A)  
VDD  
¼ MCP6054 (B)  
VDD  
VDD  
R1  
R2  
VREF  
10000  
VDD = 6.0 V  
RL = 100 kΩ  
R
1000  
2
--------------------  
×
V
= V  
REF  
DD  
R
+ R  
1
2
GN:  
1 V/V  
100  
2 V/V  
FIGURE 4-5:  
Unused Op Amps.  
5 V/V  
10  
1
10p  
100p  
1n  
10n  
0.1µ  
1µ  
Normalized Load Capacitance; CL/GN (F)  
FIGURE 4-4:  
Recommended R  
Values  
ISO  
for Capacitive Loads.  
DS22182A-page 16  
© 2009 Microchip Technology Inc.  
MCP6051/2/4  
4.6  
PCB Surface Leakage  
4.7  
Application Circuits  
In applications where low input bias current is critical,  
Printed Circuit Board (PCB) surface leakage effects  
need to be considered. Surface leakage is caused by  
humidity, dust or other contamination on the board.  
Under low humidity conditions, a typical resistance  
between nearby traces is 1012Ω. A 5V difference would  
cause 5 pA of current to flow; which is greater than the  
MCP6051/2/4 family’s bias current at +25°C (±1.0 pA,  
typical).  
4.7.1  
GYRATOR  
The MCP6051/2/4 op amps can be used in gyrator  
applicaitons. The gyrator is an electric circuit which can  
make a capacitive circuit behave inductively. Figure 4-  
7
shows an example of a gyrator simulating  
inductance, with an approximately equivalent circuit  
below. The two ZIN have similar values in typical  
applications. The primary application for a gyrator is to  
reduce the size and cost of a system by removing the  
need for bulky, heavy and expensive inductors. For  
example, RLC bandpass filter characteristics can be  
realized with capacitors, resistors and operational  
amplifiers without using inductors. Moreover, gyrators  
will typically have higher accuracy than real inductors,  
due to the lower cost of precision capacitors than  
inductors.  
The easiest way to reduce surface leakage is to use a  
guard ring around sensitive pins (or traces). The guard  
ring is biased at the same voltage as the sensitive pin.  
An example of this type of layout is shown in  
Figure 4-6.  
Guard Ring  
VIN– VIN+  
VSS  
.
RL  
VOUT  
ZIN  
MCP6051  
C
Gyrator  
FIGURE 4-6:  
for Inverting Gain.  
Example Guard Ring Layout  
R
ZIN = RL + jωL  
1. Non-inverting Gain and Unity-Gain Buffer:  
L = RLRC  
a) Connect the non-inverting pin (VIN+) to the  
input with a wire that does not touch the  
PCB surface.  
RL  
ZIN  
b) Connect the guard ring to the inverting input  
pin (VIN–). This biases the guard ring to the  
common mode input voltage.  
Equivalent Circuit  
L
2. Inverting Gain and Transimpedance Gain  
Amplifiers (convert current to voltage, such as  
photo detectors):  
FIGURE 4-7:  
Gyrator.  
a) Connect the guard ring to the non-inverting  
input pin (VIN+). This biases the guard ring  
to the same reference voltage as the op  
amp (e.g., VDD/2 or ground).  
b) Connect the inverting pin (VIN–) to the input  
with a wire that does not touch the PCB  
surface.  
© 2009 Microchip Technology Inc.  
DS22182A-page 17  
MCP6051/2/4  
4.7.2  
INSTRUMENTATION AMPLIFIER  
4.7.3  
PRECISION COMPARATOR  
The MCP6051/2/4 op amps are well suited for condi-  
tioning sensor signals in battery-powered applications.  
Figure 4-8 shows a two op amp instrumentation  
amplifier, using the MCP6052, that works well for  
applications requiring rejection of common mode noise  
at higher gains. The reference voltage (VREF) is  
supplied by a low impedance source. In single supply  
applications, VREF is typically VDD/2.  
Use high gain before a comparator to improve the  
latter’s input offset performance. Figure 4-9 shows a  
gain of 11 V/V placed before a comparator. The  
reference voltage VREF can be any value between the  
supply rails.  
VIN  
MCP6051  
RG  
R1  
R2  
R2  
R1  
VREF  
VOUT  
1 MΩ  
VOUT  
MCP6541  
100 kΩ  
VREF  
V2  
V1  
½
½
MCP6052  
MCP6052  
FIGURE 4-9:  
Comparator.  
Precision, Non-inverting  
R1 2R1  
VOUT = (V1 V2) 1 + ----- + --------- + VREF  
R2 RG  
FIGURE 4-8:  
Two Op Amp  
Instrumentation Amplifier.  
To obtain the best CMRR possible, and not limit the  
performance by the resistor tolerances, set a high gain  
with the RG resistor.  
DS22182A-page 18  
© 2009 Microchip Technology Inc.  
MCP6051/2/4  
5.5  
Analog Demonstration and  
Evaluation Boards  
5.0  
DESIGN AIDS  
Microchip provides the basic design tools needed for  
the MCP6051/2/4 family of op amps.  
Microchip offers  
a
broad spectrum of Analog  
Demonstration and Evaluation Boards that are  
designed to help you achieve faster time to market. For  
5.1  
SPICE Macro Model  
a
complete listing of these boards and their  
The latest SPICE macro model for the MCP6051/2/4  
op amps is available on the Microchip web site at  
www.microchip.com. This model is intended to be an  
initial design tool that works well in the op amp’s linear  
region of operation over the temperature range. See  
the model file for information on its capabilities.  
corresponding user’s guides and technical information,  
visit the Microchip web site at www.microchip.com/  
analogtools.  
Some boards that are especially useful are:  
• MCP6XXX Amplifier Evaluation Board 1  
• MCP6XXX Amplifier Evaluation Board 2  
• MCP6XXX Amplifier Evaluation Board 3  
• MCP6XXX Amplifier Evaluation Board 4  
• Active Filter Demo Board Kit  
Bench testing is a very important part of any design and  
cannot be replaced with simulations. Also, simulation  
results using this macro model need to be validated by  
comparing them to the data sheet specifications and  
characteristic curves.  
• 5/6-Pin SOT-23 Evaluation Board, P/N VSUPEV2  
• 8-Pin SOIC/MSOP/TSSOP/DIP Evaluation Board,  
P/N SOIC8EV  
5.2  
FilterLab® Software  
Microchip’s FilterLab® software is an innovative  
software tool that simplifies analog active filter (using  
op amps) design. Available at no cost from the  
Microchip web site at www.microchip.com/filterlab, the  
FilterLab design tool provides full schematic diagrams  
of the filter circuit with component values. It also  
outputs the filter circuit in SPICE format, which can be  
used with the macro model to simulate actual filter  
performance.  
• 14-Pin SOIC/TSSOP/DIP Evaluation Board,  
P/N SOIC14EV  
5.6  
Application Notes  
The following Microchip Analog Design Note and  
Application Notes are available on the Microchip web  
site at www.microchip.com/appnotes and are  
recommended as supplemental reference resources:  
ADN003: “Select the Right Operational Amplifier  
for your Filtering Circuits”, DS21821  
5.3  
Mindi™ Circuit Designer &  
Simulator  
AN722: “Operational Amplifier Topologies and DC  
Specifications”, DS00722  
Microchip’s Mindi™ Circuit Designer & Simulator aids  
in the design of various circuits useful for active filter,  
amplifier and power-management applications. It is a  
free online circuit designer & simulator available from  
the Microchip web site at www.microchip.com/mindi.  
This interactive circuit designer & simulator enables  
designers to quickly generate circuit diagrams,  
simulate circuits. Circuits developed using the Mindi  
Circuit Designer & Simulator can be downloaded to a  
personal computer or workstation.  
AN723: “Operational Amplifier AC Specifications  
and Applications”, DS00723  
AN884: “Driving Capacitive Loads With Op  
Amps”, DS00884  
AN990: “Analog Sensor Conditioning Circuits –  
An Overview”, DS00990  
AN1177: “Op Amp Precision Design: DC Errors”,  
DS01177  
AN1228: “Op Amp Precision Design: Random  
Noise”, DS01228  
5.4  
Microchip Advanced Part Selector  
(MAPS)  
These application notes and others are listed in the  
design guide:  
MAPS is a software tool that helps semiconductor  
professionals efficiently identify Microchip devices that  
fit a particular design requirement. Available at no cost  
from the Microchip website at www.microchip.com/  
maps, the MAPS is an overall selection tool for  
Microchip’s product portfolio that includes Analog,  
Memory, MCUs and DSCs. Using this tool you can  
define a filter to sort features for a parametric search of  
devices and export side-by-side technical comparasion  
reports. Helpful links are also provided for Datasheets,  
Purchase, and Sampling of Microchip parts.  
“Signal Chain Design Guide”, DS21825  
© 2009 Microchip Technology Inc.  
DS22182A-page 19  
MCP6051/2/4  
NOTES:  
DS22182A-page 20  
© 2009 Microchip Technology Inc.  
MCP6051/2/4  
6.0  
6.1  
PACKAGING INFORMATION  
Package Marking Information  
8-Lead SOIC (150 mil) (MCP6051, MCP6052)  
Example:  
XXXXXXXX  
MCP6051E  
e
3
XXXXYYWW  
SN^0919  
NNN  
256  
8-Lead 2x3 TDFN (MCP6051, MCP6052)  
Example:  
XXX  
YWW  
NN  
AHA  
919  
25  
14-Lead SOIC (150 mil) (MCP6054)  
Example:  
XXXXXXXXXXX  
XXXXXXXXXXX  
MCP6054  
E/SL^^  
0919256  
e
3
YYWWNNN  
Example:  
14-Lead TSSOP (MCP6054)  
XXXXXXXX  
YYWW  
MCP6054E  
0919  
256  
NNN  
Legend: XX...X Customer-specific information  
Y
Year code (last digit of calendar year)  
YY  
WW  
NNN  
Year code (last 2 digits of calendar year)  
Week code (week of January 1 is week ‘01’)  
Alphanumeric traceability code  
e
3
Pb-free JEDEC designator for Matte Tin (Sn)  
*
This package is Pb-free. The Pb-free JEDEC designator (  
can be found on the outer packaging for this package.  
)
e3  
Note: In the event the full Microchip part number cannot be marked on one line, it will  
be carried over to the next line, thus limiting the number of available  
characters for customer-specific information.  
© 2009 Microchip Technology Inc.  
DS22182A-page 21  
MCP6051/2/4  
ꢀꢁꢂꢃꢄꢅꢆꢇꢈꢄꢉꢊꢋꢌꢆꢍꢎꢄꢈꢈꢆꢏꢐꢊꢈꢋꢑꢃꢆꢒꢍꢓꢔꢆMꢆꢓꢄꢕꢕꢖꢗꢘꢆꢙꢚꢛꢜꢆꢎꢎꢆ ꢖꢅ!ꢆ"ꢍꢏ#$%  
ꢓꢖꢊꢃ& 2ꢌꢊꢅ%ꢎꢉꢅ&ꢌ %ꢅꢍ!ꢊꢊꢉꢄ%ꢅꢔꢇꢍ3ꢇꢒꢉꢅ"ꢊꢇ)ꢃꢄꢒ 'ꢅꢔꢈꢉꢇ ꢉꢅ ꢉꢉꢅ%ꢎꢉꢅꢕꢃꢍꢊꢌꢍꢎꢃꢔꢅꢂꢇꢍ3ꢇꢒꢃꢄꢒꢅꢑꢔꢉꢍꢃ$ꢃꢍꢇ%ꢃꢌꢄꢅꢈꢌꢍꢇ%ꢉ"ꢅꢇ%ꢅ  
ꢎ%%ꢔ144)))ꢁ&ꢃꢍꢊꢌꢍꢎꢃꢔꢁꢍꢌ&4ꢔꢇꢍ3ꢇꢒꢃꢄꢒ  
D
e
N
E
E1  
NOTE 1  
1
2
3
α
h
b
h
c
φ
A2  
A
L
A1  
L1  
β
5ꢄꢃ%  
ꢕꢛ66ꢛꢕ-ꢙ-ꢚꢑ  
ꢓꢃ&ꢉꢄ ꢃꢌꢄꢅ6ꢃ&ꢃ%  
ꢕꢛ7  
78ꢕ  
ꢕꢘ9  
7!&(ꢉꢊꢅꢌ$ꢅꢂꢃꢄ  
ꢂꢃ%ꢍꢎ  
7
:
ꢀꢁꢏꢜꢅ0ꢑ+  
8ꢆꢉꢊꢇꢈꢈꢅ;ꢉꢃꢒꢎ%  
M
ꢀꢁꢏ.  
ꢖꢁꢀꢖ  
M
M
M
ꢀꢁꢜ.  
M
ꢖꢁꢏ.  
ꢕꢌꢈ"ꢉ"ꢅꢂꢇꢍ3ꢇꢒꢉꢅꢙꢎꢃꢍ3ꢄꢉ    
ꢑ%ꢇꢄ"ꢌ$$ꢅꢅ  
ꢘꢏ  
ꢘꢀ  
-
8ꢆꢉꢊꢇꢈꢈꢅ=ꢃ"%ꢎ  
>ꢁꢖꢖꢅ0ꢑ+  
ꢕꢌꢈ"ꢉ"ꢅꢂꢇꢍ3ꢇꢒꢉꢅ=ꢃ"%ꢎ  
8ꢆꢉꢊꢇꢈꢈꢅ6ꢉꢄꢒ%ꢎ  
+ꢎꢇ&$ꢉꢊꢅ?ꢌꢔ%ꢃꢌꢄꢇꢈ@  
2ꢌꢌ%ꢅ6ꢉꢄꢒ%ꢎ  
-ꢀ  
,ꢁꢝꢖꢅ0ꢑ+  
ꢗꢁꢝꢖꢅ0ꢑ+  
ꢖꢁꢏ.  
ꢖꢁꢗꢖ  
M
M
ꢖꢁ.ꢖ  
ꢀꢁꢏꢜ  
6
2ꢌꢌ%ꢔꢊꢃꢄ%  
2ꢌꢌ%ꢅꢘꢄꢒꢈꢉ  
6ꢉꢇ"ꢅꢙꢎꢃꢍ3ꢄꢉ    
6ꢉꢇ"ꢅ=ꢃ"%ꢎ  
ꢕꢌꢈ"ꢅꢓꢊꢇ$%ꢅꢘꢄꢒꢈꢉꢅ  
ꢕꢌꢈ"ꢅꢓꢊꢇ$%ꢅꢘꢄꢒꢈꢉꢅ0ꢌ%%ꢌ&  
6ꢀ  
ꢀꢁꢖꢗꢅꢚ-2  
ꢖꢞ  
ꢖꢁꢀꢜ  
ꢖꢁ,ꢀ  
.ꢞ  
M
M
M
M
M
:ꢞ  
(
ꢖꢁꢏ.  
ꢖꢁ.ꢀ  
ꢀ.ꢞ  
.ꢞ  
ꢀ.ꢞ  
ꢓꢖꢊꢃꢉ&  
ꢀꢁ ꢂꢃꢄꢅꢀꢅꢆꢃ !ꢇꢈꢅꢃꢄ"ꢉ#ꢅ$ꢉꢇ%!ꢊꢉꢅ&ꢇꢋꢅꢆꢇꢊꢋ'ꢅ(!%ꢅ&! %ꢅ(ꢉꢅꢈꢌꢍꢇ%ꢉ"ꢅ)ꢃ%ꢎꢃꢄꢅ%ꢎꢉꢅꢎꢇ%ꢍꢎꢉ"ꢅꢇꢊꢉꢇꢁ  
ꢏꢁ ꢐꢅꢑꢃꢒꢄꢃ$ꢃꢍꢇꢄ%ꢅ+ꢎꢇꢊꢇꢍ%ꢉꢊꢃ %ꢃꢍꢁ  
,ꢁ ꢓꢃ&ꢉꢄ ꢃꢌꢄ ꢅꢓꢅꢇꢄ"ꢅ-ꢀꢅ"ꢌꢅꢄꢌ%ꢅꢃꢄꢍꢈ!"ꢉꢅ&ꢌꢈ"ꢅ$ꢈꢇ ꢎꢅꢌꢊꢅꢔꢊꢌ%ꢊ! ꢃꢌꢄ ꢁꢅꢕꢌꢈ"ꢅ$ꢈꢇ ꢎꢅꢌꢊꢅꢔꢊꢌ%ꢊ! ꢃꢌꢄ ꢅ ꢎꢇꢈꢈꢅꢄꢌ%ꢅꢉ#ꢍꢉꢉ"ꢅꢖꢁꢀ.ꢅ&&ꢅꢔꢉꢊꢅ ꢃ"ꢉꢁ  
ꢗꢁ ꢓꢃ&ꢉꢄ ꢃꢌꢄꢃꢄꢒꢅꢇꢄ"ꢅ%ꢌꢈꢉꢊꢇꢄꢍꢃꢄꢒꢅꢔꢉꢊꢅꢘꢑꢕ-ꢅ/ꢀꢗꢁ.ꢕꢁ  
0ꢑ+1 0ꢇ ꢃꢍꢅꢓꢃ&ꢉꢄ ꢃꢌꢄꢁꢅꢙꢎꢉꢌꢊꢉ%ꢃꢍꢇꢈꢈꢋꢅꢉ#ꢇꢍ%ꢅꢆꢇꢈ!ꢉꢅ ꢎꢌ)ꢄꢅ)ꢃ%ꢎꢌ!%ꢅ%ꢌꢈꢉꢊꢇꢄꢍꢉ ꢁ  
ꢚ-21 ꢚꢉ$ꢉꢊꢉꢄꢍꢉꢅꢓꢃ&ꢉꢄ ꢃꢌꢄ'ꢅ! !ꢇꢈꢈꢋꢅ)ꢃ%ꢎꢌ!%ꢅ%ꢌꢈꢉꢊꢇꢄꢍꢉ'ꢅ$ꢌꢊꢅꢃꢄ$ꢌꢊ&ꢇ%ꢃꢌꢄꢅꢔ!ꢊꢔꢌ ꢉ ꢅꢌꢄꢈꢋꢁ  
ꢕꢃꢍꢊꢌꢍꢎꢃꢔ ꢍꢎꢄꢌꢈꢌꢒꢋ ꢓꢊꢇ)ꢃꢄꢒ +ꢖꢗꢟꢖ.ꢜ0  
DS22182A-page 22  
© 2009 Microchip Technology Inc.  
MCP6051/2/4  
ꢀꢁꢂꢃꢄꢅꢆꢇꢈꢄꢉꢊꢋꢌꢆꢍꢎꢄꢈꢈꢆꢏꢐꢊꢈꢋꢑꢃꢆꢒꢍꢓꢔꢆMꢆꢓꢄꢕꢕꢖꢗꢘꢆꢙꢚꢛꢜꢆꢎꢎꢆ ꢖꢅ!ꢆ"ꢍꢏ#$%  
ꢓꢖꢊꢃ& 2ꢌꢊꢅ%ꢎꢉꢅ&ꢌ %ꢅꢍ!ꢊꢊꢉꢄ%ꢅꢔꢇꢍ3ꢇꢒꢉꢅ"ꢊꢇ)ꢃꢄꢒ 'ꢅꢔꢈꢉꢇ ꢉꢅ ꢉꢉꢅ%ꢎꢉꢅꢕꢃꢍꢊꢌꢍꢎꢃꢔꢅꢂꢇꢍ3ꢇꢒꢃꢄꢒꢅꢑꢔꢉꢍꢃ$ꢃꢍꢇ%ꢃꢌꢄꢅꢈꢌꢍꢇ%ꢉ"ꢅꢇ%ꢅ  
ꢎ%%ꢔ144)))ꢁ&ꢃꢍꢊꢌꢍꢎꢃꢔꢁꢍꢌ&4ꢔꢇꢍ3ꢇꢒꢃꢄꢒ  
© 2009 Microchip Technology Inc.  
DS22182A-page 23  
MCP6051/2/4  
ꢀꢁꢂꢃꢄꢅꢆꢇꢈꢄꢉꢊꢋꢌꢆ'ꢐꢄꢈꢆ(ꢈꢄꢊꢘꢆꢓꢖꢆꢂꢃꢄꢅꢆꢇꢄꢌ)ꢄ*ꢃꢆꢒ+ꢓꢔꢆMꢆ,-ꢙ-ꢜꢚ./ꢆꢎꢎꢆ ꢖꢅ!ꢆ"0'(ꢓ%  
ꢓꢖꢊꢃ& 2ꢌꢊꢅ%ꢎꢉꢅ&ꢌ %ꢅꢍ!ꢊꢊꢉꢄ%ꢅꢔꢇꢍ3ꢇꢒꢉꢅ"ꢊꢇ)ꢃꢄꢒ 'ꢅꢔꢈꢉꢇ ꢉꢅ ꢉꢉꢅ%ꢎꢉꢅꢕꢃꢍꢊꢌꢍꢎꢃꢔꢅꢂꢇꢍ3ꢇꢒꢃꢄꢒꢅꢑꢔꢉꢍꢃ$ꢃꢍꢇ%ꢃꢌꢄꢅꢈꢌꢍꢇ%ꢉ"ꢅꢇ%ꢅ  
ꢎ%%ꢔ144)))ꢁ&ꢃꢍꢊꢌꢍꢎꢃꢔꢁꢍꢌ&4ꢔꢇꢍ3ꢇꢒꢃꢄꢒ  
DS22182A-page 24  
© 2009 Microchip Technology Inc.  
MCP6051/2/4  
ꢀꢁꢂꢃꢄꢅꢆꢇꢈꢄꢉꢊꢋꢌꢆ'ꢐꢄꢈꢆ(ꢈꢄꢊꢘꢆꢓꢖꢆꢂꢃꢄꢅꢆꢇꢄꢌ)ꢄ*ꢃꢆꢒ+ꢓꢔꢆMꢆ,-ꢙ-ꢜꢚ./ꢆꢎꢎꢆ ꢖꢅ!ꢆ"0'(ꢓ%  
ꢓꢖꢊꢃ& 2ꢌꢊꢅ%ꢎꢉꢅ&ꢌ %ꢅꢍ!ꢊꢊꢉꢄ%ꢅꢔꢇꢍ3ꢇꢒꢉꢅ"ꢊꢇ)ꢃꢄꢒ 'ꢅꢔꢈꢉꢇ ꢉꢅ ꢉꢉꢅ%ꢎꢉꢅꢕꢃꢍꢊꢌꢍꢎꢃꢔꢅꢂꢇꢍ3ꢇꢒꢃꢄꢒꢅꢑꢔꢉꢍꢃ$ꢃꢍꢇ%ꢃꢌꢄꢅꢈꢌꢍꢇ%ꢉ"ꢅꢇ%ꢅ  
ꢎ%%ꢔ144)))ꢁ&ꢃꢍꢊꢌꢍꢎꢃꢔꢁꢍꢌ&4ꢔꢇꢍ3ꢇꢒꢃꢄꢒ  
© 2009 Microchip Technology Inc.  
DS22182A-page 25  
MCP6051/2/4  
12ꢁꢂꢃꢄꢅꢆꢇꢈꢄꢉꢊꢋꢌꢆꢍꢎꢄꢈꢈꢆꢏꢐꢊꢈꢋꢑꢃꢆꢒꢍꢂꢔꢆMꢆꢓꢄꢕꢕꢖꢗꢘꢆꢙꢚꢛꢜꢆꢎꢎꢆ ꢖꢅ!ꢆ"ꢍꢏ#$%  
ꢓꢖꢊꢃ& 2ꢌꢊꢅ%ꢎꢉꢅ&ꢌ %ꢅꢍ!ꢊꢊꢉꢄ%ꢅꢔꢇꢍ3ꢇꢒꢉꢅ"ꢊꢇ)ꢃꢄꢒ 'ꢅꢔꢈꢉꢇ ꢉꢅ ꢉꢉꢅ%ꢎꢉꢅꢕꢃꢍꢊꢌꢍꢎꢃꢔꢅꢂꢇꢍ3ꢇꢒꢃꢄꢒꢅꢑꢔꢉꢍꢃ$ꢃꢍꢇ%ꢃꢌꢄꢅꢈꢌꢍꢇ%ꢉ"ꢅꢇ%ꢅ  
ꢎ%%ꢔ144)))ꢁ&ꢃꢍꢊꢌꢍꢎꢃꢔꢁꢍꢌ&4ꢔꢇꢍ3ꢇꢒꢃꢄꢒ  
D
N
E
E1  
NOTE 1  
1
2
3
e
h
b
α
h
c
φ
A2  
A
L
A1  
β
L1  
5ꢄꢃ%  
ꢕꢛ66ꢛꢕ-ꢙ-ꢚꢑ  
ꢓꢃ&ꢉꢄ ꢃꢌꢄꢅ6ꢃ&ꢃ%  
ꢕꢛ7  
78ꢕ  
ꢕꢘ9  
7!&(ꢉꢊꢅꢌ$ꢅꢂꢃꢄ  
ꢂꢃ%ꢍꢎ  
7
ꢀꢗ  
ꢀꢁꢏꢜꢅ0ꢑ+  
8ꢆꢉꢊꢇꢈꢈꢅ;ꢉꢃꢒꢎ%  
ꢕꢌꢈ"ꢉ"ꢅꢂꢇꢍ3ꢇꢒꢉꢅꢙꢎꢃꢍ3ꢄꢉ    
ꢑ%ꢇꢄ"ꢌ$$ꢅꢅꢐ  
M
ꢀꢁꢏ.  
ꢖꢁꢀꢖ  
M
M
M
ꢀꢁꢜ.  
M
ꢖꢁꢏ.  
ꢘꢏ  
ꢘꢀ  
-
8ꢆꢉꢊꢇꢈꢈꢅ=ꢃ"%ꢎ  
>ꢁꢖꢖꢅ0ꢑ+  
ꢕꢌꢈ"ꢉ"ꢅꢂꢇꢍ3ꢇꢒꢉꢅ=ꢃ"%ꢎ  
8ꢆꢉꢊꢇꢈꢈꢅ6ꢉꢄꢒ%ꢎ  
+ꢎꢇ&$ꢉꢊꢅ?ꢌꢔ%ꢃꢌꢄꢇꢈ@  
2ꢌꢌ%ꢅ6ꢉꢄꢒ%ꢎ  
-ꢀ  
,ꢁꢝꢖꢅ0ꢑ+  
:ꢁ>.ꢅ0ꢑ+  
ꢖꢁꢏ.  
ꢖꢁꢗꢖ  
M
M
ꢖꢁ.ꢖ  
ꢀꢁꢏꢜ  
6
2ꢌꢌ%ꢔꢊꢃꢄ%  
2ꢌꢌ%ꢅꢘꢄꢒꢈꢉ  
6ꢉꢇ"ꢅꢙꢎꢃꢍ3ꢄꢉ    
6ꢉꢇ"ꢅ=ꢃ"%ꢎ  
ꢕꢌꢈ"ꢅꢓꢊꢇ$%ꢅꢘꢄꢒꢈꢉꢅ  
ꢕꢌꢈ"ꢅꢓꢊꢇ$%ꢅꢘꢄꢒꢈꢉꢅ0ꢌ%%ꢌ&  
6ꢀ  
ꢀꢁꢖꢗꢅꢚ-2  
ꢖꢞ  
ꢖꢁꢀꢜ  
ꢖꢁ,ꢀ  
.ꢞ  
M
M
M
M
M
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ꢖꢁ.ꢀ  
ꢀ.ꢞ  
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ꢀ.ꢞ  
ꢓꢖꢊꢃꢉ&  
ꢀꢁ ꢂꢃꢄꢅꢀꢅꢆꢃ !ꢇꢈꢅꢃꢄ"ꢉ#ꢅ$ꢉꢇ%!ꢊꢉꢅ&ꢇꢋꢅꢆꢇꢊꢋ'ꢅ(!%ꢅ&! %ꢅ(ꢉꢅꢈꢌꢍꢇ%ꢉ"ꢅ)ꢃ%ꢎꢃꢄꢅ%ꢎꢉꢅꢎꢇ%ꢍꢎꢉ"ꢅꢇꢊꢉꢇꢁ  
ꢏꢁ ꢐꢅꢑꢃꢒꢄꢃ$ꢃꢍꢇꢄ%ꢅ+ꢎꢇꢊꢇꢍ%ꢉꢊꢃ %ꢃꢍꢁ  
,ꢁ ꢓꢃ&ꢉꢄ ꢃꢌꢄ ꢅꢓꢅꢇꢄ"ꢅ-ꢀꢅ"ꢌꢅꢄꢌ%ꢅꢃꢄꢍꢈ!"ꢉꢅ&ꢌꢈ"ꢅ$ꢈꢇ ꢎꢅꢌꢊꢅꢔꢊꢌ%ꢊ! ꢃꢌꢄ ꢁꢅꢕꢌꢈ"ꢅ$ꢈꢇ ꢎꢅꢌꢊꢅꢔꢊꢌ%ꢊ! ꢃꢌꢄ ꢅ ꢎꢇꢈꢈꢅꢄꢌ%ꢅꢉ#ꢍꢉꢉ"ꢅꢖꢁꢀ.ꢅ&&ꢅꢔꢉꢊꢅ ꢃ"ꢉꢁ  
ꢗꢁ ꢓꢃ&ꢉꢄ ꢃꢌꢄꢃꢄꢒꢅꢇꢄ"ꢅ%ꢌꢈꢉꢊꢇꢄꢍꢃꢄꢒꢅꢔꢉꢊꢅꢘꢑꢕ-ꢅ/ꢀꢗꢁ.ꢕꢁ  
0ꢑ+1 0ꢇ ꢃꢍꢅꢓꢃ&ꢉꢄ ꢃꢌꢄꢁꢅꢙꢎꢉꢌꢊꢉ%ꢃꢍꢇꢈꢈꢋꢅꢉ#ꢇꢍ%ꢅꢆꢇꢈ!ꢉꢅ ꢎꢌ)ꢄꢅ)ꢃ%ꢎꢌ!%ꢅ%ꢌꢈꢉꢊꢇꢄꢍꢉ ꢁ  
ꢚ-21 ꢚꢉ$ꢉꢊꢉꢄꢍꢉꢅꢓꢃ&ꢉꢄ ꢃꢌꢄ'ꢅ! !ꢇꢈꢈꢋꢅ)ꢃ%ꢎꢌ!%ꢅ%ꢌꢈꢉꢊꢇꢄꢍꢉ'ꢅ$ꢌꢊꢅꢃꢄ$ꢌꢊ&ꢇ%ꢃꢌꢄꢅꢔ!ꢊꢔꢌ ꢉ ꢅꢌꢄꢈꢋꢁ  
ꢕꢃꢍꢊꢌꢍꢎꢃꢔ ꢍꢎꢄꢌꢈꢌꢒꢋ ꢓꢊꢇ)ꢃꢄꢒ +ꢖꢗꢟꢖ>.0  
DS22182A-page 26  
© 2009 Microchip Technology Inc.  
MCP6051/2/4  
ꢓꢖꢊꢃ& 2ꢌꢊꢅ%ꢎꢉꢅ&ꢌ %ꢅꢍ!ꢊꢊꢉꢄ%ꢅꢔꢇꢍ3ꢇꢒꢉꢅ"ꢊꢇ)ꢃꢄꢒ 'ꢅꢔꢈꢉꢇ ꢉꢅ ꢉꢉꢅ%ꢎꢉꢅꢕꢃꢍꢊꢌꢍꢎꢃꢔꢅꢂꢇꢍ3ꢇꢒꢃꢄꢒꢅꢑꢔꢉꢍꢃ$ꢃꢍꢇ%ꢃꢌꢄꢅꢈꢌꢍꢇ%ꢉ"ꢅꢇ%ꢅ  
ꢎ%%ꢔ144)))ꢁ&ꢃꢍꢊꢌꢍꢎꢃꢔꢁꢍꢌ&4ꢔꢇꢍ3ꢇꢒꢃꢄꢒ  
© 2009 Microchip Technology Inc.  
DS22182A-page 27  
MCP6051/2/4  
12ꢁꢂꢃꢄꢅꢆꢇꢈꢄꢉꢊꢋꢌꢆ03ꢋꢑꢆꢍ3ꢕꢋꢑ)ꢆꢍꢎꢄꢈꢈꢆꢏꢐꢊꢈꢋꢑꢃꢆꢒꢍ0ꢔꢆMꢆ2ꢚ2ꢆꢎꢎꢆ ꢖꢅ!ꢆ"0ꢍꢍꢏꢇ%  
ꢓꢖꢊꢃ& 2ꢌꢊꢅ%ꢎꢉꢅ&ꢌ %ꢅꢍ!ꢊꢊꢉꢄ%ꢅꢔꢇꢍ3ꢇꢒꢉꢅ"ꢊꢇ)ꢃꢄꢒ 'ꢅꢔꢈꢉꢇ ꢉꢅ ꢉꢉꢅ%ꢎꢉꢅꢕꢃꢍꢊꢌꢍꢎꢃꢔꢅꢂꢇꢍ3ꢇꢒꢃꢄꢒꢅꢑꢔꢉꢍꢃ$ꢃꢍꢇ%ꢃꢌꢄꢅꢈꢌꢍꢇ%ꢉ"ꢅꢇ%ꢅ  
ꢎ%%ꢔ144)))ꢁ&ꢃꢍꢊꢌꢍꢎꢃꢔꢁꢍꢌ&4ꢔꢇꢍ3ꢇꢒꢃꢄꢒ  
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L1  
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ꢕꢛ7  
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7
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ꢑ%ꢇꢄ"ꢌ$$ꢅ  
8ꢆꢉꢊꢇꢈꢈꢅ=ꢃ"%ꢎ  
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,ꢁ ꢓꢃ&ꢉꢄ ꢃꢌꢄꢃꢄꢒꢅꢇꢄ"ꢅ%ꢌꢈꢉꢊꢇꢄꢍꢃꢄꢒꢅꢔꢉꢊꢅꢘꢑꢕ-ꢅ/ꢀꢗꢁ.ꢕꢁ  
0ꢑ+1 0ꢇ ꢃꢍꢅꢓꢃ&ꢉꢄ ꢃꢌꢄꢁꢅꢙꢎꢉꢌꢊꢉ%ꢃꢍꢇꢈꢈꢋꢅꢉ#ꢇꢍ%ꢅꢆꢇꢈ!ꢉꢅ ꢎꢌ)ꢄꢅ)ꢃ%ꢎꢌ!%ꢅ%ꢌꢈꢉꢊꢇꢄꢍꢉ ꢁ  
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DS22182A-page 28  
© 2009 Microchip Technology Inc.  
MCP6051/2/4  
APPENDIX A: REVISION HISTORY  
Revision A (May 2009)  
• Original Release of this Document.  
© 2009 Microchip Technology Inc.  
DS22182A-page 29  
MCP6051/2/4  
NOTES:  
DS22182A-page 30  
© 2009 Microchip Technology Inc.  
MCP6051/2/4  
PRODUCT IDENTIFICATION SYSTEM  
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.  
PART NO.  
Device  
X
/XX  
Examples:  
Temperature  
Range  
Package  
a)  
b)  
MCP6051-E/SN:  
8LD SOIC package  
Tape and Reel,  
MCP6051T-E/SN:  
8LD SOIC package  
8LD 2x3 TDFN package  
c)  
d)  
MCP6051-E/MNY:  
Device:  
MCP6051:  
MCP6051T:  
Single Op Amp  
MCP6051T-E/MNY: Tape and Reel,  
8LD 2x3 TDFN package  
Single Op Amp (Tape and Reel)  
(SOIC and 2x3 TDFN)  
Dual Op Amp  
MCP6052:  
MCP6052T:  
Dual Op Amp (Tape and Reel)  
(SOIC and 2x3 TDFN)  
Quad Op Amp  
Quad Op Amp (Tape and Reel)  
(SOIC and TSSOP)  
a)  
b)  
MCP6052-E/SN:  
MCP6052T-E/SN:  
8LD SOIC package  
Tape and Reel,  
8LD SOIC package  
8LD 2x3 TDFN package  
MCP6054:  
MCP6054T:  
c)  
d)  
MCP6052-E/MNY:  
MCP6052T-E/MNY: Tape and Reel  
8LD 2x3 TDFN package  
Temperature Range:  
Package:  
E
= -40°C to +125°C  
a)  
b)  
MCP6054-E/SL:  
MCP6054T-E/SL:  
14LD SOIC package  
Tape and Reel,  
MNY *  
= Plastic Dual Flat, No Lead, (2x3 TDFN ) 8-lead  
SL  
SN  
ST  
=
=
=
Plastic SOIC (150 mil Body), 14-lead  
Plastic SOIC, (150 mil Body), 8-lead  
Plastic TSSOP (4.4mm Body), 14-lead  
14LD SOIC package  
14LD TSSOP package  
Tape and Reel,  
c)  
d)  
MCP6054-E/ST:  
MCP6054T-E/ST:  
* Y = Nickel palladium gold manufacturing designator. Only  
available on the TDFN package.  
14LD TSSOP package  
© 2009 Microchip Technology Inc.  
DS22182A-page 31  
MCP6051/2/4  
NOTES:  
DS22182A-page 32  
© 2009 Microchip Technology Inc.  
Note the following details of the code protection feature on Microchip devices:  
Microchip products meet the specification contained in their particular Microchip Data Sheet.  
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the  
intended manner and under normal conditions.  
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our  
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data  
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.  
Microchip is willing to work with the customer who is concerned about the integrity of their code.  
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not  
mean that we are guaranteeing the product as “unbreakable.”  
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our  
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts  
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.  
Information contained in this publication regarding device  
applications and the like is provided only for your convenience  
and may be superseded by updates. It is your responsibility to  
ensure that your application meets with your specifications.  
MICROCHIP MAKES NO REPRESENTATIONS OR  
WARRANTIES OF ANY KIND WHETHER EXPRESS OR  
IMPLIED, WRITTEN OR ORAL, STATUTORY OR  
OTHERWISE, RELATED TO THE INFORMATION,  
INCLUDING BUT NOT LIMITED TO ITS CONDITION,  
QUALITY, PERFORMANCE, MERCHANTABILITY OR  
FITNESS FOR PURPOSE. Microchip disclaims all liability  
arising from this information and its use. Use of Microchip  
devices in life support and/or safety applications is entirely at  
the buyer’s risk, and the buyer agrees to defend, indemnify and  
hold harmless Microchip from any and all damages, claims,  
suits, or expenses resulting from such use. No licenses are  
conveyed, implicitly or otherwise, under any Microchip  
intellectual property rights.  
Trademarks  
The Microchip name and logo, the Microchip logo, Accuron,  
dsPIC, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro,  
PICSTART, rfPIC, SmartShunt and UNI/O are registered  
trademarks of Microchip Technology Incorporated in the  
U.S.A. and other countries.  
FilterLab, Hampshire, Linear Active Thermistor, MXDEV,  
MXLAB, SEEVAL, SmartSensor and The Embedded Control  
Solutions Company are registered trademarks of Microchip  
Technology Incorporated in the U.S.A.  
Analog-for-the-Digital Age, Application Maestro, CodeGuard,  
dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,  
ECONOMONITOR, FanSense, In-Circuit Serial  
Programming, ICSP, ICEPIC, Mindi, MiWi, MPASM, MPLAB  
Certified logo, MPLIB, MPLINK, mTouch, nanoWatt XLP,  
PICkit, PICDEM, PICDEM.net, PICtail, PIC32 logo, PowerCal,  
PowerInfo, PowerMate, PowerTool, REAL ICE, rfLAB, Select  
Mode, Total Endurance, TSHARC, WiperLock and ZENA are  
trademarks of Microchip Technology Incorporated in the  
U.S.A. and other countries.  
SQTP is a service mark of Microchip Technology Incorporated  
in the U.S.A.  
All other trademarks mentioned herein are property of their  
respective companies.  
© 2009, Microchip Technology Incorporated, Printed in the  
U.S.A., All Rights Reserved.  
Printed on recycled paper.  
Microchip received ISO/TS-16949:2002 certification for its worldwide  
headquarters, design and wafer fabrication facilities in Chandler and  
Tempe, Arizona; Gresham, Oregon and design centers in California  
and India. The Company’s quality system processes and procedures  
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping  
devices, Serial EEPROMs, microperipherals, nonvolatile memory and  
analog products. In addition, Microchip’s quality system for the design  
and manufacture of development systems is ISO 9001:2000 certified.  
© 2009 Microchip Technology Inc.  
DS22182A-page 33  
WORLDWIDE SALES AND SERVICE  
AMERICAS  
ASIA/PACIFIC  
ASIA/PACIFIC  
EUROPE  
Corporate Office  
Asia Pacific Office  
Suites 3707-14, 37th Floor  
Tower 6, The Gateway  
Harbour City, Kowloon  
Hong Kong  
Tel: 852-2401-1200  
Fax: 852-2401-3431  
India - Bangalore  
Tel: 91-80-3090-4444  
Fax: 91-80-3090-4080  
Austria - Wels  
Tel: 43-7242-2244-39  
Fax: 43-7242-2244-393  
2355 West Chandler Blvd.  
Chandler, AZ 85224-6199  
Tel: 480-792-7200  
Fax: 480-792-7277  
Technical Support:  
http://support.microchip.com  
Web Address:  
www.microchip.com  
Denmark - Copenhagen  
Tel: 45-4450-2828  
Fax: 45-4485-2829  
India - New Delhi  
Tel: 91-11-4160-8631  
Fax: 91-11-4160-8632  
France - Paris  
Tel: 33-1-69-53-63-20  
Fax: 33-1-69-30-90-79  
India - Pune  
Tel: 91-20-2566-1512  
Fax: 91-20-2566-1513  
Australia - Sydney  
Tel: 61-2-9868-6733  
Fax: 61-2-9868-6755  
Atlanta  
Duluth, GA  
Tel: 678-957-9614  
Fax: 678-957-1455  
Germany - Munich  
Tel: 49-89-627-144-0  
Fax: 49-89-627-144-44  
Japan - Yokohama  
Tel: 81-45-471- 6166  
Fax: 81-45-471-6122  
China - Beijing  
Tel: 86-10-8528-2100  
Fax: 86-10-8528-2104  
Italy - Milan  
Tel: 39-0331-742611  
Fax: 39-0331-466781  
Korea - Daegu  
Tel: 82-53-744-4301  
Fax: 82-53-744-4302  
Boston  
China - Chengdu  
Tel: 86-28-8665-5511  
Fax: 86-28-8665-7889  
Westborough, MA  
Tel: 774-760-0087  
Fax: 774-760-0088  
Netherlands - Drunen  
Tel: 31-416-690399  
Fax: 31-416-690340  
Korea - Seoul  
China - Hong Kong SAR  
Tel: 852-2401-1200  
Fax: 852-2401-3431  
Tel: 82-2-554-7200  
Fax: 82-2-558-5932 or  
82-2-558-5934  
Chicago  
Itasca, IL  
Tel: 630-285-0071  
Fax: 630-285-0075  
Spain - Madrid  
Tel: 34-91-708-08-90  
Fax: 34-91-708-08-91  
China - Nanjing  
Tel: 86-25-8473-2460  
Fax: 86-25-8473-2470  
Malaysia - Kuala Lumpur  
Tel: 60-3-6201-9857  
Fax: 60-3-6201-9859  
Cleveland  
UK - Wokingham  
Tel: 44-118-921-5869  
Fax: 44-118-921-5820  
Independence, OH  
Tel: 216-447-0464  
Fax: 216-447-0643  
China - Qingdao  
Tel: 86-532-8502-7355  
Fax: 86-532-8502-7205  
Malaysia - Penang  
Tel: 60-4-227-8870  
Fax: 60-4-227-4068  
Dallas  
Addison, TX  
Tel: 972-818-7423  
Fax: 972-818-2924  
China - Shanghai  
Tel: 86-21-5407-5533  
Fax: 86-21-5407-5066  
Philippines - Manila  
Tel: 63-2-634-9065  
Fax: 63-2-634-9069  
Detroit  
China - Shenyang  
Tel: 86-24-2334-2829  
Fax: 86-24-2334-2393  
Singapore  
Tel: 65-6334-8870  
Fax: 65-6334-8850  
Farmington Hills, MI  
Tel: 248-538-2250  
Fax: 248-538-2260  
China - Shenzhen  
Tel: 86-755-8203-2660  
Fax: 86-755-8203-1760  
Taiwan - Hsin Chu  
Tel: 886-3-6578-300  
Fax: 886-3-6578-370  
Kokomo  
Kokomo, IN  
Tel: 765-864-8360  
Fax: 765-864-8387  
China - Wuhan  
Tel: 86-27-5980-5300  
Fax: 86-27-5980-5118  
Taiwan - Kaohsiung  
Tel: 886-7-536-4818  
Fax: 886-7-536-4803  
Los Angeles  
Mission Viejo, CA  
Tel: 949-462-9523  
Fax: 949-462-9608  
China - Xiamen  
Tel: 86-592-2388138  
Fax: 86-592-2388130  
Taiwan - Taipei  
Tel: 886-2-2500-6610  
Fax: 886-2-2508-0102  
Santa Clara  
China - Xian  
Tel: 86-29-8833-7252  
Fax: 86-29-8833-7256  
Thailand - Bangkok  
Tel: 66-2-694-1351  
Fax: 66-2-694-1350  
Santa Clara, CA  
Tel: 408-961-6444  
Fax: 408-961-6445  
China - Zhuhai  
Tel: 86-756-3210040  
Fax: 86-756-3210049  
Toronto  
Mississauga, Ontario,  
Canada  
Tel: 905-673-0699  
Fax: 905-673-6509  
03/26/09  
DS22182A-page 34  
© 2009 Microchip Technology Inc.  

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